WO2006034682A1 - Element semi-conducteur dote de composants noyes dans une masse de boitier en plastique - Google Patents

Element semi-conducteur dote de composants noyes dans une masse de boitier en plastique Download PDF

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Publication number
WO2006034682A1
WO2006034682A1 PCT/DE2005/001674 DE2005001674W WO2006034682A1 WO 2006034682 A1 WO2006034682 A1 WO 2006034682A1 DE 2005001674 W DE2005001674 W DE 2005001674W WO 2006034682 A1 WO2006034682 A1 WO 2006034682A1
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Prior art keywords
semiconductor
system carrier
adhesion promoter
layer
semiconductor component
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PCT/DE2005/001674
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German (de)
English (en)
Inventor
Angela Kessler
Joachim Mahler
Edmund Riedl
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Infineon Technologies Ag
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Publication of WO2006034682A1 publication Critical patent/WO2006034682A1/fr

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49579—Lead-frames or other flat leads characterised by the materials of the lead frames or layers thereon
    • H01L23/49586—Insulating layers on lead frames
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3142—Sealing arrangements between parts, e.g. adhesion promotors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
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    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
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    • H01L2224/45012—Cross-sectional shape
    • H01L2224/45015—Cross-sectional shape being circular
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48464—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area also being a ball bond, i.e. ball-to-ball
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    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
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    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/85909—Post-treatment of the connector or wire bonding area
    • H01L2224/8592—Applying permanent coating, e.g. protective coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01013—Aluminum [Al]
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    • H01L2924/01029—Copper [Cu]
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    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12044—OLED
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H01L2924/183—Connection portion, e.g. seal
    • H01L2924/18301—Connection portion, e.g. seal being an anchoring portion, i.e. mechanical interlocking between the encapsulation resin and another package part

Definitions

  • the invention relates to a semiconductor component with semiconductor component components embedded in plastic housing composition, wherein the surfaces of the semiconductor component components partially comprise an adhesion promoter layer.
  • the invention relates to the use of organosilicon and / or organometallic compounds for producing an adhesion promoter layer between a system carrier and a plastic housing composition.
  • the invention relates to methods for the production of semiconductor components, system carriers and such an adhesion promoter layer.
  • a lack of adhesion between a leadframe and the plastic housing compound in semiconductor components causes moisture to build up in the boundary layer between the system carrier and the plastic housing material. This moisture. It expands abruptly when the semiconductor device during soldering on a circuit board in the shortest possible time from room temperature to temperatures up to 260 0 C is heated. As a consequence of the sudden expansion of the moisture content, cracks and / or breaks in the plastic housing of the semiconductor component are what is termed the "popcorn effect".
  • a metallic system carrier has a galvanically deposited adhesive layer of metal oxides, in particular the metals zinc and chromium to form a dendritic morphology.
  • This component and the manufacturing method have the disadvantage that such a dendritic morphology by galvani ⁇ cal deposition exclusively on metallic surfaces can be prepared so that this primer layer is not for semiconductor device components, such as system carriers made of ceramic or printed circuit board material, without prior coating with a short-circuiting but metallically conductive layer, can be produced.
  • Document DE 102 21 503 discloses a metal counterpart partially provided in a surface section with nanopores which can be used as a connection, support or line component for a semiconductor component.
  • the nanopores in surface areas of the metal object improve the adhesion to a plastic housing composition of a semiconductor component.
  • This known object also has the disadvantage that an improvement in adhesion can only take place on surfaces of metals and can not be used for different materials of semiconductor device components of a semiconductor device.
  • This reliable adhesion between the plastic housing composition and the different materials of the semiconductor component components made of metal, ceramic or other plastic materials is to be achieved before application or before embedding the semiconductor component components in the plastic housing composition.
  • a semiconductor device with semiconductor device components embedded in plastic housing material is provided.
  • the surfaces of the semiconductor device components partially comprise a primer layer having microporous morphology between the semiconductor device components and the plastic package.
  • the average thickness D of this adhesion promoter layer with microporous morphology is between 5 nm ⁇ D ⁇ 300 nm.
  • the adhesion promoter layer comprises semiconducting and / or metal oxides of a reactive compound of oxygen and organometallic molecules.
  • metal-organic molecules are understood as meaning organic molecules which have semiconductor elements and / or metal elements as radicals and / or central atom.
  • the organometallic molecules in this context also include silanes which, instead of the central carbon atom of organic compounds, have corresponding tetravalent semiconductor atoms, such as silicon.
  • an advantage of this semiconductor component is that the adhesion promoter layer can be arranged on all surfaces of semiconductor component parts made of a very wide variety of materials, so that it forms a moisture and corrosion-resistant boundary layer between metal surfaces, ceramic surfaces and / or other plastic surfaces
  • Semiconductor components and the material of the plastic housing composition which consists, for example, of an epoxy resin forms.
  • the Haftvermitt ⁇ ler Anlagen of a semiconductor and / or metal oxide of a reactive compound of oxygen and organometallic Mo ⁇ molecules is thus no longer, as known primer layers in the prior art, limited to metallic surfaces, but can also be applied to system supports, the one ceramic plate or a circuit board with correspondingly structured metallic coating.
  • the adhesion promoter layer according to the invention With the adhesion promoter layer according to the invention, a surface refinement of different materials of semiconductor device components is achieved, which ensures high reliability even under extreme humidity and temperature loadings of the semiconductor components.
  • the adhesion promoter layer according to the invention on the surfaces of the semiconductor device components, the result is an optimum composite system consisting of the totality of carrier substrate surface-interface plastic housing composition. This composite system is determined by the stress behavior in the boundary surface as a result of polymerization shrinkage, plastic swellings and, to a particular extent, by the different thermal expansion coefficients of ceramics, metals and plastics.
  • an interface In order to enable this redistribution of forces, an interface must thus have a certain thickness, which distributes the forces acting on a larger volume. It is therefore not only important to achieve a high degree of anchoring between semiconductor device components and the embedding plastic housing composition, but also to ensure optimum elasticity by property gradients in the polymer layer of the plastic housing composition.
  • the bond strength is thus not determined solely by micro-anchoring, but achieved in summary by a chemically adhäsi ⁇ ve, a micro-retentive and a micro-elastic component.
  • the chemical component is determined by the chemical surface structure of the carrier substrate and influenced by the reactive or adhesive groups of the adhesion promoter layer.
  • the adhesion promoter layer comprises semiconductor and / or metal oxides of the elements Al, B, Ge, In, Pb, Sb, Si,. Sn, Sr, Te, Tl or Zn on.
  • Semiconductor and / or metal elements have the advantage that of these elements organometallic compounds are known, which are suitable for the formation of a primer layer with microporous morphology.
  • organometallic compounds are known, which are suitable for the formation of a primer layer with microporous morphology.
  • a color distinction of the adhesion promoter layer from the surface of the semiconductor device components can be achieved in an advantageous manner.
  • mixtures of different organometallic compounds of these abovementioned elements can advantageously be formed by co-combustion in a flame-retardant system.
  • the resulting adhesion promoter layer preferably comprises a semiconductor and / or metal oxide of the group Al 2 O 3 , B 2 O 3 , GeO 2 , In 2 O 3 , PbO, Sb 2 O 4 , Sb 4 O 6 , SiO 2 , SnO, SnO 2 , SrO, Te 2 O 5 , TeO 2 , TeO 3 , Tl 2 O 3 or ZnO or mixtures thereof.
  • These oxides have the advantage that they can provide intensive coupling to metallic surfaces.
  • the oxides of the semiconductors, such as SiO 2 and GeO 2 are also able to form a bond with printed circuit board surfaces and ceramic surfaces with high adhesive strength.
  • the adhesion promoter layer comprises silicate compounds.
  • Si ⁇ silicate compounds have the advantage that they form a chemical bond to the plastic, wherein the silicates on Si-C bonds are capable of forming hydrolysis stable, chemical bonds Bin ⁇ , while bonds to other metals, in the form of complexes of different Art be formed, are more unstable.
  • the interaction between see silicates and plastic housing composition of considerable. Complexity, whereby water molecules can cause the formation of Oxyhydrat füren a kind of flexible binding state.
  • couplings of silicates with plastics have already been proven technically for many years.
  • adhesion-improving effects are also to be expected. However, these adhesion-improving effects are markedly lower than those of hydrolyzable groups which form a silicate skeleton via the formation and condensation of Si-OH groups.
  • the Si-OH groups condense with each other and with OH groups of the carrier substrate.
  • Silicate compounds thus have the advantage that they can form a stable bond with the plastic housing composition both with respect to the metals and with the plastic housing composition, and between plastic materials of the semiconductor component components and the surrounding plastic housing material.
  • the microporous surface structure of the primer layer according to the invention also increases the reaction surface area and introduces micro-retentive adhesive elements into the interfaces.
  • Such a silicate layer also has the advantage that silicates can enter into chemical bonds with a large number of elements and materials, so that application of the silicate also permits formation of stable silicate structures in the boundary surfaces.
  • the porosity of the adhesion promoter layer gradually increases from a non-porous coating on the surfaces of the semiconductor component components to a microporous morphology in the transition region to the plastic housing composition. Due to the gradual increase in the porosity of an initially closed adhesion promoter layer to a microporous morphology of the surface, the surface of the semiconductor device components is protected from interfacial corrosion in the metal-plastic composite, while due to the gradual increase in porosity with the thickness of the adhesion promoter layer, the toothing the plastic housing composition is intensified. In this case, the material of the adhesion promoter layer with the polymeric Kunststoff ⁇ stoffgephinusemasse complex bonds.
  • the adhesion promoter layer is a layer applied by means of flame pyrolysis.
  • flame pyrolysis an organometallic compound of the above-mentioned elements is decomposed in a gas / air flame.
  • the gas used for the gas / air flame is preferably methane, butane or propane.
  • a MeO x layer is on the surfaces of the assembled semiconductor device components ab ⁇ divorced. In this case, Me is understood to mean the above-described semiconductor and / or metal elements.
  • the average layer thickness D deposited thereby lies between 5 nm ⁇ D ⁇ 300 nm, preferably the average layer thickness D is between 5 nm ⁇ D ⁇ 40 nm.
  • the heating of the semiconductor device components during the coating can be particularly advantageous the preferred variant to below 100 0 C.
  • the effective flame time of the components is only in the second range.
  • the reaction products can be disposed of in amorphous form in an environmentally friendly manner, which results in extremely small amounts.
  • the layer formation itself takes place by the respectively selected flame conditions on the surfaces of the semiconductor device components and does not arise from particle formation in the gas phase with subsequent deposition of these particles on the semiconductor device components, but only the formation of oligomeric structures occurs on the surfaces of the Semiconductor device components have a thickness-dependent morphology, as mentioned above.
  • the semiconductor component has as a semiconductor device component a wiring substrate with structured metal coating on.
  • a wiring substrate with structured metal coating can be coated with the usual adhesion promoter layers only in the area of the structured metal coating, while the insulating surface areas can not be galvanically coated with the conventional methods, unless one risks one thin, short-circuiting, metallic coating of the entire wiring substrate.
  • both the region of the wiring substrate which is nonconductive and the region of the substrate with structured metal coating can be completely and uniformly provided with an adhesion promoter layer.
  • the semiconductor component has as a semiconductor component component a ceramic substrate with structured metal layers.
  • a ceramic substrate with structured metal layers are used for the construction of semiconductor components in high-frequency technology.
  • the semiconductor component has as a semiconductor component component a printed circuit board with structured metal coating.
  • regions of the insulating plate can be treated with the same
  • the adhesion promoter layer to be coated according to the invention such as the structured metal coating on the printed circuit board, so that an intensive connection to the plastic housing composition covering the printed circuit board becomes possible.
  • the most frequent application of the adhesion promoter layer is for semiconductor components which have semiconductor components as semiconductor component components which pass over outside the plastic housing composition into external flat conductors as external contacts.
  • Such inner flat conductors have a solid metal body, the surfaces of which can now enter into intensive connection with the surrounding plastic housing composition with the aid of the adhesion promoter layer according to the invention.
  • a further aspect of the invention relates to a system carrier with a plurality of semiconductor component positions arranged one after the other and / or one after the other in rows and / or columns.
  • Such system carriers serve to accommodate semiconductor device components on a spatial wiring structure with chip pads for semiconductor chips and contact pads for electrical connections to electrodes of the semiconductor chip.
  • the surfaces of the system carrier according to the invention selectively have a semiconductor and / or metal oxide of a reactive compound of oxygen and organometallic molecules on a primer layer having a microporous morphology.
  • the adhesion promoter layer in turn has a thickness D between 5 nm ⁇ D ⁇ 300 nm.
  • the chip interfaces and the connec- contact surfaces of the system carrier free from the Haftver ⁇ middle layer.
  • the adhesion promoter layer itself corresponds in its composition and in its morphology to the adhesion promoter layer, as has already been described in detail above for application to semiconductor component components.
  • the system carrier can therefore have a ceramic substrate or a wiring substrate with a structured metal coating or a printed circuit board with a structured coating.
  • the system carrier can be selectively coated with an adhesion promoter layer according to the invention on the surfaces which come into contact with the plastic housing composition during the production of the semiconductor components.
  • the system carrier has inner flat conductors with contact pads and chip pads. These contact pads and / or chip connecting surfaces merge into outer flat conductors and are held by a leadframe of the system carrier.
  • the leadframe can have a flat conductor band with a multiplicity of semiconductor component positions arranged one behind the other.
  • the inner flat conductors have, on their surfaces, the adhesion promoter layer whose composition and structure have already been described in detail above. However, the contact terminal surfaces, the chip pads, the outer flat conductors and the leadframe remain free of the adhesion promoter layer.
  • a system carrier is a preliminary product for the production of semiconductor components and can be produced by suppliers of the semiconductor industry as a precursor.
  • the possibility of reserving the surface surfaces of the contact pads, chip pads, outer flat conductors and leadframe can be achieved by afford Kunststoff ⁇ Liche method, as described, for example, in the above-mentioned document US-5,205,036. Alternative methods will be discussed below.
  • the latter has a perforation along a system carrier frame for its positioning in a placement machine.
  • system carrier preferably on the
  • Contact pads and the chip pads have a metal alloy plating of silver and / or a solder alloy.
  • the contact connection surfaces and / or the chip connection surfaces not only remain free of adhesion promoter layer but are themselves covered by a coating that promotes a soldering or bonding process.
  • the system carrier itself has in a further preferred embodiment of the invention pure copper and / or a copper alloy, which are due to their high electrical conductivity Leitfä ⁇ advantage.
  • a method for producing a system carrier for semiconducting components comprises the following method steps. First, a substrate plate having at least one metal surface is patterned into a system carrier. In the structuring, a plurality of successive patterns for accommodating semiconductor device components is formed Semiconductor device positions generated. Subsequently, the surfaces of the system carrier, which form a boundary surface with a plastic casing in the production of semiconductor components, are coated with an adhesion promoter layer.
  • a microporous morphology of the semiconductor mediator layer is produced, which comprises semiconducting and / or metal oxides of a reactive compound of oxygen and organometallic molecules.
  • This adhesion promoter layer is applied in a mean thickness D between 5 nm ⁇ D ⁇ 300 nm.
  • semiconductor oxides or metal oxides are deposited on the surfaces of the system carrier. These semiconductor oxides or metal oxides form a closed layer only a few nanometers thick in the immediate vicinity of the surfaces to be coated, which at the same time protects the surfaces against erosion and corrosion.
  • the pore density increases, so that a microporous morphology occurs, which can form a high affinity for the plastic housing composition and a high adhesion to the plastic housing composition.
  • the coating process itself can be accelerated by introducing butane or propane with oxygen in a reaction space to which the organometallic molecules are supplied.
  • the organometallic molecule used is preferably a tetramethylsilane and derivatives of tetramethylsilane, preferably tetraethylenesilane, which has a molecular formula of SiC 4 H 3 .
  • silicates SiO x are deposited on the surfaces, while the volatile reaction products form carbon dioxide and water and escape.
  • a flame-pyrolytic deposition is carried out during the coating of the surfaces of the system carrier.
  • a flame-pyrolytic deposition has the advantage that the above-mentioned reaction products are formed in a fuel gas stream from which semiconductor oxides and / or metal oxides of the organometallic compound are deposited on the surfaces of the system carrier.
  • this pyrolytic deposition can take place independently of the material of the surfaces.
  • the flame pyrolysis is simple and universally applicable. Since only a very thin layer is to be applied, which preferably has a thickness between 5 and 40 nm, the material costs are also extremely low. Further, se the advantage that the temperature of the surfaces of the Halb ⁇ conductor device components is not substantially increased and can be ten preferably gehal ⁇ under suitable process conditions below 100 0 C, the Flammpyroly ⁇ , especially since the surfaces are only for a few seconds with the flame of the coating unit into contact ,
  • an organometallic compound of a semiconductor element or of a metal element and an oxygen-containing compound with a fuel gas are fed to a coating plant for the flame-pyrolytic coating, with semiconductor or metal oxides being used as reaction products of the compounds introduced Separate freely lying surfaces of the system carrier on all sides.
  • a ring burner is preferably used in which a flame ring is produced by which the system carrier is guided.
  • surface areas to be kept free with adhesion promoter prior to coating of the system carrier are coated with a protective coating. layer covered. After coating, this protective layer can advantageously be swelled, so that it can be removed with the overlapping adhesive layer on the surface areas to be kept free.
  • the surface areas to be kept free are only exposed again after the surfaces of the system carrier have been coated with adhesion promoter.
  • the surface areas to be protected on which the bonding agent should remain can be done by laser ablation or by plasma etching.
  • a method for producing a plurality of semiconductor components using a system carrier having a plurality of semiconductor component positions additionally has the following method steps.
  • a system carrier with selectively applied adhesion promoter layer is provided on its surfaces.
  • the selectivity refers to the fact that only the surface areas of the system carrier are covered with a bonding agent layer which is intended to form a boundary layer with a plastic housing composition.
  • Contact connection surfaces for electrical connections and / or chip connection surfaces for contacting a semiconductor chip are kept free of the adhesion promoter layer.
  • the semiconductor component components such as semiconductor chips, in the semiconductor component positions are then applied to such a system carrier by connecting the semiconductor chips to contact pads of the system carrier via electrical connection elements. After applying all the semiconductor device components on the system carrier, the semiconductor device components embedded in a Kunststoffgeffeu- semasse. Finally, the system carrier can then be separated into individual semiconductor components.
  • the system carrier itself may be a printed circuit board with a metal structure or a multilayer ceramic plate or a metallic leadframe.
  • the advantage of this method is that the application of the adhesion promoter middle layer is independent of the material of the semiconductor component parts.
  • metal flip-chip contacts, as well as metallic bonding wires can also be pyrolytically provided with an adhesion-promoting middle layer, such as the surfaces of the semiconductor chip and the surfaces of the system carrier.
  • This property of the adhesion promoter layer and of the pyrolysis process are used in particular if the not yet coated surfaces of semiconductor component components are likewise to be coated with the adhesion promoter before the semiconductor device components are embedded in a plastic housing composition.
  • a system carrier which initially has no adhesion promoter layer.
  • semi-conductor component components such as semiconductor chips
  • the adhesion promoter layer has the abovementioned properties with respect to the average thickness D and porosity.
  • the system carrier can be separated into individual semiconductor components.
  • it is up to the semiconductor manufacturer to first mount the entire semiconductor device components on a conventional carrier substrate and then to apply the adhesion promoter layer itself to the surfaces of these semiconductor device components.
  • An advantage of this alternative method is that none of the surfaces to be covered with a plastic housing composition are free of a bonding agent layer.
  • FIG. 1 shows a scanning electron micrograph of a
  • Adhesive layer on a metallic system carrier of a semiconductor device Adhesive layer on a metallic system carrier of a semiconductor device
  • FIG. 2 shows a reaction scheme of a flame-pyrolytic coating of surfaces of semiconductor components with an adhesion promoter comprising silicates
  • FIG. 3 shows a schematic diagram of the composition of a primer layer on a copper system carrier according to FIG. 1;
  • FIG. 4 shows a schematic diagram of an analysis of FIG
  • FIG. 5 shows a schematic diagram of the shear strength in the boundary layer between system carrier material and plastic housing composition without and with adhesion promoter layer;
  • FIG. 6 shows a schematic cross-section of an inner flat conductor embedded in a plastic housing composition, coated on both sides;
  • FIG. 7 shows a schematic cross section of a wiring substrate made of an insulating printed circuit board with a structured metal coating and a bonding agent layer.
  • FIG. 8 shows a schematic plan view of a metallic system carrier whose surface is partially provided with a bonding agent layer
  • FIG. 9 shows a schematic cross section through a semiconductor device with semiconductor device components whose surfaces have an adhesion promoter layer.
  • FIG. 1 shows a scanning electron micrograph of a bonding agent layer 5 on a metallic system carrier 20 of a semiconductor component.
  • the adhesion promoter layer 5 has an average thickness D which is between 5 and 300 nm and, in the illustrated embodiment of the invention, has a preferred thickness which varies between 5 and 40 nm.
  • the lower 5 to 10 nm of the adhesion promoter layer 5 cover the surface 4 of this metallic semiconductor component 3 in a completely closed morpholino. so that the surface 4 is protected from interfacial corrosion and erosion.
  • the porosity of the adhesion promoter layer 5 increases and has a microporous morphology 6 in the uppermost region.
  • This microporous morphology 6 of the adhesion promoter layer 5 supports the toothing with a plastic housing composition to be applied to the surface 4.
  • this microporous morphology 6 of the adhesion promoter layer 5 promotes the formation of chemical bridges between the plastic housing composition and the adhesion promoter layer 5.
  • the adhesion promoter layer 5 forms a type of gel structure which superficially penetrates the plastic housing and thus forms an elastic transition layer between the system carrier 20 and the not ge showed plastic housing composition forms.
  • This transition layer between the microporous morphology 6 of the adhesion promoter layer 5 and the plastic housing composition provides for a compensation of the thermal expansion coefficients between the metallic layer.
  • Plastic the plastic housing compound The section of a system carrier 20 shown in FIG. 1 represents a surface area of an inner flat conductor 10.
  • Figure 2 shows a reaction scheme of a flame pyrolytic
  • an adhesion promoter comprising silicates.
  • an organometallic compound in the form of a tetramethylsilane and derivatives of tetramethylsilane, preferably tetraethylenesilane, which has a molecular formula of SiCeHi 2 is fed to a flame coating system.
  • This tetraethylenesilane has as its central Me atom a silicon atom Si which is composed of four organic ethyl- molecules -CH 3 , as shown on the left side of FIG.
  • the tetraethylenesilane SiC 4 Hi 2 is mixed, for example, with a propane gas of the empirical formula C 3 H 8 and with oxygen 13O 2 and burnt, the reaction products being formed with volatile carbon dioxide 7CO 2 and water 10H 2 O and SiO x- silicates, preferably silicon dioxide SiO 2 , on the surface of the semiconductor device component to be coated.
  • a dashed line is shown in Figure 2, another reaction option in which instead of the propane with a molecular formula C 3 H 8 Bu ⁇ tan with the empirical formula C 3 H1 0 is supplied.
  • two tetraethylene silane molecules can react with two butane molecules and twenty-nine 0 2 molecules to precipitate SiO x silicate and to the volatile carbon dioxide I 6 CO 2 , as well as to volatile water 22H 2 O in the butane flame.
  • butane C 4 H 10 it is also possible to use methane with the empirical formula CH 4 for flame pyrolysis.
  • an SiO x layer is deposited on the introduced semiconductor device components as an adhesion-promoting middle layer.
  • the necessary average Schicht ⁇ thickness is only 5 to 40 nm and can be deposited up to 300 nm, if necessary.
  • Terbauteilkomponenten heating of the Halblei ⁇ the coating to less than 100 0 C can be reduced by a periodic process.
  • the effective flame time is in the range of seconds.
  • Surface cleaning and surface activation are simultaneously combined with such a flame coating so that the deposited silicates closely bond to the surface which is metallic in this case.
  • the free ge set reaction products, such as silica in amorphous Form, as well as the volatile water and the volatile Kohlendi ⁇ oxide can be disposed of as environmentally friendly as possible by the volatile components are introduced into water and the excess silica is collected or precipitated.
  • FIG. 3 shows a schematic diagram of the composition of an adhesion promoter layer on a copper system carrier according to FIG. 1.
  • the investigation of a few nanometer thick adhesion promoter layers takes place, as the diagram of FIG. 3 shows, by sputtering of the adhesion promoter layer and the surfaces of the copper arranged underneath.
  • the atomization or sputtering time can be plotted on the abscissa of the diagram as a measured value of the layer thickness, while at the same time the atomic concentration in percent is plotted on the ordinal.
  • the atomic concentration in percent can be determined by analyzing the sputtered materials.
  • the composition of the atomized material changes from a pure silicon dioxide into a predominant composition of copper, so that after only five minutes, only copper is atomised.
  • FIG. 4 shows a schematic diagram of an analysis of the composition of the adhesion promoter layer according to FIG. 1.
  • the type of atomized atoms can be determined by measuring the genetic energy in electron volts eV, as shown in FIG. Analytical signal peaks are plotted on the ordinate and the determined kinetic energy in eV on the abscissa. Again, it becomes clear that at the beginning of the sputtering or atomization sputtered material of the adhesion promoter layer of silicon and oxygen.
  • FIG. 5 shows a schematic diagram of the shear strength in the boundary layer between system carrier material and plastic housing composition without and with adhesion promoter layer.
  • the abscissa is a variety of materials and surfaces applied and on the ordinate the shear force in kilograms. The shear force is examined here between a plastic housing composition and the materials indicated on the abscissa.
  • each of the materials in this case copper Cu and a Ni / NiP nickel / nickel phosphor coating, which is often used as a diffusion-inhibiting coating in semiconductor device components, shows two measuring bars each, one measuring bar representing the normal initial state and the second measuring bar the shear strength of the Compound after a preconditioning at 260 0 C and after a cyclic thermal load between -55 0 C and 150 0 C represents.
  • the first group of bars shows that the shearing force at shear tests between plastic molding compound and a copper surface without adhesion promoter coating is initially relatively high, but drops to almost one third after thermal stress.
  • the shear strength of a semiconductor device element made of copper with an adhesion promoter of silicon dioxide or silica is higher in the initial phase without thermal stress than in the case of a copper element without this adhesion promoter layer.
  • This high value is almost retained, even if thermally the boundary layer was heavily loaded.
  • the positive effect of the adhesion promoter layer on diffusion-inhibiting coatings of Ni / NiP becomes even clearer, in which the shear force without any adhesion promoter layer is extremely low and less than 10 kg, while with adhesion-promoting middle layer values above 100 kg in the initial stage and after thermal stress even values above 200 kg are achieved.
  • FIG. 6 shows a schematic cross-section of a plastic housing composition 2 embedded inside flat conductor 10 coated on both sides. This schematic cross section does not show the true thickness ratios between the middle one
  • Such inner flat conductors 10 can have a thickness of the order of magnitude of millimeters, while the mean thickness D of the adhesion-promoting layer 5 is in the range of a few 5 nanometers. If, instead of the inner flat conductor 10, a bonding wire 14 is surrounded by a bonding agent layer 5, then the differences in thickness are considerable in this case too, since bonding wires 14, as connecting elements 13, have a diameter of more than 10 ⁇ m.
  • FIG. 7 shows a schematic cross-section of a wiring substrate 7 comprising a printed circuit board 9 with a structured metal coating 8 and a bonding agent layer 5.
  • a ceramic plate can also form the system substrate 20.
  • the Grenzflä ⁇ surface between adhesive layer 5 and system support 20 ⁇ thus has different interface materials and shows that the pyrolytic deposition inventive principle leads to all materials to an adhesive layer 5 with mikroporiger morphology.
  • the adhesion promoter layer 5 can not only be used for metallic system carriers 20, such as leadframes, but can also be used to improve the adhesion of the surfaces of a benefit and the plastic housing compound arranged above it.
  • the microporous morphology has not only spherical geometries but also dendritic or sponge-like structures.
  • FIG. 8 shows a schematic plan view of a metallic system carrier 20 whose surfaces 19 are partially provided with a bonding agent layer 5.
  • System ⁇ carrier 20 is based on a lead frame 21 having a plurality of semiconductor device positions 23 on a flat conductor ribbon 22.
  • the leadframe 21 has a perforation 25.
  • the upper surfaces 24 of the inner flat conductors 10 are covered, except for contact contact surfaces 17, with the adhesion promoter layer 5 according to the invention, which is illustrated by the hatching of the corresponding surfaces.
  • the contact pads 17, which are kept free of the bonding agent layer 5, are suitable for attaching Provided connecting elements in the form of bonding wires.
  • the inner flat conductors 10 provided with a bonding agent layer 5 merge into outer flat conductors 11 which do not have an adhesion promoter layer. This results in a flat wiring structure 15 made of flat conductors 10, 11 within the flat conductor frame 21, which will partially come into contact with a plastic housing composition and remain partially free of the plastic housing composition.
  • the remaining contact contact surfaces 17 can be provided with a corresponding metal plating 26, for example of a silver solder, in order to improve the bonding properties.
  • FIG. 9 shows a schematic cross-section through a semiconductor device 1 with semiconductor device components 3, the outer surfaces 4 of which have a semiconductor interconnect layer 5.
  • this semiconductor component has been provided with a flame-pyrolytic adhesion-promoting layer 5 after assembly on a system carrier 20.
  • This flame-pyrolytic coating is possible not only on metallic surfaces 24 of the inner flat conductors 10 or of the connecting elements 13 in the form of bonding wires 14, but also on the surfaces of the semiconductor chip 12 and its electrodes 18.
  • the semiconductor component according to the invention differs 1 of semiconductor devices in the prior art, characterized in that non-metallic surfaces 4 are completely covered by the Haft ⁇ mediator layer 5.
  • This uniform coating can take place in a flame tube or by pulling the completely assembled semiconductor component parts 3 through a flame ring, wherein the Residence time in the region of the flame tube or the flame ring is only a few seconds.
  • the outer flat conductors 11, which are not to be provided with a bonding agent layer, are protected from coating in the flame tube or ring burner by applying a protective layer.
  • an organometallic compound or a silicium organic compound is fed into a flame and the resulting silicate or metal oxide is deposited from the gas phase on the surfaces of the semiconductor components 3.
  • the substrate carrier may also be subjected to flame pyrolysis prior to the assembly of the semiconductor component components 3, but then care must be taken that both the contact pads 17 and the chip pads 16 of the system carrier remain free of the coating.
  • the advantage of this process is that it is an easy-to-handle coating process which can be applied on all sides to the surfaces 4 of the semiconductor components to be anchored.

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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

L'invention concerne un élément semi-conducteur doté de composants (3) noyés dans une masse de boîtier en plastique, et notamment l'utilisation de liaisons organosilicium et organométalliques pour réaliser une couche adhésive (5). Cette couchette adhésive (5) disposée sur les surfaces (4) des composants d'éléments semi-conducteurs (3) a une morphologie microporeuse (6) et une épaisseur moyenne D mesurant entre 5 nm = D = 300 nm. Ladite couchette adhésive (5) comprend des oxydes semi-conducteurs et/ou métalliques d'une liaison réactive à partir de molécules organométalliques et d'oxygène.
PCT/DE2005/001674 2004-09-28 2005-09-22 Element semi-conducteur dote de composants noyes dans une masse de boitier en plastique WO2006034682A1 (fr)

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