WO2006018961A1 - 半導体ウェーハの測定方法、その製造工程の管理方法、及び半導体ウェーハの製造方法 - Google Patents
半導体ウェーハの測定方法、その製造工程の管理方法、及び半導体ウェーハの製造方法 Download PDFInfo
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- WO2006018961A1 WO2006018961A1 PCT/JP2005/013936 JP2005013936W WO2006018961A1 WO 2006018961 A1 WO2006018961 A1 WO 2006018961A1 JP 2005013936 W JP2005013936 W JP 2005013936W WO 2006018961 A1 WO2006018961 A1 WO 2006018961A1
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- semiconductor wafer
- wafer
- measuring
- measured
- nanotopography
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01B—MEASURING LENGTH, THICKNESS OR SIMILAR LINEAR DIMENSIONS; MEASURING ANGLES; MEASURING AREAS; MEASURING IRREGULARITIES OF SURFACES OR CONTOURS
- G01B7/00—Measuring arrangements characterised by the use of electric or magnetic techniques
- G01B7/34—Measuring arrangements characterised by the use of electric or magnetic techniques for measuring roughness or irregularity of surfaces
Definitions
- the present invention uses a method for measuring nanotopography of a semiconductor wafer, a method for managing a semiconductor wafer manufacturing process based on the measurement result, and a method for managing the method.
- the present invention relates to a method for manufacturing a semiconductor wafer. Background art
- a semiconductor wafer such as a silicon wafer is manufactured by slicing a single crystal ingot and processing it into a thin disk-like wafer, and an outer peripheral portion to prevent cracking and chipping of the wafer.
- the chamfering process for chamfering the wafer, the lapping process for flattening the wafer, the etching process for removing those processing distortions remaining on the wafer surface, the polishing process for mirroring the wafer surface, and the polishing process are attached. It has a cleaning process that removes contaminants such as abrasives and foreign substances.
- processes such as heat treatment and grinding may be added as necessary, the order of processes may be changed, and the same process may be performed multiple times.
- STI Surface Single Trench Isolation
- CMP Chemical Mechano-Carbonizing
- the fine uneven shape (hereinafter referred to as waviness) on the surface of a semiconductor wafer has not been particularly effective in the device manufacturing process.
- the convex portion is selectively polished by CMP, which causes the problem that the thickness of the insulating film becomes non-uniform due to the waviness.
- Nanotopograph Ii is an index representing the flatness of the wafer surface, and represents the waviness of the unadsorbed wafer surface in the spatial wavelength region from 0.1 mm to several tens of mm.
- Nanotopography is generally measured by devices such as ADE Nanomapper, KLA Tencor NanoPro, Raytex Dynasearch, etc. These devices are optical, and the surface of the object to be measured In order to measure using reflection, the target wafer must have a mirror surface with a certain degree of reflectivity on the surface.
- the values obtained by measuring nanotopography with these measuring devices for low-reflectance wafers with low reflectivity only after intermediate steps of the wafer manufacturing method, such as sliced woofers and grinding woofers, have low accuracy. Reliable power.
- the distortion layer and macro waviness component formed on the surface when cutting the wafer is removed in the double-head grinding process, and the flatness of the wafer is improved. It is disclosed that the undulation of the minute surface generated in the grinding process can be removed.
- the size of the waviness that occurs during slicing may vary greatly depending on the performance of the cutting device used, the wire specifications, and abnormalities such as cutting conditions and wire breakage during cutting.
- the amount of undulation that occurs in the double-head grinding process may vary depending on the relative positional relationship between the turret and wafer and the sharpness of the grindstone.
- the present invention has been made in view of such a problem, and also relates to a wafer having a low surface reflectance after an intermediate process of a semiconductor wafer manufacturing method, such as a slicing process or a grinding process.
- An object of the present invention is to provide a measurement method capable of measuring nanotopography. Furthermore, using this measurement method, we provide a semiconductor wafer manufacturing process management method that manages intermediate processes such as slicing, lapping, grinding, and etching processes, and a semiconductor wafer manufacturing method that uses this management method. The purpose is to do.
- the present invention has been made to solve the above-described problems, and is characterized in that a semiconductor wafer is characterized in that the nanotopography of a semiconductor wafer is measured using a capacitance type shape measuring device. Provides a measurement method.
- the surface of a wafer manufactured through a slicing process, lapping process, grinding process, etching process, etc., which are intermediate processes of a semiconductor wafer manufacturing method, has low reflectivity. Difficult to do. However, since the capacitance type shape measuring apparatus does not use optical surface reflection, nanotopography can be accurately measured for wafers having low surface reflectivity.
- the semiconductor wafer manufactured through the semiconductor wafer manufacturing process is used.
- a method for managing a manufacturing process of a semiconductor wafer characterized by measuring a conductor wafer and managing the manufacturing process based on a result of the measurement.
- the manufacturing process of the semiconductor wafer to be managed is a process of at least one of a slicing process, a wrapping process, a grinding process, and an etching process.
- a method for manufacturing a semiconductor wafer using the method for managing a manufacturing process of the semiconductor wafer is provided.
- the semiconductor wafer manufacturing method using the semiconductor wafer manufacturing process management method it is possible to manufacture a semiconductor wafer with improved nanotopography by quickly grasping abnormalities in the manufacturing process. Yield can be improved.
- the present invention it is possible to monitor nanotopography by measuring the remaining swell even for a semiconductor wafer having a low surface reflectance. Therefore, it is possible to manage the semiconductor wafer manufacturing process before the mirror polishing process to improve the nanotopography, reduce the manufacturing loss due to the abnormal manufacturing process, and improve the yield.
- the woofer can be manufactured.
- FIG. 1 Woofer shape measured by the measuring method of the present invention.
- A Cross-sectional shape data
- b 3D shape data.
- FIG. 2 is a schematic diagram showing the principle of a measurement method using a capacitance type shape measuring apparatus.
- FIG. 3 is a cross-sectional view showing an outline of a measuring method using a capacitance type shape measuring apparatus.
- FIG. 4 is a diagram showing three methods as extrapolation interpolation methods in measurement data processing.
- FIG. 7 is a schematic diagram showing the principle of configuration of a Michelson interferometer.
- FIG. 8 is a schematic view showing a measurement method of Nanomapper.
- FIG. 9 is a graph showing the correlation contribution ratio between measurement data according to the present invention in which the short-wavelength side period and long-wavelength side period of the cutoff wavelength band are changed, and data measured by Nanomapper.
- FIG. 10 A graph in which the correlation contribution ratio between the measurement data according to the present invention in which the short-wavelength period in the cutoff wavelength band is fixed and the long-wavelength period is changed and the data measured with the Nanomapper is examined. is there.
- FIG. 11 A graph in which the correlation contribution ratio between the data measured by the present invention and the data measured by Nanomapper with the long-wavelength period of the cutoff wavelength band fixed and the short-wavelength period changed is examined. is there.
- FIG. 12 (a) Woofer shape measured by the measuring method of the present invention. (B) Woof shape measured with Nanomapper.
- FIG. 13 A woofer shape of the same woofer measured by the measuring method of the present invention and Nanomapper. (b) A graph showing the correlation between the data in (a).
- the present inventor wants to detect the undulation detected in the semiconductor wafer after the mirror polishing process, which is the final process of the semiconductor wafer manufacturing method, at a time after the intermediate process. If the surface of a wafer, such as a wafer after double-head grinding, is measured using a capacitive shape measuring device, the long-period component and the short-period component are removed with a bandpass filter. The present invention was completed by conceiving that data on swell (nanotopography) could be obtained.
- the shape data power of the woofer surface after the intermediate process obtained as described above is obtained.
- the value of the obtained nanotopography is almost the same as the nanotopography of the wafer subjected to the mirror polishing power. I found out.
- FIG. 2 shows the principle of a measurement method using a capacitance type shape measuring apparatus.
- the capacitance type shape measurement is performed based on the thickness of the object to be measured.
- Probe 1 and DUT (silicon wafer) 2 form a capacitance, and the capacitance changes as the distance D changes.
- Capacitance Voltage displacement circuit outputs displacement proportional to D and measures displacement.
- the analysis is performed using the surface displacement a or b rather than using the wafer thickness t. This is because the parameter force called nanotopography is measured with reference to the surface of the silicon wafer.
- the data obtained by measuring the surface displacement a or b is called Warp data.
- the grinding streak is greatly affected by the grinding streak, which is removed by the final mirror polishing process, so that the remaining waviness after the mirror polishing process is evaluated. Is not necessary. Therefore, it is preferable to cut off a wavelength band having a short wavelength side period of 1 mm or less.
- Wavelength bands with a long-wavelength-side period of 50 mm or more are not subject to nanotopography measurement. Therefore, it is preferable to cut off the wavelength band with a long wavelength side period of 50 mm or more.
- Extrapolation is a method of extrapolating the outer shape of the wafer where no data exists. As shown in Fig. 4, there are three types: linear interpolation (Linear), line symmetry (Mirror), and point symmetry (Point). There is a compensation method. Generally, line symmetry is adopted.
- FIGS. 1 and 5 show examples in which the woofer surface after the double-head grinding process was measured using a capacitance measuring device using a capacitance method manufactured by Kobelco Kaken.
- the sample wafer used was a single crystal silicon wafer with a diameter of 300 mm manufactured by the CZ method.
- FIG. 5 shows warp data corresponding to the surface displacement a.
- Fig. 1 shows a bandpass pattern by cutting off wavelength bands with a short wavelength side period of 3 mm or less and a long wavelength side period of 50 mm or more. This is a measurement example when filtering and line symmetric extrapolation are performed.
- Figure 6 shows a map of the nanotopography measured with the optical measuring device Nanomapper after the wafer was polished on both sides.
- a single crystal silicon wafer with a diameter of 300 mm manufactured by the CZ method was used as a sample wafer, and the warp data obtained by measuring the wafer after the double-head grinding process using a capacitance-type shape measuring device was bandpassed.
- the filtered data is shown in Fig. 12 (a)
- the data measured by Nanomapper for the mirror surface wafer obtained by sequentially processing the wafer in the subsequent surface grinding process, etching process, and double-side polishing process is shown in Figure 12 (b).
- the wafer shape data obtained by measuring the wafer after the double-head grinding process by the measurement method of the present invention and the wafer after the final process were measured with Nanomapper. It can be seen that there is a good correlation with the wafer shape data.
- the data obtained by measuring the wafer after the intermediate process of the semiconductor wafer manufacturing method by the inspection using the measuring method of the present invention is the optical data obtained after the mirror polishing process. Since it coincides with the nanotopography data measured using the measuring device, the nanotopography of the wafer surface after the final mirror polishing step can be predicted by performing the measurement of the present invention after the intermediate step.
- woofers are extracted according to the set criteria, measured using the above measurement method, and fed to the manufacturing process when the measurement results exceed the set pass / fail criteria. Do forward and feedback.
- ingot units In the case of wafers after the slicing process, also remove the three forces at the cutting position K'C'P.
- wafers after the double-head grinding process remove 1 to 3 of 25 to 50 wafers. Measure this woofer using the above measurement method.
- the wafer pass / fail standard value is set to 1.5 m or less, and the wafer is judged to be defective.
- the lot is judged to be defective (lot out) and fed back to the manufacturing process. Even if a defective product is found, if at least one is judged acceptable, feedback to the manufacturing process and feed-forward to the final inspection process are performed.
- the conditions for the slicing process cannot be basically adjusted, and analysis will be performed for improvement. Analyzes by layer the material of the slice machine, wire, main roller, etc. where defects occurred.
- the double-head grinding process is adjusted until it reaches the reference value by shifting (adjusting the wheel position on the wheel axis relative to the wafer) and tilting (adjusting the inclination of the wheel surface with respect to the wafer surface). In some cases, the left and right flow rate of the hydrostatic pad holding the wafer is adjusted. If it still cannot be adjusted within the range, replace the carrier and the turret.
- nanotopography When nanotopography is set as a product requirement, the wafers are completely measured and selected in the final inspection process using Nanomapper after the final mirror polishing process. If nanotopography is not set in the product requirements, measure only 25 sheets per lot and provide feedback to the process.
- the slicing process, lapping process, grinding process, etching process, etc. which are intermediate processes of the semiconductor wafer manufacturing method, can be managed, and the manufacturing conditions are reviewed and improved. Early response is possible.
- the quality of woofer can be managed in the intermediate process before the mirror polishing process, so it is possible to reduce product loss and improve yield.
- a semiconductor wafer is manufactured using the above-described method for managing the manufacturing process of a semiconductor wafer, it is possible to manufacture a semiconductor wafer with improved nanotopography by quickly grasping abnormalities in the manufacturing process. This makes it possible to manufacture semiconductor wafers with high yield and efficiency.
- Nanomapper manufactured by ADE which is generally used for measurement of the mirror top wafer nanotopography, will be briefly described.
- Nanomapper uses a Michelson interferometer, and Figure 7 shows the configuration of the Michelson interferometer.
- the light emitted from the light source 3 is converted into parallel light by the collimator lens 4 and divided by the half mirror 8 into two optical paths (amplitude division).
- the two light beams are reflected by the reference mirror 10 and the object to be measured 2 (here, silicon wafers), are reflected back to the original optical path, are superimposed by the half mirror 8, and interfered by the CCD camera 6.
- a striped image ( Figure 6) is captured.
- One reference mirror 10 is a plane (reference surface) polished with high precision, and the shape of the test surface of the other (measurement object 2) is measured.
- the silicon wafer in-plane data captured by the interferometer is subjected to processing such as noise removal, then the window size determined by the setting is moved within the wafer plane, and the PV value in the window (maximum value) By substituting -minimum value) with the center value of the window, it becomes the data of nanotopography.
- the window size is generally 0.5mn!
- Figure 8 shows an example of measurement.
- the choice of window size 11 depends on the wafer standard of the customer (device manufacturer). However, in the management of nanotopography in the intermediate process, which is the object of the present invention, experience is considered in consideration of the correction by mirror finishing in the polishing process. In particular, the window size 11 is often 10mm.
- the optimum cut-off wavelength band for bandpass filtering in the present invention was examined.
- a 300 mm diameter single crystal silicon wafer manufactured by the CZ method was used.
- the 25 wafers after the double-head grinding process were measured by bandpass filtering using the measurement method of the present invention with different combinations of the short-wavelength period and the long-wavelength period cut-off wavelength bands, and then the wafers were measured.
- the mirror surface wafer obtained by sequentially processing the surface in the subsequent steps of the surface grinding step, the etching step, and the double-side polishing step is converted into the Nanomapper (window support).
- the correlation was investigated by matching the PV values on a one-to-one basis. The correlation was compared by the contribution rate (the square of the correlation coefficient).
- the short wavelength side period (no-pass filter) cuts off the wavelength band of 1 mm or less
- the long wavelength side period (low pass filter) cuts off the wavelength band of 50 mm or more.
- the highest correlation was found with 73 (Fig. 9).
- the combination of cutting off the wavelength band of 3 mm or less on the short wavelength side (no-pass filter) and cutting off the wavelength band of 50 mm or more on the long wavelength side period (low pass filter) has a contribution ratio of 0.65. It was found that there was the next highest correlation, and a broad wavelength band could be narrowed down for favorable bandpass filtering. From this result, it is understood that the shape component on the short cycle side of 1 mm or less is removed by the double-side polishing process after double-head grinding, and the shape component on the long cycle side remains as it is.
- the preferred cut-off wavelength band ranges for the short wavelength side period and the long wavelength side period were investigated.
- Bandpass filtering was performed in 8 conditions in the range of ⁇ 80mm, and the correlation was investigated in the same manner as above (Fig. 10).
- the wavelength range of 40 mm to 60 mm with a long wavelength side period (low-pass filter) with a contribution ratio of 0.5 or more is a preferable range
- the range of 45 mm to 55 mm with a contribution ratio of 0.6 or more is further preferred. It turned out to be preferable.
- warp data obtained by measuring a semiconductor wafer using a capacitance-type shape measuring apparatus has a short wavelength side period of 1 mm or less and a long wavelength side period of 50 mm or more.
- the measurement method that cuts off the wavelength band and performs bandpass filtering was found to be optimal.
- Examples of the present invention will be described below, but the present invention is not limited thereto.
- a single crystal silicon wafer with a diameter of 300 mm manufactured by the CZ method was used as the sample wafer.
- the wafer after the double-head grinding process was measured with a capacitance-type shape measuring device, and the obtained warp data was subjected to the bandpass filtering of the optimum value, and the result of measuring the wafer cross section is shown in the figure. Shown in 12 (a).
- the results of the cross-sectional measurement of the wafer with Nanomapper in the same way are shown for the mirror wafer obtained by sequentially processing the wafer in the subsequent steps of surface grinding, etching, and double-side polishing. Shown in b).
- Fig. 12 (a) and (b) When comparing Fig. 12 (a) and (b), almost the same woofer shape was shown, and it was confirmed that good correlation was obtained!
- the warp data obtained from the woofer after the double-head grinding process by using the capacitance type shape measuring device was subjected to the bandpass filtering of the optimum value and measured. It was found that the wafer shape and the wafer shape measured by Nanomapper after the wafer was polished on both sides matched very well. Therefore, by using the measurement method of the present invention, it is possible to predict the nanotopography of the wafer surface after the final mirror polishing step in the intermediate process of the semiconductor wafer manufacturing method. It was confirmed that the invention contributes to the management of the intermediate process of the semiconductor wafer manufacturing method.
- a single crystal silicon wafer with a diameter of 300 mm manufactured by the CZ method was used as the sample wafer.
- the wafer shape obtained by applying the above-mentioned band pass filtering to the warp data obtained by measuring with a capacitance type shape measuring device, and the measurement using Nanomapper Comparison with the wafer shape was performed.
- Figure 1 3 As shown in (a), the PV values of the central shape of the woofer measured by each measurement method were made to correspond one-to-one, and the correlation was investigated and compared. As a result, as shown in Fig. 13 (b), a very good correlation was obtained with a contribution rate of 0.90.
- the shape data obtained by the measurement method of the present invention almost coincided with the shape data obtained by the optical measuring device. Therefore, it was confirmed that the measurement method of the present invention is also effective for a mirror surface woofer.
- the present invention is not limited to the above-described embodiment.
- the above embodiment is an exemplification, and the present invention has the same configuration as the technical idea described in the scope of claims of the present invention, and any device that exhibits the same function and effect is the present embodiment. It is included in the technical scope of the invention.
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Cited By (9)
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JP2008008778A (ja) * | 2006-06-29 | 2008-01-17 | Kobe Steel Ltd | 薄片状の被測定物の形状測定方法およびその装置 |
JP2008112160A (ja) * | 2006-10-27 | 2008-05-15 | Asml Holding Nv | リソグラフィレチクル検査用のシステムおよび方法 |
DE112009000334T5 (de) | 2008-02-14 | 2010-12-30 | Shin-Etsu Handotai Co., Ltd. | Doppelscheibenschleifvorrichtung für Werkstücke und Doppelscheibenschleifverfahren für Werkstücke |
KR20150033640A (ko) | 2012-07-09 | 2015-04-01 | 신에쯔 한도타이 가부시키가이샤 | 반도체 웨이퍼의 평가 방법 및 제조 방법 |
JPWO2014129304A1 (ja) * | 2013-02-19 | 2017-02-02 | 株式会社Sumco | 半導体ウェーハの加工方法 |
WO2017068945A1 (ja) * | 2015-10-20 | 2017-04-27 | 株式会社Sumco | 半導体ウェーハの加工方法 |
JP6443520B1 (ja) * | 2017-10-02 | 2018-12-26 | 株式会社Sumco | 半導体ウェーハの評価方法および該方法を用いた半導体ウェーハの製造方法 |
JP2021004868A (ja) * | 2019-06-27 | 2021-01-14 | 株式会社太陽 | 平坦度測定装置 |
WO2023203035A1 (en) * | 2022-04-20 | 2023-10-26 | Siltronic Ag | System and method for processing silicon wafers |
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JP4764693B2 (ja) * | 2005-09-29 | 2011-09-07 | 信越半導体株式会社 | 半導体ウェーハの製造方法及び両頭研削装置 |
JP6040947B2 (ja) | 2014-02-20 | 2016-12-07 | 信越半導体株式会社 | ワークの両頭研削方法 |
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JP2004063883A (ja) * | 2002-07-30 | 2004-02-26 | Toshiba Ceramics Co Ltd | 半導体ウェーハの製造方法 |
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Cited By (19)
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JP2008008778A (ja) * | 2006-06-29 | 2008-01-17 | Kobe Steel Ltd | 薄片状の被測定物の形状測定方法およびその装置 |
JP2008112160A (ja) * | 2006-10-27 | 2008-05-15 | Asml Holding Nv | リソグラフィレチクル検査用のシステムおよび方法 |
DE112009000334T5 (de) | 2008-02-14 | 2010-12-30 | Shin-Etsu Handotai Co., Ltd. | Doppelscheibenschleifvorrichtung für Werkstücke und Doppelscheibenschleifverfahren für Werkstücke |
US8029339B2 (en) | 2008-02-14 | 2011-10-04 | Shin-Etsu Handotai Co., Ltd. | Workpiece double-disc grinding apparatus and workpiece double-disc grinding method |
DE112009000334B4 (de) | 2008-02-14 | 2021-08-19 | Shin-Etsu Handotai Co., Ltd. | Doppelscheibenschleifvorrichtung für Werkstücke und Doppelscheibenschleifverfahren für Werkstücke |
US10043719B2 (en) | 2012-07-09 | 2018-08-07 | Shin-Etsu Handotai Co., Ltd. | Semiconductor wafer evaluation method and semiconductor wafer manufacturing method |
KR20150033640A (ko) | 2012-07-09 | 2015-04-01 | 신에쯔 한도타이 가부시키가이샤 | 반도체 웨이퍼의 평가 방법 및 제조 방법 |
US20150214123A1 (en) * | 2012-07-09 | 2015-07-30 | Shin-Etsu Handotai Co., Ltd. | Semiconductor wafer evaluation method and semiconductor wafer manufacturing method |
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JPWO2014129304A1 (ja) * | 2013-02-19 | 2017-02-02 | 株式会社Sumco | 半導体ウェーハの加工方法 |
JP2017079249A (ja) * | 2015-10-20 | 2017-04-27 | 株式会社Sumco | 半導体ウェーハの加工方法 |
KR20180064518A (ko) * | 2015-10-20 | 2018-06-14 | 가부시키가이샤 사무코 | 반도체 웨이퍼의 가공 방법 |
KR102110850B1 (ko) | 2015-10-20 | 2020-05-14 | 가부시키가이샤 사무코 | 반도체 웨이퍼의 가공 방법 |
WO2017068945A1 (ja) * | 2015-10-20 | 2017-04-27 | 株式会社Sumco | 半導体ウェーハの加工方法 |
JP6443520B1 (ja) * | 2017-10-02 | 2018-12-26 | 株式会社Sumco | 半導体ウェーハの評価方法および該方法を用いた半導体ウェーハの製造方法 |
JP2019067952A (ja) * | 2017-10-02 | 2019-04-25 | 株式会社Sumco | 半導体ウェーハの評価方法および該方法を用いた半導体ウェーハの製造方法 |
JP2021004868A (ja) * | 2019-06-27 | 2021-01-14 | 株式会社太陽 | 平坦度測定装置 |
JP7076803B2 (ja) | 2019-06-27 | 2022-05-30 | 株式会社太陽 | 平坦度測定装置 |
WO2023203035A1 (en) * | 2022-04-20 | 2023-10-26 | Siltronic Ag | System and method for processing silicon wafers |
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