WO2005103777A1 - 光導波路チップ及びその製造方法 - Google Patents
光導波路チップ及びその製造方法 Download PDFInfo
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- WO2005103777A1 WO2005103777A1 PCT/JP2005/007631 JP2005007631W WO2005103777A1 WO 2005103777 A1 WO2005103777 A1 WO 2005103777A1 JP 2005007631 W JP2005007631 W JP 2005007631W WO 2005103777 A1 WO2005103777 A1 WO 2005103777A1
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- Prior art keywords
- optical waveguide
- waveguide layer
- main surface
- wafer
- substrate
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Classifications
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- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
- G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
- G02B6/122—Basic optical elements, e.g. light-guiding paths
-
- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/24—Coupling light guides
- G02B6/26—Optical coupling means
- G02B6/30—Optical coupling means for use between fibre and thin-film device
-
- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
- G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
- G02B6/13—Integrated optical circuits characterised by the manufacturing method
-
- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
- G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
- G02B2006/12133—Functions
- G02B2006/12147—Coupler
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T83/00—Cutting
- Y10T83/04—Processes
Definitions
- the present invention relates to an optical waveguide chip and a method for manufacturing the same.
- An optical waveguide chip is used to split or couple light traveling in an optical transmission medium such as an optical fiber.
- a buried optical waveguide chip has a polymer optical waveguide layer composed of a core that guides light and a clad that covers the core, on a substrate that also has Si force.
- a method for manufacturing such an optical waveguide chip is, for example, as follows. First, a lower cladding layer is formed on a Si wafer. Next, a core layer having a higher refractive index than the lower clad layer is formed in an arbitrary planar shape on the lower clad layer by a photolithography technique, an etching technique, or the like. Subsequently, an upper clad layer is formed so as to cover the core layer. Then, the Si wafer on which the lower clad layer, the core layer, and the upper clad layer are formed is cut into chips along a predetermined line to obtain an optical waveguide chip.
- FIG. 1 is a diagram for explaining this method.
- this method after an optical waveguide 102 is formed on a wafer-like substrate 101, a part of the optical waveguide 102 and the substrate 101 is cut by a dicing blade 103. By this cutting, the end face 102a of the optical waveguide 102 is formed, and a step portion 10 lb having the same side surface as the end face 102a of the optical waveguide 102 is formed on the substrate 101.
- Patent Document 1 munitions generated by cutting the substrate 101 are finely pulverized between the substrate 101 and the dicing blade 103 to become fine particles, whereby the optical waveguide end face 102 is polished. It has been pointed out that there is an effect that is. Also, in Patent Document 1, when the dicing blade 103 dices the substrate by full cutting (all the substrate is urged in the thickness direction), the dicing blade 103 is half cut (the substrate is left in the thickness direction). In comparison with dicing by cutting, a large amount of chipping (chipping) occurs, which damages the end face of the optical waveguide and makes the optical waveguide easy to peel off. Has been plucked. Therefore, the manufacturing method of Patent Document 1 attempts to form a favorable optical waveguide end face by controlling the polishing action of the cannonball by the cutting depth of the substrate of the dicing blade 103.
- Patent Document 1 JP-A-11 337757
- the inventors have studied the conventional method for manufacturing an optical waveguide chip, and as a result, have found the following problems. That is, in the conventional method for manufacturing an optical waveguide chip disclosed in Patent Document 1, when a wafer having a relatively hard material force such as Si is cut by dicing, chipping may occur on the cut surface of the wafer. is there. Then, the optical waveguide layer may be peeled off by the wafer surface force due to the chipping of the wafer.
- the region (a) in FIG. 2 is an appearance photograph showing a state in which the optical waveguide layer 105 is peeled off when the Si wafer 104 on which the optical waveguide layer 105 having the polymer force is formed is diced. . Further, a region (b) in FIG.
- FIG. 2 is a cross-sectional photograph of the Si wafer 104 and the optical waveguide layer 105 shown in the region (a). As shown in the photographs of FIG. 2, when the wafer 104 is cut by the conventional dicing method, it can be seen that the surface strength of the optical waveguide layer 105 may be peeled off by the chipping.
- the present invention has been made to solve the above-described problems, and has an optical waveguide having a structure for effectively avoiding or suppressing peeling of an optical waveguide layer when a wafer is cut.
- an optical waveguide having a structure for effectively avoiding or suppressing peeling of an optical waveguide layer when a wafer is cut.
- An optical waveguide chip includes a substrate having a main surface, and an optical waveguide layer formed on the main surface of the substrate and having a core portion for guiding light.
- the optical waveguide chip is located at a central side of the main surface at a predetermined distance from the edge of the main surface of at least a part of the side surface of the optical waveguide layer.
- the optical waveguide chip having the above-described structure at least a part of the side surface of the optical waveguide layer is located closer to the center of the main surface than the side surface of the substrate including the edge of the main surface.
- the edge of the main surface that is, Even if chipping or cracking occurs due to chipping in the cut portion (c), the influence is unlikely to reach the optical waveguide layer. Therefore, according to the optical waveguide chip of the present invention, peeling of the optical waveguide layer when cutting the wafer can be effectively avoided or suppressed.
- the peripheral region of the main surface of the substrate may not be covered with the optical waveguide layer.
- the area of the contact area of the optical waveguide in contact with the main surface is smaller than the area of the entire main surface.
- the optical waveguide chip having the above-described structure is formed by forming an optical waveguide layer having a core portion for guiding light on a wafer that is to be a substrate, and forming a line to be cut on the wafer surface.
- the optical waveguide layer may be formed by removing a part of the optical waveguide layer covering the region including and cutting the wafer so as to divide the region along the line to be cut.
- the wafer is cut so as to divide the region on the main surface from which a part of the optical waveguide layer has been removed. Is effectively reduced, and peeling of the optical waveguide layer at the time of wafer cutting is suitably avoided or suppressed.
- the shortest distance from the other side surface of the optical waveguide layer to the edge of the main surface is equal to the side force of the optical waveguide layer coincident with the light input / output end of the core portion. It is preferably smaller than the shortest distance to the edge.
- the optical waveguide layer may have a thin film portion located on the outer peripheral region including the edge of the main surface of the substrate and thinner than the central portion of the optical waveguide layer.
- the optical waveguide layer is on the side coinciding with the side surface of the substrate including the edge of the main surface. And a side surface located on the center side of the main surface by a predetermined distance from the edge of the main surface. The inventors have found that the thinner the optical waveguide layer in the vicinity of the cut portion at the time of cutting the wafer, the harder it is to peel off the surface force of the wafer at the time of cutting the wafer.
- the region in contact with the edge of the main surface is covered with the thin film portion of the optical waveguide layer.
- the peeling of the optical waveguide layer due to chipping can be suitably avoided or suppressed.
- the optical waveguide chip having the above-described structure has an optical waveguide layer having a core portion for guiding light on a wafer, and covers an area including a line to be cut on the wafer surface.
- a portion of the layer may be formed by forming a thinner film portion than other portions of the optical waveguide layer, and cutting the wafer so as to divide the thin film portion along a line to be cut.
- the wafer is cut so as to divide the thin film portion when the wafer is cut, so that peeling of the optical waveguide layer due to chipping can be suitably avoided or suppressed. .
- the thickness of the thin film portion is preferably smaller than the distance between the core portion and the main surface.
- the relationship between the distance between the core portion and the main surface and the thickness of the thin film portion is determined by the relationship between the distance between the core portion and the main surface and the thickness of the thin film portion in an arbitrary cross section of the optical waveguide chip. Means a relationship.
- the width of the thin film portion located between the side surface of the optical waveguide layer coincident with the light input / output end of the core portion and the edge of the main surface is equal to the optical waveguide chip.
- the width is preferably smaller than the width of the thin film portion located between the other side surface of the wave guide layer and the edge of the main surface.
- the optical waveguide layer preferably contains a polymer. Yes.
- the optical waveguide layer contains a polymer
- the optical waveguide layer is softer than the substrate, so that the optical waveguide layer is easily peeled off by chipping when cutting the wafer.
- peeling of the optical waveguide layer can be suitably avoided or suppressed even when the optical waveguide layer contains a polymer. .
- the method for manufacturing an optical waveguide chip according to the present invention includes a cutting step of cutting the wafer along a line to be cut by the optical waveguide layer having a core portion for guiding light.
- this cutting step includes a step of removing at least a part of the optical waveguide layer covering a region including the line to be cut on the wafer surface, and a step of cutting the wafer so as to divide the region along the line to be cut. And a step of performing.
- the wafer when the wafer is cut, the wafer is cut so as to divide a region where at least a part of the optical waveguide layer has been removed on the wafer surface. Even if cracks occur, it is difficult for the influence to reach the optical waveguide layer. Therefore, according to the method for manufacturing an optical waveguide chip according to the present invention, peeling of the optical waveguide layer during wafer cutting can be effectively avoided or suppressed.
- optical waveguide chip and the method of manufacturing the same according to the present invention peeling of the optical waveguide layer during wafer cutting can be effectively avoided or suppressed.
- FIG. 1 is a view for explaining a conventional method for manufacturing an optical waveguide chip.
- FIG. 2 shows a conventional method using a Si wafer with a polymer optical waveguide layer formed on the surface.
- 4 is a photograph showing a state of an optical waveguide layer when dicing is performed in FIG.
- FIG. 3 is a diagram showing a configuration of an optical waveguide chip according to a first embodiment of the present invention.
- FIG. 4 is a plan view showing a main surface of a substrate in the optical waveguide chip according to the first embodiment.
- FIG. 5 is a plan view showing a wafer product used for manufacturing an optical waveguide chip.
- FIG. 6 is an enlarged cross-sectional view showing the III-III cross section of the product shown in FIG. 5.
- [7] is a diagram for explaining an example of manufacturing the optical waveguide chip according to the first embodiment (part 1).
- [8] is a diagram for explaining an example of manufacturing the optical waveguide chip according to the first example (part 2).
- [9] is a diagram for explaining another example of manufacturing the optical waveguide chip according to the first embodiment.
- FIG. 10 is a diagram for explaining the effect of the optical waveguide chip according to the first embodiment (the figure).
- FIG. 11 is a diagram for explaining an effect of the optical waveguide chip according to the first embodiment (the figure).
- FIG. 12 is a diagram for explaining an effect of the optical waveguide chip according to the first embodiment (the figure).
- [13] is a diagram showing a configuration of a modified example of the optical waveguide chip according to the first embodiment.
- FIG. 14 is a diagram showing a configuration of an optical waveguide chip according to a second embodiment of the present invention.
- FIG. 15 is a diagram showing a structure near a side surface of the optical waveguide chip according to the second embodiment.
- FIG. 16 is a diagram for explaining an example of manufacturing the optical waveguide chip according to the second embodiment (part 1).
- FIG. 17 is a view for explaining an example of manufacturing the optical waveguide chip according to the second example (part 2).
- FIG. 18 is a view for explaining another example of manufacturing the optical waveguide chip according to the second embodiment.
- FIG. 19 A part of the appearance of the optical waveguide chip according to the second example was photographed obliquely from above. It is a photograph.
- FIG. 20 is an enlarged photograph of a portion of the photograph shown in FIG.
- FIG. 21 is a photograph of a part of the external appearance of the optical waveguide chip according to the second example, taken by an upward force.
- FIG. 22 is a photograph of a part of the appearance of the optical waveguide chip according to the second example, taken by a lateral force.
- FIG. 23 is a diagram showing a configuration of a modified example of the optical waveguide chip according to the second embodiment.
- FIG. 3 is a diagram showing the configuration of the first embodiment of the optical waveguide chip according to the present invention.
- a region (a) is a plan view of the optical waveguide chip according to the first embodiment
- a region (b) is A sectional view corresponding to the II section of the optical waveguide chip 1 in the region (a) is shown.
- a region (c) in FIG. 3 is a cross-sectional view corresponding to a II-II cross section of the optical waveguide chip 1 in the region (a).
- the II-II section is set along the core 7 of the optical waveguide chip 1.
- FIG. 4 is a plan view showing the main surface 3a of the substrate 3 provided in the optical waveguide chip 1 according to the first embodiment.
- the optical waveguide chip 1 according to the first embodiment is a so-called embedded optical waveguide chip.
- the optical waveguide chip 1 includes a substrate 3 and an optical waveguide layer 5.
- the substrate 3 can be formed using a material such as silicon, quartz, glass epoxy, ceramic, or polyimide.
- the substrate 3 has a rectangular planar shape, and has a main surface 3a, a pair of side surfaces 3b, and another pair of side surfaces 3c.
- the main surface 3a has a region 3e adjacent to the edge of the main surface 3a and a region 3d occupying the main surface 3a other than the region 3e.
- the area 3e is set so as to surround the area 3d.
- the optical waveguide layer 5 is provided on the region 3d on the main surface 3a of the substrate 3. That is, the optical waveguide layer 5 is provided on a region other than the region 3e on the main surface 3a of the substrate 3, and the region 3e is not covered by the optical waveguide layer 5.
- the optical waveguide layer 5 is formed in a rectangular shape having a pair of side surfaces 5a and another pair of side surfaces 5b. Since the optical waveguide layer 5 is provided on a region other than the region 3e, the side surfaces 5a and 5b are located closer to the center of the substrate 3 than the corresponding side surfaces 3b and 3c of the substrate 3, respectively. In other words, the side surfaces 5a and 5b are provided at positions set back from the side surfaces 3b and 3c of the substrate 3, respectively.
- the optical waveguide layer 5 has a clad 6 and a core 7 having a higher refractive index than the clad 6.
- the clad portion 6 is formed in a layer on the region 3d on the main surface 3a of the substrate 3, and the core portion 7 is formed inside the clad portion 6.
- the core portion 7 has a Y-shaped planar shape connecting between the pair of side surfaces 5a of the optical waveguide layer 5. Further, one side surface 5a of the pair of side surfaces 5a functions as a light input / output end 7a, and the other side surface 5a functions as two light input / output ends 7b and 7c.
- the core unit 7 can branch the light incident from the light input / output end 7a and emit the split light from each of the light input / output ends 7b and 7c. Further, the core section 7 can combine the light incident from each of the light input / output ends 7b and 7c, and emit the combined light from the light input / output end 7a.
- the width L of a portion extending along the side surface 5a of the optical waveguide layer 5 coinciding with the light input / output ends 7a to 7c of the core portion 7 is It is set smaller than the width L of the portion extending along the side surface 5b of the vehicle.
- the setback width L of the side surface 5a of the optical waveguide layer 5 corresponding to a to 7c with respect to the side surface 3b of the substrate 3 is set smaller than the setback width L of the other side surface 5b with respect to the side surface 3c.
- Materials constituting the optical waveguide layer 5 include polyimide, benzocyclobutene resin, and silicon.
- Organic polymers (polymers) whose main ingredients are polystyrene, polymethylmethacrylate (PMMA), epoxy, acrylate, etc., quartz, LiNbO, LiTaO, ZnO, NbO, TaO, Si
- Inorganic materials such as N and YIG (YFeO) can be exemplified.
- YIG YFeO
- Examples of the system material include those in which H in the CH group of each exemplified material is replaced with fluorine or deuterium.
- FIG. 5 is a plan view showing a wafer product 10 used for manufacturing the optical waveguide chip 1
- FIG. 6 is an enlarged sectional view showing a III-III section of the wafer product 10 shown in FIG. .
- FIG. 6 shows a cross section of the core portion 18 included in the optical waveguide layer 20 along the longitudinal direction.
- a planned cutting line A is assumed on the wafer product 10.
- the planned cutting line A is a boundary line between the optical waveguide chips manufactured by cutting the wafer product 10 into chips, and is a virtual line assumed on the wafer product 10.
- the wafer product 10 includes the wafer 4 having the same strength as Si. On the main surface 4a of the wafer 4, an area 4b extending along the line A to be cut is assumed. Further, the wafer product 10 includes an optical waveguide layer 20 formed on the main surface 4a of the wafer 4. The optical waveguide layer 20 has a core 18 and a cladding layer 19.
- the manufacturing method of the wafer product 10 is as follows. First, after cleaning the main surface 4a of the wafer 4, a lower clad layer 19a, which is a part of the clad layer 19, is laminated on the main surface 4a. As a material of the lower cladding layer 19a, the above-mentioned organic polymer or inorganic material is used.
- a core layer having a higher refractive index than the lower cladding layer 19a is laminated on the lower cladding layer 19a, and the core layer is exposed to an arbitrary shape (Y-shape in this embodiment) by a photolithography technique, an etching technique, or the like.
- the core 18 is formed by the “development” etching.
- an upper clad layer 19b having the same material strength as the lower clad layer 19a is laminated so as to cover the core portion 18 and the lower clad layer 19a.
- the wafer product 10 is completed.
- the optical waveguide layer 20 is made of a polymer, it is preferable that the optical waveguide layer 20 be formed relatively thick in order to prevent inclusion of voids (cavities).
- a mask 41 is formed on the upper cladding layer 19b as shown in a region 5 (a) in FIG. Made.
- Masks include general photoresist and O-resistant resist, as well as A1
- a groove 55 having a bottom in the lower cladding layer 19a is formed by the dicing blade 61.
- the bottom of the groove 55 is located on the region 4b of the main surface 4a of the wafer 4, and the groove 55 is formed such that the width of the bottom of the groove 55 is substantially the same as the width of the region 4b.
- a thin dicing blade 62 as shown in area (c) in FIG. 5 may be used. In this case, by repeating dicing while moving the dicing blade 62 in the width direction of the region 4b, a groove 55 having a width corresponding to the width of the region 4b is formed.
- the portion of the lower cladding layer 19a remaining at the bottom of the groove 55 (ie, the portion of the lower cladding layer 19a that is not covered by the mask 41) is shown in a region (d) in FIG.
- the ions 66 induced by the discharge of the reactive gas are removed by dry etching such as reactive ion etching in which a force is applied to the main surface 4a side of the wafer 4.
- a groove 53 separating the optical waveguide layer 20 is formed along the cut line A, and the optical waveguide layer 5 having the side surfaces 5a and 5b and including the core portion 7 and the clad portion 6 is formed.
- the light input / output ends 7a to 7c of the core portion 7 are formed.
- the wafer 4 is cut using a dicing blade 63 thinner than the dicing blade 61. At this time, the wafer 4 is cut so as to divide the area 4b of the main surface 4a along the line A to be cut.
- the wafer 4 may be cut using a thinner dicing blade 64 as shown in regions (b) and (c) in FIG. In this case, after the wafer 4 is cut (see the area (b) in FIG. 8), the dicing blade 64 is moved in the width direction of the area 4b and the cutting of the wafer 4 is repeated so that the area 4b has an arbitrary width. (See area (c) in Fig. 8).
- the wafer 4 is cut along the cutting line A (see FIG. 5), and the substrate 3 having the side surfaces 3b and 3c is formed as shown in a region (d) in FIG.
- the optical waveguide chip 1 including the substrate 3 and the optical waveguide layer 5 is completed.
- the area 4b is divided As a result, a region 3e of the main surface 3a of the optical waveguide chip 1 is formed.
- a wafer product having the optical waveguide layer 20 on the wafer 4 is prepared by the same method as the above-described manufacturing method. Then, a mask 41 is formed on the upper cladding layer 19b as shown in a region (a) in FIG. Subsequently, the partial force of the mask 41 located on the region 4b of the main surface 4a of the wafer 4 is removed as shown in a region (b) of FIG. At this time, the opening 41a is formed such that its width is substantially the same as the width of the region 4b.
- the portion of the optical waveguide layer 20 that is not covered by the mask 41 (that is, the portion corresponding to the opening 41a) is, for example, as shown in a region (c) in FIG.
- the induced ions 66 are removed by dry etching such as reactive ion etching in which the force on the side of the main surface 4a of the ueno 4 also collides.
- the groove 53 separating the optical waveguide layer 20 is formed, and the optical waveguide layer 5 having the side surfaces 5a and 5b and including the core portion 7 and the clad portion 6 is formed.
- the light input / output ends 7a to 7c of the core 7 are formed.
- a region 4b along the line A to be cut on the main surface 4a of the ueno 4 is exposed.
- optical waveguide chip 1 including the substrate 3 and the optical waveguide layer 5 is completed by the same steps as those of the manufacturing method described above (see regions (a) to (d) in FIG. 8).
- optical waveguide chip 1 effects of the optical waveguide chip 1 according to the first embodiment will be described.
- the inventors faced a phenomenon in which the optical waveguide layer was separated from the wafer when the wafer on which the optical waveguide layer was formed was cut and chipped. When this phenomenon was verified, it was found that the deeper the cutting depth when dicing the wafer, the more noticeable the peeling of the optical waveguide layer. Further verification revealed that debris from wafer chubbing pushed up the optical waveguide layer, causing the optical waveguide layer to detach from the wafer.
- the side surfaces 5a of the optical waveguide layer 5 and Each of 5b is provided closer to the center of substrate 3 than each of side surfaces 3b and 3c of substrate 3.
- the edge of the main surface 3a ie, the cut portion of the wafer 4
- the influence hardly reaches the optical waveguide layer 5. Therefore, according to the optical waveguide chip 1, peeling of the optical waveguide layer 5 when cutting the wafer 4 can be effectively avoided or suppressed.
- FIG. 10 is a diagram for explaining another effect of the optical waveguide chip 1.
- the side surfaces 5a and 5b are provided closer to the center of the chip than the side surfaces 3b and 3c, respectively, so that the space beside the side surfaces 5a and 5b serves as an adhesive pool. That is, as shown in a region (a) of FIG.
- the optical fiber 71 and the optical waveguide chip By setting the refractive index of the adhesive 77 to a value between the refractive index of the core 73 of the optical fiber 71 and the refractive index of the core 7 in the optical waveguide layer 5, the optical fiber 71 and the optical waveguide chip The coupling loss between them is reduced.
- an adhesive 77 is provided between the core 73 of the optical fiber 71 and the core portion of the optical waveguide layer. It cannot be interposed (see the area (b) in FIG. 10), or the adhesive 77 cannot stay between the core 73 of the optical fiber 71 and the core of the optical waveguide layer, and slips downward (see FIG. 10). (See area (c) in 10)).
- the optical waveguide chip 1 such disadvantages do not occur, and the optical fiber 71 and the optical waveguide chip 1 can be suitably coupled.
- FIG. 11 is a partial cross-sectional view for explaining still another effect of the optical waveguide chip 1.
- the side surfaces 5a and 5b are provided closer to the center of the chip than the side surfaces 3b and 3c, respectively, so that when the optical waveguide chip 1 is handled by the tweezers 65 or the like, the optical waveguide layer 5 Prevent damage.
- the tweezers 65 When the optical waveguide chip 1 is gripped by the tweezers 65 or the like, the tweezers 65 often contact the side surface of the optical waveguide chip 1 obliquely. At this time, when the side surface of the optical waveguide layer and the side surface of the chip are aligned with each other, as shown in the area (b) in FIG.
- the tweezers 65 directly hit the optical waveguide layer, and The layer may be damaged.
- the optical waveguide chip 1 according to the first embodiment as shown in the area (a) in FIG. 11, contact between the optical waveguide layer 5 and the tweezers 65 can be prevented. . Therefore, according to the optical waveguide chip 1, damage to the optical waveguide layer 5 when the optical waveguide chip 1 is handled can be prevented.
- a region 3e that is not covered with the optical waveguide layer 5 exists in contact with the edge of the main surface 3a.
- the optical waveguide chip 1 and the method of manufacturing the same according to the first embodiment when the wafer 4 on which the optical waveguide layer 5 is formed is cut, the optical waveguide layer 5 on the main surface 4a is removed. The wafer 4 is cut so as to divide the region 4b. Thereby, the influence of the chipping of the weno 4 on the optical waveguide layer 5 is effectively reduced, and peeling of the optical waveguide layer 5 when the wafer 4 is cut is suitably avoided or suppressed.
- the optical waveguide chip 1 includes the light input / output ends 7 a to 7 c of the core 7 in the region 3 e of the main surface 3 a of the substrate 3 which is not covered by the optical waveguide layer 5.
- the width L of the region 3e along the other side surface 5b from the edge of the main surface 3a is smaller.
- FIG. 12 is a diagram for explaining the effect of the width L being smaller than the width L.
- the distance between the end face 73a of the core 73 of the optical fiber 71 and the light input / output end 7a (or 7b, 7c) of the core 7 of the optical waveguide layer 5 increases, and the light from the optical fiber 71 is reduced. It spreads before it enters the light entrance / exit end 7a. Therefore, the coupling loss between the optical fiber 71 and the optical waveguide layer 5 increases.
- the width L of the region 3e along the side surface 5a of the optical waveguide layer 5 is relatively small as shown in the region (a) in FIG.
- the end face 73a of the core 73 and the light input / output end 7 of the core 7 a (or 7b, 7c) can be reduced, and coupling loss can be reduced.
- the side surface 3c of the substrate 3 along the region 3e having a relatively large width L is gripped, so that the optical waveguide layer 5 is damaged.
- the optical waveguide layer 5 may include a polymer.
- a conventional optical waveguide chip see, for example, FIG. 2
- the optical waveguide layer when the optical waveguide layer contains a polymer, the optical waveguide layer is softer than the substrate, so that the optical waveguide layer is easily peeled off by chipping when cutting the wafer.
- the upper cladding layer it is preferable to laminate the upper cladding layer thickly in order to prevent voids (cavities) from being mixed into narrow portions such as the branch portion of the core portion. In this case, the optical waveguide layer is more easily peeled off by the chipping.
- the optical waveguide chip 1 according to the first embodiment even when the optical waveguide layer 5 contains a polymer, peeling of the optical waveguide layer 5 is preferably avoided or suppressed.
- FIG. 13 is a diagram showing a configuration of a modification of the optical waveguide chip according to the first embodiment.
- a region (a) is a plan view of a modification of the optical waveguide chip la according to the first embodiment.
- (b) is a cross-sectional view corresponding to the IV-IV cross section of the optical waveguide chip la in the region (a), and the region (c) is V—V in the optical waveguide chip la in the region (a).
- a cross-sectional view corresponding to the cross section is shown.
- the VV cross section is set along the core 9 of the optical waveguide chip la.
- the optical waveguide chip la according to this modification and the optical waveguide chip 1 according to the first embodiment differ in the shape of the optical waveguide layer.
- the optical waveguide layer 8 according to this modification is a ridge type.
- the configuration of the substrate 3 in this modified example is the same as the configuration of the substrate 3 in the first embodiment.
- the optical waveguide layer 8 in this modification uses the same material as the optical waveguide layer 5 according to the first embodiment to form the main surface 3a. It is provided on the area 3d. That is, the optical waveguide layer 8 is provided on a region other than the region 3e on the main surface 3a of the substrate 3, and the region 3e is not covered by the optical waveguide layer 8.
- the optical waveguide layer 8 is The planar shape is rectangular, and has a pair of side surfaces 8a and another pair of side surfaces 8b. The side surfaces 8a and 8b of the optical waveguide layer 8 are provided closer to the center of the substrate 3 than the side surfaces 3b and 3c of the substrate 3, respectively.
- the optical waveguide layer 8 has a core part 9 and a clad part 15.
- the clad portion 15 is formed in a layer on the region 3d.
- the core 9 is provided on the surface 15a of the clad 15.
- the core portion 9 has a Y-shaped planar shape connecting the pair of side surfaces 8a of the optical waveguide layer 8, has a light input / output end 9a on one side surface 8a of the pair of side surfaces 8a, and has the other side surface 8a. Has two light input / output ends 9b and 9c.
- the optical waveguide chip la according to this modification has the following effects, similarly to the optical waveguide chip 1 according to the first embodiment. That is, in the optical waveguide chip la, the side surfaces 8a and 8b of the optical waveguide layer 8 are provided closer to the center of the substrate 3 than the side surfaces 3b and 3c of the substrate 3, and the region 3e not covered by the optical waveguide layer 8 is the main surface.
- the wafer on which the optical waveguide layer 8 is formed is cut into chips by being in contact with the edge of the optical waveguide layer 3a, even if chipping or cracking due to chipping occurs at the edge of the main surface 3a, the effect is not affected. It is difficult to reach layer 8.
- the optical waveguide chip la according to this modification, peeling of the optical waveguide layer 8 when cutting the wafer is preferably avoided or suppressed.
- the configuration in which the side surface of the optical waveguide layer is provided near the center of the substrate as described above is applicable not only to the embedded optical waveguide chip 1 but also to the ridge type optical waveguide chip la.
- the configuration in which the side surface of the optical waveguide layer is provided near the center of the chip can be applied to other types of optical waveguide chips as long as the optical waveguide chip has a structure in which the optical waveguide layer is formed on a substrate. is there.
- FIG. 14 is a diagram showing a configuration of an optical waveguide chip according to a second embodiment of the present invention, wherein a region (a) is a plan view of an optical waveguide chip lb according to the second embodiment, and a region (b) is And a cross-sectional view corresponding to the VI-VI cross section of the optical waveguide chip lb shown in the area (a).
- the area (c) shows a cross-sectional view corresponding to the VII-VII cross section of the optical waveguide chip lb shown in the area (a).
- the section VII-VII is set along the core 7 of the optical waveguide chip lb.
- the configuration of the substrate 3 is the same as the configuration of the substrate 3 in the first embodiment, so that the configuration of the second embodiment will be described with reference to FIG. The configuration will be described.
- an optical waveguide chip lb includes a substrate 3 and an optical waveguide layer 11.
- the optical waveguide layer 11 is provided on the main surface 3a of the substrate 3.
- the optical waveguide layer 11 has a thin film portion 11c on the region 3e of the main surface 3a, and the thickness of the thin film portion 11c is thinner than other portions of the optical waveguide layer 11.
- a portion of the optical waveguide layer 11 provided on the region 3d of the main surface 3a is formed in a rectangular shape having a pair of side surfaces 11a and another pair of side surfaces lib.
- the side surfaces 11a and 1 lb are located closer to the center of the substrate 3 than the side surfaces 3b and 3c of the substrate 3, respectively! In other words, the side surfaces 11a and 11b are provided at positions knocked from the side surfaces 3b and 3c of the substrate 3, respectively.
- the optical waveguide layer 11 has a clad part 17 and a core part 7 having a higher refractive index than the clad part 17.
- the clad portion 17 is formed in a layer on the region 3d on the main surface 3a of the substrate 3, and forms a thin film portion 11c on the region 3e.
- the core 7 is formed inside the clad 17. Since the configuration and shape of the core 7 are the same as the configuration and shape of the core 7 in the first embodiment, detailed description will be omitted. Further, the material forming the optical waveguide layer 11 is the same as that of the optical waveguide layer 5 in the first embodiment.
- region (a) in FIG. 15 is an enlarged cross-sectional view near the side surface 11 a of the optical waveguide layer 11.
- the area (b) is an enlarged cross-sectional view near the side face ib of the optical waveguide layer 11.
- the setback width L of the side surface 11a of the optical waveguide layer 11 having the light input / output ends 7a to 7c of the core portion 7 with respect to the side surface 3b of the substrate 3 is set with respect to the side surface 3c of the other side surface l ib.
- the thickness t of the thin film portion 11c is equal to the thickness of the core portion 7 and the substrate 3.
- the thickness of the thin film portion 11c is
- the thickness t of the thin film portion 11c for example, the core portion 7 and the substrate 3
- t 20 / zm. Also, more preferably
- a groove having a bottom in the lower cladding layer 19a is formed by the dicing blade 61, so that the lower cladding layer 19a is thinner than the lower cladding layer 19a.
- Portion 51 is formed.
- the thin film portion 51 is formed on the region 4b of the main surface 4a of the wafer 4, and the thin film portion 51 is formed such that the width of the thin film portion 51 is substantially the same as the width of the region 4b.
- the dicing blade 61 having a thickness corresponding to the width of the region 4b of the main surface 4a may be used.
- a thin dicing blade 62 as shown in area (b) in FIG. 16 may be used. In this case, by dicing the dicing blade 62 in the width direction of the region 4b and repeating dicing, the thin film portion 51 having a width corresponding to the width of the region 4b can be formed.
- the wafer 4 is cut using a dicing blade 63 thinner than the dicing blade 61 as shown in a region (a) in FIG. At this time, the wafer 4 is cut so as to divide the thin film portion 51 (see the areas (a) and (b) in FIG. 16) along the cut line A.
- the wafer 4 may be cut using a thin dicing blade 64 as shown in the area (b) and the area (c) in FIG. In this case, after the cutting of the wafer 4 (see the area (b) in FIG. 17), the thinning portion 51 is arbitrarily widened by repeating the cutting of the wafer 4 while moving the dicing blade 64 in the width direction of the area 4b. It is divided (see the area (c) in FIG.
- the wafer 4 is cut along the cut line A (see FIG. 5), and an optical waveguide chip lb including the substrate 3 and the optical waveguide layer 11 is completed.
- the thin film portion 51 becomes the thin film portion 11c in the optical waveguide chip 1 by being divided.
- a mask 41 is formed on the upper cladding layer 19b of the wafer product 10.
- the portion of the mask 41 corresponding to the region 4b of the main surface 4a of the ueno 4 is removed, and an opening 41a is formed in the mask 41.
- the opening 41a is formed such that its width is substantially the same as the width of the region 4b.
- a portion of the optical waveguide layer 20 that is not covered by the mask 41 (that is, a portion corresponding to the opening 41a) is, for example, discharged by a reactive gas as shown in a region (c) in FIG.
- the induced ions 66 are removed to a depth reaching the lower cladding layer 19a by dry etching such as reactive ion etching in which the induced ions collide with the main surface 4a of the ueno 4.
- dry etching such as reactive ion etching in which the induced ions collide with the main surface 4a of the ueno 4.
- an optical waveguide chip lb including the substrate 3 and the optical waveguide layer 11 is completed through the same steps as the above-described manufacturing method (see regions (a) to (c) in FIG. 17).
- the side surfaces 1 la and 1 lb of the optical waveguide layer 11 are provided closer to the center of the substrate 3 than the respective side surfaces 3 b and 3 c of the substrate 3.
- FIGS. 19 to 22 are photographs showing the above-described effects of the optical waveguide chip lb and the method of manufacturing the same.
- FIG. 19 is a photograph of a part of the appearance of the optical waveguide chip lb taken from obliquely above.
- FIG. 20 is an enlarged photograph of a part of the photograph shown in FIG.
- FIG. 21 is a photograph in which a part of the appearance of the optical waveguide chip lb is also photographed with an upward force.
- FIG. 22 is a photograph of a part of the appearance of the optical waveguide chip lb, which also includes a lateral force.
- the side surfaces 1 la and 1 lb of the optical waveguide layer 11 are different from the side surfaces 3 b and 3 c of the substrate 3. It can also be seen that the separation of the optical waveguide layer 11 is effectively avoided by providing the layer near the center of the chip. In particular, as can be seen from the photographic power of FIG. 22, chipping C occurs at the edge of the main surface 3a of the substrate 3. In spite of this, peeling of the optical waveguide layer 11 is effectively suppressed.
- the optical waveguide chip lb according to the second embodiment has the following effects. That is, when the optical waveguide chip lb and the optical transmission line such as an optical fiber are bonded to each other, the space beside the side surfaces 1 la and 1 lb serves as an adhesive pool, and the optical fiber and the optical waveguide chip lb are joined together. Good binding of Further, since the side surfaces 11a and l ib of the optical waveguide layer 11 are provided closer to the center of the chip than the side surfaces 3b and 3c of the substrate 3, when the optical waveguide chip lb is gripped by tweezers or the like, the optical waveguide layer 11 Damage is prevented.
- the optical waveguide layer 11 on the region 3e in contact with the edge of the main surface 3a is a thin film portion 11c.
- the inventors have found that the thinner the optical waveguide layer near the cut portion when cutting the wafer, the harder the surface force of the optical waveguide layer is to be peeled off when cutting the wafer.
- the thinner the optical waveguide layer is, the smaller the stress difference is and the harder it is to peel off. Therefore, according to the optical waveguide chip lb according to the second embodiment, the optical waveguide layer 11 on the region 3e in contact with the edge of the main surface 3a is the thin film portion 11c, so that the optical waveguide layer 20 is formed.
- the optical waveguide layer 11 is preferably peeled. Avoided or suppressed.
- the wafer 4 on which the optical waveguide layer 20 is formed is cut so as to divide the thin film portion 51. Even if chipping or cracking occurs in the wafer 4 due to the rubbing, peeling of the optical waveguide layer 11 is preferably avoided or suppressed.
- the thickness t of the thin film portion 11c is determined by the distance t between the core portion 7 and the main surface 3a.
- the inventors of the present invention have conducted intensive studies and found a suitable thickness of the thin film portion 11c. That is, by setting the thickness t of the thin film portion 11c to be smaller than the interval t, the thickness of the substrate 3 is reduced.
- the width L from the edge of the main surface 3a of the thin film portion 11c along the side surface 11a of the optical waveguide layer 11 having the light input / output ends 7a to 7c of the core portion 7 is Other in layer 11
- FIG. 23 is a diagram showing a modification of the optical waveguide chip lc according to the second embodiment, where a region (a) is a plan view of the optical waveguide chip lc according to this modification, and a region (b) is a region ( A sectional view corresponding to the VIII-VIII section of the optical waveguide chip lc shown in a), and a region (c) is a sectional view corresponding to the IX-IX section of the optical waveguide chip lc shown in the region (a). Is shown.
- the IX-IX cross section is set along the core 9 of the optical waveguide chip lc.
- the optical waveguide chip lc according to this modification and the optical waveguide chip lb according to the second embodiment are different in the shape of the optical waveguide layer. That is, while the optical waveguide layer 11 in the second embodiment is a buried type, the optical waveguide layer 13 in this modification is a ridge type. Note that the configuration of the substrate 3 in this modification is the same as the configuration of the substrate 3 in the first embodiment.
- the optical waveguide layer 13 in this modification is formed on the main surface 3a using the same material as the optical waveguide layer 11 in the second embodiment. It is provided in. That is, in the optical waveguide layer 13, the thin film portion 13c is provided on the region 3e of the main surface 3a, and the other portion is provided on the region 3d of the main surface 3a.
- the portion of the optical waveguide layer 13 provided on the region 3d has a rectangular planar shape, and has a pair of side surfaces 13a and another pair of side surfaces 13b.
- the side surfaces 13a and 13b of the optical waveguide layer 13 are provided closer to the center of the substrate 3 than the side surfaces 3b and 3c of the substrate 3, respectively.
- the optical waveguide layer 13 has a core part 9 and a clad part.
- the clad portion 14 is formed in a layer on the region 3d of the main surface 3a, and a part thereof forms a thin film portion 13c on the region 3e.
- the core section 9 is provided on the surface 14a of the clad section 14.
- the core portion 9 has a Y-shaped planar shape connecting a pair of side surfaces 13a of the optical waveguide layer 13, has a light input / output end 9a on one side surface 13a of the pair of side surfaces 13a, and has the other side surface. 13a has two light input / output ends 9b and 9c.
- the optical waveguide chip lc according to this modification has the following effects, similarly to the optical waveguide chip lb according to the above-described second embodiment. That is, in the optical waveguide chip lc, the side surfaces 13a and 13b of the optical waveguide layer 13 are provided closer to the center of the substrate 3 than the side surfaces 3b and 3c of the main surface 3, respectively, and are located on the region 3e in contact with the edge of the main surface 3a. Since the optical waveguide layer 13 is the thin film portion 13c, even when chipping or cracking due to chipping occurs at the edge of the main surface 3a when the wafer on which the optical waveguide layer is formed is cut into chips. The peeling of the optical waveguide layer 13 is preferably avoided or suppressed.
- the optical waveguide chip and the method of manufacturing the same according to the present invention are not limited to the above-described embodiment and modifications, and various modifications are possible.
- the planar shape of the core portion is not limited to the Y-shape as in the first and second embodiments described above, but may be formed into various planar shapes as necessary.
- the planar shape of the optical waveguide chip can be various polygonal shapes in addition to the rectangular shape as in each of the above embodiments.
- all four side surfaces of the optical waveguide layer are provided closer to the center of the chip than the side surfaces of the substrate, but at least a part of the side surfaces of the optical waveguide layer is provided.
- the side surface may be provided closer to the center of the chip than the side surface of the substrate corresponding to the side surface.
- the region (region 3e) that is in contact with the edge of the main surface is set so as to be in contact with the entire edge of the main surface as in each of the above-described embodiments. May be set to.
- the optical waveguide chip according to the present invention is applicable to an optical component that branches or couples light propagating in an optical transmission medium such as an optical fiber.
Abstract
Description
Claims
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
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EP20050734698 EP1739463B1 (en) | 2004-04-22 | 2005-04-21 | Optical waveguide chip and method of manufacturing the same |
US11/587,143 US7680366B2 (en) | 2004-04-22 | 2005-04-21 | Optical waveguide chip and method of manufacturing the same |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
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JP2004127150A JP4440697B2 (ja) | 2004-04-22 | 2004-04-22 | 光導波路基板及びその製造方法 |
JP2004-127150 | 2004-04-22 |
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WO2005103777A1 true WO2005103777A1 (ja) | 2005-11-03 |
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PCT/JP2005/007631 WO2005103777A1 (ja) | 2004-04-22 | 2005-04-21 | 光導波路チップ及びその製造方法 |
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Country | Link |
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US (1) | US7680366B2 (ja) |
EP (2) | EP1930757A1 (ja) |
JP (1) | JP4440697B2 (ja) |
KR (1) | KR20070004120A (ja) |
CN (2) | CN100465675C (ja) |
TW (1) | TWI368055B (ja) |
WO (1) | WO2005103777A1 (ja) |
Cited By (2)
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JPWO2007058312A1 (ja) * | 2005-11-18 | 2009-05-07 | 日立化成工業株式会社 | 光デバイス |
WO2022107762A1 (ja) * | 2020-11-18 | 2022-05-27 | 日東電工株式会社 | 光学接続構造 |
Families Citing this family (5)
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JP5443494B2 (ja) * | 2009-08-21 | 2014-03-19 | 株式会社東芝 | 光学素子および表示装置 |
TWI563299B (en) * | 2012-12-28 | 2016-12-21 | Hon Hai Prec Ind Co Ltd | Vertical-type optical waveguide and manufacture method for same |
WO2019035466A1 (ja) * | 2017-08-16 | 2019-02-21 | Agc株式会社 | ポリマー光導波路 |
US20220236482A1 (en) * | 2019-06-03 | 2022-07-28 | Nippon Telegraph And Telephone Corporation | Optical Waveguide Chip |
US11762154B2 (en) * | 2020-08-01 | 2023-09-19 | Ayar Labs, Inc. | Systems and methods for passively-aligned optical waveguide edge-coupling |
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JP2002022993A (ja) * | 2000-07-10 | 2002-01-23 | Hitachi Chem Co Ltd | 光導波路デバイスの製造方法 |
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JPH0868917A (ja) * | 1994-08-31 | 1996-03-12 | Fujitsu Ltd | 光導波路と光ファイバーとの接合方法及び光導波路型デバイス |
JPH08162718A (ja) * | 1994-12-09 | 1996-06-21 | Japan Aviation Electron Ind Ltd | 光導波路を備えた半導体素子及びその製造方法 |
JP3662260B2 (ja) * | 1996-09-24 | 2005-06-22 | 三菱電機株式会社 | 半導体装置およびその製造方法 |
JPH10133041A (ja) * | 1996-10-29 | 1998-05-22 | Hitachi Cable Ltd | フィルタ付導波路 |
EP0952470A3 (en) * | 1998-04-23 | 2004-01-14 | Nec Corporation | A method of manufacturing a semiconductor optical waveguide array and an array-structured semiconductor optical device |
JP3748330B2 (ja) | 1998-05-25 | 2006-02-22 | 京セラ株式会社 | 光導波路基板およびその製造方法 |
US6270604B1 (en) * | 1998-07-23 | 2001-08-07 | Molecular Optoelectronics Corporation | Method for fabricating an optical waveguide |
US6445857B1 (en) * | 1999-09-21 | 2002-09-03 | Matsushita Electric Industrial Co., Ltd. | Optical waveguide part, its manufacturing method, connection member, optical part, method for connecting optical waveguide part, and optical element |
JP3774598B2 (ja) | 1999-09-30 | 2006-05-17 | 株式会社日立製作所 | ポリマ導波路基板の製造方法およびポリマ導波路基板 |
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- 2005-04-21 EP EP20050734698 patent/EP1739463B1/en not_active Expired - Fee Related
- 2005-04-21 KR KR1020067024447A patent/KR20070004120A/ko not_active Application Discontinuation
- 2005-04-21 CN CNB2005800127853A patent/CN100465675C/zh not_active Expired - Fee Related
- 2005-04-21 CN CN2009100030063A patent/CN101482633B/zh not_active Expired - Fee Related
- 2005-04-21 US US11/587,143 patent/US7680366B2/en not_active Expired - Fee Related
- 2005-04-21 WO PCT/JP2005/007631 patent/WO2005103777A1/ja active Application Filing
- 2005-04-22 TW TW094112876A patent/TWI368055B/zh not_active IP Right Cessation
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WO2022107762A1 (ja) * | 2020-11-18 | 2022-05-27 | 日東電工株式会社 | 光学接続構造 |
Also Published As
Publication number | Publication date |
---|---|
US20080212919A1 (en) | 2008-09-04 |
EP1739463A1 (en) | 2007-01-03 |
TWI368055B (en) | 2012-07-11 |
CN1947043A (zh) | 2007-04-11 |
TW200602702A (en) | 2006-01-16 |
CN101482633B (zh) | 2013-06-26 |
JP2005309159A (ja) | 2005-11-04 |
CN101482633A (zh) | 2009-07-15 |
EP1930757A1 (en) | 2008-06-11 |
US7680366B2 (en) | 2010-03-16 |
JP4440697B2 (ja) | 2010-03-24 |
EP1739463B1 (en) | 2012-08-08 |
EP1739463A4 (en) | 2007-05-09 |
KR20070004120A (ko) | 2007-01-05 |
CN100465675C (zh) | 2009-03-04 |
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