WO2005008755A1 - 温度制御方法、基板処理装置及び半導体製造方法 - Google Patents
温度制御方法、基板処理装置及び半導体製造方法 Download PDFInfo
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- WO2005008755A1 WO2005008755A1 PCT/JP2004/007522 JP2004007522W WO2005008755A1 WO 2005008755 A1 WO2005008755 A1 WO 2005008755A1 JP 2004007522 W JP2004007522 W JP 2004007522W WO 2005008755 A1 WO2005008755 A1 WO 2005008755A1
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 75
- 239000000758 substrate Substances 0.000 title claims abstract description 69
- 238000012545 processing Methods 0.000 title claims abstract description 48
- 238000000034 method Methods 0.000 title claims abstract description 27
- 238000010438 heat treatment Methods 0.000 claims abstract description 32
- 238000012937 correction Methods 0.000 claims description 51
- 238000003860 storage Methods 0.000 claims description 13
- 238000004519 manufacturing process Methods 0.000 claims description 4
- 235000012431 wafers Nutrition 0.000 description 100
- 238000010586 diagram Methods 0.000 description 30
- 239000012495 reaction gas Substances 0.000 description 14
- 238000003672 processing method Methods 0.000 description 12
- 239000007789 gas Substances 0.000 description 10
- 239000011261 inert gas Substances 0.000 description 10
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 7
- 238000004886 process control Methods 0.000 description 7
- 238000012546 transfer Methods 0.000 description 5
- 230000015572 biosynthetic process Effects 0.000 description 4
- 239000000470 constituent Substances 0.000 description 3
- 238000009530 blood pressure measurement Methods 0.000 description 2
- 238000009529 body temperature measurement Methods 0.000 description 2
- 238000005352 clarification Methods 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- 230000008021 deposition Effects 0.000 description 2
- 230000002093 peripheral effect Effects 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- 239000010453 quartz Substances 0.000 description 2
- 230000036632 reaction speed Effects 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 229910001220 stainless steel Inorganic materials 0.000 description 2
- 239000010935 stainless steel Substances 0.000 description 2
- 238000004804 winding Methods 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 230000006641 stabilisation Effects 0.000 description 1
- 238000011105 stabilization Methods 0.000 description 1
- 210000003437 trachea Anatomy 0.000 description 1
- 230000001131 transforming effect Effects 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67242—Apparatus for monitoring, sorting or marking
- H01L21/67248—Temperature monitoring
Definitions
- the present invention relates to a temperature control method for performing a heat treatment on a semiconductor substrate and a semiconductor processing apparatus.
- Patent Documents 1 and 2 disclose a semiconductor processing method devised so that uniform heat treatment can be performed.
- Patent Document 1 Patent Publication No. 2002-43300 OP, 2002-043300, A)
- Patent Document 2 Patent Publication No. 2002-43301 OP, 2002-043301, A)
- the present invention has been made in view of the above background, and has as its object to provide a temperature control method capable of making the film thickness on a semiconductor substrate uniform by controlling only the temperature.
- a temperature control method provides a method of controlling a temperature of a substrate edge and a temperature of a central portion, which is generated when a heating temperature of a semiconductor substrate is changed within a predetermined time. And a steady-state deviation between the temperature at the end of the substrate and the temperature at the center of the substrate, to obtain a change temperature amount N for realizing a desired average temperature deviation M. It is characterized in that the heating temperature for the semiconductor substrate is controlled.
- a temperature setting correction value Z is obtained based on the change temperature amount N, and the heating temperature for the semiconductor substrate is controlled by setting the temperature setting correction value Z.
- the heating temperature for the semiconductor substrate is controlled by adding and setting the temperature setting correction value Z and the temperature setting value.
- the temperature setting correction value Z is stored in a first storage unit, and the temperature set value is stored in a second storage unit.
- a semiconductor processing apparatus includes a processing chamber for processing a semiconductor substrate, a heating unit for heating the processing chamber, and a substrate edge generated when the temperature is changed within a predetermined time. Using the deviation between the temperature and the temperature at the center and the steady-state deviation between the temperature at the end of the substrate and the temperature at the center, a temperature change amount N for realizing a desired average temperature deviation M is obtained. Control means for controlling the heating temperature of the semiconductor substrate with the change temperature amount N.
- the semiconductor processing method provides a processing chamber for processing a semiconductor substrate, a heating unit for heating the processing chamber, and a substrate end generated when the temperature is changed within a predetermined time. Using the deviation between the temperature and the temperature at the center and the steady-state deviation between the temperature at the end of the substrate and the temperature at the center, a temperature change amount N for realizing a desired average temperature deviation M is obtained.
- Determining the difference between the temperature at the end of the semiconductor substrate and the temperature at the center thereof which occurs when the heating temperature of the semiconductor substrate is changed within a predetermined time; and Temperature at the end and the center A step of obtaining a change temperature N for realizing a desired average temperature deviation M using a steady-state deviation from the temperature of the semiconductor substrate, and a step of controlling a heating temperature for the semiconductor substrate with the change temperature N. Controlling the heating temperature of the semiconductor substrate to process the semiconductor substrate.
- the film thickness on the semiconductor substrate can be made uniform by controlling only the temperature.
- FIG. 1 is a diagram showing an overall configuration of a semiconductor processing apparatus to which the present invention can be applied.
- FIG. 2 is a diagram illustrating a reaction chamber in a state where the boat and the wafer shown in FIG. 1 are housed.
- FIG. 3 The components around the reaction chamber shown in Figs. 1 and 2 and the control of the reaction chamber are controlled.
- FIG. 4 is a diagram showing a configuration of a first control program to be executed.
- FIG. 4 is a diagram showing a configuration of a control unit shown in FIG. 1.
- FIG. 5 is a diagram illustrating the wafer and boat shown in FIG. 2 and the like.
- Garden 6 is a view showing an example of the shape of a wafer to be processed in the semiconductor processing apparatus (FIG. 1).
- Garden 7 is a diagram exemplifying the characteristic of the temperature deviation between the edge and the center of the wafer (FIG. 6), wherein (A) shows that the temperature force of the wafer also changes to T + ⁇ and again to T The in-plane temperature deviations B and B 'when returning are shown, and (B) shows the in-plane temperature deviation when the wafer temperature changes by 2 X ⁇ .
- FIG. 6 is a diagram exemplifying an in-plane temperature deviation amount when a steady temperature deviation A, A ′ occurs between the end portion and the center portion of the wafer (FIG. 6) at a temperature around 800 ° C.
- FIG. 9 is a diagram illustrating a first temperature setting correction value Z used in the semiconductor processing method according to the present invention.
- FIG. 10 is a diagram showing an example of a table used for setting the first temperature setting correction value Z shown in FIG.
- FIG. 11 is a diagram exemplifying a temperature set value for a wafer corrected by a temperature set correction value Z.
- Garden 12 is a diagram showing, in a graph form, the in-plane temperature deviation of the wafer when the correction using the temperature setting correction value Z is not performed.
- FIG. 13 The average temperature deviation M of the wafers in FIGS. 9 and 10 is calculated as a temperature change N so as to be 11 ° C., and the in-plane of the wafer is corrected using the obtained Z.
- FIG. 3 is a diagram showing a temperature deviation in a graph format.
- FIG. 15 is a diagram illustrating a second temperature setting correction value Z used in the semiconductor processing method according to the present invention.
- the third temperature setting correction value Z used in the semiconductor processing method according to the present invention is FIG.
- 17 is a diagram showing an example of a table used for setting a third temperature setting correction value Z shown in FIG. 16.
- FIG. 18 is a diagram showing a configuration around a reaction chamber shown in FIGS. 1 and 2, and a configuration of a second control program for controlling the reaction chamber 3.
- FIG. 19 is a diagram illustrating a correction process for the temperature set value of the processing recipe stored in the temperature setting storage unit shown in FIG.
- FIG. 1 is a diagram showing an overall configuration of a semiconductor processing apparatus 1 to which the present invention can be applied.
- FIG. 2 is a view showing an example of the reaction chamber 3 in which the boat 14 and the wafer 12 shown in FIG. 1 are accommodated.
- FIG. 3 is a diagram showing components around the reaction chamber 3 shown in FIGS. 1 and 2 and a configuration of a first control program 40 for controlling the reaction chamber 3.
- the semiconductor processing apparatus 1 is a so-called reduced pressure CVD apparatus.
- the semiconductor processing apparatus 1 includes a cassette transfer unit 100, a cassette stocker 102 provided on the back side of the cassette transfer unit 100, a buffer cassette stocker 104 provided above the cassette stocker 102, and a cassette stocker.
- a wafer elevator 106 provided on the back side of the wafer 102, a boat elevator 108 provided on the back side of the wafer wafer 106 to transport the boat 14 on which the wafer 12 is set, and provided above the wafer wafer 106. It consists of a reaction chamber 3 and a control unit 2.
- the reaction chamber 3 shown in FIG. 1 includes a hollow heater 32, an outer tube (auta tube) 360, an inner tube (inner tube) 362, a gas introduction nozzle 340, a furnace cover 344, an exhaust tube 346, Rotary axis 348, e.g. stainless steel manifold 350, O-ring 352 and gas flow It is composed of other components (described later with reference to FIG. 3) such as an amount adjuster, and is covered with a heat insulating material 300.
- the outer tube 360 is made of, for example, quartz and is formed in a cylindrical shape having an opening at a lower portion.
- the inner tube 362 is made of, for example, quartz, is formed in a cylindrical shape, and is provided inside the outer tube 360 and concentrically therewith.
- the seal cap 354 is made of, for example, stainless steel and is formed in a disk shape.
- the heater 32 has four temperature control sections (U, CU, CL, L) 320—1—320—4 and a temperature control section 320—1 320—4 that can set and adjust the temperature for each.
- An external temperature sensor such as a thermocouple 322—1—322—4 and a temperature adjustment section 320-1—320—4, which are provided between the Auta tube 360 and the Auta tube 360, are provided in the Auta tube 360.
- Includes internal temperature sensors 324-1-324_4 such as installed thermocouples.
- the temperature adjusting portions 320-1 to 320-4 of the heater 32 are, for example, by pulling out a plurality of taps from one continuous winding of the heater 32 or by four heaters each having an independent winding. This is realized by providing
- the temperature adjusting portions 320 are each formed in a cylindrical shape, and are disposed on the outer side of the outer tube 360 and concentrically therewith.
- the reaction chamber 3 includes a temperature controller 370, a temperature measuring device 372, a gas flow controller (mass flow controller; MFC) 374, a boat elevator controller (elevator controller; EC). 376, a pressure sensor (PS) 378, a pressure regulator (APC; Auto Pressure Control (valve)) 380, and an exhaust device (EP) 382 are added.
- MFC mass flow controller
- EC boat elevator controller
- PS pressure sensor
- APC Auto Pressure Control
- EP exhaust device
- the temperature control device 370 drives each of the temperature adjustment sections 320-1 320-4 according to the control from the control section 2.
- the temperature measuring device 372 outputs the measured temperature value of each of the temperature sensors 322-1 322-4 and 324-1-324-4 to the control unit 2.
- the elevator control unit (EC) 376 controls the boat elevator 1 according to the control from the control unit 2. Drive 08.
- APC pressure adjusting device
- an APC for example, an APC, an N2 ballast controller, or the like is used.
- FIG. 4 is a diagram showing a configuration of the control unit 2 shown in FIG.
- the control unit 2 includes a CPU 200, a memory 204, a display device, a display including a touch panel, a keyboard and a mouse; an input unit 22; and a recording unit 24 such as an HD and a CD. .
- control unit 2 includes components as a general computer capable of controlling the semiconductor processing device 1.
- the control unit 2 executes a control program for the low-pressure CVD process (for example, the control program 40 shown in FIG. 3) by these components, controls each component of the semiconductor processing apparatus 1, and controls the semiconductor wafer 12. Then, a reduced pressure CVD process described below is executed.
- a control program for the low-pressure CVD process for example, the control program 40 shown in FIG. 3
- FIG. 3 is referred to again.
- control program 40 includes a process control unit 400, a temperature control unit 410, a gas flow control unit 412, a drive control unit 414, a pressure control unit 416, an exhaust device control unit 418, and a temperature measurement unit. Consists of 420.
- the control program 40 is, for example, supplied to the control unit 2 via a recording medium 240 (FIG. 4), loaded into the memory 204, and executed.
- the temperature set value storage unit 422 stores the temperature set value of the processing recipe for the wafer 12 and outputs it to the process control unit 400.
- the process control unit 400 is configured according to the user's operation on the display / input unit 22 (FIG. 4) of the control unit 2 or the processing procedure (processing recipe) recorded in the recording unit 24. The portion is controlled, and a low pressure CVD process is performed on the wafer 12 as described later.
- the temperature measuring section 420 measures the temperature of the temperature sensors 322 and 324 via the temperature measuring device 372. Accepts the value and outputs it to the process control unit 400.
- the temperature control unit 410 receives the temperature set value and the temperature measured values of the temperature sensors 322 and 324 from the process control unit 400, and performs feedback control of the power supplied to the temperature adjustment unit 320 to heat the inside of the outer tube 360.
- the wafer 12 is brought to a desired temperature.
- the gas flow controller 412 controls the MFC 374 and adjusts the flow rate of the reactive gas or the inert gas supplied into the outer tube 360.
- the drive control unit 414 controls the boat elevator 108 to raise and lower the boat 14 and the wafers 12 held thereon.
- the drive control unit 414 controls the boat elevator 108 to rotate the boat 14 and the wafers 122 held thereon via the rotation shaft 348.
- the pressure control unit 416 receives the pressure measurement value of the reaction gas in the outer tube 360 by the PS378, controls the APC 380, and sets the reaction gas in the outer tube 360 to a desired pressure.
- the exhaust device control section 418 controls the EP382 to exhaust the reaction gas or the inert gas inside the outer tube 360.
- the temperature adjusting part 320 is simply abbreviated. There is power to do it.
- the number of constituent parts such as the temperature control part 320-1-1 320-4 may be indicated, but the number of constituent parts is shown as an example for clarification and clarification of the description. It is not intended to limit the technical scope of the present invention.
- An annular flange is provided between the lower end of the outer tube 360 and the upper opening of the manifold 350, and an O-ring 352 is provided between the flanges. Is hermetically sealed.
- An inert gas or a reaction gas is introduced into the outer tube 360 through a gas inlet nozzle 340 located below the outer tube 360.
- the upper part of the Mayuhorned 350 is connected to PS378, APC380 and EP382.
- the trachea 346 is attached.
- reaction gas flowing between the outer tube 360 and the inner tube 362 is exhausted to the outside via the exhaust pipe 346, APC380 and EP382.
- the APC 380 adjusts according to the instruction of the pressure control unit 416 so that the auter tube 360 has a predetermined desired pressure according to the control based on the pressure measurement value in the auter tube 360 by the PS 378.
- the APC380 adjusts the inert gas in the outer tube 360 according to the instruction of the pressure controller 416 so that the inert gas in the outer tube 360 becomes the normal pressure when the inert gas is to be introduced into the outer tube 360.
- the pressure is adjusted according to the instruction of the pressure control unit 416 so that the reaction gas in the outer tube 360 has a desired low pressure.
- a seal cap 354 is attached to the lower end of the manifold 350, and these are detachably and hermetically sealed via a ring 352.
- a rotating shaft 348 is connected to the seal cap 354, and the rotating shaft 348 rotates a number of semiconductor substrates (wafers) 12 and a boat 14 holding these.
- the rotating shaft 348 is connected to the boat elevator 108 (FIG. 1), and the boat elevator 108 raises and lowers the boat 14 at a predetermined speed according to control via the EC 376. Further, the boat elevator 108 rotates the wafer 12 and the boat 14 at a predetermined speed via the rotating shaft 348.
- the wafer 12 to be processed is transported while being loaded in a wafer cassette 490 (FIG. 1), and is transferred to the cassette transfer unit 100.
- the cassette transfer unit 100 transfers the wafer 12 to the cassette stocker 102 or the buffer set stocker 104.
- the wafer mover 106 takes out the wafers 12 from the cassette stocker 102 and loads the wafers 14 in a horizontal state in multiple stages.
- the boat elevator 108 lifts the boat 14 loaded with the wafers 12 and guides the boat 14 into the reaction chamber 3.
- the boat elevator 108 lowers the boat 14 loaded with the processed wafers 12. And take it out of the reaction chamber 3.
- the semiconductor processing apparatus 1 controls the semiconductor wafers 12 arranged at predetermined intervals in the reaction chamber 3 under the control of a control program 40 (FIG. 3) executed on the control unit 2 (FIGS. 1 and 4). , CVD to form a Si3N4 film, a Si ⁇ 2 film and a polysilicon (Poly_Si) film.
- the boat elevator 108 lowers the boat 14.
- a desired number of wafers 12 to be processed are set on the lowered boat 14, and the boat 14 holds the set wafers 12.
- FIG. 5 is a diagram illustrating the wafer 12 and the boat 14 shown in FIG. 2 and the like.
- each of the four temperature adjusting portions 320-1 320-4 of the heater 32 heats the inside of the outer tube 360 according to the setting, so that the wafer 12 is heated to a preset temperature.
- a temperature control is performed to make the film thickness formed on the wafer 12 held at the upper and lower stages of the boat 14 shown in FIG. 5 uniform. Able to perform wholesale.
- the MFC 374 adjusts the flow rate of the gas to be introduced via the gas introduction nozzle 340 (FIG. 2), and introduces and fills the inert gas into the outer tube 360.
- the boat elevator 108 raises the boat 14 and moves the boat 14 into the auta tube 360 filled with an inert gas maintained at a desired processing temperature by the heater 32.
- EP382 exhausts the reaction gas from the inside of the outer tube 360 during the low pressure CVD process via the exhaust pipe 346, and the APC 380 sets the reaction gas in the outer tube 360 to a desired pressure.
- the reduced pressure CVD process is performed on the wafer 12 for a predetermined time.
- the reaction gas inside the vacuum tube 360 which is shifted to the process for the next wafer 12, is replaced with an inert gas, and the pressure is further reduced to normal pressure.
- the boat elevator 108 raises the boat 14 holding the wafer 12 to be subjected to the low pressure CVD process, and sets the boat 14 in the outer tube 360.
- the following reduced pressure CVD process is performed on the wafer 12 set as described above.
- FIG. 6 is a diagram illustrating a shape of a wafer 12 to be processed in the semiconductor processing apparatus 1 (FIG. 1).
- the surface of the wafer 12 (hereinafter, the surface of the wafer 12 is also simply referred to as the wafer 12) has a shape as shown in FIG. 6, is held horizontally in the boat 14, and the heater 32 is provided around the outer tube 360. The wafer 12 housed in the outer tube 360 is heated.
- the temperature at the end of the surface of the wafer 12 is higher than the temperature at the center.
- the reaction speed may be different between the end portion and the center portion of the wafer 12 depending on the type of the film formed on the wafer 12. Therefore, even if the temperature deviation does not occur between the edge and the center of the wafer 12, the thickness of the film formed on the wafer 12 due to the supply of the reaction gas from the outer peripheral side of the wafer 12 The force S may be non-uniform between the end and the center.
- the temperature deviation generated in the wafer 12 It is necessary to minimize the difference.
- the semiconductor processing method according to the present invention uses a temperature deviation as a target value setting item in order to control the temperature of a large number of wafers 12 held in the boat 14.
- This temperature deviation includes the temperature deviation between the substrates caused by whether the wafer 12 is in the lower part of the upper stage of the boat 14 shown in FIG. 5, and the substrate deviation occurring in the plane of the wafer 12 shown in FIG. There is a temperature deviation within.
- a temperature deviation (inter-substrate temperature deviation and intra-substrate temperature deviation) is set in addition to the temperature set value for each of the temperature adjusting portions 320 (FIG. 2).
- Each of the temperature adjustment sections 320 is set with an addition value of the calculated temperature setting correction amount Z and the temperature set value, and each of the temperature adjustment sections 320 is set so that the wafer 12 has the set temperature. Heat the inside of the.
- FIG. 7 is a diagram illustrating the characteristics of the temperature deviation between the edge and the center of the wafer 12 (FIG. 6).
- FIG. 7 (A) shows that the temperature of the wafer 12 has a T force and T + ⁇ .
- the in-plane temperature deviation amounts B and B ′ when the temperature of the wafer 12 changes by 2 ⁇ ⁇ are shown in (B), and the in-plane temperature deviation amounts C and C when the temperature of the wafer 12 changes by 2 ⁇ ⁇ . '.
- FIG. 8 is a diagram exemplifying an in-plane temperature deviation amount in the case where steady temperature deviations A and A ′ occur between the edge and the center of the wafer 12 at a temperature around 800 ° C.
- the relational expression between the temperature change amount N and the average temperature deviation amount M is derived based on the following characteristic of the temperature deviation between the edge and the center of the wafer 12.
- the temperature of the wafer 12 rises from a certain set temperature T to T + ⁇ .
- the sum B + B ′ of the in-plane temperature deviation (B) between the temperature change at the end of the wafer 12 indicated by the dotted line and the temperature change at the center of the wafer 12 indicated by the solid line is zero.
- the in-plane temperature deviation amount B has the same value as when the wafer 12 is in the steady state at the set temperature T.
- the in-plane temperature deviation value C (C) is proportional to the change temperature ⁇ .
- the characteristic of the temperature deviation is that the change temperature ⁇ shown in FIGS. 7A and 7B is sufficiently smaller than the set temperature T, and as shown in FIG. It is assumed that the steady-state temperature deviations A and A 'that constantly occur with the center do not change before and after the temperature change.
- the characteristics of the temperature deviation shown in FIGS. 7A and 7B show that the steady temperature deviation A before the temperature change and the steady temperature deviation A ′ after the temperature change are different. It is established within a range that does not change significantly.
- a steady-state temperature deviation A (° C.-min / min) was measured on each of the wafers 12 in the upper, middle, upper, lower, and lower stages of the boat 14. You.
- the temperature is changed from C to T + AT ° C (800 ° C force to 810 ° C in Fig. 8)
- the temperature deviation D generated between the edge and the center of the wafer 12 is measured. .
- the temperature deviation D is defined as shown in the following equation 1.
- F is the temperature difference between the edge and the center of wafer 12.
- step 2 the in-plane temperature deviation D 'is defined as shown in the following equations 2-1 and 2-2.
- A is the steady temperature deviation between the edge and the center of the wafer 12.
- Equation 6 the average temperature deviation amount M is expressed as in Equation 6 below.
- the deposition time t is 25 min
- the steady-state deviation A is 0.2 ° C.
- the temperature deviation within a unit area is 0.75 ° C. min / ° C.
- the average temperature deviation amount M becomes ⁇ 1 ° C.
- the above equation 5 shows the steady-state temperature deviation A measured as described above, the in-plane temperature deviation K, the film formation time t, and the in-plane average temperature deviation M to be improved.
- the temperature change amount N (° C) is calculated.
- the temperature change amount N the temperature difference between the center and the end of the wafer 12 can be controlled, and the film thickness on the wafer 12 is controlled through the control of the temperature difference. That can be S.
- the temperature change amount N is determined so that the value of the temperature deviation amount D becomes zero before and after the temperature change, and the obtained temperature change amount N is divided by 2 so as to reach the set temperature. It is expressed in the attached format.
- FIG. 9 is a diagram illustrating a first temperature setting correction value Z used in the semiconductor processing method according to the present invention.
- FIG. 10 shows an example of a table used for setting the first temperature setting correction value Z shown in FIG. FIG.
- the stabilization time (5 min in Fig. 9) is added to obtain the temperature setting correction value Z shown in Fig. 9.
- the temperature setting correction value Z shown in Fig. 9 The settings are made as shown in Fig. 10 according to the user's operation on the specified table.
- FIG. 11 is a diagram exemplifying a temperature set value for the wafer 12 corrected by the temperature set correction value Z.
- the temperature setting value of the processing recipe is corrected by the temperature setting correction value Z shown in FIG. 10, and the temperature setting as shown in FIG.
- FIG. 12 is a graph showing in-plane temperature deviation of the wafer 12 when the correction using the temperature setting correction value Z is not performed.
- FIG. 13 shows the average temperature deviation M of the wafer 12 in Figs. 9 and 10, the temperature change N was calculated so that it would be -1 ° C, and the wafer 12 was corrected using the calculated Z.
- FIG. 4 is a graph showing the in-plane temperature deviation of FIG.
- FIG. 14 shows the average temperature deviation M of the wafer 12, the temperature change N so as to be + 1 ° C., and the in-plane of the wafer 12 when the correction using the obtained Z is performed.
- FIG. 3 is a diagram showing a temperature deviation in a graph format.
- M is corrected to be ⁇ 1 ° C.
- M can be set arbitrarily by obtaining the desired temperature change amount N and correcting the temperature setting correction value Z using the obtained Z (ex. + 1. C, -l ° C) o
- FIG. 15 is a diagram illustrating a second temperature setting correction value Z used in the semiconductor processing method according to the present invention.
- FIG. 16 shows a third temperature setting correction used in the semiconductor processing method according to the present invention. It is a figure which illustrates value z.
- FIG. 17 is a diagram showing an example of a table used for setting the third temperature setting correction value Z shown in FIG.
- the temperature setting correction value Z may be changed freely as long as the temperature correction amount as a whole matches.
- the temperature setting correction value Z may be changed in one step on condition that the temperature correction amount as a whole is the same.
- the temperature may be changed stepwise in the temperature setting correction value Z on condition that the temperature correction amount as a whole is the same.
- the temperature correction amount Z is the same as the temperature correction amount as a whole as compared with the case shown in FIG. 9. On the condition that the temperature change period may be shortened.
- FIG. 18 is a diagram showing the components around the reaction chamber 3 shown in FIGS. 1 and 2, and the configuration of a second control program 44 for controlling the reaction chamber 3.
- the second control program 44 employs a configuration in which a temperature setting correction value storage unit 442 is added to the first control program 40.
- the temperature setting correction value storage unit 442 stores the temperature setting correction value Z calculated as described above, and outputs it to the process control unit 400.
- FIG. 19 is a diagram illustrating a correction process for the temperature set value of the processing recipe stored in the temperature setting storage unit 422 shown in FIG.
- the process control unit 400 adds the temperature setting value stored in the temperature setting storage unit 422 to the temperature setting correction value Z stored in the temperature setting correction value storage unit 442 (see FIG. 9, FIG. 10, FIG. 15 and FIG. 17) are added to obtain a corrected temperature set value (FIG. 11), which is set in the temperature control unit 410.
- the temperature control unit 410 controls the wafer 12
- the power supplied to the temperature adjustment section 320 is controlled so that the temperature becomes a set temperature from 0.
- the semiconductor processing method according to the present invention is realized in the semiconductor processing apparatus 1 (FIG. 1).
- the present invention can be used for processing a semiconductor substrate.
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Cited By (5)
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JP2008205426A (ja) * | 2007-01-26 | 2008-09-04 | Hitachi Kokusai Electric Inc | 基板処理方法及び半導体製造装置 |
JP2009081415A (ja) * | 2007-09-06 | 2009-04-16 | Hitachi Kokusai Electric Inc | 半導体製造装置及び基板処理方法 |
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Cited By (10)
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WO2007105431A1 (ja) * | 2006-03-07 | 2007-09-20 | Hitachi Kokusai Electric Inc. | 基板処理装置および基板処理方法 |
US8501599B2 (en) | 2006-03-07 | 2013-08-06 | Hitachi Kokusai Electric Inc. | Substrate processing apparatus and substrate processing method |
US8507296B2 (en) | 2006-03-07 | 2013-08-13 | Hitachi Kokusai Electric Inc. | Substrate processing method and film forming method |
JP2008205426A (ja) * | 2007-01-26 | 2008-09-04 | Hitachi Kokusai Electric Inc | 基板処理方法及び半導体製造装置 |
US7727780B2 (en) | 2007-01-26 | 2010-06-01 | Hitachi Kokusai Electric Inc. | Substrate processing method and semiconductor manufacturing apparatus |
KR100979104B1 (ko) * | 2007-01-26 | 2010-08-31 | 가부시키가이샤 히다치 고쿠사이 덴키 | 반도체 제조 방법 및 기판 처리 장치 |
JP2013191882A (ja) * | 2007-01-26 | 2013-09-26 | Hitachi Kokusai Electric Inc | 基板処理方法、半導体装置の製造方法および半導体製造装置 |
JP2009081415A (ja) * | 2007-09-06 | 2009-04-16 | Hitachi Kokusai Electric Inc | 半導体製造装置及び基板処理方法 |
JP2014042042A (ja) * | 2007-09-06 | 2014-03-06 | Hitachi Kokusai Electric Inc | 半導体製造装置及び基板処理方法 |
US11295952B2 (en) | 2019-06-10 | 2022-04-05 | Semes Co., Ltd. | Apparatus for treating substrate and method for treating apparatus |
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