WO2004086504A1 - ホトダイオードアレイ及びその製造方法、並びに放射線検出器 - Google Patents
ホトダイオードアレイ及びその製造方法、並びに放射線検出器 Download PDFInfo
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- WO2004086504A1 WO2004086504A1 PCT/JP2004/004211 JP2004004211W WO2004086504A1 WO 2004086504 A1 WO2004086504 A1 WO 2004086504A1 JP 2004004211 W JP2004004211 W JP 2004004211W WO 2004086504 A1 WO2004086504 A1 WO 2004086504A1
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/1446—Devices controlled by radiation in a repetitive configuration
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14643—Photodiode arrays; MOS imagers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
- H01L31/0352—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their shape or by the shapes, relative sizes or disposition of the semiconductor regions
- H01L31/035272—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their shape or by the shapes, relative sizes or disposition of the semiconductor regions characterised by at least one potential jump barrier or surface barrier
- H01L31/035281—Shape of the body
Definitions
- Photo diode array manufacturing method thereof, and radiation detector
- the present invention relates to a photodiode array, a method for manufacturing the same, and a radiation detector.
- a back-illuminated photodiode array of a type in which light is incident from the opposite surface (back surface) of the surface on which bump electrodes and the like are formed has been known.
- the photodiode array disclosed in Patent Document 1 has a prismatic p-layer 134 formed on an n- type silicon substrate 133, as shown in FIGS. 26 and 27. Therefore, the photodiode 140 has a pn junction.
- the scintillator 13 1 is formed by bonding the scintillator 13 1 via the negative electrode membrane 13 36 to the back surface (upper side of the drawing) of the surface (lower side of the drawing) on which the photodiode 140 is formed.
- the photodiode 140 When the light whose wavelength has been converted by the scintillator 13 1 enters the photodiode 140, the photodiode 140 generates a current corresponding to the incident light.
- the current generated by the photodiode 140 is output through a positive electrode 135 formed on the front surface side, a solder ball 139, and a solder pad 138 provided on the printed circuit board 137.
- Patent Document 1 Japanese Patent Application Laid-Open No. 7-3333348 Disclosure of the Invention
- a photodiode array for CT for example, a photodiode array for CT
- a flat collet and a pyramid collet can be used as a collet for adsorbing a chip.
- a flat collet is used.
- the photodiode array for CT has a large chip area (for example, a rectangular shape with a side of 2 O mm).
- the pyramid collect 16 1 used in a normal mounter the chip 16 2 and the pyramid are used. Due to the gap 163 between the collet 161, the tip 162 is warped.
- the pyramid collet 161 when using the pyramid collet 161, there is a possibility that a displacement occurs due to the warpage, and the mounting accuracy of the chip 162 is reduced. In addition, when performing flip chip bonding, heating and pressurizing are required. However, the pyramid collet 161 has poor heat conduction efficiency. Further, the edge of the chip 162 may be damaged by the applied pressure. From the above, the pyramid collet 161 is not suitable for absorbing thin chips. Therefore, when performing flip-chip bonding, as shown in Fig. 25A, the chip 162 is sucked by the flat collet 160 in surface contact with the chip surface, and the heater block 1 is attached to the chip 162. Heat and pressure are added from 64.
- the entire chip surface of the chip 16 2 comes into contact with the flat collet 160.
- the entire chip surface which is the light incident surface, comes into contact with the flat collet 160 and is subjected to pressure and heat, the region corresponding to the impurity diffusion layer constituting the photodiode on the chip surface is physically damaged ( Damage). If the chip surface is damaged in this way, problems such as poor appearance and deterioration of characteristics (such as an increase in dark current and noise) will occur.
- the present invention has been made in view of the above points, and an object of the present invention is to prevent a region corresponding to a photodiode from being damaged at the time of mounting, and to prevent deterioration of characteristics.
- An object of the present invention is to provide a possible photodiode array, a method for manufacturing the same, and a radiation detector.
- a photodiode array according to the present invention includes a semiconductor substrate, and a plurality of photodiodes are arranged in an array on a surface of the semiconductor substrate opposite to a surface on which light to be detected is incident.
- a region that does not correspond to a region corresponding to the region where the photodiode is formed protrudes on the incident surface side of the semiconductor substrate.
- a flat collet is used at the time of mounting due to the region not corresponding to the region where the photodiode is formed, a gap is formed between the region corresponding to the region where the photodiode is formed and the flat collet. Therefore, the area corresponding to the photodiode does not directly contact the flat collet, and is not damaged by pressurization or heating. As a result, characteristic degradation due to noise, dark current, and the like can be effectively prevented.
- a plurality of the depressions are formed, and that adjacent depressions communicate with each other. Further, it is preferable that a plurality of the depressions are formed corresponding to the respective photodiodes, and that adjacent depressions communicate with each other. In any of these cases, the adjacent dents communicate with each other, so when applying resin (for example, optical resin for mounting a scintillator panel) to the incident surface of the photodiode array, the resin is It becomes easy to spread to the depression. In addition, generation of voids in each depression can be suppressed.
- resin for example, optical resin for mounting a scintillator panel
- the semiconductor substrate is provided with an impurity region separating each photodiode between adjacent photodiodes.
- the occurrence of surface leaks is suppressed by the impurity regions, so that the adjacent photodiodes can be reliably electrically separated from each other.
- a high impurity concentration layer of the same conductivity type as that of the semiconductor substrate is formed on the incident surface side of the semiconductor substrate. In this case, carriers generated in the vicinity of the light incident surface inside the semiconductor substrate efficiently move to each photodiode without being trapped. As a result, the light detection sensitivity can be increased.
- a plurality of depressions having a predetermined depth are formed in an array on the surface of the semiconductor substrate opposite to the incident surface of the light to be detected, and a plurality of depressions are formed at the bottom of the depressions. It is preferable that each photodiode is formed.
- a method for manufacturing a photodiode array according to the present invention includes the steps of preparing a semiconductor substrate made of a semiconductor of a first conductivity type, and diffusing a plurality of impurities of a second conductivity type on one surface side of the semiconductor substrate. Forming a layer and forming a plurality of photodiodes composed of the respective impurity diffusion layers and the semiconductor substrate in an array, corresponding to a region where the photodiode is formed on the other surface of the semiconductor substrate. Forming a recessed portion having a predetermined depth recessed from a region not corresponding to the region in which the photodiode is formed in the region to be formed.
- the photodiodes are formed in an array on one surface of the semiconductor substrate, and correspond to regions where the photodiodes are formed on the other surface. It is possible to obtain a photodiode array in which the above-mentioned depression is formed in a region.
- the method further includes, after the step of forming the depression, a step of forming a first-conductivity-type high-impurity-concentration layer on the other surface of the semiconductor substrate.
- a high impurity concentration layer of the same conductivity type as the semiconductor substrate is formed on the other surface of the semiconductor substrate. For this reason, carriers generated in the vicinity of the light incident surface inside the semiconductor substrate efficiently move to each photodiode without being trapped. As a result, the light detection sensitivity can be increased.
- a semiconductor substrate made of a semiconductor of a first conductivity type is prepared, and a first concave portion is formed on one surface side of the semiconductor substrate.
- a process of forming an array and forming a semiconductor Forming a second recess having a predetermined depth recessed in a region corresponding to the region where the photodiode is formed on the other surface of the substrate, in a region corresponding to the region where the photodiode is formed; , Are provided.
- the photodiodes are formed in an array at the bottom of the first recess formed on one surface of the semiconductor substrate, and the other is formed. It is possible to obtain a photodiode array in which the second depression is formed in a region corresponding to the region where the photodiode is formed on the surface.
- the method further includes, after the step of forming the second recess, a step of forming a high impurity concentration layer of the first conductivity type on the other surface of the semiconductor substrate. .
- a high impurity concentration layer of the same conductivity type as the semiconductor substrate is formed on the other surface of the semiconductor substrate. For this reason, the carrier generated in the vicinity of the light incident surface inside the semiconductor substrate is efficiently moved to each photodiode without being trapped. As a result, the light detection sensitivity can be increased.
- the method further includes the step of providing a first conductivity type impurity region between adjacent impurity diffusion layers. In this case, it is possible to obtain a photodiode array in which adjacent photodiodes are reliably electrically separated.
- the radiation detector according to the present invention includes: a photodiode array; a scintillator panel disposed to face an incident surface of light to be detected in the photodiode array, and emitting light when radiation is incident; It is characterized by having.
- the radiation detector according to the present invention includes a photodiode array manufactured by the above-described method for manufacturing a photodiode array, and a surface facing the surface of the photodiode array provided with the concave portion. And a scintillator panel that is arranged and emits light upon incidence of radiation.
- a radiation detector includes: a photodiode array manufactured by the above-described method for manufacturing a photodiode array; And a scintillator panel that is arranged to face the surface on which the second depression is formed, and emits light when radiation is incident.
- each of the radiation detectors according to the present invention includes the above-described photodiode array, it is possible to effectively prevent characteristic degradation due to noise, dark current, or the like.
- FIG. 1 is a diagram showing a cross-sectional configuration of a photodiode array according to the first embodiment.
- FIG. 2 is a diagram for explaining the configuration of the photodiode array according to the first embodiment.
- FIG. 3 is a diagram for explaining a manufacturing process of the photodiode array according to the first embodiment.
- FIG. 4 is a diagram for explaining a manufacturing process of the photodiode array according to the first embodiment.
- FIG. 5 is a diagram for explaining a manufacturing process of the photodiode array according to the first embodiment.
- FIG. 6 is a diagram for explaining a manufacturing process of the photodiode array according to the first embodiment.
- FIG. 7 is a diagram for explaining a manufacturing process of the photodiode array according to the first embodiment.
- FIG. 8 is a diagram for explaining a manufacturing process of the photodiode array according to the first embodiment.
- FIG. 9 is a view for explaining a manufacturing process of the photodiode array according to the first embodiment.
- FIG. 10 is a diagram for explaining a manufacturing process of the photodiode array according to the first embodiment.
- FIG. 11 is a diagram illustrating a photodiode according to the first embodiment.
- FIG. 1 A first figure.
- FIG. 12 is a view for explaining a photo diode manufacturing process according to the first embodiment.
- FIG. 13A is a plan view schematically showing an example of a photodiode according to the first embodiment.
- FIG. 13B is a plan view schematically showing an example of the photodiode array according to the first embodiment.
- FIG. 13C is a plan view schematically showing an example of the photodiode array according to the first embodiment.
- FIG. 14A is a plan view schematically showing an example of the photodiode array according to the first embodiment.
- FIG. 14B is a plan view schematically showing an example of the photodiode array according to the first embodiment.
- FIG. 14C is a plan view schematically showing an example of the photodiode array according to the first embodiment.
- FIG. 15 is a diagram showing a cross-sectional configuration of a photodiode array according to the second embodiment.
- FIG. 16 is a diagram for explaining the configuration of the photodiode array according to the second embodiment.
- FIG. 17 is a diagram for explaining a manufacturing process of the photodiode array according to the second embodiment.
- FIG. 18 is a diagram for explaining a manufacturing process of the photodiode array according to the second embodiment.
- FIG. 19 is a diagram for explaining a manufacturing process of the photodiode array according to the second embodiment.
- FIG. 20 is a diagram for explaining a manufacturing process of the photodiode array according to the second embodiment.
- FIG. 21 is a diagram for explaining a manufacturing process of the photodiode array according to the second embodiment.
- FIG. 22 is a diagram for explaining a manufacturing process of the photodiode array according to the second embodiment.
- FIG. 23 is a diagram illustrating a cross-sectional configuration of the radiation detector according to the third embodiment.
- FIG. 24 is a diagram showing a cross-sectional configuration of the radiation detector according to the fourth embodiment.
- FIG. 25A is a diagram schematically showing a state in which the semiconductor chip is sucked by the flat collet.
- FIG. 25B is a diagram schematically showing a state where the semiconductor chip is attracted by the pyramid collet.
- FIG. 26 is a perspective view showing a conventional photodiode array.
- FIG. 27 is a schematic diagram showing a cross-sectional configuration in the XXVII-XXVII direction in FIG.
- FIG. 1 is a diagram showing a cross-sectional configuration of a photodiode array 1 according to an embodiment of the present invention.
- the incident surface of light L (the upper surface in FIG. 1) is referred to as the back surface, and the opposite surface (the lower surface in FIG. 1) as the front surface.
- the back surface the incident surface of light L
- the opposite surface the lower surface in FIG. 1
- the photodiode array 1 has a plurality of photodiodes 4 formed by pn junctions.
- the plurality of photodiodes 4 are two-dimensionally arranged in a regular array vertically and horizontally on the surface side of the photodiode array 1.
- Each photodiode 4 has a function as one pixel of the photodiode array 1, and constitutes one photosensitive region as a whole.
- the photodiode array 1 includes an n-type (first conductivity type) silicon substrate 3.
- the thickness of the n-type silicon substrate 3 is about 30 to 300 111 (preferably 100 / zm).
- the impurity concentration in the n-type silicon substrate 3 is about lxl 0 12 to l 0 15 Zcm 3 .
- p-type (second conductivity type) impurity diffusion layers 5 are two-dimensionally arranged in a regular array in a matrix.
- the thickness of the p-type impurity diffusion layer 5 is about 0.05 to 20 m (preferably 0.2 ⁇ m).
- the impurity concentration in the p-type impurity diffusion layer 5 is about 1 ⁇ 10 13 to 10 2 cm 3 .
- the pn junction formed by the p-type impurity diffusion layer 5 and the n-type silicon substrate 3 constitutes the photodiode 4.
- a silicon oxide film 22 is formed on the surface of the n-type silicon substrate 3.
- the passivation film 2 is formed on the silicon oxide film 22.
- the passivation film 2 is made of, for example, SiN.
- each electrode wiring 9 is formed corresponding to each p-type impurity diffusion layer 5 (photodiode 4).
- Each electrode wiring 9 is made of aluminum and has a thickness of about 1 m.
- One end of each electrode wiring 9 is electrically connected to the corresponding p-type impurity diffusion layer 5 through a contact hole formed in the silicon oxide film 22.
- the other end of each electrode wiring 9 is electrically connected to a corresponding under bump metal (UBM) 11 through a contact hole formed in the passivation film 2.
- UBM1 1 has a solder bump electrode 1
- UBM11 preferably has a strong interfacial bond with the solder and can prevent the diffusion of the solder component into the aluminum, and often has a multi-layer structure.
- the multilayer film structure include nickel (Ni) -gold (Au) formed by electroless plating. This structure forms a thick nickel plating (3 to 15 ⁇ ) in the area where aluminum is exposed, and a thin (0.05 to 0.1 Aim) gold plating on it. Gold is to prevent oxidation of nickel.
- Other structures include titanium (Ti) -platinum (Pt) —gold (Au) and chromium (Cr) -gold (Au) formed by lift-off.
- an accumulation layer 8 as a high impurity concentration layer is provided on the back side of the n-type silicon substrate 3.
- the accumulation layer 8 is formed with a substantially uniform depth over substantially the entire back surface.
- the accumulation layer 8 has the same conductivity type as the n-type silicon substrate 3 and has a higher impurity concentration than the n-type silicon substrate 3.
- the photodiode array 1 according to the present embodiment has the accumulation layer 8, even if it does not have the accumulation layer 8, it is possible to detect light to an extent that is practically sufficiently acceptable. Has sensitivity.
- AR film 24 that covers and protects the accumulation layer 8 and suppresses reflection of light L is formed.
- AR film 24 is made of, for example, S i 0 2, has a thickness of 0.0 to several; m about der Ru. Note that one layer 24 may be formed by laminating or composite optical film that enables antireflection in S i N and required wavelength to another S i 0 2.
- a region where each p-type impurity diffusion layer 5 exists is a region where the photodiode 4 is formed (hereinafter, referred to as a "formed region"), and other regions are formed. Are regions where no photodiodes are formed.
- a plurality of depressions 6 are provided for each photodiode 4 in a region corresponding to the formation region of each photodiode 4 (hereinafter, referred to as “corresponding region”).
- each The recessed portion 6 is formed, for example, in a rectangular shape having a size of lmmx lmm so as to be recessed from a region not corresponding to the formation region of the photodiode 4 (hereinafter, referred to as a “non-corresponding region”).
- the depth d of each depression 6 is, for example, 3 to 150 ⁇ , preferably about 10 ⁇ m.
- n + -type impurity region 7 is provided between adjacent p-type impurity diffusion layers 5 on the n-type silicon substrate 3, that is, between adjacent photodiodes 4.
- the thickness of n + type impurity region 7 is about 0.1 to several 10 ⁇ .
- the ⁇ + type impurity region 7 functions as a separation layer for electrically separating the adjacent photodiodes 4 ( ⁇ type impurity diffusion layers 5) from each other. As a result, the adjacent photodiodes 4 are reliably electrically separated from each other, and crosstalk between the photodiodes 4 can be reduced.
- the photodiode array 1 in the present embodiment has photodetection characteristics that are sufficiently acceptable for practical use without providing the ⁇ + -type impurity region 7.
- the photodiode array 1 is an extremely thin plate as shown in FIG.
- the width W1 of the photodiode array 1 is about 22.4 mm, and the thickness D of the photodiode array 1 is about ⁇ 0.3 mm.
- the photodiode array 1 has many photodiodes 4 described above (for example, 256 (16 ⁇ 16) two-dimensional arrays).
- the pitch W2 between adjacent photodiodes 4 (pixels) is about 1.4 mm.
- the photodiode array 1 is a chip having a large area (for example, 22.4 mm ⁇ 22.4 mm).
- the top diagram in FIG. 2 shows the thinness of the photodiode array 1, and details of the photodiode array 1 are shown in an enlarged view.
- the photodiode array 1 when light L enters from the back surface, the incident light L passes through the accumulation layer 8 and reaches the pn junction. Then, each photodiode 4 generates a carrier according to the incident light. At this time, the accumulation layer 8 is located near the light incident surface (back surface) inside the n-type silicon substrate 3. The generated carriers are suppressed from being trapped at the light incident surface and the interface with the AR film 24. As a result, carriers efficiently move to the pn junction, and the photodetection sensitivity of the photodiode array 1 is increased.
- the photocurrent caused by the generated carriers is extracted from the bump electrode 12 through the electrode wiring 9 connected to each p-type impurity diffusion layer 5 and the UBM 11. The output from the bump electrode 12 detects incident light.
- the depression 6 is formed in the region corresponding to each photodiode 4. Therefore, the non-corresponding region of each photodiode 4 protrudes from the corresponding region by an amount corresponding to the depth d.
- the photodiode array 1 is attracted to the flat collet and the flip chip bonding is performed, the non-corresponding area of each photodiode 4 comes into contact with the flat collet, and the area between the flat collet and the corresponding area of each photodiode 4 is contacted. It works to ensure a gap.
- each photodiode 4 is protected by the non-corresponding region, and does not directly contact the flat collet. Therefore, since the corresponding region of each photodiode 4 is not directly subjected to stress by pressurization or stress by heating, no physical damage (damage) is given to the accumulation layer 8 in the corresponding region.
- the photodiode 4 does not generate dark current noise due to crystal defects or the like due to such damage.
- the photodiode array 1 can perform highly accurate (high S / N ratio) light detection.
- the depression 6 is formed for each photodiode 4 corresponding to the photodiode 4.
- the lattice-like wall 13 a may be formed in the non-corresponding region of the photodiode 4.
- a plurality of short wall portions 13c may be formed intermittently in a portion other than the ridge portion 13b of the non-corresponding region of the photodiode 4.
- a cross-shaped wall portion 13d may be formed in the tsuji portion 13b.
- the depression 6 may be formed in a plurality of regions, for example, by dividing the depression 6 into two large left and right parts.
- the non-corresponding region may be formed by intermittently arranging the wall portions 13c and 13d.
- a frame-shaped wall 13 e is formed at the edge of the photodiode array 1, and the entire inside of the wall 13 e is one depression. It may be configured to be part 6. Instead of the wall 13 e, a frame-shaped wall 13 f with a part missing may be formed as shown in FIG. 14B. In these cases, the depressions 6 are formed without being partitioned by non-corresponding regions.
- the non-corresponding region of the photodiode 4 it is not necessary that all of the non-corresponding region of the photodiode 4 be formed thicker than the concave portion 6, and as shown in FIGS. 14A and 14B, a part of the non-corresponding region (Parts where the walls 13 e and 13 f are formed) may be formed thicker than the depressions 6. On the other hand, the entire corresponding region of the photodiode 4 must be provided in the depression 6.
- the gap between the adjacent wall portions is made of resin (for example, used when bonding a scintillator panel 31 described later). It functions as a escape route for the optical resin 3 5). Therefore, when resin is applied to the back surface of the photodiode array 1, voids (air bubbles) are less likely to be generated in the depressions 6 (the number of voids is reduced), and the applied resin is applied to each depression 6. It can be spread evenly and filled uniformly. [0775] As shown in FIG. 14C, the wall 13a and the wall 13e can be provided continuously, but in this case, each recess 6 It is partitioned by the part 13a and the wall part 13e.
- an n-type silicon substrate 3 having a thickness of about 150 to 500 ⁇ (preferably 350 / im) is prepared.
- the silicon oxide film 20 formed on the surface of the n-type silicon substrate 3 is patterned using a predetermined photomask, and an opening is formed at a position where the n + -type impurity region 7 is to be formed.
- phosphorus is doped through an opening formed in the silicon oxide film 20 to provide an n + -type impurity region 7 in the n-type silicon substrate 3.
- the n + -type impurity region 7 is also formed on the back side of the n-type silicon substrate 3. When the n + -type impurity region 7 is not provided, this step (impurity region forming step) may be omitted.
- a silicon oxide film 21 is formed again on the front and back surfaces of the n-type silicon substrate 3 (see FIG. 5). This silicon oxide film 21 is used as a mask when forming the p-type impurity diffusion layer 5 in a subsequent step.
- the silicon oxide film 21 formed on the surface of the n-type silicon substrate 3 using a predetermined photomask is formed at a position where each p-type impurity diffusion layer 5 is to be formed.
- Boron is doped from the opening formed in the silicon oxide film 21 to form the p-type impurity diffusion layers 5 in a two-dimensional array in a vertical and horizontal array.
- the photodiodes 4 formed by the pn junction between each p-type impurity diffusion layer 5 and the n-type silicon substrate 3 are formed in a two-dimensional array in a vertical and horizontal array.
- the photodiode 4 is a portion corresponding to a pixel.
- a silicon oxide film 22 is formed again on the front surface side of the substrate (see FIG. 6).
- the rear surface of the n-type silicon substrate 3 is polished until its thickness becomes a predetermined thickness (about 30 to 30 ⁇ ⁇ ), thereby reducing the thickness of the ⁇ -type silicon substrate 3 (thin plate). I do.
- a silicon nitride film (Si i) 23 is formed on the front and back surfaces of the ⁇ -type silicon substrate 3 by LP-CVD (or plasma CVD) (see FIG. 7).
- pattern jungling is performed using a predetermined photomask, and the silicon nitride film 23 is removed from a region where each dent 6 is to be formed, that is, the region corresponding to the photodiode 4, and a portion where each dent 6 is not formed, that is, the photodiode
- the silicon nitride film 23 is left in the non-corresponding region 4 (see FIG. 8).
- the non-corresponding regions by appropriately changing the region where the silicon nitride film 23 remains, the non-corresponding regions (wall portions 13a, 13c, 13d, 13e, and 13f) can be formed in various patterns described above. Can be formed.
- the n-type silicon substrate 3 is removed by anisotropic re-etching using potassium hydroxide solution (KOH), TMAH, or the like, and using the remaining silicon nitride film 23 as a mask.
- KOH potassium hydroxide solution
- TMAH TMAH
- the recess 6 is formed in a portion not covered by the silicon nitride film 23.
- the remaining silicon nitride film 23 is removed.
- an n-type ion species for example, phosphorus or arsenic
- the above-described accumulation layer 8 having a higher impurity concentration than the n-type silicon substrate 3 is formed by diffusion to a depth of about 10 m. Further, thermal oxidation is performed to form an AR film 24 on the accumulation layer 8 (see FIG. 9).
- each photodiode 4 a contact hole extending to each p-type impurity diffusion layer 5 is formed in the silicon oxide film 22 by a photoetching technique.
- the electrode wiring 9 is formed by forming an aluminum metal film on the silicon oxide film 22 by vapor deposition and then performing patterning using a predetermined photomask (see FIG. 10).
- an SIN film 25 serving as the passivation film 2 is formed on the silicon oxide film 22 so as to cover the electrode wiring 9.
- the SiN film 25 can be formed by sputtering, plasma CVD, or the like.
- the passivation film 2 is made of an insulating film such as SiO 2 , PSG or BPSG, polyimide resin, It may be an acrylate resin, an epoxy resin, a fluororesin, or a composite film or a laminated film thereof.
- a contact hole is formed at a predetermined position of the SiN film 25 to serve as an electrode extraction portion (see FIG. 11). Furthermore, a bump electrode 12 is provided.When solder is used as the bump electrode 12, since the solder has poor wettability to aluminum, the UBM 11 for mediating between the electrode extraction portion and the bump electrode 12 is connected to each electrode. It is formed at the pole extraction part. Then, a bump electrode 12 is formed on the UBM 11 (see FIG. 12).
- the bump electrode 12 can be formed by forming solder on a predetermined UBM 11 by a solder ball mounting method or a printing method, and forming a riff opening.
- the bump electrodes 12 are not limited to solder, but may be gold bumps, nickel bumps, copper bumps, or conductive resin bumps containing a metal such as a conductive filler. Although only the extraction of the anode electrode is shown in the figure, the force source (substrate) electrode can also be extracted from the n + -type impurity region 7 similarly to the anode electrode (not shown).
- the bump electrode 12 of the anode electrode is formed in the area of the n + -type impurity region 7
- the bump electrode 12 of the anode electrode is formed in the area of the p-type impurity diffusion layer 5. May be formed.
- n-type silicon in which a concave portion 45 (first concave portion) is formed on the opposite side (front surface side) of the light L incident surface It is intended for a photodiode array 41 having a substrate 43. Since the photodiode array 41 has a common part with the photodiode array 1, the following description will be omitted. The differences will be mainly described, and the description of common parts will be omitted or simplified.
- a plurality of depressions 45 are formed in a two-dimensional array in a regular vertical and horizontal array on the surface side of the n-type silicon substrate 43.
- Each recess 45 is formed by recessing a predetermined region of the ⁇ -type silicon substrate 43 so as to be thinner than the surrounding region, and is formed at an arrangement interval of about 1.4 to 1.5 mm.
- the photodiodes 4 described above are formed one by one at the bottom 45 a of the recess 45, thereby forming a photodiode array 41 in which the photodiodes 4 are two-dimensionally arranged in an array.
- Each recess 45 has a rectangular opening having a size of, for example, about l mm xl mm on the surface of the n-type silicon substrate 43, and extends from the opening to the bottom 45 a.
- the opening size is gradually reduced (from the front side to the back side).
- the depression 45 has the side surface 45 b of the slope.
- the depth from the surface of the n-type silicon substrate 43 to the bottom 45a is, for example, about 50 m.
- the electrode wiring 9 is formed on the silicon oxide film 22 along the side surface 45b.
- One end of each electrode wiring 9 is electrically connected to the corresponding p-type impurity diffusion layer 5 through a contact hole formed in the silicon oxide film 22.
- the other end of each electrode wiring 9 is electrically connected to the corresponding UBM 11 through a contact hole formed in the passivation film 2.
- An n + -type impurity region 7 is provided between adjacent photodiodes 4.
- An accumulation layer 8 is formed on the entire back surface of the n-type silicon substrate 3.
- An AR film 24 is formed on the accumulation layer 8. Both the accumulation layer 8 and the AR film 24 are the same as those of the photodiode array 1 described above.
- a plurality of depressions 6 are provided for each photodiode 4 in a region corresponding to the photodiode 4 so as to correspond to each depression 45.
- the depression 6 is the same as that of the photodiode array 1 described above.
- the photodiode array 41 has an extremely thin plate shape as shown in Fig. 16. The width W 1 of the photodiode array 41 is about 22.4 mm, and the thickness D of the photodiode array 41 is 150 to 300.
- the photodiode array 41 has a large number of the photodiodes 4 described above (for example, 256 (16 XI 6) two-dimensional arrays).
- the pitch W2 between the adjacent photodiodes 4 is about 1.4 mm.
- the photodiode array 41 is a chip having a large area (for example, 22.4 mm ⁇ 22.4 mm).
- the top diagram in FIG. 16 shows the thickness of the photodiode array 41, and details of the photodiode array 41 are depicted in an enlarged view.
- the photodiode array 41 configured as described above, when the light L enters from the back surface, the incident light L passes through the accumulation layer 8 like the photodiode array 1 to form the pn junction. To reach. Then, each photodiode 4 generates a carrier according to the incident light. At this time, the distance from the back surface of the n-type silicon substrate 43 to the pn junction is shortened because the pn junction is provided at the bottom 45 a of the depression 45 (for example, 10 to 100). ⁇ ⁇ ). Therefore, in the photo diode array 41, the situation in which the carrier generated by the incidence of the light L moves and disappears due to recombination is suppressed. As a result, the photodiode array 41 can maintain high detection sensitivity.
- the accumulation layer 8 allows the carriers generated near the light incident surface (back surface) inside the ⁇ -type silicon substrate 3 to efficiently move to the pn junction without recombination. Will be done.
- the photodiode array 41 has a higher light detection sensitivity (however, the photodiode array 41 of the present embodiment can be practically sufficiently tolerated even without the accumulation layer 8). It has a moderate detection sensitivity).
- the photocurrent due to the generated carriers is extracted from the bump electrode 12 through the electrode wiring 9 and the UBM 11 connected to each p-type impurity diffusion layer 5. Based on the output from the bump electrode 12, the incident light is detected. In this regard, it is similar to the photodiode array 1.
- the depression 6 is formed in the region corresponding to each photodiode 4.
- the photodiode array 41 is attracted to a flat collet and flip-chip bonding is performed, the non-corresponding area of each photodiode 4 comes into contact with the flat collet and a gap is secured between the flat collet and the corresponding area of each photodiode 4 It works like it does. Thereby, the corresponding region of each photodiode 4 is protected by the non-corresponding region, and does not directly contact the flat collet.
- each photodiode 4 since the corresponding region of each photodiode 4 is not directly subjected to the stress by pressurization or the stress by heating, no physical damage (damage) is given to the accumulation layer 8 in the corresponding region.
- the photodiode 4 does not generate a current or noise due to a crystal defect or the like due to such damage.
- the photodiode array 1 can perform highly accurate (high SZN ratio) light detection.
- the scintillator directly contacts the corresponding area. As a result, it is possible to avoid damage when the scintillator is attached.
- the respective steps described with reference to FIGS. 3 to 6 are executed.
- the back surface of the n-type silicon substrate 3 is polished until the thickness of the n-type silicon substrate 3 reaches a predetermined thickness, thereby reducing the thickness of the n-type silicon substrate 3 (thin plate).
- a silicon nitride film (SiN) 23 is formed on the front and back surfaces of the n-type silicon substrate 3 by LP—C VD (or plasma C VD), and then a silicon oxide film 2 on the front side is formed. 2 and silicon nitride film 23 An opening is formed at a position where each depression 45 is to be formed (see FIG. 17).
- the frame-shaped peripheral portion 5a of the p-type impurity diffusion layer 5 is formed on the surface of the n-type silicon substrate 3 where the respective p-type impurity diffusion layers 5 are formed.
- the p-type impurity diffusion layer 5 and the n-type silicon substrate 3 are removed by alkali etching so as to leave a recess 45.
- an n-type silicon substrate 43 is obtained.
- a frame-shaped peripheral portion 5a is formed as an area where the p-type impurity is diffused, at the opening edge of the depression 45.
- the depression 45 has a side surface 45b and a bottom 45a.
- the frame-shaped peripheral portion 5a is not always necessary.
- FIGS. 15, 16, and 24 show examples in which the frame-shaped peripheral portion 5a is not formed.
- boron or the like is doped into the bottom 45a of each of the formed depressions 45.
- a p-type impurity diffusion layer 5 b is formed at the bottom 45 a of each recess 45, and the photodiode 4 is formed by pn junction between the p-type impurity diffusion layer 5 b and the n-type silicon substrate 43.
- a silicon oxide film 22 is formed on a region not covered with the silicon nitride film 23 formed on the surface. At this time, though not shown, a silicon oxide film is also formed on the silicon nitride film 23 formed on the back surface.
- the silicon nitride film 23 formed on the back surface of the n-type silicon substrate 43 is patterned by using a predetermined photomask to form a region in which each recess 6 is to be formed. That is, the silicon nitride film 23 is removed from the corresponding region of the photodiode 4, and the silicon nitride film 23 is left in a portion where the depression 6 is not formed, that is, in the non-corresponding region of the photodiode 4 (see FIG. 18).
- the non-corresponding regions can be variously changed by appropriately changing the region where the silicon nitride film 23 remains. It can be formed in a pattern.
- the n-type silicon substrate 3 is removed by anisotropic re-etching using a potassium hydroxide solution (KOH), TMAH, or the like, and using the remaining silicon nitride film 23 as a mask.
- KOH potassium hydroxide solution
- TMAH TMAH
- the recess 6 is formed in a portion not covered by the nitride film 23.
- the remaining silicon nitride film 23 is removed.
- n-type ion species are ion-implanted or the like in the same manner as in the first embodiment to form the above-described accumulation layer 8 having an impurity concentration higher than that of the n-type silicon substrate 3.
- thermal oxidation is performed to form an AR film 24 on the accumulation layer 8 (see FIG. 19).
- each photodiode 4 a contact hole extending to each p-type impurity diffusion layer 5b is formed in the silicon oxide film 22 on the surface side by a photo-etching technique.
- the electrode wiring 9 is formed by forming an aluminum metal film on the silicon oxide film 22 by vapor deposition and then performing patterning using a predetermined photomask (see FIG. 20).
- an SiN film 25 serving as the passivation film 2 is formed on the silicon oxide film 22 so as to cover the electrode wiring 9.
- the SiN film 25 can be formed by sputtering / plasma CVD.
- a contact hole is formed at a position corresponding to each of the electrode wirings 9 of Si ⁇ 25 (see FIG. 21).
- UBMl 1 electrically connected to the electrode wiring 9 through the contact hole is formed by electroless plating or the like.
- a bump electrode 12 is formed on the UBM 11 (see FIG. 22).
- the photodiode array 41 capable of performing high-precision light detection without generating noise / current due to damage during mounting.
- the force source (substrate) electrode can also be extracted from the n + -type impurity region 7 similarly to the anode electrode (not shown).
- FIG. 23 is a diagram showing a cross-sectional configuration of the radiation detector 50 according to the present embodiment.
- the radiation detector 50 includes a scintillator panel 31 that emits light upon incidence of radiation, and the above-described photodiode array 1.
- the scintillator panel 31 emits light generated by the incident radiation from the light emitting surface 31a.
- the scintillator panel 31 is disposed so as to face the light incident surface of the photodiode array 1, that is, the surface of the photodiode array 1 in which the depression 6 is formed.
- the photodiode array 1 converts the incident light into an electric signal.
- the scintillator panel 31 is attached to the back surface side (the entrance surface side) of the photodiode array 1. Since the depression 6 described above is formed in the photodiode array 1, even if the back surface of the scintillator panel 31, that is, the light exit surface 31 a is in contact with the non-corresponding area of the photodiode 4, the photodiode There is no direct contact with the corresponding area of 4.
- the space between the light emitting surface 31a of the scintillator panel 31 and the recess 6 is filled with an optical resin 35 having a refractive index set so that light is sufficiently transmitted.
- the light emitted from the scintillator panel 31 efficiently enters the photodiode array 1 by the optical resin 35.
- the optical resin 35 epoxy resin, acrylic resin, urethane resin, silicone resin, fluorine resin, or the like having a property of transmitting light emitted from the scintillator panel 31 can be used. Materials may be used.
- the photodiode array 1 When bonding the photodiode array 1 on a mounting wiring board (not shown), the photodiode array 1 is sucked by a flat collet. However, since the photodiode array 1 has the above-described depression 6, the suction surface of the flat collet does not directly contact the corresponding region of each photodiode 4. Further, when the scintillator panel 31 is attached, the light emitting surface 31 a does not directly contact the corresponding area of the photodiode 4. Therefore, such an e
- the radiation detector 50 having the photodiode array 1 and the scintillator panel 31 can prevent generation of noise, dark current, and the like due to damage to the response area during mounting. As a result, according to the radiation detector 50, light detection can be performed with high accuracy, and radiation can be detected with high accuracy.
- FIG. 24 is a diagram illustrating a cross-sectional configuration of the radiation detector 55 according to the present embodiment.
- the radiation detector 55 includes a scintillator panel 31 and the above-described photodiode array 41.
- the scintillator panel 31 is disposed so as to face the light incident surface of the photodiode array 41, that is, the surface of the photodiode array 41 in which the recess 6 is formed.
- the scintillator panel 31 is attached to the back side (the entrance side) of the photodiode array 41. Since the above-mentioned depression 6 is formed in the photodiode array 41, the back surface of the scintillator panel 31, that is, the light emitting surface 3 la does not directly contact the corresponding region of the photodiode 4. The space between the light emitting surface 31a of the scintillator panel 31 and the recess 6 is filled with an optical resin 35. The light emitted from the scintillator panel 31 efficiently enters the photodiode array 41 by the optical resin 35.
- the photodiode array 41 When bonding the photodiode array 41 onto a mounting wiring board (not shown), the photodiode array 41 is sucked by a flat collet. However, since the photodiode array 41 has the recess 6 described above, the suction surface of the flat collet does not directly contact the corresponding area of each photodiode 4. Further, when the scintillator panel 31 is attached, its light emitting surface 31a does not directly contact the corresponding area of the photodiode 4. Therefore, the radiation detector 55 having the photodiode array 41 and the scintillator panel 31 does not generate noise, dark current, etc. due to damage to the corresponding area during mounting. Can be prevented. As a result, according to the radiation detector 55, the light detection is performed with high accuracy, and the radiation can be detected with high accuracy.
- the present invention is applicable to an X-ray tomographic image capturing apparatus and a radiation image capturing apparatus.
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Abstract
Description
Claims
Priority Applications (7)
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CN2004800084482A CN1768429B (zh) | 2003-03-27 | 2004-03-25 | 光电二极管阵列及其制造方法和放射线检测器 |
KR1020057017917A KR101057867B1 (ko) | 2003-03-27 | 2004-03-25 | 포토 다이오드 어레이 및 그 제조 방법 및 방사선 검출기 |
US10/550,689 US7888766B2 (en) | 2003-03-27 | 2004-03-25 | Photodiode array and radiation detector having depressions of predetermined depth formed in regions corresponding to the regions where the photodiodes are formed in the semiconductor substrate |
DE602004022265T DE602004022265D1 (de) | 2003-03-27 | 2004-03-25 | Fotodiodenarray und strahlungsdetektor |
EP04723373A EP1608020B1 (en) | 2003-03-27 | 2004-03-25 | Photodiode array and radiation detector |
IL171135A IL171135A (en) | 2003-03-27 | 2005-09-27 | Photodiode array and radiation detector |
US12/945,044 US20110057112A1 (en) | 2003-03-27 | 2010-11-12 | Photodiode array adn production method thereof, and radiation detector |
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JP2003087782A JP4220818B2 (ja) | 2003-03-27 | 2003-03-27 | ホトダイオードアレイおよびその製造方法並びに放射線検出器 |
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US12/945,044 Division US20110057112A1 (en) | 2003-03-27 | 2010-11-12 | Photodiode array adn production method thereof, and radiation detector |
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EP (1) | EP1608020B1 (ja) |
JP (1) | JP4220818B2 (ja) |
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CN (1) | CN1768429B (ja) |
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IL (1) | IL171135A (ja) |
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DE102007007584A1 (de) | 2006-12-29 | 2008-07-03 | Osram Opto Semiconductors Gmbh | Halbleiterdetektoranordnung und Herstellungsverfahren für eine Halbleiterdetektoranordnung |
JP5185205B2 (ja) | 2009-02-24 | 2013-04-17 | 浜松ホトニクス株式会社 | 半導体光検出素子 |
JP5185208B2 (ja) | 2009-02-24 | 2013-04-17 | 浜松ホトニクス株式会社 | フォトダイオード及びフォトダイオードアレイ |
JP5185157B2 (ja) * | 2009-02-25 | 2013-04-17 | 浜松ホトニクス株式会社 | フォトダイオードの製造方法及びフォトダイオード |
JP5546222B2 (ja) * | 2009-12-04 | 2014-07-09 | キヤノン株式会社 | 固体撮像装置及び製造方法 |
CN103620445B (zh) | 2011-04-06 | 2016-08-17 | 皇家飞利浦有限公司 | 成像探测器 |
US9401441B2 (en) * | 2012-06-14 | 2016-07-26 | United Microelectronics Corporation | Back-illuminated image sensor with dishing depression surface |
JP6169856B2 (ja) | 2013-02-13 | 2017-07-26 | 浜松ホトニクス株式会社 | 裏面入射型エネルギー線検出素子 |
US9876127B2 (en) * | 2013-11-22 | 2018-01-23 | Taiwan Semiconductor Manufacturing Company, Ltd. | Backside-illuminated photodetector structure and method of making the same |
JP7148261B2 (ja) * | 2018-04-16 | 2022-10-05 | 浜松ホトニクス株式会社 | 裏面入射型半導体光検出素子 |
FI20195457A1 (en) * | 2019-05-31 | 2020-12-01 | Elfys Oy | Radiation sensor element and method |
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EP1548836A1 (en) | 2002-08-09 | 2005-06-29 | Hamamatsu Photonics K. K. | Photodiode array, production method therefor, and radiation detector |
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JPH09181243A (ja) | 1995-12-25 | 1997-07-11 | Ricoh Co Ltd | リードフレーム |
WO2001075977A1 (fr) | 2000-04-04 | 2001-10-11 | Hamamatsu Photonics K.K. | Detecteur d'energie a semi-conducteur |
JP2003084066A (ja) * | 2001-04-11 | 2003-03-19 | Nippon Kessho Kogaku Kk | 放射線検出器用部品、放射線検出器および放射線検出装置 |
US7230247B2 (en) * | 2002-03-08 | 2007-06-12 | Hamamatsu Photonics K.K. | Detector |
JP4220817B2 (ja) * | 2003-03-27 | 2009-02-04 | 浜松ホトニクス株式会社 | ホトダイオードアレイおよびその製造方法並びに放射線検出器 |
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2003
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2004
- 2004-03-25 TW TW093108055A patent/TWI326130B/zh not_active IP Right Cessation
- 2004-03-25 KR KR1020057017917A patent/KR101057867B1/ko not_active IP Right Cessation
- 2004-03-25 WO PCT/JP2004/004211 patent/WO2004086504A1/ja active Application Filing
- 2004-03-25 CN CN2004800084482A patent/CN1768429B/zh not_active Expired - Fee Related
- 2004-03-25 US US10/550,689 patent/US7888766B2/en not_active Expired - Fee Related
- 2004-03-25 DE DE602004022265T patent/DE602004022265D1/de not_active Expired - Lifetime
- 2004-03-25 EP EP04723373A patent/EP1608020B1/en not_active Expired - Fee Related
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JPH05121711A (ja) * | 1991-10-25 | 1993-05-18 | Nec Corp | 赤外線ccd |
JPH06350068A (ja) * | 1993-06-03 | 1994-12-22 | Hamamatsu Photonics Kk | 半導体エネルギー線検出器の製造方法 |
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JP2003086826A (ja) * | 2001-09-12 | 2003-03-20 | Hamamatsu Photonics Kk | ホトダイオードアレイ、固体撮像装置、及び、放射線検出器 |
EP1548836A1 (en) | 2002-08-09 | 2005-06-29 | Hamamatsu Photonics K. K. | Photodiode array, production method therefor, and radiation detector |
Also Published As
Publication number | Publication date |
---|---|
US20070018212A1 (en) | 2007-01-25 |
EP1608020B1 (en) | 2009-07-29 |
IL171135A (en) | 2010-11-30 |
KR101057867B1 (ko) | 2011-08-19 |
CN1768429B (zh) | 2011-03-23 |
EP1608020A4 (en) | 2007-04-18 |
TWI326130B (en) | 2010-06-11 |
US7888766B2 (en) | 2011-02-15 |
EP1608020A1 (en) | 2005-12-21 |
JP2004296827A (ja) | 2004-10-21 |
KR20050116155A (ko) | 2005-12-09 |
DE602004022265D1 (de) | 2009-09-10 |
CN1768429A (zh) | 2006-05-03 |
US20110057112A1 (en) | 2011-03-10 |
TW200501440A (en) | 2005-01-01 |
JP4220818B2 (ja) | 2009-02-04 |
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