WO2004075336A1 - 高周波回路 - Google Patents
高周波回路 Download PDFInfo
- Publication number
- WO2004075336A1 WO2004075336A1 PCT/JP2004/001993 JP2004001993W WO2004075336A1 WO 2004075336 A1 WO2004075336 A1 WO 2004075336A1 JP 2004001993 W JP2004001993 W JP 2004001993W WO 2004075336 A1 WO2004075336 A1 WO 2004075336A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- transmission line
- frequency
- line
- wire
- frequency circuit
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/64—Impedance arrangements
- H01L23/66—High-frequency adaptations
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
- H01P1/00—Auxiliary devices
- H01P1/04—Fixed joints
- H01P1/047—Strip line joints
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
- H01P5/00—Coupling devices of the waveguide type
- H01P5/08—Coupling devices of the waveguide type for linking dissimilar lines or devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/58—Structural electrical arrangements for semiconductor devices not otherwise provided for
- H01L2223/64—Impedance arrangements
- H01L2223/66—High-frequency adaptations
- H01L2223/6605—High-frequency electrical connections
- H01L2223/6627—Waveguides, e.g. microstrip line, strip line, coplanar line
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/58—Structural electrical arrangements for semiconductor devices not otherwise provided for
- H01L2223/64—Impedance arrangements
- H01L2223/66—High-frequency adaptations
- H01L2223/6605—High-frequency electrical connections
- H01L2223/6627—Waveguides, e.g. microstrip line, strip line, coplanar line
- H01L2223/6633—Transition between different waveguide types
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/4501—Shape
- H01L2224/45012—Cross-sectional shape
- H01L2224/45014—Ribbon connectors, e.g. rectangular cross-section
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/4501—Shape
- H01L2224/45012—Cross-sectional shape
- H01L2224/45015—Cross-sectional shape being circular
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
- H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
- H01L2924/097—Glass-ceramics, e.g. devitrified glass
- H01L2924/09701—Low temperature co-fired ceramic [LTCC]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
- H01L2924/141—Analog devices
- H01L2924/1423—Monolithic Microwave Integrated Circuit [MMIC]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1903—Structure including wave guides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1903—Structure including wave guides
- H01L2924/19033—Structure including wave guides being a coplanar line type
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1903—Structure including wave guides
- H01L2924/19038—Structure including wave guides being a hybrid line type
- H01L2924/19039—Structure including wave guides being a hybrid line type impedance transition between different types of wave guides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19041—Component type being a capacitor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/30107—Inductance
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3011—Impedance
Definitions
- the present invention relates to a high-frequency circuit used in the millimeter wave band, and more particularly to a high-frequency circuit around a high-frequency functional element in which wire bonding is performed. Regarding the circuit. n landscape technology
- the carrier frequency used for wireless communication has reached the frequency band from the micro wave region 1 to the millimeter wave region due to the further improvement of the transmission speed. It's beating. As the frequency increases, the inductance at the wire connection cannot be ignored. Therefore, reflection increases at the input / output portion of the high-frequency semiconductor element that is connected by wires in the system. Due to this tL, there arises a problem that the inherent characteristics of the high-frequency semiconductor element cannot be sufficiently brought out.
- Document 1 A method for reducing the inductance of the wire connection has been proposed.Referring to the literature 1, the wire length can be reduced, the wire can be reboned, and the wire can be removed. A method for reducing the inductance of a wire connection part by flip-chip bonding with a hole or the like is disclosed.
- a surface mount package (hereinafter referred to as a high frequency knock package) has been developed to enable a high-frequency functional element to be mounted by surface mount. You. Inside the high-frequency package, a wire is used to connect the high-frequency functional element to the signal conductor wiring on the dielectric substrate.
- FIG. 16A is a cross-sectional view schematically showing the configuration when a conventional high-frequency package is surface-mounted on an external circuit board.
- Figure 1
- the high-frequency functional element 2 is housed in a cavity serving as the dielectric substrate 1 and the lid 33 and acts as a lever.
- FIG. 2B is a diagram showing a wiring pattern on the upper surface of the dielectric substrate 1.
- FIG. 16C is a diagram showing a wiring pattern on the lower surface of the dielectric substrate 1.
- a ground conductor region 12 On the upper surface of the dielectric substrate 1, a ground conductor region 12, a signal conductor wiring (signa 1 strip) 34, and a ground conductor layer 35 are formed. .
- a ground conductor region 13 As shown in FIG. 16C, a ground conductor region 13, a ground conductor strip (groundstrip) 37, and a signal conductor wiring 36 are formed on the lower surface of the dielectric substrate 1.
- the signal conductor wiring 36, the ground conductor layer 35, and the ground conductor wiring 37 form a coplanar line structure with a ladder.
- the external circuit board 38 on which the high-frequency package is surface-mounted has signal conductor wiring 39 formed on the upper surface and ground conductor wiring formed on at least one of the inner and lower surfaces. 40 and are formed. On the external circuit board, the signal conductor wiring 39 and the ground conductor wiring 40 provide high-frequency signals such as microstrip lines or grounded coplanar lines. transmission The track structure is constructed.
- One end of the signal conductor wiring 34 and the high-frequency function element 2 are connected by a wire 5.
- the other end of the signal conductor wiring 34 is connected to one end of a connection through conductor (Via) 7 formed to penetrate the dielectric substrate 1.
- One end of the signal conductor wiring 36 is connected to the other end of the connection through conductor 7.
- the other end of the signal conductor wiring 36 is connected to the signal conductor wiring 39 on the external circuit board 38 via the solder 36.
- the high-frequency signal enters the high-frequency functional element 2 through the wire 5, the signal conductor wiring 34, the connection through conductor 7, the signal conductor wiring 36, the solder 41, and the signal conductor wiring 39. Output.
- the length of the pin can be shortened.
- the inductance at the connection part can be reduced and reflection can be prevented.
- it is not practically preferable.
- the first purpose of the present invention is to provide a high-frequency circuit that can prevent reflection at a connection portion by a wire. is there . Furthermore, a second object of the present invention is to provide a high-frequency circuit capable of preventing reflection at a connection portion by a wire with high accuracy and low cost. And provide it with high reliability.
- the present invention relates to a high-frequency circuit in which a high-frequency function element is mounted on a dielectric substrate, and a first transmission line formed in the high-frequency function element and a characteristic line.
- the impedance is 50 ⁇ or less
- the second transmission line formed on the dielectric substrate is connected to the first transmission line and the second transmission line.
- the ear, the characteristic impedance is greater than 50 ⁇ , the third transmission line connected to the second transmission line, and the dielectric substrate.
- a fourth transmission line having the upper conductor land connected to the third transmission line and the lower conductor land of the via hole connected to the third transmission line. And are provided.
- the equivalent circuit of the entire circuit is The first series inductance generated from the raw inductance capacitor and the first shunt generated from the ground capacitance generated at the second transmission line location And the second series inductance resulting from the high impedance characteristic of the third transmission line, and the via hole and the surrounding ground conductor.
- the second capacitive shunt resulting in a grounding capacitive force between the area and the ground.
- This is a typical low-pass finoleta for LCLC configurations with a connected connection.
- the high-frequency circuit configuration of the present invention in which the entire circuit is configured as a finolator circuit, realizes low-reflection, high-frequency characteristics in a wide frequency range. It will be.
- the wires, the second transmission line, the third transmission line, the via hole portion, and the fourth transmission line do not require a special wiring process. Since it can be formed, a high-frequency circuit having a wide band and low reflection can be provided with high accuracy, low cost, and high reliability.
- the layout of the ground conductor region is limited in the vicinity of the via hole so that the via hole is not grounded. Therefore, on the lower surface of the dielectric substrate, the ground conductor region is not set in the region where the signal conductor wiring faces the third transmission line, and the characteristic impedance of the third transmission line is not set. You can set the dance high. Therefore, when the inductance of the first series is large, the inductance of the second series needs to be set large, which is a typical LCLC configuration. Indispensable conditions in low-pass filters are easily realized.
- the matching circuit for matching to 50 ⁇ is configured to be further connected to the via hole. Therefore, it is difficult to reduce the reflection of the signal generated from the matching circuit and the reflection of the signal generated from the via hole portion to a low intensity over a wide band in the Millimeter wave band. It was highly probable that reflection would occur in some bands of the design frequency.
- a matching circuit for compensating the parasitic inductance of the wire is formed by the entire circuit including the via hole. Become . Therefore, the signal is transmitted over a wide band with low reflection.
- the fourth transmission line should have a characteristic impedance of at least some region S 50 ⁇ or more.
- the equivalent circuit of the entire circuit includes a first series inductance generated by the parasitic inductance of the wire, and a second transmission inductance. Capacitance of the first shunt generated from the grounding capacitance generated at the line location, and the second generated by the high impedance characteristics of the third transmission line Series inductance and
- This is a typical low-pass filter of an LCLCL configuration that connects a third series inductance generated from the high impedance characteristic. Unlike before, the entire circuit is With the high frequency circuit configuration of the present invention configured as a filter circuit, low reflection high frequency characteristics can be realized in a wide frequency range.
- the layout of the ground conductor region is limited around the via hole so that the via hole is not grounded. Therefore, on the upper surface of the dielectric substrate, the ground conductor region is not set in the region where the signal conductor wiring faces the fourth transmission line, and the characteristic of the fourth transmission line is not set.
- the impedance can be easily set higher. Therefore, when the first series inductance is large, the third series inductance needs to be set large, which is a typical LCLCL configuration. Indispensable conditions for a low-pass finoleta can be easily realized.
- the first transmission line has a characteristic impedance at a connection point with the wire of 50 ⁇ or less.
- the equivalent circuit of the entire circuit is the first shunt canon generated from the ground capacitance at the connection between the first transmission line and the wire.
- the first series inductance resulting from the parasitic inductance inductance of the wire, and the ground capacitance occurring at the second transmission line location.
- a typical low-pass configuration of a CLCLC configuration that connects the capacitance of the third shunt generated by the grounding capacitance generated between the metal part and the surrounding grounding conductor area It becomes a filter.
- the present invention in which the entire circuit is configured as a filter circuit is described. With the high-frequency circuit configuration, low-reflection high-frequency characteristics can be realized in a wide frequency range.
- connection point with the wire may be a coplanar GSG node, so that the air connection may be made.
- the air connection may be made.
- the ground conductor pad included in the pad is close to the signal conductor wiring in the first transmission line.
- the characteristic impedance of the first transmission line at the wire connection can be reduced, so that the area is reduced and the area is effectively reduced. Can generate a ground capacitance.
- the distance between the signal conductor wiring and the ground conductor pad becomes narrower toward the terminal end of the signal conductor wiring in the first transmission line.
- the second transmission line is a grounded coplanar line.
- the second transmission line can be microstretched. It is possible to suppress the variation of the high frequency circuit characteristics that occur due to the process variation, as compared with the case of using the . More specifically, in order to stably exhibit high-frequency circuit characteristics, the high-frequency grounding of the ground conductor region formed on the back surface of the high-frequency functional element has been strengthened. Although it is necessary, if the second transmission line is formed of a microstrip line, the position of the grounding through-conductor formed through the dielectric substrate may vary. As a result, the above-mentioned high-frequency grounding becomes unstable, which is not preferable. On the other hand, in the preferred configuration of the present invention, it is possible to stably maintain the high-frequency ground.
- the third transmission line is formed in a region other than the signal conductor wiring connected to the upper conductor land and a region on the lower surface of the dielectric substrate facing the signal conductor wiring. It is helpful to work with the ground conductor area.
- the intent of this configuration is to take advantage of the condition that the via hole cannot be grounded, and to reduce the characteristic impedance of the third transmission line. This is set to a value that is too high to be obtained by ordinary circuits, and provides a large inductance in the filter circuit configuration.
- the third series inductor Indispensable conditions when large values need to be set can be easily realized. This is synonymous with the circuit characteristics that further broadening the band and lowering the reflection will be possible.
- the above configuration is based on the ground conductor from near the via hole. Since this also eliminates the area, it is possible to reduce the grounding capacitance generated between the upper conductor land and the grounding conductor area.
- the ground capacitance introduced between the inductance generated by the third transmission line and the connecting through conductor is apparently the characteristic A of the third transmission line. This leads to lower impedance.
- the characteristic impedance of the transmission line of the flute is reduced. Since the impedance can be kept high, broadband and low-reflection characteristics can be further improved.
- the dielectric constant of the dielectric constituting the S7i electronic substrate is 5 or less.
- the wiring width of the signal conductor wiring is set to about 100 ⁇ m, which is the lower limit used in the wiring rules for a normal board or resin board. Even if, for example, the characteristic impedance of the third transmission line can be set to, for example, 115 ⁇ or more.
- the ground conductor region and the upper conductor existing near the via hole portion can be obtained.
- the ground contact between the land and the ground can be reduced. Therefore, apparently, the characteristic impedance of the third transmission line is increased by B, so that it is possible to realize a wide-band power and low-reflection characteristics. it can .
- the high-frequency circuit of the present invention can be manufactured with a good yield.
- the reflection characteristics of the wire connection largely depend not only on the wire shape but also on the dielectric constant of the dielectric substrate to which the wire is connected. This is because a ground capacitance is generated between the wire and the back surface of the dielectric substrate at the point where the wire is connected! / Pull out.
- the line width of the signal conductor wiring of the second transmission line where the wire is connected it is possible to obtain an optimum ground capacitance value in the low-pass filter circuit. It is capable of realizing broadband and low-reflection characteristics.
- the value of the grounding capacitance generated only at the point where the wire touches is larger than the value of the weekly grounding capacitance.
- the line width of the signal conductor wiring in the third transmission line is thinner than the line width of the signal conductor wiring in the second transmission line.
- the characteristic impedance of the third transmission line can be increased.
- the characteristic impedance of the second transmission line is the characteristic impedance of the second transmission line.
- the characteristic impedance of the third transmission line is It is good to be 110 ⁇ or more.
- FIG. 1 is a schematic sectional view showing an example of the high-frequency circuit according to the first embodiment of the present invention.
- FIG. 1B is a diagram showing a wiring pattern on the upper surface of the dielectric substrate 1 shown in FIG. 1A.
- FIG. 1C is a diagram showing a wiring pattern on the lower surface of the dielectric substrate 1 shown in FIG. 1A.
- FIG. 1D is a block diagram of components constituting a high-frequency circuit according to the first embodiment of the present invention.
- FIG. 2 is a diagram showing an analysis model of a grounded coplanar line used for a comparative simulation.
- FIG. 3A shows a microstrip line where the line width of signal conductor wiring 16 is 100 micron, and 3 GH at the wire connection.
- FIG. 4 is a Smith chart showing the reflection impedance (S11) from z-force to 75 GHz.
- Figure 3B shows a grounded coplanar transmission line with the signal conductor wiring 16 having a line width of 600 micron and the 3 GHz force at the wire connection. It is a Smith chart showing the reflection impedance (S11) up to 75 GHz.
- FIG. 4 shows a compensating circuit used in the high-frequency circuit of the present invention when parasitic inductance occurs at a wire point.
- FIG. 3 is a diagram for explaining a configuration principle.
- FIG. 5A is a top view showing another configuration example of the third transmission line 6.
- FIG. 5B is a cross-sectional view illustrating another configuration example of the third transmission line 6.
- FIG. 6A shows the characteristic impedance of the third transmission line 6 having a transmission line structure as shown in FIGS. 5A and 5B and the microstrip line. This is a graph when plotting the signal with the line width of the signal conductor wiring changed.
- FIG. 6B shows the characteristic impedance of the third transmission line 6 having the transmission line structure as shown in FIGS. 5A and 5B, and the dielectric constant of the dielectric substrate. This is the graph when it is changed and plotted.
- FIG. 7A is a diagram showing an equivalent circuit of a wire connection portion analyzed based on the results of electromagnetic field analysis from 3 GHz to 81 GHz.
- FIG. 7B is a diagram showing an equivalent circuit obtained by simplifying the equivalent circuit shown in FIG. 7A.
- Figure 7C shows the results of electromagnetic field analysis of the reflected impedance (S11) viewed from the terminal on the second transmission line 4 side of the actual structure of the wire connection, and It is a figure which shows the reflection impedance (S11) of the simplified equivalent circuit.
- FIG. 7D is a diagram showing a connection portion between the wire 5 and the signal conductor wiring 3a.
- FIG. 7E is a diagram showing a connection portion between the wire 5 and the signal conductor wiring 16 16.
- FIG. 8A shows the third transmission line 6, the via hole portion 10, and the fourth and fourth holes, which were analyzed based on the results of the electromagnetic field analysis from 3 GHz to 81 GHz.
- FIG. 3 is a diagram showing an equivalent circuit of a circuit block composed of 11 transmission lines.
- FIG. 8B is a diagram showing an equivalent circuit obtained by simplifying the equivalent circuit shown in FIG. 8A.
- FIG. 9 is a diagram showing the reflected impedance (S22) of the equivalent circuit obtained.
- FIG. 9A is a diagram showing an equivalent circuit of the entire structure of the high-frequency circuit according to the first embodiment of the present invention.
- FIG. 9B is a diagram showing a low-pass filter of the formed CLCL structure.
- FIG. 10 is a diagram showing an equivalent circuit of the high-frequency circuit according to the second embodiment of the present invention.
- FIG. 11 is a diagram showing an equivalent circuit of the high frequency circuit according to the third embodiment of the present invention.
- FIG. 12A is a diagram showing a configuration of a GSG pad for high frequency characteristic inspection.
- FIG. 12B This is a diagram when a GSG node is configured in FIG.
- FIG. 13 is a schematic configuration diagram of an evaluation high-frequency circuit used for measurement in the example.
- FIG. 14 is a diagram comparing the reflection characteristics in the comparative example with the reflection characteristics in the first embodiment of the present invention.
- FIG. 15 is a diagram comparing the reflection characteristics in the comparative example with the reflection characteristics in the third embodiment of the present invention.
- FIG. 16A is a cross-sectional view schematically showing the configuration when a conventional high-frequency package is surface-mounted on an external circuit board.
- FIG. 16B is a diagram showing a wiring pattern on the upper surface of the dielectric substrate 1 shown in FIG. 16A.
- FIG. 16C is a diagram showing a wiring pattern on the lower surface of the dielectric substrate 1 shown in FIG. 16A.
- FIG. 1A is a schematic sectional view showing an example of the high-frequency circuit according to the first embodiment of the present invention.
- FIG. 1B is a diagram showing a wiring pattern on the upper surface of the dielectric substrate 1 shown in FIG. 1A.
- FIG. 1C is a diagram showing a wiring pattern on the lower surface of the dielectric substrate 1 shown in FIG. 1A.
- FIG. 1D is a block diagram of components constituting the high-frequency circuit according to the first embodiment of the present invention.
- 1A is also a cross-sectional view along line AB in FIGS. 1B and 1C.
- the high-frequency circuit includes an inductor substrate 1 and a high-frequency function element 2.
- ground conductor areas 1 2 1 7 and 2 2 The signal conductor wirings 16 and 19 and the upper conductor land 8 are formed.
- ground conductor regions 13, 15, 20, and 23 are formed on the lower surface of the dielectric substrate 1, ground conductor regions 13, 15, 20, and 23, a signal conductor wire 21, and a lower conductor land 9 are formed.
- a connecting through conductor 7 and a plurality of connecting through conductors 14 are formed from the upper surface to the lower surface of the dielectric substrate 1.
- the plurality of through conductors for connection 14 connect the ground conductor region 13 and the ground conductor region 12.
- the high-frequency functional element 2 is mounted on the ground conductor region 12.
- a signal conductor wiring 3 a is formed in the high-frequency function element 2 (typically on the upper surface).
- the lower end of the connection through conductor 7 is connected to the signal conductor wiring 21 via the lower conductor land 9.
- the upper end of the connecting through conductor 7 is connected to one end of the signal conductor wiring 19 via the upper conductor land 8.
- the other end of the signal conductor wiring 19 is connected to one end of the signal conductor wiring 16.
- the other end of the signal conductor wiring 16 is connected to the signal conductor wiring 3 a via a wire 5.
- the dielectric substrate 1 is made of a normal dielectric substrate material having a low loss in a high frequency band.
- the dielectric substrate 1 is made of, for example, a ceramic material such as an anolumina / aluminum nitride produced by high-temperature sintering, and is produced by low-temperature sintering.
- Low-permittivity resin substrate materials such as glass ceramic materials, Teflon (R), and liquid crystal polymers can be used.
- the high-frequency functional element 2 is, for example, an MMIC (monolithic integrated microphone microwave circuit) using silicon or gallium arsenide as a substrate, a filter circuit, or the like. It is a passive circuit.
- MMIC monolithic integrated microphone microwave circuit
- the first transmission line 3 is formed in the high-frequency functional element 2 It is a transmission line.
- the first transmission line 3 is a coplanar line, a grounded coplanar line, or a microstrip line.
- the first transmission line 3 is a grounded coplanar line or a microstrip line. That is, the signal conductor wiring 3a and the ground conductor region 12 form a coplanar line with a ground or a microstrip line. Yes. Since the ground conductor region 12 is connected to the ground conductor region 13 via the connection through conductors 14, the high-frequency grounding is enhanced.
- the second transmission line 4 is a transmission line connected to the first transmission line 3 via a wire 5.
- the second transmission line 4 is a coplanar line, a grounded coplanar line, or a microstrip line.
- the signal conductor wiring and the ground conductor regions formed on both sides of the signal conductor wiring must be connected. It is necessary to narrow the gap between them.
- the second transmission line 4 is a grounded coplanar line or a microstrip line.
- the characteristic impedance Z2 of the second transmission line 4 is 50 ⁇ or less.
- the second transmission line 4 functions as a ground capacitance on the circuit. Therefore, the second transmission line The path 4 can compensate for the parasitic inductance generated by the wire 5 (bui 1 dingout) and can provide a force S, and in particular, is lower than the 45 GHz band. The reflection characteristics in the frequency band can be improved.
- the second transmission line 4 is a grounded coplanar line rather than a microstrip line.
- the second transmission line 4 is formed by a microstrip line, the high-frequency ground of the ground conductor region 12 formed immediately below the high-frequency functional element 2 is It is supplied only from the ground conductor region 13 formed immediately below. Therefore, by the formation of the plurality of connection through-conductors 14 that connect the ground conductor region 12 and the ground conductor region 13, the reflection of the wire connection portion is reduced. Variations occur in the impedance characteristics.
- the ground conductor region 1 is formed via the ground conductor regions 17 formed on both sides of the signal conductor wiring 16.
- the second transmission line 4 is a grounded coplanar line.
- the second transmission line 4 is a grounded coplanar line formed from the signal conductor wiring 16 and the ground conductor regions 17 and 15.
- FIG. 2 is a diagram showing an analysis model of a grounded coplanar transmission line used in the comparative simulation.
- the analysis model of the microstrip line is omitted because the ground conductor region 17 shown in FIG. 2 is not provided.
- the present inventor has proposed a grounded co-planer on a dielectric substrate 1 (primary mounting substrate) composed of a liquid crystal polymer material having a thickness of 125 micron and a dielectric constant of 3. Port 1 was the signal conductor wiring 16 on the track.
- a microstrip line with a characteristic impedance of 50 ⁇ formed on a 100 micron thick gallium arsenide substrate is connected to port 2. did.
- port 1 and port 2 are connected by a wire 5 which is a micron of diameter S25.
- FIG. 3A shows a micro-strip line in which the signal conductor wiring 16 has a line width of 100 ⁇ m based on the above setting conditions. It is a Smith chart showing the reflection impedance (S11) from 3 GHz to 75 GHz.
- Figure 3B shows a grounded coplanar line with the signal conductor wiring 16 having a line width of 600 microns based on the above setting conditions.
- FIG. 4 is a Smith chart showing the reflection impedance (S11) up to 3 GH ⁇ 75 G ⁇ .
- Figure 3 Figure 3 ⁇ Figure 3 ⁇ , three sets of data are shown, respectively.
- the data indicated by the solid middle line in the middle is the diameter 280 arranged at the period of 400 micron formed immediately below the high-frequency functional element 2.
- the connection closest to the wire connection among the multiple through conductors for connection 14 of Micron This is data when the through conductor for connection 14 is arranged at a distance of 300 micron from the end 18 of the high-frequency functional element 2.
- the connecting through-conductors 14 are arranged at a distance of 350 M from the end 18 of the high-frequency functional element 2.
- the high frequency loop of the present invention is found to be more advantageous in terms of suppressing the variation in the reflection phase characteristics.
- the principle of the compensating circuit when parasitic inductance occurs at the wire point used in the wave circuit This will be explained with reference to FIG. In the Smith chart, the center shows an impedance of 50 ⁇ , and the state of reflection is the least. The larger the distance from the center of the figure is, the stronger the reflection intensity is.
- the matching circuit is designed for the circuit with reflection, and the reflection I have to move the pedance characteristics.
- a reflection impedance characteristic of a typical wire portion is located at a point A in FIG. 4 at a predetermined frequency.
- a wire with a characteristic impedance lower than 50 ⁇ is connected to the XR transmission line, point A moves to point ⁇ 1.
- point A moves to point B 2.
- the impedance controls the position of the center of rotation when rotating the reflected impedance in a Smith chart.
- a transmission line with an impedance lower than 50 ⁇ is connected. If the transmission line with an impedance higher than 50 ⁇ is connected, the position of the rotation center is on the left side of the center of the figure.
- the direction of rotation is always clockwise 3 ⁇ 4 ⁇ , and the angle of rotation is two times the electrical length of the transmission line. Der is, it is proportional to the frequency.
- the high-frequency circuit of the present invention first sets the second transmission line to a characteristic impedance of 50 ⁇ or less. Set it to a point and move it to point ⁇ , and then move the two transmission lines to the center of the chart by using RX higher than 50 ⁇ .
- the electrical length of the second transmission line 4 is 90 degrees or less at the upper limit frequency of the design band, preferably 45 degrees or less, and more preferably 30 degrees or less. It is good to be below the degree.
- the phase angle tends to decrease in the 90-degree direction in the low-frequency band and decreases in the high-frequency band.
- the impedance is higher than 50 ⁇ .
- point B In the high-frequency circuit according to the present invention, which is moved to the center of the chart by the third transmission line of the impedance, point B must be located in the fourth quadrant of the chart. Therefore, the maximum value of the movement rotation angle from point A to point ⁇ is 180 degrees, and the maximum value of i3 ⁇ 4 of the second transmission line: 3 ⁇ 4: is 90 degrees in principle. Is set to.
- the phase condition of the reflection impedance of the wire is lower than 90 degrees and is lower than 45 degrees. Will be located.
- point B is minus 45 degrees at the upper limit frequency of the design band. It is a good idea to place 1 L nearby. From these condition forces, the role of the second railway line is to move the reflected impedance by 90 degrees or less in the angle from the point A force to the point ⁇ of the reflected impedance. However, it is preferable that the transmission line be 45 degrees or less.
- the design frequency band includes a high frequency band of about 60 GH ⁇
- the diameter of the wire 5 is 25 micron
- the length of the wire 5 is Let the dielectric constant of the dielectric substrate be 3 and the dielectric thickness of the dielectric substrate be 3 and the thickness of the i-substrate 1 be 1 and the transmission line 4 be a signal conductor.
- the reflection impedance of the wire 5 is used. The inventor has confirmed that the phase of the sense turns at almost 60 degrees at 60 GHz. The present inventor has confirmed that in a higher frequency band, further phase rotation occurs, and the phase of the reflected impedance falls below 0 degrees.
- the rotation angle generated by the second transmission line 4 be set to 60 degrees or less at the upper limit frequency of the design band. It is particularly preferable to set the upper limit frequency of the band to 30 degrees or less.
- the characteristic impedance of the second transmission line 4 needs to be set to 50 ⁇ or less, and more preferably, to less than 50 ⁇ . If a transmission line with an impedance higher than 50 ⁇ is connected, the strength of the reflection caused by the wire will increase. More preferably, a value lower than 50 ⁇ should be chosen. However, low impedance lines occupy a large circuit area. Furthermore, when the line width of the signal conductor wiring 16 is extremely increased, the distance between the ground conductor region 15 formed opposite the rear surface with the dielectric substrate 1 interposed therebetween is increased. Higher order mode will occur. Due to restrictions for suppressing these situations, the characteristic impedance of the second transmission line 4 is usually set to a value of 20 ⁇ or more.
- the connection by wire 5 may be a conventional wire connection technique such as a jaw bond using a conductor such as gold, a ball bond, or the like. Even if the connection technology of forming a wire with a ribbon-type conductor in order to reduce rectification is used, there is no end to the problem.
- the surface of the dielectric substrate 1 is dug in the area where the high-frequency functional element 2 is arranged, and the high-frequency functional element 2 is The height difference between the surface of the plate 1 and the surface of the high-frequency functional element 2 is reduced, and the length of the wire 5 connecting the first and second transmission lines 3 and 4 is reduced. As a result, the inductance of the wire 5 may be reduced.
- the high-frequency circuit in the case where the number of wires 5 is one is described, but the number of wires 5 may be plural. No. If the number of connections is set to multiple, an equivalent circuit in which a plurality of parasitic inductance circuits in the wire section are arranged in parallel compared to a case where the number of connections is one As a result, the parasitic inductance is transparently reduced. Also in this case, advantageous effects can be obtained depending on the above-described circuit configuration and setting conditions.
- the third transmission line 6 which is a feature of the present invention, will be described.
- the third transmission line 6 connects the second transmission line 4 to the via hole 10.
- the third transmission line 6 is composed of a signal conductor wiring 19 and ground conductor regions 17 and 20.
- the signal conductor wiring 19 is formed on the upper surface of the dielectric substrate 1.
- One end of the signal conductor wiring 19 is connected to one end of the signal conductor wiring 16.
- the other end of the signal conductor wiring 19 is connected to the upper conductor land 8.
- the ground conductor region 17 formed on the upper surface of the dielectric substrate 1 and the ground conductor region 20 formed on the lower surface are connected to the upper conductor land 8 and the lower conductor land 9. They are not located around them so that they do not ground.
- the ground conductor regions 17 and 20 are far from the periphery of the signal conductor wiring 19, so that the signal conductor wiring 19 and
- the third transmission line 6 comprising the ground conductor regions 17 and 20 has a high characteristic impedance, for example, a characteristic impedance of 100 ⁇ or more. Dancing can be obtained.
- the role of the third transmission line in the high-frequency circuit of the present invention is to move the reflection impedance characteristic located in the fourth quadrant in the Smith chart to the center of the chart. From this point of view, it is preferable that the characteristic impedance of the third transmission line be set high. As the transmission line with the higher characteristic impedance is connected, the center of rotation when rotating the reflection impedance clockwise in the clockwise direction is closer to the center of the Smith chart. It can be set to the right point. This means that in the high-frequency circuit of the present invention, the higher the characteristic impedance of the third transmission line can be set, the more the circuit having strong reflection characteristics can be matched to antireflection. To In addition, the higher the characteristic impedance of the third transmission line can be set in the high-frequency circuit of the present invention, the more room in the matching circuit design is created. It is possible to extend the obtained frequency band to a wide band.
- FIGS. 5A and 5B are diagrams illustrating another configuration example of the third transmission line 6.
- FIG. 5A is a diagram showing the upper surface of the dielectric substrate 1.
- FIG. 5B is a cross-sectional view of the dielectric substrate 1 along the CD line.
- a configuration in which only the ground conductor area 20 is provided may be employed. In this way, the ground conductor area adjacent to the signal conductor wiring 19 is eliminated. Therefore, since the characteristic impedance of the third transmission line 6 is further increased, it is possible to realize a broadband low-reflection matching characteristic.
- the third transmission line 6 faces the signal conductor wiring 19 connected to the upper conductor land 8 and the signal conductor wiring 19 on the lower surface of the dielectric substrate 1. It is preferable that the transmission line structure has a ground conductor region 20 formed outside the region.
- Fig. 6A shows the characteristics of the third transmission line 6 and the microstrip line having the transmission line structure shown in Figs. 5A and 5B. This is a graph when the impedance is plotted by changing the line width of the signal conductor wiring.
- the third transmission line 6 used here has a signal conductor wiring on the upper surface of a dielectric substrate 1 made of a liquid crystal polymer material having a dielectric constant of 3 and a thickness of 125 micron. It has a transmission line structure in which a ground conductor region 20 is formed on the lower surface with a spacing of 100 micron between each other.
- the signal conductor wiring is formed on the upper surface of the same dielectric substrate, and the ground conductor wiring is formed on the entire lower surface. It has a normal microstrip line structure.
- the characteristic of a normal microstrip line is that even if the signal conductor wiring width is reduced to 120 micron, While the impedance is less than 80 ⁇ , the characteristic of the third transmission line 6 of the present invention is that if the signal conductor wiring width is reduced to 120 micron, The impedance increases until the impedance is close to 130 ⁇ . From a different point of view, it is preferable that the line width of the signal conductor wiring 19 is thinner than the line width of the signal conductor wiring 16. This is a component.
- FIG. 6B shows the characteristic impedance of the third transmission line 6 having the transmission line structure as shown in FIGS. 5A and 5B, and the dielectric impedance of the dielectric substrate. This is a graph when plotting with varying rates.
- signal conductor wiring is formed on the upper surface of the dielectric substrate 1 having a thickness of 125 ⁇ m, and 100 ⁇ m on the lower surface. It has a transmission line structure in which a ground conductor region 20 is formed via a gap.
- the characteristic impedance is plotted when the signal conductor wiring width is set to 120 micron and when the signal conductor wiring width is set to 200 micron. It is.
- the dielectric substrate 1 As can be seen from FIG. 6B, the lower the dielectric constant of the dielectric substrate 1, the more the characteristic impedance can be increased. The reason is that the lower the dielectric constant, the lower the capacitance between the signal conductor wiring 19 and the ground conductor area 20 on the backside of the board, so that the characteristic impedance increases. It's Kazura. In particular, when the dielectric constant is 5 or less, the characteristic impedance becomes high. Therefore, it is preferable that the dielectric substrate 1 be made of a material having a dielectric constant of 5 or less. I
- the via hole 10 is composed of a through conductor 7 for connection, an upper conductor land 8, and a lower conductor land 9.
- the via hole section 10 connects the third transmission line 6 and the fourth transmission line 11.
- the fourth transmission line 11 comprises a signal conductor wiring 21 and ground conductor regions 22 and 23.
- the signal conductor wiring 21 is formed on the lower surface of the dielectric substrate 1.
- One end of signal conductor wiring 2 1 Is connected to the lower conductor land 9.
- FIG. 7A is a diagram showing an equivalent circuit of the wire connection portion analyzed based on the results of the electromagnetic field analysis from 3 GHz to 81 GHz.
- coil a is the inductance generated by wire 5.
- the coil b is formed between the left end 5a and the right end 5b of the wire 5 at the connection between the wire 5 and the signal conductor wiring 3a shown in FIG. 7D. This is the inductance that can be obtained.
- the coil c is connected to the left end 5 c and the right side of the wire 5. This is an inductance that can occur between the end 5d.
- the resistance a is the resistance of the wire 5.
- the resistance b is a radiation resistance indicating an energy loss at which an electromagnetic wave leaks from the wire 5.
- the capacitor a is provided between the first transmission line 3 and the ground conductor region 12 (strictly speaking, a wire 5 at a connection portion between the wire 5 and the first transmission line 3). (Between the first transmission line 3 on the left side of the left end 5a and the ground conductor region 12).
- the capacitor b is provided between the first transmission line 3 and the ground conductor region 12 (strictly speaking, the wire 5 at the connection between the wire 5 and the first transmission line 3). (Between the first transmission line 3 on the right side of the right end 5 and the ground conductor region 12).
- the capacitor c is provided between the signal conductor wiring 16 of the second transmission line 4 and the ground conductor region 17 (strictly speaking, at the connection between the wire 5 and the second transmission line 4). Keru Wai (Between the second transmission line 4 on the left side of the left end 5c of the keyer 5 and the ground conductor region 17).
- the capacitor d is provided between the signal conductor wiring 16 of the second transmission line 4 and the ground conductor region 17 (strictly speaking, at the connection between the wire 5 and the second transmission line 4). Between the second transmission line 4 on the right side of the right end 5 d of the connecting wire 5 and the ground conductor region 17).
- the settings of the analysis model, such as ports, transmission lines, and wires, are the same as those shown in Fig. 2. As shown in FIG.
- the equivalent circuit of the wire connection portion is the same as that of the wire connection portion other than the wire parasitic inductance at the connection portion with the first transmission line 3.
- FIG. 7B is a diagram showing an equivalent circuit obtained by simplifying the equivalent circuit shown in FIG. 7A.
- the equivalent circuit includes the parasitic inductance of the wire and the ground at the connection between the second transmission line 4 and the wire. It is simplified by a circuit consisting only of capacitance.
- Figure 7C shows the results of an electromagnetic field analysis of the reflection impedance (S11) viewed from the terminal on the side of the second transmission line 4 of the actual structure of the wire connection, and a simplified result.
- FIG. 3 is a diagram showing a reflection impedance (S11) of the simplified equivalent circuit.
- the simplified equivalent circuit models the high frequency characteristics of the real structure over the ultra-wide band from 3 GHz to 81 GHz.
- FIG. 8A shows an analysis based on the results of electromagnetic field analysis up to 3 GHz and from 81 GH to 3 transmission line 6, via hole 10, and 4th transmission line 6.
- FIG. 3 is a diagram showing an equivalent circuit of a circuit block including the transmission line 11 of FIG.
- the upper conductor land 8 is generated between the conductor and the surrounding ground conductor.
- the distributed parameter lines TRL 3 and TRL 4 correspond to the third transmission line 6 and the fourth transmission line 11.
- FIG. 8B is a diagram showing an equivalent circuit obtained by simplifying the equivalent circuit shown in FIG. 8A.
- the equivalent circuit includes a distributed constant line TRL, which is obtained by connecting the inductance of the connecting through conductor portion (via hole 'portion 10) and the ground capacitance Cg. 4 is simplified by the circuit between the distributed constant line TRL3 and the distributed constant line TRL3.
- Figure 8C shows the results of electromagnetic field analysis of the reflected impedance (S22) viewed from the terminal on the TRL 3 side of the actual structure of the via hole section 10, and the simplification.
- FIG. 9 is a diagram showing a reflection impedance (S22) of the equivalent circuit obtained.
- the simplified equivalent circuit has successfully reproduced the trend of the high-frequency characteristics of the real structure over the ultra-wide band from 3 GHz to ⁇ 81 GHz. You. Therefore, in the following discussion, the circuit block consisting of the third transmission line 6, the via hole 10 and the fourth H transmission line 11 is illustrated. The simplification can be achieved by using the equivalent circuit shown in FIG. 8B.
- FIG. 9A is a diagram showing an equivalent circuit of the entire structure of the high-frequency circuit according to the first embodiment of the present invention, which is configured based on the above discussion.
- the equivalent circuit of the wire connection is arranged on the terminal p2 side, and the fourth transmission line (TRL4) 11 and the via hole 10 (in Fig. 9A,
- the coil b) and the equivalent circuit of the third transmission line (TRL 3) 6 were placed on the terminal p 1 side, and the second transmission line (TRL 2) 4 was placed between them. It is a high frequency circuit.
- the characteristic impedance of the second transmission line 4 is set to be low
- the characteristic impedance of the third transmission line 6 is set to be high.
- the inductance generated from the through conductor 7 for connection of the via horn section 10 is equal to the high inductance of the third transmission line 6.
- the inductance S generated by the impedance characteristic can be added to the force S. Therefore, the line length of the third transmission line required to realize the optimum inductance required for the typical low-pass filter characteristics is determined by the above equation (1). Since it is possible to omit only the inductance, the advantage that the efficiency of the circuit occupation area can be achieved easily can be achieved. Occurs.
- the inventor of the present invention takes the characteristic of the wire connection as an example and considers how much the parasitic inductance of the wire 5 is matched with each transmission line. We examined whether the circuit parameters were optimal using the equivalent circuit shown in Fig. 9A. Electromagnetic field analysis was performed on the assumption that the second transmission line 4 was a grounded coplanar line with a line width of 600 micron.
- the present inventor has found that in the equivalent circuit shown in FIG. 9A, a reflection intensity of more than minus 15 dB can be achieved in a band from 30 GHz to 65 GHz.
- the values of the circuit parameters were estimated.
- the second transmission line 4 (TRL2) has a characteristic impedance of 33 ⁇ and an electrical length of 12.5 degrees.
- the third transmission path 6 (TRL 3) has a characteristic impedance of S 120 ⁇ and an electrical length of 15.8 degrees.
- the ground capacitance C g was assumed to be 0.045 fF.
- each transmission line is a value for 50 GHz.
- TRL3 characteristic impedance of the third transmission line 6
- the line width of the signal conductor wiring 19 must be changed to the signal conductor wiring 1 It is effective to make it narrower than 6. At a point that is determined.
- FIG. 10 is a diagram showing an equivalent circuit of the high-frequency circuit according to the second embodiment of the present invention.
- FIG. 10 shows a fourth transmission line set to a high impedance with respect to the filter-type equivalent circuit of the CLCL structure according to the first embodiment shown in FIG. 9B. 1 1
- circuit configuration equivalent to that of the low-pass filter having the LCLCL structure is shown by supporting (TRL4). This makes it possible to achieve low-reflection characteristics over a wider band.
- the fourth transmission line 11 includes a signal conductor wiring 21 formed on the lower surface of the dielectric substrate 1, a ground conductor region 23 formed on the lower surface of the dielectric substrate 1, and a It consists of a ground conductor region 22 formed on the upper surface.
- the ground conductor region 23 is formed such that a gap is provided on both sides of the signal conductor wiring 21.
- the ground conductor region 22 is formed so as not to be in contact with the upper conductor land 8 and not to be provided in a region facing the signal conductor wiring 21.
- the characteristic impedance of the fourth transmission line 11 be larger than 50 ⁇ . Since the via hole portion 10 is not grounded and has no force, the ground conductor region is not formed around the fourth transmission line 11, similarly to the third transmission line 6. And Therefore, compared with a transmission line having a general structure, it is easy to increase the characteristic impedance of the fourth transmission line 11.
- the present inventor has found that, in the equivalent circuit shown in FIG. 10, in the band from 30 GHz to 65 GHz, a minus of 15 dB or less is obtained. I understand. Also, as shown in FIG. 6B, in order to increase the characteristic impedance of the third transmission line 6 (TRL 3), the dielectric constant of the dielectric substrate 1 must be 5 or less. You can see that it is effective to
- the third transmission line is inevitably placed on the second transmission line 6 because the ground conductor wiring is arranged at a distance from the vicinity of the signal conductor wiring over a distance.
- the characteristic impedance of the line 6 can easily be set high. Therefore, the characteristic impedance of the third transmission line 6 increases.
- the matching between the wire connection part and each transmission line is performed. I will try to take it. As a result, it is possible to prevent reflection at the key connection portion without changing the normal wiring connection. As a result, it is possible to provide a high-frequency circuit that can prevent reflection at a connection portion by wires with high accuracy, low cost, and high reliability. And become possible ⁇ .
- the circuit parameters were estimated with the aim of achieving the following reflection intensity.
- the second transmission line 4 (TRL 2) has a characteristic impedance of 28 ⁇ and an electrical length of 15.2 degrees.
- the third transmission line 6 (TRL 3) is a characteristic impedance and has an electrical length of 19.4 degrees.
- the ground capacitance was assumed to be 0.05 If F.
- the fourth transmission line 11 (TRL 4) has a characteristic impedance of 90 ⁇ and an electric strength of S18.2 degrees.
- the electrical length of each transmission line is a value corresponding to a frequency of 50 G IIz.
- the value that must be satisfied by the characteristic impedance of the fourth transmission line 11 in order to obtain matching in the circuit when the inductance of the wire is large is very large. It became clear that it had to be a large value.
- the via-hole section 10 When connecting the high-frequency functional element 2 and the via-hole section 10, the via-hole section 10 must be grounded. Therefore, the grounding should be provided near the via-hole section 10. No conductor area is provided. As a result, the characteristic impedance of the fourth transmission line 11 is inevitably increased.
- the present invention takes advantage of the fact that the characteristic impedance of the fourth transmission line 11 is inevitably increased to take advantage of the connection between the wire connection and each transmission line. We try to be consistent. Therefore, reflection at the wire connection can be prevented without changing the normal wiring rules. As a result, a high-frequency circuit that can prevent reflection at the connection portion due to the wire is provided with high accuracy, low cost, and high reliability. Can be provided.
- grounding capacitance generated in the via-hole portion 10 on the equivalent circuit is represented by one centralized constant by the capacitor. Modeled.
- this ground capacitance it is also possible to regard this ground capacitance as a distributed transmission line set to have a lower impedance than the third transmission line 6.
- the conductor land is free to use. It can be adjusted to obtain a desired grounding capacitance by changing the shape of the wire.
- the lower conductor land 9 be connected to the fourth transmission line 11 so as to increase the ground capacitance with the nearby ground conductor region at the place where the fourth transmission line 11 is connected. No. The reason for this is that the inductance generated by the connection through conductor 7 and the inductance of the third transmission line 6 are matched. If high performance characteristics and circuit saving can be achieved simultaneously, the upper conductor, which is located between the two circuits, has the IJ point force S. The increase in the ground capacitance in the land 8 is equivalent to a decrease in the characteristic impedance of the third transmission line 6 and maintains the characteristics of the high frequency circuit of the present invention. This is the kind of reputation that you would like to do.
- Extending the lower conductor land 9 in the area of the lower surface of the dielectric substrate 1 facing the signal conductor wiring 19 is equivalent to the characteristic impedance of the third transmission line 6. It is preferable to maintain the characteristics of the high-frequency circuit of the present invention because it causes a reduction in the dance. Not good.
- the fourth transmission line 11 of the present invention is set to a high impedance, an advantageous effect can be obtained.
- the fourth transmission line 1 Even if the characteristic impedance of (1) is set low by an arbitrary distance near the connection point between the fourth transmission line 11 and the lower conductor land 9, the present invention It does not depart from the scope of the claim.
- FIGS. 1A to 1D will be referred to.
- the difference from the first and second embodiments is that at the point where the wire is connected, the characteristic impedance of the first transmission line 3 is lower than 50 ⁇ . This is the point set to.
- FIG. 11 is a diagram showing an equivalent circuit of the high-frequency circuit according to the third embodiment of the present invention.
- FIG. 11 shows a first transmission line 4 set to a low impedance with respect to the filter-type equivalent circuit of the LCLCL structure according to the second embodiment shown in FIG.
- a circuit configuration equivalent to the low-pass filter of the LCLCLC structure is shown. This makes it possible to achieve low-reflection characteristics over a wider band.
- the present inventor aims at achieving a reflection intensity of minus 15 dB or more in the band from 30 GHz to 65 GHz in the equivalent circuit shown in FIG. 11. And the circuit parameters was estimated.
- the second transmission line 4 (TRL 2) has a characteristic impedance of 28 ⁇ and an electric potential of S17.2 degrees.
- the third transmission line 6 (TRL 3) has a characteristic impedance of 120 ⁇ and an electrical length of 19.4 degrees.
- the ground capacitance cg was assumed to be 0.051 fF.
- connection force between the first transmission line 3 and the wire 5 the length of the force up to S80 micron (the characteristic impedance is 33 In this case, it is possible to obtain a good reflection characteristic with a minus 15 dB or more in the range from 40 GHz to 64 GHz.
- the electrical length is a value for 50 GHz.
- FIG. 12A is a diagram showing a configuration of a GSG node for high-frequency characteristic detection.
- the GSG pad has a signal conductor wiring 24 arranged at the line end of the first transmission line 3 and an arbitrary gap on both sides of the signal conductor wiring 24. And a ground conductor region 25 provided in advance. By bringing the grounding conductor area 25 close to the signal conductor wiring 24, the characteristic impedance impedance of the grounded coplanar line S 50 ⁇ Will also be lower.
- the signal conductor wiring should be placed at both ends of the signal conductor wiring. If no ground conductor area is provided, the transmission line structure will be a microstrip structure. In this case, the characteristic The impedance is about 70 ⁇ .
- the characteristic impedance is about 37 ⁇ . As described above, the characteristic impedance of the first transmission line 3 is reduced by forming the first transmission line 3 with the grounded coplanar line structure. You can do it. As a result, good reflection characteristics can be obtained.
- the distance G1 between the ground conductor region 25a near the line end 27 of the signal conductor wiring 24 should be It is effective to make the interval shorter than G2. In other words, it is effective that the distance between the signal conductor wiring 24 and the ground conductor region 25a becomes narrower toward the end of the signal conductor wiring 24. .
- the characteristic impedance of the fourth transmission line 11 is incorporated into an equivalent circuit. Only the characteristic impedance of the transmission line 3 may be reduced.
- connection portion between the circuits such as a connection portion between the second transmission line 4 and the third transmission line 6 is used.
- the wiring width is gradually changed, and the signal conductor wiring and the surrounding ground conductor area are changed. It is no wonder that the gap between them can be gradually changed.
- the present inventor measured the transmission characteristics of the high-frequency circuit of the present invention.
- FIG. 13 is a schematic diagram of the configuration of the high-frequency circuit for evaluation used for measurement.
- the high-frequency circuit for evaluation includes a dielectric substrate 1, a gallium arsenide substrate 29 disposed on the upper surface of the dielectric substrate 1, a lid 33, and an external circuit substrate.
- BT resin substrate 31 is provided on the upper surface of the gallium arsenide substrate 29, a microstrip line 30 is formed.
- the dielectric substrate 1 and the microstrip line 30 are connected via a wire 5.
- the connection parts of the microstrip line 30, the wire 5, and the dielectric substrate 1 are connected to the input / output unit 28 according to the structure of the high frequency circuit of the present invention. What is it?
- the characteristic impedance of the microstrip line 30 is assumed to be 50 ⁇ .
- the length of the line from 0.5 mm to 5 mm is 0.25 mm. did.
- a grounded coplanar line 32 is formed on the upper surface of the BT resin substrate 31 on the upper surface of the BT resin substrate 31, a grounded coplanar line 32 is formed on the upper surface of the BT resin substrate 31, a grounded coplanar line 32 is formed on the upper surface of the BT resin substrate 31, a grounded coplanar line 32 is formed.
- the thickness of the BT resin substrate 31 is assumed to be 200 micron.
- the measurement was performed by connecting a high-frequency probe to a grounded coplanar line 32 formed on the BT resin substrate 31. Mathematical calculations were performed from a plurality of data obtained as a result of the measurement to derive the characteristics of only the high-frequency circuit unit of the present invention.
- the dielectric substrate 1 is a liquid crystal having a thickness of S125 micron and copper wiring of thickness 40 micron on the upper and lower surfaces.
- a polymer substrate was used.
- the dielectric constant of the liquid crystal polymer is
- Gold of a diameter of 25 micron was used as the roller 5.
- the average length of the coil was 320 micron.
- the diameter of the through conductor for connection formed inside the liquid crystal polymer was 280 microns.
- the plurality of connection through conductors 14 connecting between the ground conductor regions formed on the upper and lower surfaces of the dielectric substrate 1 are formed at a cycle of 400 micron.
- the upper conductor land 8 and the lower conductor land 9 in the via hole 10 are assumed to be conductor regions having a radius of 300 micron.
- the measurement was performed after the gallium arsenide substrate 29 was covered with a metal lid 33 and packaged.
- Table 1 shows the parameters of the evaluated high-frequency circuit.
- the second transmission line 4 is a microstrip line.
- the second transmission line 4 was assumed to be a grounded coplanar line.
- ground conductor areas 17 are provided on both sides of the signal conductor wiring 19 via a spacing of 400 micron, respectively.
- the characteristic impedance of the third transmission line 6 was set to a high value of 110 ⁇ .
- the third transmission line 6 a transmission line as shown in FIG. 4 was employed. That is, the ground conductor regions 17 are removed from both sides of the signal conductor wiring 19. On the lower surface of the dielectric substrate 1, a ground conductor region 20 is formed in a region where the signal conductor wiring 19 does not face, with a spacing of 900 micron. As a result, the characteristic impedance of the third transmission line 6 can be as high as 135 ⁇ .
- Example 3 the characteristic impedance of the fourth transmission line 11 was set to a high value of 90 ⁇ .
- a width of 20 mm is provided on both sides of the main signal line so that the wire connection portion of the first transmission line 3 has a GSG-type coplanar line structure with a ground.
- a grounding pad has been installed via a clone.
- the characteristic impedance of the first transmission line 3 in the pad installation area having a length of 80 micron in the signal transmission direction is: It became 30 ⁇ .
- the characteristic impedance and the line structure of the first transmission line 3 are the same as in the sixth embodiment, and the characteristic impedance of the second transmission line 4 is changed.
- the third transmission line 6 has a characteristic impedance and a line structure similar to that of the fourth embodiment, and the fourth transmission line 11 has a characteristic impedance and a line structure similar to that of the fourth embodiment.
- the characteristic impedance and the line structure were the same as in Example 3.
- the characteristic impedance of the second transmission line 4 was set to 60 ⁇ , which was set to a value of 50 ⁇ or more.
- the characteristic impedance of the third transmission line 6 was set to 45 ⁇ , which was 50 ⁇ or less.
- a grounded coplanar line on a dielectric substrate and a microphone opening on a gallium arsenide substrate We used a high-frequency circuit in which the wire was connected to the line.
- the grounded coplanar line is designed to go from a low impedance line to a high impedance line and is adjusted to 50 ⁇ . Connected to the via hole.
- the via-hole section As the via-hole section,
- the characteristic impedance of the low impedance line in the grounded planar line was set to 26 ⁇ , and the electric power was set to 2 •.
- the characteristic impedance of a high impedance line in a grounded coplanar line is assumed to be 80 ⁇ , and the impedance is 28 degrees.
- the characteristic impedance of the impedance line [] 70 ⁇ is a normal pre-
- the minimum value of the wiring width of the signal conductor wiring, which is limited by the board wiring, is the upper limit determined based on the pin.
- FIG. 4 is a diagram comparing the reflection characteristics in the comparative example with the reflection characteristics in the first embodiment of the present invention.
- FIG. 15 shows the reflection characteristics of the comparative example and the reflection characteristics of the third embodiment of the present invention. This is a diagram comparing and.
- Figures 14 and 15 show that the second transmission line 4 is a grounded coplanar line with a signal conductor wiring width of 600 micron. In this case, the reflection characteristics of the wire connection unit are shown by dotted lines.
- Fig. 14 consider a frequency band in which low reflection characteristics of less than 15 dB are obtained.
- reflection characteristics of less than minus 15 dB were obtained from 42 GHz to 63 GHz.
- Example 1 is smaller than the comparative example.
- Fig. 15 Let us consider a frequency band in which reflection characteristics of less than 15 dB are obtained in Fig. 15.
- the reflection characteristics from 44 GHz to 61 GHz and a reflection characteristic of less than minus 15 dB could not be obtained.
- reflection characteristics of minus 15 dB or less were obtained from 37.5 GHz to 68 GHz.
- the characteristic impedance of the fourth transmission line 11 is set to 50 ⁇ or more. This has proven to be valid.
- Table 2 summarizes the bands in which low reflection characteristics were obtained in Examples 1 to 7, Comparative Design Examples 1 and 2, and Comparative Example.
- Example 7 As can be seen from Table 2, the results of Examples 1 and 3 were higher than those of Comparative Example. In addition, in Examples 2, 4, 5, 6, and 7, it was found that the reflection characteristics were improved. In particular, in Example 7, the most favorable result was obtained. In Example 7, a reflection characteristic of minus 15 dB or less was obtained over a very wide band from 18 GHz to a force of 77 GHz.
- the characteristic impedance of the second transmission line 4 is set to 50 ⁇ or less
- the characteristic impedance of the third transmission line 6 is set to 50 ⁇ or more
- the fourth transmission line 6 is set to 50 ⁇ or more. It has been proved that setting the characteristic impedance of the transmission line 11 to 50 ⁇ or more is the most effective.
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Waveguides (AREA)
- Waveguide Connection Structure (AREA)
Abstract
Description
Claims
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005502790A JPWO2004075336A1 (ja) | 2003-02-21 | 2004-02-20 | 高周波回路 |
US11/203,194 US20050285234A1 (en) | 2003-02-21 | 2005-08-15 | High-frequency circuit |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2003044530 | 2003-02-21 | ||
JP2003-044530 | 2003-02-21 |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US11/203,194 Continuation US20050285234A1 (en) | 2003-02-21 | 2005-08-15 | High-frequency circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2004075336A1 true WO2004075336A1 (ja) | 2004-09-02 |
Family
ID=32905454
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP2004/001993 WO2004075336A1 (ja) | 2003-02-21 | 2004-02-20 | 高周波回路 |
Country Status (4)
Country | Link |
---|---|
US (1) | US20050285234A1 (ja) |
JP (1) | JPWO2004075336A1 (ja) |
CN (1) | CN1751412A (ja) |
WO (1) | WO2004075336A1 (ja) |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP1675178A2 (en) * | 2004-11-30 | 2006-06-28 | M/A-Com, Inc. | Connection arrangement for micro lead frame plastic packages |
JP2006180337A (ja) * | 2004-12-24 | 2006-07-06 | Kyocera Corp | 高周波用伝送線路およびそれを用いた高周波送受信器ならびにレーダ装置、レーダ装置搭載車両およびレーダ装置搭載小型船舶 |
WO2007049382A1 (ja) * | 2005-10-27 | 2007-05-03 | Murata Manufacturing Co., Ltd. | 高周波モジュール |
JP2009284238A (ja) * | 2008-05-22 | 2009-12-03 | Anritsu Corp | 電子部品の接続構造 |
JP2010219816A (ja) * | 2009-03-16 | 2010-09-30 | Sony Corp | 半導体装置、伝送システム、半導体装置の製造方法及び伝送システムの製造方法 |
JP2013085046A (ja) * | 2011-10-07 | 2013-05-09 | Murata Mfg Co Ltd | インダクタンス素子、整合回路モジュール、及び高周波回路モジュール |
CN113224945A (zh) * | 2021-04-29 | 2021-08-06 | 北京机械设备研究所 | 一种Buck+CLCL谐振变换器级联的DC/DC功率变换器拓扑结构 |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103718469B (zh) * | 2011-08-01 | 2016-06-08 | 株式会社村田制作所 | 高频模块 |
US9837325B2 (en) * | 2015-06-16 | 2017-12-05 | Peregrine Semiconductor Corporation | Electrically testable microwave integrated circuit packaging |
US10699970B2 (en) | 2015-06-16 | 2020-06-30 | Psemi Corporation | Electrically testable integrated circuit packaging |
JP6524985B2 (ja) | 2016-08-26 | 2019-06-05 | 株式会社村田製作所 | アンテナモジュール |
MY191331A (en) | 2016-12-30 | 2022-06-16 | Intel Corp | Substrate with gradiated dielectric for reducing impedance mismatch |
US10665555B2 (en) * | 2018-02-07 | 2020-05-26 | Win Semiconductors Corp. | Transition structure and high-frequency package |
CN110429919B (zh) * | 2019-07-24 | 2024-01-12 | 臻驱科技(上海)有限公司 | 一种多阶滤波结构和多阶滤波电路 |
CN112397477B (zh) * | 2020-11-17 | 2023-03-21 | 成都仕芯半导体有限公司 | 毫米波芯片封装系统 |
Citations (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH11186458A (ja) * | 1997-12-22 | 1999-07-09 | Kyocera Corp | 高周波用伝送線路の接続構造および配線基板 |
JP2956827B2 (ja) * | 1996-03-18 | 1999-10-04 | 日本電信電話株式会社 | 集積回路装置 |
JP2000100994A (ja) * | 1998-09-21 | 2000-04-07 | Sumitomo Metal Electronics Devices Inc | 高周波用パッケージ |
JP2001102820A (ja) * | 1999-09-30 | 2001-04-13 | Toyota Central Res & Dev Lab Inc | 高周波回路 |
JP2002009510A (ja) * | 2000-06-27 | 2002-01-11 | Mitsubishi Electric Corp | 高周波回路及びパッケージ |
JP2002271101A (ja) * | 2001-03-09 | 2002-09-20 | Nec Corp | 半導体装置 |
EP1246325A2 (en) * | 2001-03-22 | 2002-10-02 | Matsushita Electric Industrial Co., Ltd. | Laser working dielectric substrate and method for working same and semiconductor package and method for manufacturing same |
US20020175388A1 (en) * | 2001-05-23 | 2002-11-28 | Mitsubishi Denki Kabushiki Kaisha | Photoelectric converting semiconductor device |
JP2003008357A (ja) * | 2001-06-20 | 2003-01-10 | Matsushita Electric Ind Co Ltd | 電力増幅装置 |
JP2003037406A (ja) * | 2001-07-25 | 2003-02-07 | Murata Mfg Co Ltd | 高周波線路変換器、その製造方法および通信装置 |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4626805A (en) * | 1985-04-26 | 1986-12-02 | Tektronix, Inc. | Surface mountable microwave IC package |
US6294966B1 (en) * | 1999-12-31 | 2001-09-25 | Hei, Inc. | Interconnection device |
-
2004
- 2004-02-20 JP JP2005502790A patent/JPWO2004075336A1/ja not_active Withdrawn
- 2004-02-20 CN CNA2004800047958A patent/CN1751412A/zh active Pending
- 2004-02-20 WO PCT/JP2004/001993 patent/WO2004075336A1/ja active Application Filing
-
2005
- 2005-08-15 US US11/203,194 patent/US20050285234A1/en not_active Abandoned
Patent Citations (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2956827B2 (ja) * | 1996-03-18 | 1999-10-04 | 日本電信電話株式会社 | 集積回路装置 |
JPH11186458A (ja) * | 1997-12-22 | 1999-07-09 | Kyocera Corp | 高周波用伝送線路の接続構造および配線基板 |
JP2000100994A (ja) * | 1998-09-21 | 2000-04-07 | Sumitomo Metal Electronics Devices Inc | 高周波用パッケージ |
JP2001102820A (ja) * | 1999-09-30 | 2001-04-13 | Toyota Central Res & Dev Lab Inc | 高周波回路 |
JP2002009510A (ja) * | 2000-06-27 | 2002-01-11 | Mitsubishi Electric Corp | 高周波回路及びパッケージ |
JP2002271101A (ja) * | 2001-03-09 | 2002-09-20 | Nec Corp | 半導体装置 |
EP1246325A2 (en) * | 2001-03-22 | 2002-10-02 | Matsushita Electric Industrial Co., Ltd. | Laser working dielectric substrate and method for working same and semiconductor package and method for manufacturing same |
US20020175388A1 (en) * | 2001-05-23 | 2002-11-28 | Mitsubishi Denki Kabushiki Kaisha | Photoelectric converting semiconductor device |
JP2003008357A (ja) * | 2001-06-20 | 2003-01-10 | Matsushita Electric Ind Co Ltd | 電力増幅装置 |
JP2003037406A (ja) * | 2001-07-25 | 2003-02-07 | Murata Mfg Co Ltd | 高周波線路変換器、その製造方法および通信装置 |
Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP1675178A2 (en) * | 2004-11-30 | 2006-06-28 | M/A-Com, Inc. | Connection arrangement for micro lead frame plastic packages |
EP1675178A3 (en) * | 2004-11-30 | 2008-05-28 | M/A-Com, Inc. | Connection arrangement for micro lead frame plastic packages |
JP2006180337A (ja) * | 2004-12-24 | 2006-07-06 | Kyocera Corp | 高周波用伝送線路およびそれを用いた高周波送受信器ならびにレーダ装置、レーダ装置搭載車両およびレーダ装置搭載小型船舶 |
WO2007049382A1 (ja) * | 2005-10-27 | 2007-05-03 | Murata Manufacturing Co., Ltd. | 高周波モジュール |
JP2009284238A (ja) * | 2008-05-22 | 2009-12-03 | Anritsu Corp | 電子部品の接続構造 |
JP2010219816A (ja) * | 2009-03-16 | 2010-09-30 | Sony Corp | 半導体装置、伝送システム、半導体装置の製造方法及び伝送システムの製造方法 |
US9748664B2 (en) | 2009-03-16 | 2017-08-29 | Sony Corporation | Semiconductor device, transmission system, method for manufacturing semiconductor device, and method for manufacturing transmission system |
JP2013085046A (ja) * | 2011-10-07 | 2013-05-09 | Murata Mfg Co Ltd | インダクタンス素子、整合回路モジュール、及び高周波回路モジュール |
CN113224945A (zh) * | 2021-04-29 | 2021-08-06 | 北京机械设备研究所 | 一种Buck+CLCL谐振变换器级联的DC/DC功率变换器拓扑结构 |
Also Published As
Publication number | Publication date |
---|---|
US20050285234A1 (en) | 2005-12-29 |
CN1751412A (zh) | 2006-03-22 |
JPWO2004075336A1 (ja) | 2006-06-01 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
WO2004075336A1 (ja) | 高周波回路 | |
CN103165966B (zh) | 波导、包含波导的转接板型基板、模块和电子装置 | |
US6917259B2 (en) | High-frequency module substrate device | |
JP2003519925A (ja) | 相互接続装置および方法 | |
US20020034839A1 (en) | Multi-level circuit substrate, method for manufacturing same and method for adjusting a characteristic impedance therefor | |
JP2002517099A (ja) | 共面導波管およびボールグリッドアレイ入出力を用いる広帯域rfポート | |
CN112018066B (zh) | 基于htcc的高频垂直互联结构及封装结构 | |
US6501352B1 (en) | High frequency wiring board and its connecting structure | |
US20060082422A1 (en) | Connection structure of high frequency lines and optical transmission module using the connection structure | |
JP3966865B2 (ja) | Dcカット構造 | |
US7332799B2 (en) | Packaged chip having features for improved signal transmission on the package | |
US7166877B2 (en) | High frequency via | |
JP3608640B2 (ja) | 半導体装置およびその実装方法 | |
JP3619396B2 (ja) | 高周波用配線基板および接続構造 | |
JPH11176987A (ja) | 高周波用電力増幅器 | |
JP3409767B2 (ja) | 高周波回路基板 | |
JP4211378B2 (ja) | キャパシタ素子 | |
JP3619398B2 (ja) | 高周波用配線基板および接続構造 | |
JP3638479B2 (ja) | 高周波用配線基板およびその接続構造 | |
JP2001044704A (ja) | 分布定数回路素子とその製造方法およびプリント配線板 | |
JP3619397B2 (ja) | 高周波用配線基板および接続構造 | |
JP4467115B2 (ja) | 高周波用部品の接続構造 | |
JP2002057266A (ja) | プラスチックのパッケージングを有する電気構成部品または光電気構成部品、およびそのような構成部品の端末リード線のインピーダンスを変更するための方法 | |
JP2002184898A (ja) | 高周波モジュール | |
JP4145101B2 (ja) | 電子回路 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AK | Designated states |
Kind code of ref document: A1 Designated state(s): AE AG AL AM AT AU AZ BA BB BG BR BW BY BZ CA CH CN CO CR CU CZ DE DK DM DZ EC EE EG ES FI GB GD GE GH GM HR HU ID IL IN IS JP KE KG KP KR KZ LC LK LR LS LT LU LV MA MD MG MK MN MW MX MZ NA NI NO NZ OM PG PH PL PT RO RU SC SD SE SG SK SL SY TJ TM TN TR TT TZ UA UG US UZ VC VN YU ZA ZM ZW |
|
AL | Designated countries for regional patents |
Kind code of ref document: A1 Designated state(s): BW GH GM KE LS MW MZ SD SL SZ TZ UG ZM ZW AM AZ BY KG KZ MD RU TJ TM AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IT LU MC NL PT RO SE SI SK TR BF BJ CF CG CI CM GA GN GQ GW ML MR NE SN TD TG |
|
DPEN | Request for preliminary examination filed prior to expiration of 19th month from priority date (pct application filed from 20040101) | ||
121 | Ep: the epo has been informed by wipo that ep was designated in this application | ||
WWE | Wipo information: entry into national phase |
Ref document number: 11203194 Country of ref document: US |
|
WWE | Wipo information: entry into national phase |
Ref document number: 2005502790 Country of ref document: JP |
|
WWE | Wipo information: entry into national phase |
Ref document number: 20048047958 Country of ref document: CN |
|
122 | Ep: pct application non-entry in european phase |