WO2004070773A2 - Integrated circuit power switch circuit sizing and placement technique - Google Patents

Integrated circuit power switch circuit sizing and placement technique Download PDF

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Publication number
WO2004070773A2
WO2004070773A2 PCT/GB2004/000434 GB2004000434W WO2004070773A2 WO 2004070773 A2 WO2004070773 A2 WO 2004070773A2 GB 2004000434 W GB2004000434 W GB 2004000434W WO 2004070773 A2 WO2004070773 A2 WO 2004070773A2
Authority
WO
WIPO (PCT)
Prior art keywords
power
power switches
size
voltage
voltage island
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/GB2004/000434
Other languages
English (en)
French (fr)
Other versions
WO2004070773A3 (en
Inventor
Patrick Buffet
John Cohn
Kevin Grosselfinger
Susan Lichtensteiger
William Smith
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
IBM United Kingdom Ltd
International Business Machines Corp
Original Assignee
IBM United Kingdom Ltd
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by IBM United Kingdom Ltd, International Business Machines Corp filed Critical IBM United Kingdom Ltd
Priority to JP2006502234A priority Critical patent/JP4566186B2/ja
Priority to AT04707972T priority patent/ATE509371T1/de
Priority to EP04707972A priority patent/EP1593157B1/en
Publication of WO2004070773A2 publication Critical patent/WO2004070773A2/en
Publication of WO2004070773A3 publication Critical patent/WO2004070773A3/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D99/00—Subject matter not provided for in other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/90—Masterslice integrated circuits
    • H10D84/998—Input and output buffer/driver structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/10—Integrated device layouts

Definitions

  • the total power consumed by conventional CMOS circuitry includes active power consumed by circuits as they switch states and either charge or discharge the capacitance associated with the switching nodes.
  • Active power represents the power consumed by the intended work of the circuit to switch signal states and thus execute logic function. This power is not present if the circuit in question is not actively switching. Active power is proportional to the capacitance that is switched, the frequency of operation and to the square of the power supply voltage. Due to technology scaling, the capacitance per unit area increases with each process generation. The power increase represented by this capacitance increase is offset by the scaling of the power supply voltage, Vdd.
  • Fig. 8 is a flowchart showing how the invention matches the size of the power switches to the width of one or more power buses.
  • SoC system-on-a-chip
  • FIG. 2 shows a power switch circuit 11 incorporated into integrated circuit wiring.
  • the highest level of metal shown (Mx) provides unswitched current to the power switch circuit.
  • the power switch 11 supplies switched current to the voltage island via the underlying metal layers, MX-1 and MX-2 in this example.
  • the current capacity of the power switch cell is limited by wire width or the circuit providing the switching function. In either case, each power switch cell has limited current capacity, a portion of which is available on MX-1 and the remainder on MX-2. If the current capacity of the orthogonal metal lines driven by the power switch cell is equivalent, equal current is available on each metal level. If properly designed, current density does not exceed the capacity of the metal wire and voltage drop (voltage drop increases with distance driven) is the limiting factor to how far from the power switch cell a circuit can be driven.
  • the embodiment matches the size of the power switches to the width of one or more power buses supplying power to the voltage island 800.
  • the matching process 800 matches the size of the power switches to the current and voltage that will be provided by the power buses.
  • the embodiment determines the size of the serviceable area to which each of the power switches can provide power 802.
  • the serviceable area is dependent upon power bus current, voltage drop, and distribution.
  • the embodiment places the power switches within the ' voltage island according to the size of the serviceable area of each of the power switches 804. More specifically, the embodiment divides the voltage island area by the size of serviceable area to calculate the number of power switches needed.
  • the embodiment produces structures shown in Figures 5-7 that include at least one voltage island 10 and a pattern of power switches 11 within the voltage island.
  • the pattern 11 balances the power switches according to the size of the serviceable area to which each of the power switches can provide power.
  • Power buses MX-1, MX-2 are connected to the power switches 11.
  • the size of the power switches 11 are matched to the current and voltage that will be provided by the power buses MX.
  • the size of the serviceable area to which each of the power switches can provide power is dependent upon the size of the power switches and the power bus width. Thus, larger power switches have a larger serviceable area than smaller power switches.
  • the number of power switches is equal to the area of the voltage island divided by the size of serviceable area.

Landscapes

  • Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
PCT/GB2004/000434 2003-02-10 2004-02-04 Integrated circuit power switch circuit sizing and placement technique Ceased WO2004070773A2 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2006502234A JP4566186B2 (ja) 2003-02-10 2004-02-04 集積回路の電力スイッチ回路サイズの調整および配置技法
AT04707972T ATE509371T1 (de) 2003-02-10 2004-02-04 Technik zur dimensionierung und plazierung von leistungsschaltern in einer integrierten schaltung
EP04707972A EP1593157B1 (en) 2003-02-10 2004-02-04 Technique for sizing and positioning power switches in an integrated circuit

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/248,696 US6924661B2 (en) 2003-02-10 2003-02-10 Power switch circuit sizing technique
US10/248,696 2003-02-10

Publications (2)

Publication Number Publication Date
WO2004070773A2 true WO2004070773A2 (en) 2004-08-19
WO2004070773A3 WO2004070773A3 (en) 2004-10-28

Family

ID=32823584

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/GB2004/000434 Ceased WO2004070773A2 (en) 2003-02-10 2004-02-04 Integrated circuit power switch circuit sizing and placement technique

Country Status (8)

Country Link
US (1) US6924661B2 (enExample)
EP (1) EP1593157B1 (enExample)
JP (1) JP4566186B2 (enExample)
KR (1) KR100734999B1 (enExample)
CN (1) CN100370613C (enExample)
AT (1) ATE509371T1 (enExample)
TW (1) TWI276948B (enExample)
WO (1) WO2004070773A2 (enExample)

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JP3770836B2 (ja) * 2002-01-23 2006-04-26 株式会社ルネサステクノロジ 高速に電源スイッチのオンオフが可能な論理回路及び同論理回路における電流低減方法
US8304813B2 (en) * 2007-01-08 2012-11-06 SanDisk Technologies, Inc. Connection between an I/O region and the core region of an integrated circuit
JP4834625B2 (ja) * 2007-07-31 2011-12-14 株式会社東芝 電源管理装置及び電源管理方法
US7904838B2 (en) * 2007-08-15 2011-03-08 Ati Technologies Ulc Circuits with transient isolation operable in a low power state
CN103577621B (zh) * 2012-08-08 2017-06-23 扬智科技股份有限公司 晶片及其电源开关电路的布局方法
JP2015069333A (ja) * 2013-09-27 2015-04-13 富士通セミコンダクター株式会社 設計方法及び設計プログラム
US9058459B1 (en) * 2013-12-30 2015-06-16 Samsung Electronics Co., Ltd. Integrated circuit layouts and methods to reduce leakage
US9824174B2 (en) * 2015-09-11 2017-11-21 Qualcomm Incorporated Power-density-based clock cell spacing
CN111104771B (zh) * 2018-10-26 2021-09-21 珠海格力电器股份有限公司 一种电源关断单元的摆放方法及装置
CN114239451B (zh) * 2021-12-06 2024-10-29 成都海光集成电路设计有限公司 一种电源开关单元的连接关系优化方法和装置
KR20250053565A (ko) * 2023-10-13 2025-04-22 삼성전자주식회사 반도체 집적 회로 및 반도체 집적 회로의 레이아웃 설계 방법

Citations (4)

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JPS52111389A (en) 1976-03-16 1977-09-19 Nec Corp Iil-type semi-conductor ic
EP0288803A2 (en) 1987-04-30 1988-11-02 International Business Machines Corporation Personalizable semiconductor chips for analog and analog/digital circuits
JPH0249449A (ja) 1989-06-23 1990-02-19 Fujitsu Ltd 半導体集積回路装置
US5256893A (en) 1987-07-22 1993-10-26 Hitachi, Ltd. Semiconductor integrated circuit device with power MOSFET incorporated

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US5689428A (en) 1990-09-28 1997-11-18 Texas Instruments Incorporated Integrated circuits, transistors, data processing systems, printed wiring boards, digital computers, smart power devices, and processes of manufacture
JPH0521713A (ja) * 1991-07-09 1993-01-29 Mitsubishi Electric Corp 半導体集積回路装置
US5311058A (en) * 1991-11-29 1994-05-10 Trw Inc. Integrated circuit power distribution system
WO1995017007A1 (en) * 1993-12-14 1995-06-22 Oki America, Inc. Efficient routing method and resulting structure for integrated circuits
US5668389A (en) * 1994-12-02 1997-09-16 Intel Corporation Optimized power bus structure
JP3869045B2 (ja) * 1995-11-09 2007-01-17 株式会社日立製作所 半導体記憶装置
US6091090A (en) * 1997-09-19 2000-07-18 In-Chip Systems, Inc. Power and signal routing technique for gate array design
US6072740A (en) * 1997-12-01 2000-06-06 Intel Corporation Apparatus for reducing the effects of power supply distribution related noise
JP4498500B2 (ja) * 1999-10-06 2010-07-07 株式会社ルネサステクノロジ 半導体装置
US6396137B1 (en) * 2000-03-15 2002-05-28 Kevin Mark Klughart Integrated voltage/current/power regulator/switch system and method
JP4963144B2 (ja) * 2000-06-22 2012-06-27 ルネサスエレクトロニクス株式会社 半導体集積回路
JP2002110802A (ja) * 2000-09-27 2002-04-12 Toshiba Corp 半導体装置、半導体装置のレイアウト装置、及び半導体装置のレイアウト方法
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Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52111389A (en) 1976-03-16 1977-09-19 Nec Corp Iil-type semi-conductor ic
EP0288803A2 (en) 1987-04-30 1988-11-02 International Business Machines Corporation Personalizable semiconductor chips for analog and analog/digital circuits
US5256893A (en) 1987-07-22 1993-10-26 Hitachi, Ltd. Semiconductor integrated circuit device with power MOSFET incorporated
JPH0249449A (ja) 1989-06-23 1990-02-19 Fujitsu Ltd 半導体集積回路装置

Non-Patent Citations (2)

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PATENT ABSTRACTS OF JAPAN vol. 014, (2 - 213)<213> 7 May 1990 (1990-05-07)

Also Published As

Publication number Publication date
JP2006518936A (ja) 2006-08-17
US20040155681A1 (en) 2004-08-12
ATE509371T1 (de) 2011-05-15
TW200502744A (en) 2005-01-16
TWI276948B (en) 2007-03-21
WO2004070773A3 (en) 2004-10-28
CN1723561A (zh) 2006-01-18
US6924661B2 (en) 2005-08-02
EP1593157A2 (en) 2005-11-09
EP1593157B1 (en) 2011-05-11
CN100370613C (zh) 2008-02-20
KR100734999B1 (ko) 2007-07-03
KR20050092038A (ko) 2005-09-16
JP4566186B2 (ja) 2010-10-20

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