WO2004030083A3 - Interface utilisateur permettant de quantifier les aspects non uniformes d'une plaquette et d'explorer graphiquement leur signification - Google Patents

Interface utilisateur permettant de quantifier les aspects non uniformes d'une plaquette et d'explorer graphiquement leur signification Download PDF

Info

Publication number
WO2004030083A3
WO2004030083A3 PCT/US2003/030456 US0330456W WO2004030083A3 WO 2004030083 A3 WO2004030083 A3 WO 2004030083A3 US 0330456 W US0330456 W US 0330456W WO 2004030083 A3 WO2004030083 A3 WO 2004030083A3
Authority
WO
WIPO (PCT)
Prior art keywords
wafer
user interface
uniformities
wafer non
analysis
Prior art date
Application number
PCT/US2003/030456
Other languages
English (en)
Other versions
WO2004030083A2 (fr
Inventor
Jorge Luque
Iii Andrew D Bailey
Mark Wilcoxson
Original Assignee
Lam Res Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US10/331,194 external-priority patent/US7239737B2/en
Priority claimed from US10/452,248 external-priority patent/US7738693B2/en
Application filed by Lam Res Corp filed Critical Lam Res Corp
Priority to JP2005501992A priority Critical patent/JP2006515468A/ja
Priority to AU2003299056A priority patent/AU2003299056A1/en
Priority to KR1020057005323A priority patent/KR101127779B1/ko
Priority to EP03756878A priority patent/EP1543550A2/fr
Publication of WO2004030083A2 publication Critical patent/WO2004030083A2/fr
Publication of WO2004030083A3 publication Critical patent/WO2004030083A3/fr

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/20Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Investigating Materials By The Use Of Optical Means Adapted For Particular Applications (AREA)
  • Image Processing (AREA)

Abstract

L'invention concerne un système d'affichage de plaquette permettant de présenter graphiquement et d'analyser une plaquette ou une série de plaquettes. Ledit système comprend, de manière plus spécifique, une interface utilisateur graphique permettant d'afficher une plaquette, et des régions de sélection graphique de la plaquette destinées à être analysées. On effectue l'analyse sur les régions sélectionnées, puis on affiche les résultats de cette analyse.
PCT/US2003/030456 2002-09-26 2003-09-24 Interface utilisateur permettant de quantifier les aspects non uniformes d'une plaquette et d'explorer graphiquement leur signification WO2004030083A2 (fr)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2005501992A JP2006515468A (ja) 2002-09-26 2003-09-24 ウェーハについての不均一性の定量化および有意性の図解化のためのユーザインタフェース
AU2003299056A AU2003299056A1 (en) 2002-09-26 2003-09-24 User interface for quantifying wafer non-uniformities and graphically explore significance
KR1020057005323A KR101127779B1 (ko) 2002-09-26 2003-09-24 웨이퍼 불균일성 및 그래픽적 탐색의 유의성을 정량화하기위한 유저 인터페이스
EP03756878A EP1543550A2 (fr) 2002-09-26 2003-09-24 Interface utilisateur permettant de quantifier les aspects non uniformes d'une plaquette et d'explorer graphiquement leur signification

Applications Claiming Priority (6)

Application Number Priority Date Filing Date Title
US41402102P 2002-09-26 2002-09-26
US60/414,021 2002-09-26
US10/331,194 2002-12-24
US10/331,194 US7239737B2 (en) 2002-09-26 2002-12-24 User interface for quantifying wafer non-uniformities and graphically explore significance
US10/452,248 2003-05-30
US10/452,248 US7738693B2 (en) 2002-12-24 2003-05-30 User interface for wafer data analysis and visualization

Publications (2)

Publication Number Publication Date
WO2004030083A2 WO2004030083A2 (fr) 2004-04-08
WO2004030083A3 true WO2004030083A3 (fr) 2004-07-15

Family

ID=32045857

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2003/030456 WO2004030083A2 (fr) 2002-09-26 2003-09-24 Interface utilisateur permettant de quantifier les aspects non uniformes d'une plaquette et d'explorer graphiquement leur signification

Country Status (6)

Country Link
EP (1) EP1543550A2 (fr)
JP (1) JP2006515468A (fr)
KR (1) KR101127779B1 (fr)
AU (1) AU2003299056A1 (fr)
TW (1) TWI229914B (fr)
WO (1) WO2004030083A2 (fr)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4290204B2 (ja) * 2007-02-13 2009-07-01 東京エレクトロン株式会社 基板処理装置の設定操作支援装置,設定操作支援方法,プログラムを記憶する記憶媒体
JP5597056B2 (ja) * 2010-08-02 2014-10-01 株式会社キーエンス 画像測定装置、画像測定方法及び画像測定装置用のプログラム

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0398781A2 (fr) * 1989-05-19 1990-11-22 Eastman Kodak Company Méthode et appareil pour inspection d'une surface, à haute résolution et sous un angle faible
US5761064A (en) * 1995-10-06 1998-06-02 Advanced Micro Devices, Inc. Defect management system for productivity and yield improvement
US5939719A (en) * 1992-03-13 1999-08-17 Thermomicroscopes Corporation Scanning probe microscope with scan correction
US20010000460A1 (en) * 1989-07-12 2001-04-26 Kazuko Ishihara Semiconductor failure analysis system
US20010001015A1 (en) * 1989-07-12 2001-05-10 Seiji Ishikawa Inspection data analyzing system
US20020051565A1 (en) * 2000-10-26 2002-05-02 Takashi Hiroi Circuit pattern inspection method and apparatus
US20020102747A1 (en) * 2000-09-18 2002-08-01 David Muradian Correction of overlay offset between inspection layers in integrated circuits
US6477685B1 (en) * 1999-09-22 2002-11-05 Texas Instruments Incorporated Method and apparatus for yield and failure analysis in the manufacturing of semiconductors

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1145919A (ja) * 1997-07-24 1999-02-16 Hitachi Ltd 半導体基板の製造方法
JP4206192B2 (ja) * 2000-11-09 2009-01-07 株式会社日立製作所 パターン検査方法及び装置
JP4006119B2 (ja) * 1998-11-30 2007-11-14 株式会社日立製作所 回路パターン検査装置、および回路パターン検査方法
JP4041630B2 (ja) * 1998-11-30 2008-01-30 株式会社日立製作所 回路パターンの検査装置および検査方法
JP3996728B2 (ja) * 2000-03-08 2007-10-24 株式会社日立製作所 表面検査装置およびその方法
JP4526661B2 (ja) * 2000-06-28 2010-08-18 株式会社日立製作所 検査装置および検査方法

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0398781A2 (fr) * 1989-05-19 1990-11-22 Eastman Kodak Company Méthode et appareil pour inspection d'une surface, à haute résolution et sous un angle faible
US20010000460A1 (en) * 1989-07-12 2001-04-26 Kazuko Ishihara Semiconductor failure analysis system
US20010001015A1 (en) * 1989-07-12 2001-05-10 Seiji Ishikawa Inspection data analyzing system
US5939719A (en) * 1992-03-13 1999-08-17 Thermomicroscopes Corporation Scanning probe microscope with scan correction
US5761064A (en) * 1995-10-06 1998-06-02 Advanced Micro Devices, Inc. Defect management system for productivity and yield improvement
US6477685B1 (en) * 1999-09-22 2002-11-05 Texas Instruments Incorporated Method and apparatus for yield and failure analysis in the manufacturing of semiconductors
US20020102747A1 (en) * 2000-09-18 2002-08-01 David Muradian Correction of overlay offset between inspection layers in integrated circuits
US20020051565A1 (en) * 2000-10-26 2002-05-02 Takashi Hiroi Circuit pattern inspection method and apparatus

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
DATABASE INSPEC [online] INSTITUTE OF ELECTRICAL ENGINEERS, STEVENAGE, GB; RODGERS M R ET AL: "Application of the atomic force microscope to integrated circuit failure analysis", XP002277053, Database accession no. 4506485 *
MICROELECTRONICS AND RELIABILITY, SEPT. 1993, UK, vol. 33, no. 11-12, pages 1947 - 1956, ISSN: 0026-2714 *

Also Published As

Publication number Publication date
EP1543550A2 (fr) 2005-06-22
JP2006515468A (ja) 2006-05-25
KR101127779B1 (ko) 2012-03-27
WO2004030083A2 (fr) 2004-04-08
TW200414395A (en) 2004-08-01
AU2003299056A1 (en) 2004-04-19
TWI229914B (en) 2005-03-21
KR20050084603A (ko) 2005-08-26

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