WO2003096527A1 - Dispositif d'amplification de puissance - Google Patents
Dispositif d'amplification de puissance Download PDFInfo
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- WO2003096527A1 WO2003096527A1 PCT/JP2003/005576 JP0305576W WO03096527A1 WO 2003096527 A1 WO2003096527 A1 WO 2003096527A1 JP 0305576 W JP0305576 W JP 0305576W WO 03096527 A1 WO03096527 A1 WO 03096527A1
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- drive signal
- signal
- drive
- generation method
- signal generation
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Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
- H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
- H03F3/217—Class D power amplifiers; Switching amplifiers
- H03F3/2173—Class D power amplifiers; Switching amplifiers of the bridge type
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
- H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
- H03F3/217—Class D power amplifiers; Switching amplifiers
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
- H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
- H03F3/217—Class D power amplifiers; Switching amplifiers
- H03F3/2171—Class D power amplifiers; Switching amplifiers with field-effect devices
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/331—Sigma delta modulation being used in an amplifying circuit
Definitions
- the present invention relates to a power amplifier, and more particularly to a power amplifier such as a class D amplifier used for amplifying power for audio.
- the class D power amplifier described above is integrated with the receiver or placed close to the receiver, such as in Richiichi audio, the rising and falling edges of the output voltage Radiation from the edges can interfere with reception of AM broadcasts, for example.
- the carrier control unit outputs a tuning signal having a frequency corresponding to the tuner selection and a carrier control signal for switching the time constant of the difference integrator.
- the oscillation frequency of the closed loop circuit that is, the switching of the pulse amplifier
- the switching frequency is switched, and the frequency of the carrier signal in the closed loop circuit does not interfere with the tuning signal of the tuner.
- the carrier frequency of the switching amplification is changed in accordance with the reception frequency. It is difficult to perform a switching operation with a high level of noise, and there is a possibility that audio characteristics will be degraded.
- the purpose of the present invention is to control the drive signal generation method instead of changing the carrier frequency, unlike a conventional class D amplifier, to suppress unnecessary radiation and reduce reception disturbance to the tuner. To provide a power amplifying device.
- a power amplifying device proposed to achieve the above-mentioned object has a push-pull means formed by connecting at least a pair of switching elements by push-pull, and an input signal is input using the push-pull means.
- a power amplifier that amplifies the power of the input signal, generates a pulse width modulation signal representing the level of the input signal by a pulse width, and generates a drive signal to be supplied to the push-pull means based on the pulse width modulation signal.
- Drive signal generation means for selectively driving a drive signal generation method in the drive signal generation means according to a reception frequency in a tuner device for receiving a radio broadcast, and a push-pull means for selectively driving the drive signal. Obtaining an output signal based on the drive signal generated according to the signal generation method, Obtaining a power amplified signal from the output signal.
- reception disturbance to the tuner is reduced by controlling the drive signal generation method without changing the carrier frequency of the switching width of the class D amplifier.
- the power amplifying device of the present invention may include two push-pull means, and two drive signal generating means for supplying the drive signals to the two push-pull means, respectively.
- the respective drive signals from the two drive signal generating means are supplied to the two push-pull means. Then, a power amplification signal is obtained from the two output signals thus obtained.
- the drive signal generation method which is selectively switched in the power amplifying device, is a first method of generating a drive signal that changes at a break point of each one cycle period of the pulse width modulation signal; It consists of two types, the second method that generates a drive signal that does not change at the end of each cycle period.
- FIG. 1 is a diagram illustrating a configuration of a class D power amplifier according to a first embodiment.
- FIG. 2 is a timing chart for explaining a first drive signal generation method among two types of drive signal generation methods executed by two drive signal generators of the class D power amplifier.
- FIG. 3 is a timing chart for explaining PWM modulation.
- FIG. 4 is a diagram showing an equivalent circuit in the first embodiment when the first drive signal generation method is executed.
- FIG. 5 is a timing chart for explaining a second drive signal generation method among two types of drive signal generation methods executed by the two drive signal generators of the class D power amplifier.
- FIG. 6 is a diagram showing an equivalent circuit when the second drive signal generation method is executed in the first embodiment.
- FIG. 7 is a diagram illustrating a signal strength characteristic with respect to a frequency of an output voltage of the push-pull circuit according to the first drive signal generation method.
- FIG. 8 is a diagram illustrating signal strength characteristics with respect to the frequency of the output voltage of the push-pull circuit according to the second drive signal generation method.
- FIG. 9 is a diagram illustrating a configuration of a class D power amplifier according to the second embodiment.
- FIG. 10 illustrates a first drive signal generation method among two types of drive signal generation methods executed by two drive signal generators of the class D power amplifier according to the second embodiment. It is a timing chart for performing.
- FIG. 11 shows that the first drive signal generation method according to the second embodiment is executed.
- FIG. 4 is a diagram showing an equivalent circuit when the operation is performed.
- FIG. 12 illustrates a second drive signal generation method among two types of drive signal generation methods executed by the two drive signal generators of the class D power amplifier according to the second embodiment. It is a timing chart for performing.
- FIG. 13 is a circuit diagram showing a main part of a modification of the class D power amplifier in which the output stage is a single circuit and uses positive and negative power supplies + V DD , ⁇ V DD .
- FIG. 14 is a timing chart for explaining a second drive signal generation method in the modification.
- BEST MODE FOR CARRYING OUT THE INVENTION the first embodiment is a class D power amplifier 1 shown in FIG.
- the D-class power amplifier 1 power-amplifies the digital audio signal P in by performing high-speed switching of the power supply voltage V in accordance with the input digital audio signal P in, and supplies a widened signal to the speaker 2.
- the D-class power amplifier 1 is, for example, in a so-called AM receiver (receiver) integrally formed with an AM tuner 3 for receiving AM broadcast, and can reduce the influence of reception interference on the AM tuner 3.
- the class-D power amplifier 1 digital evening Le audio signal P in the example 16bit through the input terminal T in is inputted.
- the digital audio signal Pin is supplied to the drive signal generator 10 and the drive signal generator 20.
- the drive signal generator 10 generates two types of drive signals + PA1 or + PA2 and one PA1 or one PA2 according to two drive signal generation methods as described later.
- the drive signal generator 20 also generates two types of drive signals + P B1 or + P B2 , and one Pm or one P B2 by two drive signal generation methods.
- the two types of drive signals + P A1 or + P A2 and one P A1 or one P A2 generated by the drive signal generator 10 are a pair of switching elements, for example, n-channel MOS-FET (Q 1 1 and Q 12) are supplied to the respective gates. Also, two types of drive signals generated by the drive signal generator 20 + P B1 or + P B2 , and one P B1 Alternatively, one PB2 is also supplied to the gate of the MOS FET (Q13, Q14).
- FET (Q 1 1, Q 1 2) is than also constitutes Pudzushupuru circuit 3 0, the drain of the FE T (Q 1 1) is connected to the power supply terminal T PWR, its source FET (Q 12) is connected to the drain, and the source of this FET (Q12) is connected to ground.
- a stable DC voltage + VDD is supplied to the power supply terminal TPWR as the power supply voltage.
- the DC voltage + VDD is, for example, 20 V to 50 V.
- FET ( Q13 , Q14 ) also constitutes the push-pull circuit 40, in which the drain of the FET ( Q13) is connected to the power supply terminal TPWK , and the source is the FET ( Q13 ). 14) and the source of FET (Q14) is connected to ground.
- the source of FET (Q11) and the drain of FET (Q12), which constitute the push-pull circuit 30, are connected to one end of the speaker 2 outside the class D amplifier 1 through the low-pass filter (LPF) 50. Is done.
- the source of the FET (Q 13) and the drain of the FET (Q 14) constituting the push-pull circuit 40 are also connected to the other end of the external speech force 2 through the LPF 60.
- the control unit 70 selects the drive signal generation method used in the drive signal generator 10 and the drive signal generator 20 according to the reception frequency of the tuner unit 3. That is, the drive signal generator 10 and the drive signal generator 20 appropriately generate the two types of drive signals according to the drive signal generation method selected by the control unit 70 based on the reception frequency of the tuner unit 3.
- the drive signal generator 10 outputs the digital audio signal supplied through the input terminal Tin.
- the signal is converted to a PWM signal (drive signal) + P A1 as shown in Fig. 2.
- the drive signal generator 20 converts the digital audio signal P into a PWM signal (drive signal) + P B1 shown in FIG.
- the PWM signal is Since it is a drive signal as it is, it is unified with the drive signal, but it is a PWM signal.
- the pulse width of the drive signal + P A1 and the drive signal + P B1 changes according to the level indicated by the input signal Pin (the instantaneous level of the signal obtained by D / A conversion of the signal pin.
- the pulse width of one of the drive signals + P A1 is a magnitude corresponding to the level of the input signal P
- the pulse width of the other Dora I strobe signal + P B 1 is It is sized to correspond to the two's complement of the level indicated by the input signal P in.
- the first drive signal generation method in the first embodiment includes the drive signal generator 10 and the drive signal generator 2. In 0, it operates as if it were equivalent to the circuit shown in Fig. 4.
- the drive signal generator 10 By executing the first drive signal generation method, the drive signal generator 10 becomes the same as having the PWM modulation circuit 11 and the drive circuit 12 shown in FIG.
- the PWM modulation circuit 11 converts, for example, a 16-bit audio signal into the drive signal + PA1 in FIG.
- the drive circuit 12 converts the PWM modulation signal + P A1 or its inverted signal P A1 into a pair of n-channel MOS-FETs (Q 11, Q 12) constituting the push-pull circuit 40. ) To each gate.
- the drive circuit 1 2 in order to generate an inverted signal -Ro .LAMBDA.1, which inverts the PWM modulation signal + [rho [alpha] 1 at Inba Isseki 1 2 5.
- the drive signal generator 20 becomes the same as having the PWM modulation circuit 21 and the drive circuit 22 shown in FIG.
- PWM modulation circuit 2 1 converts the audio signal of 16bit the drive signal + P B1 shown in FIG.
- the drive circuit 22 converts the PWM modulation signal + P B1 or its inverted signal —P B1 into M ⁇ S—FET (Q 13, Q 1) of a pair of n channels constituting the push-pull circuit 40. 4) Supply each to the gate.
- the drive circuit 22 inverts the PWM modulation signal + P B1 at the inverter 225 in order to generate the inverted signal -P B1 .
- the low-pass filter has a 50-power force from the connection point of the FETs (Q 11, Q 12). 2 ⁇
- the current i flows through the line of the low-pass filter 60 to the connection point of the FET (Q13sQ14).
- the low-pass filter 60 ⁇ the speed 2 ⁇ the low-pass filter 50 from the connection point of FET (Q13, Q14).
- a current i flows in the reverse direction through the line to the connection point of FET (Q11, Q12) c.
- the push-pull circuits 30 and 40 constitute a: 6! 1 1 ⁇ (Bridge-Tied Load) circuit.
- the period during which the current i flows varies according to the period during which the original drive signals + P A1 and + P B1 rise, and when the current i flows through the speed 2, the current i
- the current i flowing through the speed 2 is an analog current corresponding to the level indicated by the input signal Pin and is a power-amplified current. That is, the power-amplified output is supplied to the speaker 2.
- the drive signal generator 10 and the drive signal generator 20 of FIG. 1 operate equivalently to the circuit having the configuration of FIG. 4 according to the first drive signal generation method in the first embodiment. Therefore, the FETs (Q11 to Q14) of class D power amplifier 1 Since the power supply voltage V DD is switched to amplify the power according to the input digital audio signal Pin, the efficiency is high and a large output can be obtained.
- the class D power amplifier 1 including the drive signal generator 10 and the drive signal generator 20 of FIG. 1 which executes the first drive signal generation method and functions as a circuit having the configuration of FIG.
- the power-supply voltage + V DD is a high voltage, for example, 20 V to 50 V, so that the radiation is considerably large.
- the drive signal + [rho .LAMBDA.1, the carrier frequency f c of + [rho .beta.1, are for example 7 68 kH z as above SL, which include broadcast band medium wave direction, for example, AM La di O broadcast band .
- the class D power amplifier 1 as described above is integrated with an AM broadcast receiver or arranged close to the AM broadcast receiver as in a car audio or the like, the output voltage V A1 , The radiation due to the rising edge and the falling edge of VB1 may interfere with the reception depending on the AM broadcast reception frequency.
- control unit 70 selects the second drive signal generation method described below in addition to the first drive signal generation method according to the reception frequency in the tuner unit 3. Drive signal generator 10 and drive signal generator 20 to execute.
- the drive signal generator 10 converts the digital audio signal Pin supplied through the input terminal Tin into a signal.
- the drive signal is converted into + PA2 as shown in FIG.
- the drive signal generator 20 converts the digital audio signal P in, the drive signal + P B2 shown in FIG.
- a drive signal is generated from a PWM signal.
- the second drive signal generation method in the first embodiment includes the drive signal generator 10 and the drive signal generator 20.
- the drive signal generator 10 becomes the same as having the PWM modulation circuit 11 and the drive circuit 13 shown in FIG.
- the PWM modulation circuit 11 has the same configuration as that shown in FIG. 4, and converts, for example, a 16-bit audio signal into a PWM signal + PA1 in FIG. Further, the drive circuit 1 3, the PWM modulation ⁇ No. + P A1 or its inverted signal one P A1, the drive signal + P A2 shown in FIG. 5, - is converted into P A2, constituting the push-pull circuit 40
- the pair of n-channel MOS-FETs (Qll, Q12) are supplied to the gates.
- the drive signal + P A2 converted into a serial signal at the shift register 113 is supplied to the drive circuit 13.
- the drive signal generator 20 becomes the same as the one including the PWM modulation circuit 21 and the drive circuit 23 shown in FIG.
- the PWM modulation circuit 21 has a configuration similar to that shown in FIG. 4, and converts, for example, a 16-bit audio signal into a PWM signal + P B1 in FIG.
- the drive signal + P B1 converted into a serial signal by the shift register 2 13 is supplied to the drive circuit 23.
- the drive circuit 13 and the drive circuit 23 are configured as shown in FIG. 6 to generate the drive signals + P A2 , —P A2 and the drive signals + P B2 , —P B2 . That is, the PWM signal + P A1 is supplied to the selector circuit 13 1 and the selector circuit 232, and is also supplied to the inverter 135 to be a P WM signal having an inverted level, which is P A1. One P A1 is supplied to the selectors 13 2 and 23 1. In addition, the PWM signal + P B1 is supplied to the selector circuit 231 and the selector circuit 132, and is also supplied to the inverter 235 to invert the level. It is a PWM signal one P B1, the PWM signal one P B1 is supplied to the selector circuit 2 32, selector evening circuit 1 3 1.
- a signal P c whose level is inverted every one cycle period Ti 2, 3, 4,...) Is extracted from the evening timing signal forming circuit of the control unit 70, and this signal P c is supplied to the selector circuits 131, 1332, 231, 232 as a switching control signal.
- V B2 at the connection point of (Q 13, Q 14) is equal to the voltage + V DD .
- + P B2 “L”
- one P B2 “H”
- FET (Q 13) is turned off
- Since FET (Q14) is turned on, VB2 0.
- the current i flows in the opposite direction to the connection point of FET (Q ll, Q 1 2) through the connection c.
- the period during which the current i flows changes corresponding to the period during which the original PWM signals + P A1 and + P B1 rise, and when the current i flows through the speaker 2, the current i
- the current i flowing through the speed 2 is an analog current corresponding to the level indicated by the input signal Pin and is a power-amplified current. That is, the power-amplified output is supplied to the speaker 2.
- the second drive signal generation method functions as the circuit of FIG. 6.
- the drive signal generator 10 of FIG. 1 and the D-class power amplifier 1 including the drive signal generator 20 perform power amplification by switching. While performing, as shown in FIG. 5, PWM signal + P A1, + P B1 is also risen each starting point of one cycle Ti, the starting point of the output voltage V a 2, V B2 is one cycle period Ti
- the number of rising edges and falling edges of the output voltages V A2 and V B2 is 1 / th of the number of rising and falling edges of the output voltages V A1 and V B1 shown in FIG. It is 2. Therefore, radiation caused by changes in output voltages V A2 and V B2 can be reduced.
- Figure 7 shows the output voltage V A1 signal.
- 2 shows a change in the signal strength according to a change in the frequency of the signal.
- Figure 8 is showing the change of the signal intensity corresponding to the change in the frequency of the output voltage VA 2 signals.
- control unit 70 always detects whether or not the reception frequency of the tuner unit 3 has become 900 kHz or less manually or automatically.
- Drive signal generator 10 and drive signal generator 20 were activated, and the reception frequency became higher than 900 kHz.
- the first drive signal generation method is selected and operated. As a result, in the class D power amplifier 1 according to the present embodiment, reception interference to the tuner unit 3 for receiving AM broadcast can be reduced.
- a clock such as a high-precision ice crystal oscillator can be used, and audio characteristics do not deteriorate.
- FIG. 1 two drive signal generators 10 and two drive signal generators 20 are used.
- the first embodiment is an example in which the output stage of the power amplifier is a BTL circuit, it may be a single circuit.
- FIG. 9 shows one form of such a power amplifier, the second embodiment.
- the second embodiment shown in FIG. 9, the class D power amplifier 3 00, digital evening Ruodo signal P in the example 16bit through the input terminal T in is inputted.
- the drive signal generator 301 also has two types of drive signals P i and P 2- ! Or P 2 and P 2 - 2 generates.
- Drive signal generator 30 1 is generated two types of drive signals P and P 2 - i or P Medical 2 and P 2 - 2, a pair of sweep rate Dzuchingu elements, for example of the n-channel M_ ⁇ S- FET (Q 2 1, each supplied to the gate of Q 22).
- FET ( Q21 , Q22 ) constitutes the bush-pull circuit 304 , the drain of FET ( Q21) is connected to the power supply terminal TPWK, and the source is FET (Q 22) is connected to the drain, and the source of this: ET (Q 22) is connected to ground.
- a stable DC voltage + VDD is supplied to the power supply terminal TPWE as the power supply voltage.
- the voltage + VDD is, for example, 20 V to 50 V.
- the source of FET (Q 21) and the drain of FET (Q 22) constituting the push-pull circuit 304 are external to the class D amplifier 300 through the coupling capacitor C and the low-pass filter (LPF) 302. Connect to one end of speaker 320 Is done. The other end of the speaker 320 is connected to the ground.
- LPF low-pass filter
- the drive signal generation method used in the drive signal generator 301 is selected by the control section 303 based on the reception frequency of the tuner section 330. That is, the drive signal generator 301 appropriately generates two types of drive signals according to the drive signal generation method selected by the control section 303 according to the reception frequency of the tuner section 330.
- the drive signal onset production unit 3 0 which is supplied through the input terminal T in converting the signal P in, a PWM signal as shown in FIG. 1 0 + P a, the PWM signal + P B.
- the PWM signal + P A, the pulse width of the PWM signal + P B varies corresponding to the level of the input signal P in (instantaneous level of the signal P in D / A converted signal.
- pulse width of one of PWM signals + P a is the magnitude corresponding to the level of the input signal P in
- the other PWM signals + P B pulse width is the size corresponding to the two's complement of the level indicated by the input signal P in.
- the first drive signal generation method in the second embodiment is performed as if in the drive signal generator 301. It operates equivalent to the circuit shown in Fig. 11.
- the drive signal generator 301 is composed of the PWM modulation circuit 3 It is composed of an M modulation circuit 3011, a drive circuit 3012, and a receiver 3103.
- PWM modulation circuit 30 1 0 converts the audio signal to the PWM signal + P A in FIG. 1 0, and supplies to the drive circuit 30 1 2.
- PWM modulation circuit 3 0 1 1 supplies after converting the PWM signal + P B shown in FIG. 1 0 the O one Do signal Inba Isseki 3 0 1 3.
- Lee Nba Ichita 301 3 supplies P WM signal one P B obtained by inverting the level of the PWM signal + P B to the drive circuit 30 1 2.
- the period during which the current i flows changes according to the period during which the original PWM signal + PA rises, and when the current i flows through the speaker 320, the current i since the integration, as a result, the current i flowing through the speaker 3 2 0 is an analog current corresponding to the level of the input signal P in a current which is power amplified. That is, the power-amplified output is supplied to the speaker 32 °.
- the class D power amplifier including the drive signal generator 301 of FIG. 9 that functions as the circuit of the configuration of FIG. 11 according to the first drive signal generation method of the second embodiment. 300 works.
- FET Q 21, Q 22
- the power supply voltage V is switched according to the input digital audio signal Pin to amplify the power, high efficiency and a large output can be obtained.
- the class D power provided with the drive signal generator 301 of FIG. 9 which operates by the first drive signal generation method of the second embodiment and functions like the circuit having the configuration of FIG. 11 amplifiers 3 0 0, since the power-supply voltage + V DD and sweep rate Tsuchingu quickly to form the output voltage V a 1, occurs the radiation by the rising edge and falling E Uz di output voltage V A1.
- the power supply voltage + V DD is a high voltage, for example, 20 V to 50 V, so that its radiation is also considerable.
- the carrier frequency of the PWM signal + P A: f is for example 7 6 8 kH z as described above, this broadcast band of medium frequency direction include, for example, in the AM radio broadcast band.
- the class D power amplifier 300 described above is integrated with an AM broadcast receiver or is arranged close to the AM broadcast receiver as in a car audio or the like, the output voltage V Radiation from the rising and falling edges of A1 interferes with AM broadcast reception.
- the second drive signal generation method in the second embodiment described below
- the control signal is selected by the control section 303 according to the reception frequency of the tuner section 330, and the drive signal generator 301 executes the selection.
- the drive signal generator 301 converts the digital audio signal P IN supplied through the input terminal T IN into a PWM signal + P A as shown in FIG. Convert to
- the drive signal generator 301 converts the digital audio signal P IN into the PWM signal + P B shown in FIG. 12 and further inverts the level to generate one PWM signal P B.
- this drive signal generator 3 0 1 and these PWM signals + PA, drive signal P as shown in FIG. 1 2 using a PWM signal one P B - generating a 2, P!.
- the second drive signal generation method in the drive signal generator 3 0 1, if it were shown in FIG. 1 1 It operates equivalently to such a circuit.
- the drive circuit 3 0 1 2 by Control unit 3 0 3 when the second drive signal generation method is selected the PWM signal + P lambda and the PWM signal one P B, Fig. as shown in 1 2, and taken out alternately to produce a drive signal P 2 every cycle period Ti.
- the drive signal P2-2 is a signal obtained by inverting the level of the drive signal Pi- 2 .
- the period during which the current i flows varies according to the period during which the original PWM signal + P A rises, and when the current i flows through the speaker 320, the current i becomes the low-pass filter 302 since is integrated by, as a result, the current i flowing through the speaker 3 2 0 is a current which is power-amplified by mediation by Ana port grayed current corresponding to the level of the input signal P i n. That is, the power-amplified output is supplied to the speaker 320.
- a class D power amplifier 30 having the drive signal generator 301 of FIG. 9 functioning as the circuit having the configuration of FIG. 0 performs power variation by switching. Furthermore, as shown in Fig. 12, even if the jun signal + jun —PB rises at the start of one cycle period Ti or falls, the output voltage V A2 rises at the beginning of one cycle period 1 it is no, the number of rising Edzuji and falling edges of the output voltage V A2 has a rising and falling of the number of edges 1Z2 output voltage V A1 shown in FIG. 1 0. Therefore, it is possible to reduce the radiation caused by the change in the output voltage V A2. Then, as described with reference to FIGS. 7 and 8, the first drive signal generation method and the second drive signal generation method of the second embodiment are switched according to the reception frequency of the AM broadcast. If selected, reception interference can be reduced.
- the drive signal generator is a crystal oscillator with a high time-axis accuracy. It is possible to operate with the clock of.
- the class D power amplifier of FIG. 9 has an example in which the output stage is a single circuit and only the DC voltage + V DD is used as the power supply voltage of the push-pull circuit 304, but as shown in FIG. A class D power amplifier in which the push-pull circuit 304 uses a positive / negative power supply + V DD or one V DD may be used.
- the drain of FET (Q 21) of the push-pull circuit 304 is connected to the positive power supply terminal TPWE +, and the source of FET (Q22) is connected to the negative power supply terminal TPWR ⁇ .
- a pair of positive and negative DC voltages + V DD and one V DD are supplied as a power supply voltage to the power supply terminal T PWK + and the power supply terminal T PWE- .
- the output voltage V A2 of the push-pull circuit 304 becomes the drive voltage Pi- 2
- P 2 - is 2 waveform as shown in FIG. 1 4 in response to, the speaker 3 2 0 will flow current i polarity and magnitude corresponding to the input signal P in is the power amplification is performed .
- the drive signal generator can be operated by a clock such as a crystal oscillator with high time axis accuracy.
- the current waveform supplied to the speaker 320 is one cycle.
- the temporal center of gravity is shifted, and phase distortion occurs.
- the temporal center of gravity does not deviate means that the peak of the waveform is at the center of one cycle period.
- the waveform is shifted to the right or left every cycle, and the level desired to be expressed is obtained for each cycle period Ti, but the characteristics are degraded.
- the output stage shown in Figure 9 In the configuration of the single circuit, when the P WM signal generation Dora I strobe signal generator, the 1-cycle period a pulse width in accordance with the level of the input signal T in It is conceivable to perform modulation such as changing from both sides. Since this is modulated from both sides of one cycle period, it is called double-sided modulation.
- This double-sided modulation is also a drive signal generation method that generates a drive signal with one rising edge and one falling edge each within one cycle period.
- a drive signal for the push-pull circuit 304 is generated based on the PWM signal P DA obtained by the two-sided modulation, and the drive signal is supplied to the FETs (Q 21, Q 22) to obtain 1 It is possible to generate an output voltage V having a temporal center of gravity within the cycle period Ti.
- the pulse width must be controlled in accordance with the input signal from both sides of one cycle period, and the control becomes slightly complicated. It is conceivable to use this two-sided modulation method as the signal generation method.
- the drive signal generation method in the drive signal generation means is selectively switched according to the reception frequency in the tuner device for radio broadcast reception, and the selectively switched drive signal generation method is used.
- the push-pull means obtains an output signal based on the drive signal generated according to the generation method, and obtains a power amplification signal from the output signal.Thus, unnecessary radiation can be suppressed without changing the carrier frequency. It is possible to reduce the interference with the reception of the antenna.
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Description
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Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
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KR1020047018108A KR101028391B1 (ko) | 2002-05-13 | 2003-05-01 | 전력증폭장치 |
US10/514,178 US7132884B2 (en) | 2002-05-13 | 2003-05-01 | Power amplification device |
EP03721010A EP1505724B1 (en) | 2002-05-13 | 2003-05-01 | Power amplification device |
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JP2002137778A JP3896894B2 (ja) | 2002-05-13 | 2002-05-13 | 電力増幅装置 |
JP2002-137778 | 2002-05-13 |
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WO2003096527A1 true WO2003096527A1 (fr) | 2003-11-20 |
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PCT/JP2003/005576 WO2003096527A1 (fr) | 2002-05-13 | 2003-05-01 | Dispositif d'amplification de puissance |
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US (1) | US7132884B2 (ja) |
EP (1) | EP1505724B1 (ja) |
JP (1) | JP3896894B2 (ja) |
KR (1) | KR101028391B1 (ja) |
CN (1) | CN100433547C (ja) |
WO (1) | WO2003096527A1 (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2009105703A (ja) * | 2007-10-24 | 2009-05-14 | Yamaha Corp | 信号生成装置およびd級増幅装置 |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE10320926A1 (de) * | 2003-05-09 | 2004-12-16 | Siemens Ag | Verfahren und Anordnung zur Prüfung einer Leistungsendstufe |
US7279966B2 (en) * | 2005-07-29 | 2007-10-09 | Texas Instruments Incorporated | Systems for pseudo-BD modulation |
WO2008041447A1 (fr) * | 2006-10-04 | 2008-04-10 | Panasonic Corporation | Circuit convertisseur d'impulsions, circuit intégré à semi-conducteur et dispositif électronique |
WO2010061513A1 (ja) * | 2008-11-28 | 2010-06-03 | 三菱電機株式会社 | 相補型パルス幅変調回路、およびデジタルアナログ変換装置 |
EP2688140A3 (en) * | 2012-07-18 | 2014-04-30 | Aisin Seiki Kabushiki Kaisha | Antenna drive apparatus |
CN104796093B (zh) * | 2015-03-31 | 2018-04-13 | 广州市番禺区西派电子电器厂(普通合伙) | 一种广播功率放大保护装置 |
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JPH0629757A (ja) | 1992-07-10 | 1994-02-04 | Matsushita Electric Ind Co Ltd | D級増幅器 |
JPH0715248A (ja) * | 1993-06-22 | 1995-01-17 | Fujitsu Ten Ltd | デジタルアンプ |
EP1014566A2 (en) | 1998-12-22 | 2000-06-28 | Intersil Corporation | Dual mode class D amplifier |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1996041412A2 (en) * | 1995-06-07 | 1996-12-19 | Harris Corporation | Monolithic class d amplifier |
US6229389B1 (en) * | 1998-11-18 | 2001-05-08 | Intersil Corporation | Class D modulator with peak current limit and load impedance sensing circuits |
JP2002009566A (ja) | 2000-04-17 | 2002-01-11 | Rohm Co Ltd | オーディオ信号増幅回路およびこの増幅回路を用いる携帯型の電話機および携帯型電子機器 |
KR100668813B1 (ko) * | 2000-10-31 | 2007-01-17 | 주식회사 하이닉스반도체 | 센스 앰프 오버 드라이브 회로 |
US6593806B1 (en) * | 2001-08-10 | 2003-07-15 | Cirrus Logic, Inc. | Circuits and methods for compensating switched mode amplifiers |
-
2002
- 2002-05-13 JP JP2002137778A patent/JP3896894B2/ja not_active Expired - Fee Related
-
2003
- 2003-05-01 EP EP03721010A patent/EP1505724B1/en not_active Expired - Fee Related
- 2003-05-01 WO PCT/JP2003/005576 patent/WO2003096527A1/ja active Application Filing
- 2003-05-01 US US10/514,178 patent/US7132884B2/en not_active Expired - Lifetime
- 2003-05-01 KR KR1020047018108A patent/KR101028391B1/ko not_active IP Right Cessation
- 2003-05-01 CN CNB038142430A patent/CN100433547C/zh not_active Expired - Fee Related
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
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JPH0629757A (ja) | 1992-07-10 | 1994-02-04 | Matsushita Electric Ind Co Ltd | D級増幅器 |
JPH0715248A (ja) * | 1993-06-22 | 1995-01-17 | Fujitsu Ten Ltd | デジタルアンプ |
EP1014566A2 (en) | 1998-12-22 | 2000-06-28 | Intersil Corporation | Dual mode class D amplifier |
JP2000196376A (ja) * | 1998-12-22 | 2000-07-14 | Intersil Corp | デュアルモ―ドd級増幅器 |
Non-Patent Citations (1)
Title |
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See also references of EP1505724A4 * |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2009105703A (ja) * | 2007-10-24 | 2009-05-14 | Yamaha Corp | 信号生成装置およびd級増幅装置 |
Also Published As
Publication number | Publication date |
---|---|
KR101028391B1 (ko) | 2011-04-13 |
EP1505724A1 (en) | 2005-02-09 |
EP1505724A4 (en) | 2006-02-01 |
US20050174176A1 (en) | 2005-08-11 |
KR20050000422A (ko) | 2005-01-03 |
US7132884B2 (en) | 2006-11-07 |
JP2003332858A (ja) | 2003-11-21 |
EP1505724B1 (en) | 2012-02-22 |
CN100433547C (zh) | 2008-11-12 |
CN1663117A (zh) | 2005-08-31 |
JP3896894B2 (ja) | 2007-03-22 |
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