WO2002098193A1 - A method for applying thick copper on substrates - Google Patents

A method for applying thick copper on substrates Download PDF

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Publication number
WO2002098193A1
WO2002098193A1 PCT/SE2002/001014 SE0201014W WO02098193A1 WO 2002098193 A1 WO2002098193 A1 WO 2002098193A1 SE 0201014 W SE0201014 W SE 0201014W WO 02098193 A1 WO02098193 A1 WO 02098193A1
Authority
WO
WIPO (PCT)
Prior art keywords
copper
conductor pattern
ceramic substrate
autocatalytic
conductors
Prior art date
Application number
PCT/SE2002/001014
Other languages
English (en)
French (fr)
Inventor
Lars Drugge
Per Ferm
Original Assignee
Telefonaktiebolaget Lm Ericsson (Publ)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Telefonaktiebolaget Lm Ericsson (Publ) filed Critical Telefonaktiebolaget Lm Ericsson (Publ)
Publication of WO2002098193A1 publication Critical patent/WO2002098193A1/en

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/24Reinforcing the conductive pattern
    • H05K3/245Reinforcing conductive patterns made by printing techniques or by other techniques for applying conductive pastes, inks or powders; Reinforcing other conductive patterns by such techniques
    • H05K3/246Reinforcing conductive paste, ink or powder patterns by other methods, e.g. by plating
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/16Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
    • C23C18/1601Process or apparatus
    • C23C18/1603Process or apparatus coating on selected surface areas
    • C23C18/1607Process or apparatus coating on selected surface areas by direct patterning
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/16Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
    • C23C18/1601Process or apparatus
    • C23C18/1633Process of electroless plating
    • C23C18/1646Characteristics of the product obtained
    • C23C18/165Multilayered product
    • C23C18/1653Two or more layers with at least one layer obtained by electroless plating and one layer obtained by electroplating
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/02Electroplating of selected surface areas
    • C25D5/022Electroplating of selected surface areas using masking means
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0263High current adaptations, e.g. printed high current conductors or using auxiliary non-printed means; Fine and coarse circuit patterns on one circuit board
    • H05K1/0265High current adaptations, e.g. printed high current conductors or using auxiliary non-printed means; Fine and coarse circuit patterns on one circuit board characterized by the lay-out of or details of the printed conductors, e.g. reinforced conductors, redundant conductors, conductors having different cross-sections
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/24Reinforcing the conductive pattern
    • H05K3/243Reinforcing the conductive pattern characterised by selective plating, e.g. for finish plating of pads
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/0306Inorganic insulating substrates, e.g. ceramic, glass
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/09Use of materials for the conductive, e.g. metallic pattern
    • H05K1/092Dispersed materials, e.g. conductive pastes or inks
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03Conductive materials
    • H05K2201/0332Structure of the conductor
    • H05K2201/0335Layered conductors or foils
    • H05K2201/0347Overplating, e.g. for reinforcing conductors or bumps; Plating over filled vias
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09654Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/098Special shape of the cross-section of conductors, e.g. very thick plated conductors
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/05Patterning and lithography; Masks; Details of resist
    • H05K2203/0502Patterning and lithography
    • H05K2203/0542Continuous temporary metal layer over metal pattern

Definitions

  • the invention relates to a method of providing thick copper conductors for high current applications on ceramic substrates.
  • DBC Direct Bonded Copper
  • Copper Clad Copper Clad (includes electroplating with subsequent firing)
  • PCTF Plated Copper on Thick Films
  • the short-circuiting links demand space, which in turn results in a reduction of the packing density on the ceramic substrate, i.e. less circuits per substrate.
  • One additional problem is that after the links are removed silver contacts are exposed and the silver might, when exposed to humidity and voltage, start to migrate and short-circuit the circuits on the ceramic substrate. Therefore it demands an extra step of plating with nickel and/or gold in which the exposed silver contacts are covered.
  • the object of the invention is to eliminate the above mentioned problems and bring about a method for production of dense circuit boards for high current applications, that allow for a combination of thick copper conductors together with printed resistors and/or other printed components.
  • the invention involves printing a circuit pattern by means of a seed layer of silver or the like on the ceramic substrate, on which a layer of autocatalytic copper has good adhesion, instead of firing the final copper pattern to achieve good adhesion to a ceramic substrate, as in the Copper Clad-technology.
  • This also makes it possible to include printed components on the substrate without the risk for damage during the otherwise used firing.
  • the circuit pattern can be short-circuited by covering the entire surface of the substrate with a thin layer of autocatalytic copper.
  • the areas on the ceramic substrate not to be further plated with copper are subsequently covered with a so-called plating resist.
  • a subsequent electroplating builds up the copper thickness on the remaining areas.
  • One of the advantages of the invention is that it is space-saving since there is no need for temporary short-circuiting connections or a so-called bus bar on the substrate for connection of the circuit prior to the final copper plating.
  • Another advantage is that, since no consideration has to be made for current accessing the link system, the invention allows for a larger number of circuits per ceramic substrate, thus enabling the manufacture of denser circuit boards.
  • One further advantage is that risk for short-circuiting by unwanted copper treeing is eliminated since no plating resist edge is connecting two conductors.
  • the conductors achieve a similar conductor quality as the conductors in the copper clad technology, still keeping the possibility to include standard thick film resistors and crossovers.
  • Figs. 1 - 6 schematically illustrate those process steps, according to the invention, that are included, upon manufacture of thick conductors on a ceramic substrate.
  • a so-called seed layer of silver in the form of a conductor pattern 2 is printed on a ceramic substrate 1. This is performed in order to provide a layer that has good adhesion both to the substrate 1 and to copper, and to enable the actual plating.
  • the process is not limited to just include silver as a seed layer but can include any other material that has good adhesion to the ceramic substrate 1, can act as terminal for printed components and at the same time can bond copper to its surface.
  • the substrate 1 is lowered into a chemical bath for a predetermined time in order to apply an approximately 1 ⁇ m thick layer of autocatalytic copper 3 on the substrate 1 and the conductor pattern 2 as illustrated in Fig. 2.
  • the autocatalytic copper layer 3 is applied in order to facilitate short-circuiting of the conductor pattern 2 and thereby prepare the ceramic substrate 1 for a further build-up of the thickness of the copper conductors by subsequent electrolytic plating or metallization. It is understood that the autocatalytic copper layer 3 is in contact with the conductor pattern 2.
  • a so-called plating resist 4 is applied on the autocatalytic copper layer 3 on the areas of the ceramic substrate 1 outside the conductor pattern 2.
  • This plating resist consists of a standard polymer material well known in the plating industry.
  • the plating resist 4 is applied in order to protect and cover those areas that are not intended to be plated in a later process step i.e. areas outside the conductor pattern 2.
  • copper is applied on the autocatalytic copper layer 3 on the conductor pattern 2 that in the previous step has not been covered by plating resist 4.
  • copper conductors 5 are obtained.
  • the thickness of the copper conductors 5 is increased to a desired value.
  • the application of copper for the copper conductors 5 can be achieved by means of electroplating or metallization. It is understood that other application methods can be utilized.
  • the desired value of the thickness of the copper conductors 5 is usually in the interval from 70 ⁇ m to 200 ⁇ m.
  • the plating resist 4 is then removed by means of a chemical process, as illustrated by Fig. 5. After that, copper remains only as the thick copper conductors 5 and the short-circuiting autocatalytic copper layer 3 on the substrate 1.
  • the chemical process can include a lowering of the ceramic substrate into one or more subsequent chemical baths that dissolve the plating resist.
  • the autocatalytic copper layer 3 that is outside the conductor pattern 2 is removed. This can be achieved by etching the entire surface of the substrate.
  • a ceramic substrate 1 with thick copper conductors 5 comprising a seed layer in the form of a conductor pattern 2 under the copper conductors 5 and a layer of autocatalytic copper 3 between the conductor pattern 2 and the thick copper conductors 5.
  • the ceramic substrate 1 can also include various printed components (not shown) e.g. resistors that are connected to the conductor pattern 2 in Fig.l. When and if such components are included on the substrate 1, the plating resist 4 is applied to these as well.

Landscapes

  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Chemical & Material Sciences (AREA)
  • Mechanical Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Electrochemistry (AREA)
  • Manufacturing Of Printed Wiring (AREA)
PCT/SE2002/001014 2001-05-28 2002-05-27 A method for applying thick copper on substrates WO2002098193A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
SE0101868-8 2001-05-28
SE0101868A SE0101868L (sv) 2001-05-28 2001-05-28 Förfarande för att applicera koppar på substrat

Publications (1)

Publication Number Publication Date
WO2002098193A1 true WO2002098193A1 (en) 2002-12-05

Family

ID=20284260

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/SE2002/001014 WO2002098193A1 (en) 2001-05-28 2002-05-27 A method for applying thick copper on substrates

Country Status (3)

Country Link
SE (1) SE0101868L (sv)
TW (1) TW593778B (sv)
WO (1) WO2002098193A1 (sv)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2150095A1 (en) * 2008-07-30 2010-02-03 Samsung Electronics Co., Ltd. Printed circuit board with conductive ink/paste, having plating layers, and method for manufacturing the same
KR101520412B1 (ko) * 2013-02-28 2015-05-15 하이쎌(주) 레이저와 인쇄방식이 하이브리드된 플렉서블 기판 및 이의 제조 방법
RU2740383C1 (ru) * 2019-09-18 2021-01-13 Тойота Дзидося Кабусики Кайся Способ изготовления монтажной платы и монтажная плата
KR20220000361A (ko) * 2020-06-25 2022-01-03 도요타지도샤가부시키가이샤 배선 기판의 제조 방법

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2019075456A (ja) * 2017-10-16 2019-05-16 住友電気工業株式会社 プリント配線板用基材及びプリント配線板

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5298687A (en) * 1990-12-27 1994-03-29 Remtec, Inc. High-density multilayer interconnection system on a ceramic substrate for high current applications and method of manufacture
US5681441A (en) * 1992-12-22 1997-10-28 Elf Technologies, Inc. Method for electroplating a substrate containing an electroplateable pattern
US5733466A (en) * 1996-02-06 1998-03-31 International Business Machines Corporation Electrolytic method of depositing gold connectors on a printed circuit board

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5298687A (en) * 1990-12-27 1994-03-29 Remtec, Inc. High-density multilayer interconnection system on a ceramic substrate for high current applications and method of manufacture
US5681441A (en) * 1992-12-22 1997-10-28 Elf Technologies, Inc. Method for electroplating a substrate containing an electroplateable pattern
US5733466A (en) * 1996-02-06 1998-03-31 International Business Machines Corporation Electrolytic method of depositing gold connectors on a printed circuit board

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2150095A1 (en) * 2008-07-30 2010-02-03 Samsung Electronics Co., Ltd. Printed circuit board with conductive ink/paste, having plating layers, and method for manufacturing the same
CN101640974B (zh) * 2008-07-30 2012-12-12 三星电子株式会社 印刷电路板及其制造方法
KR101520412B1 (ko) * 2013-02-28 2015-05-15 하이쎌(주) 레이저와 인쇄방식이 하이브리드된 플렉서블 기판 및 이의 제조 방법
RU2740383C1 (ru) * 2019-09-18 2021-01-13 Тойота Дзидося Кабусики Кайся Способ изготовления монтажной платы и монтажная плата
KR20220000361A (ko) * 2020-06-25 2022-01-03 도요타지도샤가부시키가이샤 배선 기판의 제조 방법
US11425824B2 (en) * 2020-06-25 2022-08-23 Toyota Jidosha Kabushiki Kaisha Method for producing wiring substrate
TWI793620B (zh) * 2020-06-25 2023-02-21 日商豐田自動車股份有限公司 配線基板的製造方法
KR102548962B1 (ko) * 2020-06-25 2023-06-29 도요타지도샤가부시키가이샤 배선 기판의 제조 방법

Also Published As

Publication number Publication date
SE0101868D0 (sv) 2001-05-28
TW593778B (en) 2004-06-21
SE0101868L (sv) 2002-11-29

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