TW593778B - A method for applying copper on substrates - Google Patents
A method for applying copper on substrates Download PDFInfo
- Publication number
- TW593778B TW593778B TW90121609A TW90121609A TW593778B TW 593778 B TW593778 B TW 593778B TW 90121609 A TW90121609 A TW 90121609A TW 90121609 A TW90121609 A TW 90121609A TW 593778 B TW593778 B TW 593778B
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- Prior art keywords
- copper
- layer
- substrate
- conductor
- autocatalytic
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Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/24—Reinforcing the conductive pattern
- H05K3/245—Reinforcing conductive patterns made by printing techniques or by other techniques for applying conductive pastes, inks or powders; Reinforcing other conductive patterns by such techniques
- H05K3/246—Reinforcing conductive paste, ink or powder patterns by other methods, e.g. by plating
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C18/00—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
- C23C18/16—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
- C23C18/1601—Process or apparatus
- C23C18/1603—Process or apparatus coating on selected surface areas
- C23C18/1607—Process or apparatus coating on selected surface areas by direct patterning
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C18/00—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
- C23C18/16—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
- C23C18/1601—Process or apparatus
- C23C18/1633—Process of electroless plating
- C23C18/1646—Characteristics of the product obtained
- C23C18/165—Multilayered product
- C23C18/1653—Two or more layers with at least one layer obtained by electroless plating and one layer obtained by electroplating
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- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
- C25D5/02—Electroplating of selected surface areas
- C25D5/022—Electroplating of selected surface areas using masking means
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0263—High current adaptations, e.g. printed high current conductors or using auxiliary non-printed means; Fine and coarse circuit patterns on one circuit board
- H05K1/0265—High current adaptations, e.g. printed high current conductors or using auxiliary non-printed means; Fine and coarse circuit patterns on one circuit board characterized by the lay-out of or details of the printed conductors, e.g. reinforced conductors, redundant conductors, conductors having different cross-sections
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/24—Reinforcing the conductive pattern
- H05K3/243—Reinforcing the conductive pattern characterised by selective plating, e.g. for finish plating of pads
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/09—Use of materials for the conductive, e.g. metallic pattern
- H05K1/092—Dispersed materials, e.g. conductive pastes or inks
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0335—Layered conductors or foils
- H05K2201/0347—Overplating, e.g. for reinforcing conductors or bumps; Plating over filled vias
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
- H05K2201/098—Special shape of the cross-section of conductors, e.g. very thick plated conductors
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/05—Patterning and lithography; Masks; Details of resist
- H05K2203/0502—Patterning and lithography
- H05K2203/0542—Continuous temporary metal layer over metal pattern
Abstract
Description
593778 A7 B7 ' 五、發明説明(1 ) 技術範蜂 本發明係關於一種在陶瓷基材上電鍍厚的銅膜的方法, 其使結合厚的銅導體與印刷電阻器、交越與其他元件成爲 可能,而這些元件係用於高電流用途電路的製造。 發明背景 爲了能夠製造競爭的DC/DC模組與/或者是其他如供遠程 通信之有效率與省空間的元件,尋找具有低電阻導體之稠 密的電路板製造技術是重要的。這通常藉由陶宪基材上所 謂的厚膜技術來達成。爲了進一步節省空間並減少花費, 通常希望而且需要將印刷的電阻器併入電路板圖案中。對 此之一個要求是,印刷元件中之材料相容於電路製造過程。 以上提及之電路製造的已知技術,不是包含高電流容量 卻無印刷電阻器的導體,就是與印刷電阻器結合,但具有 低至中等電流容量的導體。最一般具有高電流容量電路的 技術,亦即宰陶瓷上有厚的銅膜,係指:_ •直接結合的銅(DBC) •銅衣 •高溫厚膜的銅 •厚膜上的鍍銅(PCTF) _ 大部分以上所提到的技術(除了厚膜上的鍍銅(PCTF)以夕卜) ,爲了將銅黏附到陶瓷基材上,#其包含高溫下的熱處理, 而迄今使其使用厚銅的導體與印刷電阻器與交越的結合是 困難或不可能的。 以上所提及之厚膜上的鍍銅(PCTF)過程引起特別的關注 -4- 本紙張尺度適用中國國家標準(CNS) A4規格(210 X 297公釐) 593778 A7 B7 五、發明説明(2 ’尤其是在-現存美國專利5298687中所敘述的變體。在所 提及疋專利中的過程,並不包含任何陶資的熱處理,但的 確要求額外的步驟以施加短路的導體,即所謂的鍵接,而 它是很難移除的。爲了利用陶資基材的電鍍,此一電路的 短路是需要的。 短路鏈接需要空間,反而導致陶资基材上封裝密度的減 卜亦即每個基材較少的電路。額外的問題是在鏈接移除 後,銀接觸便暴露出來,而且當暴紊於濕氣與電壓下時, 銀可能開始徙動’而使陶资基材'上的電路短路。因此,要 求額外含有鎳與/或金的電鍍步驟,以掩護暴露的銀接觸。 發明概要 ,上提到的問題,爲了高電流用途,而有股強勁的 力量,以取得一種f周密電路板製造的方法,^匕一方法允畔 厚的銅導ff與印刷電阻器與/或其他印刷元件結合在一起/ 本發明係關於一種在陶瓷基材上厚膜的銅電鍍方法,其 使結合厚的銅導體肖印刷電阻$、交越與其他元件成爲可 月匕而這些元件係爲了製造高電流用途的電路。 此外,本發明意指並非如銅衣技術中,燒結最後的銅圖 案,以取得其對陶资基材之氣好黏附,而兔藉由陶走基材 上銀之種子層來印刷電路圖案而其上之自動催化的銅則 具有良好的黏附。 並非如提及之厚膜上的鍍銅(PCTF)技術,印刷暫時之短 路銀鏈接,而是電路圖案可以用一薄層自動催化的銅,來 覆蓋基材的整個表面。 本紙張尺度適财g @家標準(CNS) A#規格(21()><297公著) 裝 訂 -5- B7 B7593778 A7 B7 'V. Description of the invention (1) The technical invention The present invention relates to a method for electroplating a thick copper film on a ceramic substrate, which combines a thick copper conductor with a printed resistor, a crossover, and other components. Possibly, and these components are used in the manufacture of high current applications circuits. BACKGROUND OF THE INVENTION In order to be able to manufacture competing DC / DC modules and / or other efficient and space-saving components such as for remote communication, it is important to find a dense circuit board manufacturing technology with low resistance conductors. This is usually achieved by the so-called thick film technology on the Taoxian substrate. To further save space and reduce costs, it is often desirable and necessary to incorporate printed resistors into circuit board patterns. One requirement is that the materials in the printed components are compatible with the circuit manufacturing process. The known techniques of circuit manufacturing mentioned above are either conductors with high current capacity without printed resistors, or conductors combined with printed resistors but with low to medium current capacity. The most common technology with a high current capacity circuit, that is, a thick copper film on the ceramic, refers to: _ • Directly bonded copper (DBC) • Copper clothing • High temperature thick film copper • Copper plating on thick film ( PCTF) _ Most of the above-mentioned technologies (except for copper plating on thick film (PCTF)), in order to adhere copper to ceramic substrates, which includes heat treatment at high temperatures, has been used so far It is difficult or impossible to combine thick copper conductors with printed resistors and crossovers. The copper-plating (PCTF) process on the thick film mentioned above has attracted special attention. -4- This paper size applies to China National Standard (CNS) A4 specifications (210 X 297 mm) 593778 A7 B7 V. Description of the invention (2 'Especially the variant described in the existing US patent 5298687. The process in the mentioned puppet patent does not include any heat treatment of ceramic materials, but does require additional steps to apply a short-circuited conductor, the so-called It is difficult to remove the connection. In order to use the electroplating of ceramic substrates, a short circuit of this circuit is needed. The short-circuit link requires space, which leads to the reduction of the packaging density on ceramic substrates. Circuit with fewer substrates. The additional problem is that after the link is removed, the silver contact is exposed, and when exposed to moisture and voltage, silver may begin to migrate 'and cause the ceramic substrate' to The circuit is short-circuited. Therefore, an additional electroplating step containing nickel and / or gold is required to cover the exposed silver contact. SUMMARY OF THE INVENTION The problem mentioned above, for high current applications, has a strong force to obtain an f Thoughtful circuit A method for manufacturing a plate, a method for allowing thick copper conductors to be combined with printed resistors and / or other printed elements. The present invention relates to a method for copper plating with a thick film on a ceramic substrate. Thick copper conductors are printed with resistors, crossovers, and other components that can be used for making high-current applications. In addition, the present invention means that the final copper pattern is not sintered as in copper coating technology to Obtain its good adhesion to the ceramic substrate, and the rabbit prints the circuit pattern by removing the silver seed layer on the substrate, and the autocatalytic copper on it has a good adhesion. Not as thick film as mentioned Copper plating (PCTF) technology is used to print short-term silver links, but the circuit pattern can be covered with a thin layer of autocatalyzed copper to cover the entire surface of the substrate. This paper is suitable for financial standards @ 家 标准 (CNS) A # Specifications (21 () > < 297) Binding-5- B7 B7
五、發明説明(3 ) 、陶瓷基材上不進-步電鍍銅的區域,隨後覆蓋所謂的電 鍍保護層。後續的電鍍在剩下的區域構成銅的厚度。兒 既然在最後銅電鍍之前,對電路的連接,不需要暫時的 短路連接或是基材上所謂的匯流條,本發明的一個優點3 它是節省空間的。 & 另-個優點是,既然不需考慮電流進人鏈接系統,本發 明允許每個陶瓷基材上大量的電路,因而使較稠密之電路 板的製造成爲可能。 一 進一步的優點是,既然沒有電·鏡保護層邊緣連接兩個導 體,其消除了不必要之銅絕緣失敗所引起之短路的冒險。 最後,既然自動催化銅的電導是至少十倍優於如厚膜上 之鍍銅(PCTF)的鏈接系統,因而取得更均勻的銅電鍍。 用本發明,導體達到類似銅衣技術中導體的導體品質, 且仍保持包含標準厚膜電阻器與交越的可能性。 下文參考延伸圖式,將更詳細地敘述本發明。-圖式之簡單説明: 圖1説明一基材之剖面圖,此一基材具有印刷之銀導體與 若干印刷元件。 圖2説明與圖1相同之基材的剖面圖,其具有自動催化銅 的施加層。 圖3説明與圖2相同之基材的剖i圖,其具有施加所謂的 電鍍保護層,以及後續無保護區域的銅電鍍。 圖4説明與圖3相同,在移除電鍍保護層後之基材的剖面 圖。 -6- 本紙張尺度適用中國國家標準(CNS) A4規格(210X297公釐) 593778 A7 B75. Description of the invention (3), the area on the ceramic substrate where no further copper plating is performed, and then covered with a so-called plating protection layer. Subsequent plating forms the thickness of copper in the remaining areas. Since the circuit is connected before the final copper plating, there is no need for a temporary short-circuit connection or a so-called bus bar on the substrate. An advantage 3 of the present invention is that it saves space. & Another advantage is that since it is not necessary to consider the current into the link system, the present invention allows a large number of circuits on each ceramic substrate, thus making it possible to manufacture denser circuit boards. A further advantage is that, since there are no two conductors connected to the edge of the electro-mirror protective layer, it eliminates the risk of short circuit caused by unnecessary copper insulation failure. Finally, since the autocatalytic copper conductance is at least ten times better than that of a linked system such as copper plating on thick films (PCTF), a more uniform copper plating is achieved. With the present invention, the conductor achieves a conductor quality similar to that of copper-coated technology, while still maintaining the possibility of including standard thick film resistors and crossovers. Hereinafter, the present invention will be described in more detail with reference to the extended drawings. -Brief description of the drawings: Figure 1 illustrates a cross-sectional view of a substrate having a printed silver conductor and a number of printing elements. Fig. 2 illustrates a cross-sectional view of the same substrate as Fig. 1 with an autocatalytic copper application layer. Fig. 3 illustrates a cross-sectional view of the same substrate as in Fig. 2 with the application of a so-called plating protection layer and subsequent copper plating of an unprotected area. Fig. 4 illustrates a cross-sectional view of the substrate after removing the plating protection layer, as in Fig. 3. -6- This paper size applies to China National Standard (CNS) A4 (210X297 mm) 593778 A7 B7
五、發明説明( 圖5説明與圖4相同之基材,在移啥乘丨 夕咏刹餘自動催化銅後, 導致根據本發明所製造之電路板。 本發明較佳具體實施例説明 根據以下敘述之方法’圖^概要説明那些根據本發明所 包含之陶资基材上電路板製造的過程步驟,其中此一電路 板具有厚的導體。 % 此一方法藉由在陶瓷基材丨上,印刷所謂銀種子声2的電 路圖案來引進。其部分是爲了取得陶資表面在後績之 陶免電鏡期間的良好黏附,部分是爲了構成實際的導體圖 案。 此一過程不限於只包含銀爲種子層,而是可包含任何其 他對陶资基材具有良好黏附的材料,而於同時可以將銅黏 附於基材的表面。 也如圖1所説明的,在此一第一個步驟中的陶瓷基材,可 以施加其他印刷元件3、4、5、6,如電阻器·。 在對陶瓷基材施加銀的種子層2後,爲了在導體圖案與基 材剩下的自由表面上,覆蓋陰極丨微米厚的自動催化銅層7 ,而降低基材,進入化學浴_段預定的時間。這是爲了促 進後來的電路圖案的短路而實施的,因此爲了後續電解電 鍍進一步構成的銅導體厚度,而準備陶瓷基材。 在下一個過私步驟中,施加所薄的電鍍保護層8到自動催 化銅在基材1上的區域,此一區域並不提供厚的銅導體,亦 即爲基材的自由表面。此一電鍍保護層可由一聚合體材料 組成,如環氧基樹脂或某些其他材料,這些材料在使銅電 -7 - 本紙張尺度適用中國國家標準(CNS)A4規格(210X297公釐)---V. Description of the invention (FIG. 5 illustrates the same substrate as that in FIG. 4. After the auto-catalytic copper is removed, the circuit board is manufactured according to the present invention. The description of the preferred embodiment of the present invention is based on the following. The described method 'Figure ^ outlines the process steps for manufacturing a circuit board on a ceramic substrate according to the present invention, where the circuit board has a thick conductor.% This method is performed on a ceramic substrate, The circuit pattern of the so-called silver seed sound 2 is printed to be introduced. Part of it is to obtain the good adhesion of the ceramic surface during the later period of ceramic-free electron microscopy, and part of it is to form the actual conductor pattern. This process is not limited to only containing silver. The seed layer, instead, can include any other material that has a good adhesion to the ceramic substrate, and at the same time, copper can be adhered to the surface of the substrate. As also illustrated in Figure 1, in this first step, For ceramic substrates, other printed elements 3, 4, 5, and 6 can be applied, such as resistors. After applying the silver seed layer 2 to the ceramic substrate, in order to leave the conductor pattern and the free surface of the substrate In order to cover the cathode, a micron-thick autocatalytic copper layer 7 is lowered, and the substrate is lowered into the chemical bath for a predetermined time. This is implemented to promote the short circuit of the subsequent circuit pattern, so it is further formed for subsequent electrolytic plating The thickness of the copper conductor is used to prepare a ceramic substrate. In the next over-private step, the thin plated protective layer 8 is applied to the area of the substrate 1 which is automatically catalyzed by copper, which does not provide a thick copper conductor, that is, It is the free surface of the substrate. This electroplated protective layer can be composed of a polymer material, such as epoxy resin or some other materials, which are used to make copper electric-7-This paper size applies to Chinese National Standard (CNS) A4 Specifications (210X297 mm) ---
Claims (1)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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SE0101868A SE0101868L (en) | 2001-05-28 | 2001-05-28 | Method of applying copper to substrate |
Publications (1)
Publication Number | Publication Date |
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TW593778B true TW593778B (en) | 2004-06-21 |
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ID=20284260
Family Applications (1)
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TW90121609A TW593778B (en) | 2001-05-28 | 2001-08-31 | A method for applying copper on substrates |
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SE (1) | SE0101868L (en) |
TW (1) | TW593778B (en) |
WO (1) | WO2002098193A1 (en) |
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CN111213437A (en) * | 2017-10-16 | 2020-05-29 | 住友电气工业株式会社 | Substrate for printed wiring board and printed wiring board |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
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KR20100013033A (en) * | 2008-07-30 | 2010-02-09 | 삼성전자주식회사 | Conductive ink/paste printed circuit board having plating layer and method for manufacturing the same |
KR101520412B1 (en) * | 2013-02-28 | 2015-05-15 | 하이쎌(주) | Flexible printed circuit board by laser processing and printing process, and method for manufacturing the same |
JP7238712B2 (en) * | 2019-09-18 | 2023-03-14 | トヨタ自動車株式会社 | Wiring board manufacturing method and wiring board |
JP7306337B2 (en) * | 2020-06-25 | 2023-07-11 | トヨタ自動車株式会社 | Wiring board manufacturing method |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5298687A (en) * | 1990-12-27 | 1994-03-29 | Remtec, Inc. | High-density multilayer interconnection system on a ceramic substrate for high current applications and method of manufacture |
US5681441A (en) * | 1992-12-22 | 1997-10-28 | Elf Technologies, Inc. | Method for electroplating a substrate containing an electroplateable pattern |
US5733466A (en) * | 1996-02-06 | 1998-03-31 | International Business Machines Corporation | Electrolytic method of depositing gold connectors on a printed circuit board |
-
2001
- 2001-05-28 SE SE0101868A patent/SE0101868L/en not_active Application Discontinuation
- 2001-08-31 TW TW90121609A patent/TW593778B/en not_active IP Right Cessation
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2002
- 2002-05-27 WO PCT/SE2002/001014 patent/WO2002098193A1/en not_active Application Discontinuation
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN111213437A (en) * | 2017-10-16 | 2020-05-29 | 住友电气工业株式会社 | Substrate for printed wiring board and printed wiring board |
Also Published As
Publication number | Publication date |
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WO2002098193A1 (en) | 2002-12-05 |
SE0101868D0 (en) | 2001-05-28 |
SE0101868L (en) | 2002-11-29 |
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