WO2001063655A1 - Dispositif de polissage chimiomecanique, dispositif formant un cablage damasquine et procede de formation d'un cablage damasquine - Google Patents
Dispositif de polissage chimiomecanique, dispositif formant un cablage damasquine et procede de formation d'un cablage damasquine Download PDFInfo
- Publication number
- WO2001063655A1 WO2001063655A1 PCT/JP2001/001414 JP0101414W WO0163655A1 WO 2001063655 A1 WO2001063655 A1 WO 2001063655A1 JP 0101414 W JP0101414 W JP 0101414W WO 0163655 A1 WO0163655 A1 WO 0163655A1
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- WIPO (PCT)
- Prior art keywords
- polishing
- platen
- polishing pad
- holding
- semiconductor substrate
- Prior art date
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- 238000005498 polishing Methods 0.000 title claims abstract description 225
- 238000000034 method Methods 0.000 title claims description 32
- 239000000758 substrate Substances 0.000 claims description 55
- 239000002184 metal Substances 0.000 claims description 42
- 239000004065 semiconductor Substances 0.000 claims description 32
- 230000004888 barrier function Effects 0.000 claims description 21
- 239000000126 substance Substances 0.000 claims description 11
- 239000000463 material Substances 0.000 abstract description 11
- 238000007517 polishing process Methods 0.000 abstract description 5
- 230000015572 biosynthetic process Effects 0.000 abstract 1
- 235000012431 wafers Nutrition 0.000 description 81
- 238000011156 evaluation Methods 0.000 description 10
- 238000002474 experimental method Methods 0.000 description 10
- 239000002002 slurry Substances 0.000 description 9
- 239000007779 soft material Substances 0.000 description 6
- 230000008901 benefit Effects 0.000 description 3
- 230000008569 process Effects 0.000 description 3
- 239000000853 adhesive Substances 0.000 description 2
- 230000001070 adhesive effect Effects 0.000 description 2
- 230000008859 change Effects 0.000 description 2
- 235000012489 doughnuts Nutrition 0.000 description 2
- 238000005259 measurement Methods 0.000 description 2
- 238000012856 packing Methods 0.000 description 2
- 230000002093 peripheral effect Effects 0.000 description 2
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000000052 comparative effect Effects 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000010297 mechanical methods and process Methods 0.000 description 1
- 238000001465 metallisation Methods 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 238000011077 uniformity evaluation Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B24—GRINDING; POLISHING
- B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
- B24B37/00—Lapping machines or devices; Accessories
- B24B37/11—Lapping tools
- B24B37/20—Lapping pads for working plane surfaces
- B24B37/26—Lapping pads for working plane surfaces characterised by the shape of the lapping pad surface, e.g. grooved
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B24—GRINDING; POLISHING
- B24D—TOOLS FOR GRINDING, BUFFING OR SHARPENING
- B24D9/00—Wheels or drums supporting in exchangeable arrangement a layer of flexible abrasive material, e.g. sandpaper
- B24D9/08—Circular back-plates for carrying flexible material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/32115—Planarisation
- H01L21/3212—Planarisation by chemical mechanical polishing [CMP]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/7684—Smoothing; Planarisation
Definitions
- the present invention relates to a polishing apparatus and a polishing method for polishing a metal film surface formed on a semiconductor substrate by a chemical mechanical method.
- a CMP (chemical mechanical polishing) device is mainly used as a device for flattening a wafer.
- a polishing slurry is supplied to a wafer to be polished while a polishing pad is brought into contact with the wafer to polish a metal film or the like on the wafer.
- the polishing pad in order to selectively polish (improve flatness) the protrusions of the insulating film or metal film on the wafer, it is necessary to suppress the deformation of the polishing pad surface, and the polishing pad has a high hardness. Is required.
- the polishing pad in order to perform uniform polishing over the entire semiconductor wafer (improve uniformity), the polishing pad is required to have enough flexibility to follow the warped shape of the wafer. Therefore, when selecting a polishing pad, there is a trade-off between flatness and uniformity, and it is difficult to ensure both polishing uniformity and flatness.
- a two-layer polishing pad is used in which a hard material is placed in the upper layer in contact with the wafer to be polished and a soft material is placed in the lower layer.
- the method of holding (fixing) the wafer is considered.
- a wafer is held using a vacuum chuck (vacuum suction) or a backing film (backing pad).
- vacuum suction vacuum suction
- backing film backing film
- the advantages of using a vacuum chuck are that the wafer can be easily exchanged (removed); that the wafer is securely and firmly held; and that the wafer can be prevented from warping.
- the disadvantage is that even with the two-layer polishing pad described above, the wafer thickness Cannot be sufficiently absorbed, and polishing uniformity is deteriorated.
- Examples of a polishing apparatus using a backing pad as a wafer holding means and a polishing pad having the above-described two-layer structure include, for example, JP-A-10-138123 and JP-A-9-1321001. And JP-A-9-1260318, JP-A-7-266219, and JP-A-7-297195.
- the present invention has been made in view of the above situation, and sufficiently improves both the flatness and uniformity of polishing even when using a vacuum chuck which is excellent in ease of wafer attachment / detachment and wafer holding reliability. It is a first object to provide a chemical mechanical polishing apparatus capable of performing the polishing.
- a second object of the present invention is to provide an apparatus and a method for forming a damascene wiring capable of forming a highly accurate damascene wiring by using a polishing apparatus that achieves excellent flatness and uniformity.
- a chemical mechanical polishing apparatus includes: a substrate holding table for holding a semiconductor substrate by vacuum suction; a polishing pad for contacting a semiconductor substrate; a platen for holding a polishing pad. Applied to an apparatus including a polishing pad and an elastic member disposed between the platen.
- the characteristic feature is that the elastic member is made of a material with a hardness of 10 to 40 and a thickness of 5 to 30 mm as specified by JIS K6301 (Type A). .
- the damascene wiring forming apparatus forms an insulating film on a semiconductor substrate, forms a concave portion in a predetermined region of the insulating film, and forms a barrier metal film on a surface of the insulating film including the 00 part.
- the present invention is applied to a damascene wiring forming apparatus in which a metal wiring film is formed on a barrier metal film so that a concave portion is completely filled, and then the metal film and the polymetal film are polished until an insulating film is exposed in a region other than the concave portion.
- the first polishing means includes: a substrate holder for holding the semiconductor substrate by vacuum suction; a polishing pad in contact with the semiconductor substrate; a platen for holding the polishing pad; JIS K6301 (A The mold has a hardness of 10 to 40, a thickness of 5 to 3 Omm, and an elastic member disposed between the polishing pad and the platen.
- the second polishing means includes: a substrate holding table for holding the semiconductor substrate by vacuum suction; a polishing pad for contacting the semiconductor substrate; a platen for holding the polishing pad; JIS K631 (A The hardness specified by the mold is 50 or more, and an elastic member is provided between the polishing pad and the platen.
- a method for forming a damascene wiring an insulating film is formed on a semiconductor substrate, a concave portion is formed in a predetermined region of the insulating film, and a barrier metal film is formed on the surface of the insulating film including the concave portion.
- the method is applied to a damascene wiring forming method in which the metal film and the barrier metal film are polished until the insulating film is exposed in a region other than the concave portion.
- the features are: a first polishing step of polishing the metal wiring film using the first polishing means until the barrier metal film is exposed in a region other than the concave portion; And a second polishing step of polishing the barrier metal film until the insulating film is exposed in the region.
- the first polishing means includes: a substrate holding table for holding the semiconductor substrate by vacuum suction; a polishing pad in contact with the semiconductor substrate; a platen for holding the polishing pad; JIS standard K6301 (type A ) The hardness specified in is 10 to 40, the thickness is 5 to 3 Omm, and the bullets arranged between the polishing pad and the platen And a sex member.
- the second polishing means includes: a substrate holding table for holding the semiconductor substrate by vacuum suction; a polishing pad in contact with the semiconductor substrate; a platen for holding the polishing pad; JIS standard K6301 (type A ) Has a hardness of 50 or more, and has an elastic member disposed between the polishing pad and the platen.
- the first polishing means and the second polishing means are realized by a single chemical mechanical polishing apparatus.
- the polishing apparatus includes: a substrate holder for holding the semiconductor substrate by vacuum suction; first and second platens arranged at positions facing the substrate holder during a polishing operation; A first polishing pad disposed on a second platen; and a second polishing pad disposed on a second platen; disposed between the first platen and the first polishing pad; Between a first elastic member having a hardness of 10 to 40 and a thickness of 5 to 3 O mm as defined by 6301 (A type); and between a second platen and a second polishing pad. And a second elastic member having a hardness of 50 or more specified by JIS K6301 (A type).
- the substrate holding table is arranged at a position facing the first platen, and when performing the second polishing step, the substrate holding table is set to the second platen. Is arranged at a position facing the platen.
- FIG. 1 is a side view (partial cross section) showing a configuration of a CMP device according to the present invention, in which a polishing pad is fixed by a stretching method.
- FIG. 2 is a cross-sectional view showing a configuration of a main part (a polishing pad and a wafer) of the CMP device according to the present invention.
- FIG. 3A to 3C are cross-sectional views illustrating steps of a damascene wiring forming method according to the present invention, in which FIG. 3A shows a state before polishing, FIG. 3B shows a state after the first polishing step, and FIG. Shows the state after the second polishing step.
- FIG. 4 is an explanatory view showing measurement points of wafer in-plane uniformity (polishing uniformity) according to the embodiment of the present invention.
- FIG. 5 is a plan view showing the configuration (platen and wafer holder) of the main part of the polishing apparatus of the present invention.
- FIG. 6 is a side view of the device shown in FIG. 5, partially shown in section.
- FIG. 7 is a plan view showing a configuration (a platen and a wafer holding table) of a main part of another type of polishing apparatus of the present invention.
- the present invention is basically applied to a case of polishing a metal wiring layer having a narrow recess (less than 200 ⁇ ) in a CMP device of a type in which a wafer is fixed by a vacuum chuck.
- FIG. 1 shows a configuration of a CMP device according to a first embodiment of the present invention.
- This CMP device was disposed between a polishing pad 12 to be in contact with a wafer 10 to be polished, a platen 14 to which the polishing pad 12 was attached, and a polishing pad 12 and a platen 14.
- the greatest feature of the present invention lies in the setting of the hardness and thickness of the elastic member 16. The specific set values of the elastic member 16 will be described later in detail.
- the elastic member 16 is formed in a ring shape (a donut shape) having a hole in the center, and is fixed to the platen 14 by a double-sided tape or the like.
- the elastic member 16 is set so that air does not enter between the elastic member 16 and the platen 14. Usually, when the elastic member 16 is set on the platen 14, it is not frequently replaced.
- the polishing pad 12 is also formed into a ring shape (donut shape); it is fixed to the bottom surface of the platen 14 by an inner ring 24, an outer ring 26, and bolts 28, 30.
- the wafer stage 20 is rotatably mounted on the wafer turntable 22.
- the retainer 18 is fixed on the wafer stage 20, and the wafer 10 is fixed on the wafer stage 20 by a vacuum chuck.
- the platen 14, the wafer turntable 22, and the wafer stage 20 rotate around axes ⁇ - ⁇ , ⁇ , B-, C-C, respectively.
- a slurry supply hole 32 extending in the vertical direction is provided at the center of the platen 14, and a predetermined slurry is supplied from the slurry supply hole 32 during the polishing operation.
- the polishing pad 12 is fixed to the platen 14 by a so-called stretching method.
- the method for fixing the polishing pad is not limited to the stretching method, and various methods such as an adhesive method (FIG. 2) can be adopted.
- the wafer 10 is fixed on the wafer stage 20 by a vacuum chuck, and the platen 14, the wafer turntable 22 and the wafer stage 20 are each driven to rotate. Thereafter, the platen 14 is lowered while the slurry is supplied from the slurry supply hole 32, and the polishing pad 12 is pressed against the surface to be polished of the wafer 10 at a predetermined pressure to perform polishing.
- FIG. 2 shows an example in which a polishing pad is bonded and fixed to a platen.
- the elastic member 38 is bonded and fixed on the platen 36, and the polishing pad 40 is bonded and fixed on the elastic member 38.
- Wafer 10 is fixed to the bottom surface of wafer holder 42 by vacuum suction.
- a plurality of holes 44 for drawing a vacuum are formed inside the wafer holder 42.
- the elastic members 16 and 38 according to the present invention have a hardness specified by JIS K6301 (type A) of 10 to 40 and a thickness of 5 to 30 mm. I have. The grounds (experimental data) are described below.
- the polishing pad may have a hardness of 90 or more and a thickness of 0.5 to 2 mm as specified by JIS standard K6301 (A type). In the experiments described below, IC 100 (Rodell, USA) having a hardness of 95 and a thickness of about 1'0.3 mm was used.
- the polishing rate was set such that the value when the entire flat film (solid film) of Cu was polished at a pressure of 300 gZcm 2 was 600 OK / min.
- polishing one step was performed until the above-described oxide film 46 on the pattern surface was exposed, and the amount of reduction in wiring thickness (dicing) in the wiring portions having various widths was measured.
- Table 1 shows the experimental results.
- the hardness is a value specified in JIS K6301 (A type), and the unit of dishing amount is A.
- IC100400 means IC1000 / 400 made by US Dale Corporation.
- IC 100 hardness 95, JIS-K6301 compliant
- the lower soft material is used.
- SUB A400 hardness 55-66, JI SK 6301 compliant
- the polishing uniformity within the wafer surface was measured by setting the hardness of the elastic member 16 or 38 between 5 and 90 as specified in the JIS K6301 (A type). As shown by the X mark in Fig. 4, the uniformity " ⁇ " was measured by measuring the film thickness Xi at 25 points on two straight lines passing through the center of the wafer 53, and based on the following formula. Was done.
- the thickness of the elastic member 16 or 38 is 5 mm or more and 30 mm or less, good uniformity is obtained.
- the hardness of the elastic member 16 or 38 is 10 to 40 13 standard 1 ⁇ 6 301 A type) and the thickness is 5 mm. At ⁇ 30 mm, good flatness and uniformity are obtained.
- the damascene wiring layer is polished in two steps. That is, polishing is performed in the first step until the Ta film 48 is exposed, and polishing is performed in the second step until the oxygen film 46 is exposed.
- Table 5 shows the evaluation of the flatness when the damascene wiring layer is polished in two steps (experimental).
- the first polishing step elastic members 16 or 38 having hardness of 10 and 20 and a thickness of 10 mm were used, and the other conditions were the same as those of the above-described embodiment (the polishing was performed in one step).
- Example) In the second polishing process, IC 1000/400 manufactured by Uchiguchi Dale Co., Ltd. was used as the polishing pad. (Slurry lower than the process slurry) was used.
- Michiru Dale uses IC 1000 (hardness 95, JIS-K6301 compliant) as the upper hard material (equivalent to a polishing pad), and the lower soft material (for soft materials). It means that SUBA400 (hardness 55-66, JIS-K6301 compliant) is used.
- the flatness is improved by polishing in two steps (the first polishing step + the second polishing step), as compared with the case where the oxide film is polished in one step.
- the flatness is improved by selectively using the first polishing step and the second polishing step.
- Figs. 5 and 6 show the main components of the CMP device (platen and wafer holding member) used to polish the damascene wiring layer in two steps (first polishing step + second polishing step). ).
- Fig. 5 is a plan view
- Fig. 6 is a side view (partial cross section).
- two different platens 54, 56 are used when polishing damascene wiring.
- the first platen 54 holds the first polishing pad 62.
- a first elastic member 58 is disposed between the first platen 54 and the polishing pad 62.
- the second platen 56 holds the second polishing pad 64.
- a second elastic member 60 is disposed between the second platen 56 and the polishing pad 64.
- a polishing pad having a two-layer structure such as IC1000 / 400 manufactured by U.S.A.
- the upper layer made of a hard material that comes into contact is called a “polishing pad”, and the lower layer made of a soft material located between the upper layer and a platen is called an “elastic member”.
- the first polishing node 62 and the second polishing pad 64 both have a hardness of 90 or more and a thickness of 0 specified by JIS K631 (A type). . 5 mn! ⁇ 2 mm can be used.
- As the polishing pads 62 and 64 IC1000 manufactured by Rodell, USA can be used.
- the wafer holding table 66 can be moved by the robot arm 70 to a position facing the first platen 54 and a position facing the second platen 56.
- the first platen 54 is used in the first polishing step (polishing until the barrier metal 48 is exposed), and the first elastic member 58 is a JIS standard K6301 (A type). Use a material with a hardness of 10 to 40 and a thickness of 5 to 30 mm specified in).
- the second platen 56 is used in the second polishing step (polishing until the oxide film 46 is exposed), and as the second elastic member 60, the JIS standard K630 is used.
- the wafer holding table 66 is moved by the operation of the robot arm 70 to the first platen 5. Then, the Cu film 52 and the Cu seed film 50 are polished until the Ta film 48 is exposed, as shown in FIG. 3B (first polishing step). . Next, the operation of the robot arm 70 places the wafer holder 66 at a position (directly above) the second platen 54, and exposes the thermal oxide film pattern 46 as shown in FIG. 3C. The Ta film 48 is polished until (the second polishing step).
- Figure 7 shows another example of a CMP device used to polish a damascene wiring layer ( Figures 3A-3C) in two steps (first polishing step + second polishing step) (platen and ⁇ ). (A wafer holding member).
- first platen 7 2 used in the first polishing step and two 'second platens 7 4, 7 6 used in the second polishing step are used.
- the first platen 72 holds the first polishing pad 62 so that two wafers can be simultaneously polished.
- a first elastic member 58 is disposed between the first platen 72 and the polishing pad 62.
- the second platens 74, 76 each hold a second polishing pad 64.
- a second flexible member 60 is disposed between the second platens 74 and 76 and the polishing pad 64.
- two second platens 74 and 76 are provided with wafer holders 82 and 84 respectively corresponding to the second platens 74 and 76, and the wafers are held by vacuum suction. ing.
- the wafer holding table 82 can be moved by the robot arm 78 to a position facing the first platen 72 and a position facing the second platen 74.
- the wafer holding table 84 can be moved by the robot arm 80 to a position facing the first platen 72 and a position facing the second platen 76.
- the first platen 72 is used in the first polishing step (polishing until the barrier metal is exposed), and has a structure as shown in FIG.
- the first elastic member 38 is interposed between the polishing pad 40 and the platen 36.
- the elastic member a member having a hardness of 10 to 40 and a thickness of 5 to 3 Omm specified by J13 standard 116301 (A type) is used.
- the second platen 74 is used in the second polishing step (polishing until the oxide film is exposed), and as the second elastic member, the J13 standard 1 ⁇ 630 1 '(A Use a material having a hardness specified in (Type) of 50 or more.
- the wafer holding tables 82 and 84 are moved by the operation of the robot arms 78 and 80 so as to face the first platen 72.
- the Cu film 52 and the Cu seed film 50 are polished until the Ta film 48 is exposed as shown in FIG. 3B (first polishing step).
- the wafer holders 82, 84 are arranged at positions (directly above) the second platens 74, 76 by the operation of the robot arms 78, 80, and the thermal oxide film pattern 46 is formed as shown in FIG. 3C.
- the Ta film 48 is polished until it is exposed (second polishing step).
- first polishing step + second polishing step As a method of polishing the damascene wiring layer (FIGS. 3A to 3C) in two steps (first polishing step + second polishing step), in addition to the method shown in FIGS.
- first polishing step the wafer is suction-held by the first wafer holding table, and polishing is performed using a polishing pad attached to the corresponding first platen.
- the wafer is transferred from the first holding table to the second holding table by the robot arm, and the second polishing step is performed using the polishing pad attached to the second platen.
- Another method is to use separate CMP equipment for the first polishing process and the second polishing process. There is a method of providing. As still another method, a method using the same CMP device and the same platen for the first and second polishing steps can be considered. In this case, first, the first polishing step is performed on a predetermined number of wafers (eg, 100 wafers). After that, the second polishing step is performed by replacing the elastic member disposed under the polishing pad.
- a material having a hardness of 10 to 40 and a thickness of 5 to 3 O mm specified in JIS K6301 (A type) is used as the elastic member. Therefore, even if the wafer is held by vacuum suction, there is an effect that both the flatness and the uniformity of the wafer can be sufficiently improved. This has the advantage that a highly accurate damascene wiring can be formed.
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Mechanical Engineering (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
- Finish Polishing, Edge Sharpening, And Grinding By Specific Grinding Devices (AREA)
Description
Claims
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/204,707 US6749486B2 (en) | 2000-02-24 | 2001-02-26 | Chemical-mechanical polishing device, damascene wiring forming device, and damascene wiring forming method |
EP01906305A EP1274122A4 (en) | 2000-02-24 | 2001-02-26 | CHEMOMECHANICAL POLISHING DEVICE, DAMASCIN WIRING DEVICE AND METHOD FOR FORMING DAMASQUIN WIRING |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
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JP2000-47140 | 2000-02-24 | ||
JP2000047140A JP2001237205A (ja) | 2000-02-24 | 2000-02-24 | 化学機械的研磨装置、ダマシン配線形成装置及びダマシン配線形成方法 |
Publications (2)
Publication Number | Publication Date |
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WO2001063655A1 true WO2001063655A1 (fr) | 2001-08-30 |
WO2001063655A8 WO2001063655A8 (fr) | 2002-08-22 |
Family
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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PCT/JP2001/001414 WO2001063655A1 (fr) | 2000-02-24 | 2001-02-26 | Dispositif de polissage chimiomecanique, dispositif formant un cablage damasquine et procede de formation d'un cablage damasquine |
Country Status (5)
Country | Link |
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US (1) | US6749486B2 (ja) |
EP (1) | EP1274122A4 (ja) |
JP (1) | JP2001237205A (ja) |
KR (1) | KR100719862B1 (ja) |
WO (1) | WO2001063655A1 (ja) |
Cited By (1)
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WO2022197347A1 (en) * | 2021-03-17 | 2022-09-22 | Applied Materials, Inc. | Substrate polishing simultaneously over multiple mini platens |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
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JP4693024B2 (ja) * | 2002-04-26 | 2011-06-01 | 東洋ゴム工業株式会社 | 研磨材 |
KR100472959B1 (ko) * | 2002-07-16 | 2005-03-10 | 삼성전자주식회사 | 언로딩구조가 개선된 반도체 웨이퍼의 표면평탄화설비 |
US7485962B2 (en) * | 2002-12-10 | 2009-02-03 | Fujitsu Limited | Semiconductor device, wiring substrate forming method, and substrate processing apparatus |
US7659206B2 (en) * | 2005-01-18 | 2010-02-09 | Applied Materials, Inc. | Removal of silicon oxycarbide from substrates |
US7208325B2 (en) | 2005-01-18 | 2007-04-24 | Applied Materials, Inc. | Refreshing wafers having low-k dielectric materials |
CN102229101A (zh) * | 2011-06-28 | 2011-11-02 | 清华大学 | 化学机械抛光方法 |
KR102077153B1 (ko) * | 2013-06-21 | 2020-02-14 | 삼성전자주식회사 | 관통전극을 갖는 반도체 패키지 및 그 제조방법 |
JP7082748B2 (ja) * | 2017-09-11 | 2022-06-09 | 富士紡ホールディングス株式会社 | 研磨パッド固定具および研磨パッド |
CN113001898B (zh) * | 2021-02-27 | 2022-03-11 | 慈溪市皓锋模具科技有限公司 | 一种用于生产插头零配件的注塑模具的生产工艺 |
Citations (4)
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JPS6434525A (en) * | 1987-07-29 | 1989-02-06 | Toshiba Corp | Drawing method having edge punching stage |
JPH07266219A (ja) | 1994-03-25 | 1995-10-17 | Mitsubishi Materials Corp | ウェーハ研磨装置 |
JPH07297195A (ja) | 1994-04-27 | 1995-11-10 | Speedfam Co Ltd | 半導体装置の平坦化方法及び平坦化装置 |
JP3348272B2 (ja) | 1996-03-27 | 2002-11-20 | 富士通株式会社 | ウェハ研磨方法 |
US6074287A (en) | 1996-04-12 | 2000-06-13 | Nikon Corporation | Semiconductor wafer polishing apparatus |
JPH09321001A (ja) | 1996-05-31 | 1997-12-12 | Komatsu Electron Metals Co Ltd | 半導体ウェハの研磨方法 |
JP2738392B1 (ja) * | 1996-11-05 | 1998-04-08 | 日本電気株式会社 | 半導体装置の研磨装置及び研磨方法 |
JPH10156705A (ja) * | 1996-11-29 | 1998-06-16 | Sumitomo Metal Ind Ltd | 研磨装置および研磨方法 |
JP2842865B1 (ja) * | 1997-08-22 | 1999-01-06 | 九州日本電気株式会社 | 研磨装置 |
US6089960A (en) * | 1998-06-03 | 2000-07-18 | One Source Manufacturing | Semiconductor wafer polishing mechanism |
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2000
- 2000-02-24 JP JP2000047140A patent/JP2001237205A/ja active Pending
-
2001
- 2001-02-26 EP EP01906305A patent/EP1274122A4/en not_active Withdrawn
- 2001-02-26 US US10/204,707 patent/US6749486B2/en not_active Expired - Fee Related
- 2001-02-26 WO PCT/JP2001/001414 patent/WO2001063655A1/ja active Application Filing
- 2001-02-26 KR KR1020027010886A patent/KR100719862B1/ko not_active IP Right Cessation
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JPH07142432A (ja) * | 1991-11-29 | 1995-06-02 | Sony Corp | 半導体装置の製造方法 |
JPH1034525A (ja) * | 1996-07-17 | 1998-02-10 | Nikon Corp | Cmp用研磨装置 |
JPH1044026A (ja) * | 1996-07-31 | 1998-02-17 | Sumitomo Metal Ind Ltd | 研磨装置および研磨方法 |
JP2000246623A (ja) * | 1999-02-26 | 2000-09-12 | Sumitomo Metal Ind Ltd | 研磨装置 |
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WO2022197347A1 (en) * | 2021-03-17 | 2022-09-22 | Applied Materials, Inc. | Substrate polishing simultaneously over multiple mini platens |
Also Published As
Publication number | Publication date |
---|---|
KR100719862B1 (ko) | 2007-05-21 |
US20030166380A1 (en) | 2003-09-04 |
US6749486B2 (en) | 2004-06-15 |
EP1274122A4 (en) | 2004-06-23 |
KR20020084143A (ko) | 2002-11-04 |
EP1274122A1 (en) | 2003-01-08 |
WO2001063655A8 (fr) | 2002-08-22 |
JP2001237205A (ja) | 2001-08-31 |
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