WO2001026128A1 - Source d'electrons, procede de fabrication, et dispositif d'affichage - Google Patents

Source d'electrons, procede de fabrication, et dispositif d'affichage Download PDF

Info

Publication number
WO2001026128A1
WO2001026128A1 PCT/JP1999/005401 JP9905401W WO0126128A1 WO 2001026128 A1 WO2001026128 A1 WO 2001026128A1 JP 9905401 W JP9905401 W JP 9905401W WO 0126128 A1 WO0126128 A1 WO 0126128A1
Authority
WO
WIPO (PCT)
Prior art keywords
film
electrode
thin
electron source
thick
Prior art date
Application number
PCT/JP1999/005401
Other languages
English (en)
Japanese (ja)
Inventor
Masakazu Sagawa
Makoto Okai
Mutsumi Suzuki
Akitoshi Ishizaka
Toshiaki Kusunoki
Original Assignee
Hitachi, Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi, Ltd. filed Critical Hitachi, Ltd.
Priority to PCT/JP1999/005401 priority Critical patent/WO2001026128A1/fr
Priority to KR1020027003567A priority patent/KR20020030827A/ko
Publication of WO2001026128A1 publication Critical patent/WO2001026128A1/fr

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J1/00—Details of electrodes, of magnetic control means, of screens, or of the mounting or spacing thereof, common to two or more basic types of discharge tubes or lamps
    • H01J1/02—Main electrodes
    • H01J1/30—Cold cathodes, e.g. field-emissive cathode
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J1/00—Details of electrodes, of magnetic control means, of screens, or of the mounting or spacing thereof, common to two or more basic types of discharge tubes or lamps
    • H01J1/02—Main electrodes
    • H01J1/30—Cold cathodes, e.g. field-emissive cathode
    • H01J1/312—Cold cathodes, e.g. field-emissive cathode having an electric field perpendicular to the surface, e.g. tunnel-effect cathodes of metal-insulator-metal [MIM] type

Definitions

  • Electron source method of manufacturing electron source, and display device
  • the present invention relates to an electron source, a method of manufacturing the electron source, and a display device, and is particularly applied to a thin-film electron source having a three-layer structure of a lower electrode, an insulating layer, and an upper electrode and emitting electrons in a vacuum. And effective technology. Background art
  • FEDs field emission '' Displays
  • This FED is, for example, as described in Japanese Patent Application Laid-Open No. Hei 4-289644, after arranging an electron-emitting device for each pixel and accelerating the emitted electrons therefrom in a vacuum, The fluorescent material is irradiated, and the irradiated portion of the fluorescent material emits light.
  • Thin-film electron source matrix is known as an example of an electron source for FED o
  • a thin-film electron source is, for example, a device in which a voltage is applied between an upper electrode and a lower electrode in a three-layer thin film structure consisting of an upper electrode, an insulating layer and a lower electrode, and electrons are emitted from the surface of the upper electrode into vacuum. It is.
  • MIM Metal-Insulator-Metal
  • MIS metal-insulator-metal with metal-insulator-semiconductor electrode stacked
  • Insulator-semiconductor type a laminated film composed of a metal-insulator and a semiconductor, a metal, or a semiconductor electrode is known.
  • the MIM type thin film electron source is described in, for example, Japanese Patent Application Laid-Open No. 7-65710.
  • FIG. 24 is a diagram for explaining the operating principle of the thin-film electron source.
  • a driving voltage of Vd is applied between the upper electrode 13 and the lower electrode 11 from a driving voltage source to reduce the electric field in the tunnel insulating layer 12 to about 1 to 10 OMV / cm
  • the lower electrode 1 Electrons in the vicinity of the Fermi level in 1 pass through the barrier due to the tunnel phenomenon, and are injected into the conduction bands of the tunnel insulating layer 12 and the upper electrode 13 to become a hot electron.
  • a plurality of upper electrodes 13 and a plurality of lower electrodes 11 are provided, and the plurality of upper electrodes and the plurality of lower electrodes 11 are orthogonal to each other to form a thin-film electron source into a matrix.
  • an electron beam can be generated from any place, and can be used as an electron source of a display device.
  • the MIM thin-film electron source emits the hot electron, accelerated by the tunnel insulating layer 12, through the upper electrode 13 and into a vacuum.
  • the film thickness of the upper electrode 13 needs to be extremely thin, about several nm, in order to reduce scattering of the hot electron.
  • the sheet resistance of the upper electrode 13 is about 200 ⁇ / port, and the unit is
  • the wiring resistance per length can be as high as 7 kQ / cm.
  • the operating voltage of the thin-film electron emitter is 10 V and the current consumption is 1 mA, so the voltage drop due to the wiring resistance is 7 V / cm.
  • Such a large voltage drop is completely fatal when attempting to increase the size of the display screen of a display device using a thin-film electron source, and measures to prevent the voltage drop are indispensable.
  • the voltage drop can be compensated by the driving method, but it complicates the driving circuit and is not preferable in terms of the reliability of the ultra-thin wiring.
  • the power supply wiring (1) low resistance, (2) electric contact between the upper electrode 13 and the power supply wiring can be obtained, and (3) the upper electrode 13 does not break at the element step. (4) It is necessary to satisfy the four points that the formation of the power supply wiring does not affect the thin-film electron source device with the tunnel diode structure.
  • A1 alloy is conceivable as such a power supply wiring material.
  • Nd A1-neodymium (Nd; hereinafter, simply referred to as Nd) (2 atm%) alloy, which is also used as the lower electrode 11, is a low-resistance material having excellent heat resistance.
  • (2) and (3) have difficulty. That is, since a natural oxide film always intervenes on the surface of A1, contact resistance becomes a problem.
  • An object of the present invention is to reduce the resistance of a power supply bus electrode in an electron source and a method of manufacturing an electron source. Electrode of the electron source at the electron emission section It is an object of the present invention to provide a technology capable of preventing the disconnection of a step.
  • Another object of the present invention is to provide a technology that can prevent the occurrence of uneven brightness on a display screen by using the thin-film electron source in a display device. .
  • the present invention relates to an electron source comprising: a plurality of electron source elements; and a plurality of pass electrodes for applying a drive voltage to the electron source elements in a first direction among the plurality of electron source elements.
  • Each of the bus electrodes is electrically connected to an electrode of each of the electron source elements, and a thin film electrode having a thickness of 10 times or less the thickness of the electrode of the electron source element; It is characterized by comprising a thick-film electrode which is electrically connected to the electrode and has a larger thickness than the thin-film electrode.
  • the present invention has a structure in which a lower electrode, an insulating layer, and an upper electrode are laminated in this order, and when a positive voltage is applied to the upper electrode, electrons are emitted from the upper electrode surface.
  • a thin-film electron source comprising: a plurality of electron source elements to be emitted; and a plurality of bus electrodes for applying a drive voltage to an upper electrode of the electron source element in a first direction among the plurality of electron source elements.
  • Each of the bus electrodes includes a thin-film electrode electrically connected to the upper electrode, and a thick-film electrode provided on the thin-film electrode and having a larger thickness than the thin-film electrode. And features.
  • the present invention has a structure in which a lower electrode, an insulating layer, and an upper electrode are laminated in this order, and when a positive voltage is applied to the upper electrode, electrons are emitted from the upper electrode surface.
  • a thin-film electron source comprising: a plurality of electron source elements to be emitted; and a plurality of bus electrodes for applying a drive voltage to an upper electrode of the electron source element in a first direction among the plurality of electron source elements.
  • the bus electrodes each include a thin-film electrode provided integrally with the upper electrode, and a thick-film electrode provided on the thin-film electrode and having a larger thickness than the thin-film electrode. It is characterized by.
  • the present invention is characterized in that the thick film electrode is formed by using any one of electric plating, sputtering, vacuum evaporation, chemical vapor deposition, or printing.
  • the present invention is a display device using the thin-film electron source.
  • FIG. 1 is a diagram showing a structure of a thin-film electron source according to Embodiment 1 of the present invention.
  • FIG. 2 is a view for explaining a method of manufacturing a thin-film electron source according to Embodiment 1 of the present invention.
  • FIG. 1 is a diagram showing a structure of a thin-film electron source according to Embodiment 1 of the present invention.
  • FIG. 2 is a view for explaining a method of manufacturing a thin-film electron source according to Embodiment 1 of the present invention.
  • FIG. 1 is a diagram showing a structure of a thin-film electron source according to Embodiment 1 of the present invention.
  • FIG. 2 is a view for explaining a method of manufacturing a thin-film electron source according to Embodiment 1 of the present invention.
  • FIG. 3 is a diagram for explaining a method of manufacturing the thin-film electron source according to the first embodiment of the present invention.
  • FIG. 4 is a diagram for explaining a method of manufacturing the thin-film electron source according to the first embodiment of the present invention.
  • FIG. 5 is a diagram for explaining a method of manufacturing the thin-film electron source according to the first embodiment of the present invention.
  • FIG. 6 illustrates a method for manufacturing a thin-film electron source according to Embodiment 1 of the present invention.
  • FIG. 7 is a diagram for explaining a method of manufacturing the thin-film electron source according to the first embodiment of the present invention.
  • FIG. 8 is a diagram for explaining a method of manufacturing the thin-film electron source according to the first embodiment of the present invention.
  • FIG. 9 is a diagram for explaining a method of manufacturing the thin-film electron source according to the second embodiment of the present invention.
  • FIG. 10 is a diagram for explaining a method of manufacturing the thin-film electron source according to the second embodiment of the present invention.
  • FIG. 11 is a diagram for explaining a method of manufacturing a thin-film electron source according to Embodiment 2 of the present invention.
  • FIG. 12 is a view for explaining a method of manufacturing the thin-film electron source according to the third embodiment of the present invention.
  • FIG. 13 is a diagram for explaining a method of manufacturing the thin-film electron source according to the third embodiment of the present invention.
  • FIG. 14 is a diagram for explaining a method of manufacturing the thin-film electron source according to the third embodiment of the present invention.
  • FIG. 15 is a diagram for explaining a method of manufacturing the thin-film electron source according to the fourth embodiment of the present invention.
  • FIG. 16 is a view illustrating a method for manufacturing a thin-film electron source according to Embodiment 4 of the present invention.
  • FIG. 17 is a view for explaining a method of manufacturing the thin-film electron source according to the fourth embodiment of the present invention.
  • FIG. 18 is a view for explaining a method of manufacturing the thin-film electron source according to the fourth embodiment of the present invention.
  • FIG. 19 is a diagram showing a schematic configuration of a thin-film electron source array substrate of a display device according to Embodiment 5 of the present invention.
  • FIG. 20 is a diagram showing a schematic configuration of a fluorescent display panel of a display device according to Embodiment 5 of the present invention.
  • FIG. 21 is a cross-sectional view illustrating a schematic overall configuration of a display device according to Embodiment 5 of the present invention.
  • FIG. 22 is a schematic diagram showing a state where a drive circuit is connected to the display device according to the fifth embodiment of the present invention.
  • FIG. 23 is a timing chart showing an example of the waveform of the drive voltage output from each drive circuit shown in FIG.
  • FIG. 24 is a diagram showing the operating principle of the thin-film electron source. BEST MODE FOR CARRYING OUT THE INVENTION
  • FIG. 1 is a cross-sectional view showing a structure of one element of a thin-film electron source according to Embodiment 1 of the present invention.
  • the bus electrode serving as the power supply wiring has a bus electrode lower layer 15 electrically connected to the upper electrode 13, and a bus electrode upper layer lining the bus electrode lower layer 15. 16 and the upper layer 16 of the bus electrode is formed of a sputtering film.
  • FIG. 2A is a plan view
  • FIG. 2B is a cross-sectional view showing a cross-sectional structure taken along line AA ′ in FIG.
  • Figure (c) is a cross-sectional view showing the cross-sectional structure taken along the line BB of Figure (a).
  • an insulating substrate 10 made of glass or the like is prepared, and a metal film for a lower electrode is formed on the substrate 10.
  • A1 or A1 alloy is used as a material for the lower electrode.
  • an Al—Nd alloy in which Nd was doped at 2 atomic weight% was used.
  • the metal film was formed by, for example, sputtering, and the thickness was set to 300 nm.
  • a strip-shaped lower electrode 11 is formed by etching.
  • etching for example, wet etching using a mixed aqueous solution of phosphoric acid, acetic acid, and nitric acid was used.
  • a portion serving as an electron emitting portion on the lower electrode 11 is masked with a resist film 17, and a portion serving as an electron emitting portion on the lower electrode 11 is formed in a chemical conversion solution using the lower electrode 11 as an anode.
  • the other portions are selectively anodized thickly to form a protective insulating layer 14 as shown in FIG.
  • a protection insulating layer 14 having a thickness of about 13 nm is formed.
  • the resist film 17 is removed, and anodization is performed again in a chemical solution using the lower electrode 11 as an anode, and as shown in FIG. Next, a tunnel insulating film 12 is formed.
  • a tunnel insulating layer 12 having a thickness of about 10 nm is formed on the lower electrode 11.
  • a bus electrode film serving as a power supply line to the upper electrode 13 is formed by sputtering.
  • the bus electrode film a laminated film of a metal film to be the lower layer of the bus electrode (thin film electrode of the present invention) 15 and a metal film to be the upper layer of the bus electrode (thick film electrode of the present invention) 16 is used.
  • Tungsten (W) was used as a material for the lower layer of the bus electrode
  • an A1-Nd alloy was used as a material for the upper layer of the bus electrode.
  • the upper limit of the thickness of the metal film to be the bus electrode lower layer 15 is set so that the upper electrode 13 to be formed later is not disconnected by the step of the bus electrode lower layer 15. Set to 10 times the film thickness. More specifically, the thickness is reduced to about several nm to several hundred nm, and the metal film to be the upper layer 16 of the bus electrode is formed to be as thick as about several hundred nm in order to sufficiently supply power.
  • the lower limit of the thickness may be a thickness that functions as a conductor.
  • the thickness of the upper electrode 13 is preferably about 1/10.
  • the upper layer 16 of the bus electrode is striped in a direction orthogonal to the lower electrode 11 by a photolithography step and an etching step.
  • etching for example, a mixed aqueous solution of phosphoric acid, acetic acid, and nitric acid was used.
  • the bus electrode lower layer 15 is processed in the same photolithography step and etching step.
  • tungsten For the etching of tungsten (W), a mixed aqueous solution of ammonia and hydrogen peroxide is suitable. Finally, as shown in FIG. 8, an upper electrode 13 is formed. Thus, the thin-film electron source of the present embodiment is completed.
  • the upper electrode 13 was patterned by lift-off, and the upper electrode 13 was formed by sputtering.
  • the upper electrode 13 for example, a laminated film of iridium (Ir), platinum (Pt), and gold (Au) is used, each having a thickness of several nm, and formed as described above. We went by a spa ring.
  • the metal film to be the bus electrode upper layer 16 is formed by sputtering, but the present invention is not limited to this, and the metal film to be the bus electrode upper layer 16 is formed. May be formed by any of the following methods: electric plating, vacuum deposition, chemical vapor deposition, or printing.
  • the bus electrode upper layer 16 is formed to be as thick as several hundred nm, so that the sheet resistance of the bus electrode constituting the power supply wiring is reduced by the upper electrode 13
  • the sheet resistance can be reduced by about two orders of magnitude compared to the sheet resistance (about 200 ⁇ / port), and the resistance of the bus electrode can be reduced.
  • the lower layer 15 of the bus electrode is formed to have a thickness in the range of several nm to several 10 nm, it is possible to prevent the upper electrode 13 from breaking due to a step of the lower layer 15 of the bus electrode. .
  • the thin-film electron source according to the second embodiment of the present invention is characterized in that the upper electrode 13 also serves as the lower layer of the bus electrode, and the upper layer 16 of the bus electrode is formed on the upper electrode by sputtering.
  • FIG. 9A is a plan view and FIG. 9B is a plan view. Is a cross-sectional view showing a cross-sectional structure taken along the line A-A 'in FIG. (A), and FIG. (C) is a cross-sectional structure taken along the line BB in FIG. (A). It is sectional drawing.
  • a metal film to be the upper electrode 13 and a metal film to be the bus electrode upper layer 16 are formed by sputtering in this order.
  • the material of the metal film to be the upper electrode 13 is, for example, a laminated film of tungsten (W), platinum (Pt), and gold (Au), each having a thickness of 1 to 3 nm.
  • a 1 -Nd alloy is deposited on the material of the metal film to be the bus electrode upper layer 16 by several 100 nm.
  • a resist pattern is formed by a photolithography process, and the A 1 -Nd alloy other than the upper layer of the bus electrode is removed by wet etching, and as shown in FIG.
  • the upper electrode layer 16 is formed.
  • etching a mixed aqueous solution of phosphoric acid, acetic acid, and nitric acid described above is preferable.
  • the electron-emitting portion is covered with a resist pattern, the metal film for the upper electrode on the upper layer of the bus electrode is removed, and an upper electrode 13 is formed as shown in FIG.
  • the thin-film electron source of the present embodiment is completed.
  • aqua regia is preferably used for platinum (Pt) and gold (Au)
  • the above-described mixed aqueous solution of ammonia and hydrogen peroxide is preferably used for tungsten (W).
  • the metal film to be the bus electrode upper layer 16 is formed by any one of plating, vacuum deposition, chemical vapor deposition, or printing. ⁇ ⁇ It may be formed.
  • the upper layer 16 of the bus electrode is formed to be as thick as several hundred nm, so that the sheet resistance of the bus electrode constituting the power supply wiring is reduced by the upper electrode 13
  • the sheet resistance can be reduced by about two orders of magnitude compared to the sheet resistance (about 200 ⁇ / port), and the resistance of the bus electrode can be reduced.
  • the upper electrode 13 is also used as the lower layer of the bus electrode, the disconnection of the upper electrode 13 at the electron emission portion can be prevented.
  • the thin-film electron source according to Embodiment 3 of the present invention is characterized in that the upper electrode 13 also serves as the lower layer of the bus electrode, and the upper layer 16 of the bus electrode is formed on the upper electrode by electric plating. I do.
  • FIG. 12A is a plan view
  • FIG. 12B is a cross-sectional view showing a cross-sectional structure taken along the line AA ′ in FIG.
  • C is a cross-sectional view showing the cross-sectional structure taken along the line BB in FIG. (A).
  • a metal film to be the upper electrode 13 is formed by sputtering.
  • the material for the upper electrode is, for example, a laminated film of tungsten (W), platinum (Pt), and gold (Au), each having a thickness of 1 to 3 nm. Subsequently, a portion where the upper layer 16 of the bus electrode is not formed is covered with a resist pattern, and a gold (Au) film is grown as a backing electrode by an electrolytic gold plating. As shown in FIG. 13, an upper layer 16 of the bus electrode is formed.
  • the electron-emitting portion is covered with a resist pattern, the metal film for the upper electrode on the upper layer of the bus electrode is removed, and an upper electrode 13 is formed as shown in FIG.
  • the thin-film electron source of the present embodiment is completed.
  • aqua regia is preferable for platinum (Pt) and gold (Au)
  • the above-mentioned mixed aqueous solution of ammonia and hydrogen peroxide is preferable for tungsten (W).
  • the upper layer 16 of the bus electrode may be formed by any one of sputtering, vacuum evaporation, chemical vapor deposition, or printing.
  • the upper electrode 13 and the bus electrode upper layer 1 are formed. 6 and the thickness of the upper layer 16 of the bus electrode can be set arbitrarily, and the damage to the tunnel insulating layer 12 is reduced as compared with other processes. Can be.
  • the sheet resistance of the bus electrode constituting the power supply wiring is reduced by the upper electrode 13 It can be reduced by about two orders of magnitude compared to the sheet resistance (about 200 ⁇ / port), and the resistance of the bus electrode can be reduced.
  • the upper electrode 13 is also used as the lower layer of the bus electrode, the disconnection of the upper electrode 13 at the electron emission portion can be prevented.
  • the upper electrode 13 is electrically connected to the lower bus electrode layer 15, and the upper electrode layer 15 is electrically connected to the lower bus electrode layer 15 by electric plating. 6 is formed.
  • a method of manufacturing the thin-film electron source of the present embodiment will be described with reference to FIGS. 15 to 18.
  • FIG. 15A is a plan view
  • FIG. 15B is a cross-sectional view showing a cross-sectional structure taken along line AA of FIG. (C) is a cross-sectional view showing a cross-sectional structure taken along the line BB of FIG. (A).
  • a metal film to be the lower layer 15 of the bus electrode is formed by sputtering.
  • the metal film to be the bus electrode lower layer 15 for example, a laminated film of tungsten (W) and gold (Au) is preferable, and the thickness of each is preferably about 10 nm.
  • a portion where the upper layer 16 of the bus electrode is not formed is covered with a resist pattern, and a gold (Au) film is grown as a backing electrode by an electrolytic gold plating. As shown in FIG. The upper layer 16 is formed.
  • the lower layer 15 of the bus electrode is processed by a photolithography step and an etching step.
  • the bus electrode lower layer 15 is processed so as to protrude from the bus electrode upper layer 16. is there.
  • an upper electrode 13 is formed.
  • the upper electrode 13 is patterned by lift-off, and the upper electrode 13 is formed by sputtering.
  • the upper electrode 13 for example, a laminated film of iridium (Ir), platinum (Pt), and gold (Au) is used, each having a thickness of several nm, and the film is formed by sputtering as described above. The ring was used.
  • the metal film to be the pass electrode upper layer 16 may be formed by any of sputtering, vacuum deposition, chemical vapor deposition, or printing.
  • the pass electrode upper layer 16 is formed to be as thick as about several hundred nm, so that the sheet resistance of the bus electrode constituting the power supply wiring is reduced by the sheet of the upper electrode 13.
  • the resistance can be reduced by about two digits compared to the resistance (about 200 ⁇ / port), and the resistance of the bus electrode can be reduced.
  • the lower layer 15 of the bus electrode is formed as thin as several nm to several 1 Onm, the disconnection of the upper electrode 13 at the step of the lower layer 15 of the bus electrode can be prevented.
  • FIG. 19 is a diagram showing a schematic configuration of a thin-film electron source array substrate of a display device according to Embodiment 5 of the present invention.
  • FIG. 19 (a) is a plan view of the thin-film type electron source array substrate of the present embodiment
  • FIG. 19 (b) is a cross-sectional structure taken along line AA shown in FIG.
  • FIG. 19 (c) show the cross-sectional structure along the line BB 'shown in (a). It is an important section sectional view shown.
  • the thin-film electron source of the first embodiment is used as the thin-film electron source array substrate.
  • the thin-film electron source of the second to fourth embodiments may be used. It may be.
  • the thin-film electron source array substrate of the present embodiment is formed by forming a thin-film electron source in a matrix on the substrate 10 according to the procedure described in the first embodiment.
  • FIG. 19 a (3 ⁇ 3) dot thin film type electron source matrix composed of three lower electrodes 11 and three upper electrode paths 17 is shown. In practice, a number of thin-film electron source matrices corresponding to the number of display dots are formed.
  • bus electrode is actually a laminated structure of the lower layer 15 of the bus electrode and the upper layer 16 of the bus electrode. However, in FIG. 19, they are collectively shown as the laminated pass electrode 18.
  • the electrode portions of the lower electrode 11 and the upper bus electrode 18 are electrodes for circuit connection. The surface must be exposed.
  • FIG. 20 is a diagram showing a schematic configuration of a fluorescent display panel of a display device according to Embodiment 5 of the present invention.
  • FIG. 20 (a) is a plan view of the fluorescent display panel of the present embodiment
  • FIG. 20 (b) is a cross-sectional structure taken along the line A--A shown in FIG.
  • FIG. (C) is a cross-sectional view of a main part showing a cross-sectional structure along the line BB ′ shown in FIG. (A).
  • the fluorescent display panel of the present embodiment includes a black matrix 120 formed on a substrate 110 such as a soda glass, and a groove of the black matrix 120. It consists of red (R) and green (G) 'blue (B) phosphors (111-1113) formed in the inside, and a mail-back film 114 formed on these Is done.
  • a method for manufacturing the fluorescent display panel of the present embodiment will be described.
  • a black matrix 120 is formed on the substrate 110 in order to increase the contrast of the display device.
  • the black matrix 120 is formed by applying a solution of a mixture of polyvinyl alcohol (PVA; hereinafter, simply referred to as PVA) and ammonium dichromate to the substrate 110 to form the black matrix 120 After exposing to light by irradiating ultraviolet rays to the part other than the part to be exposed, the unexposed part is removed, a solution in which graphite powder is dissolved is applied, and PVA is formed by lift-off.
  • PVA polyvinyl alcohol
  • the red phosphor 111 is formed by the following method.
  • the portion where the phosphor is to be formed is exposed to ultraviolet light, and then exposed, and the unexposed portion is flushed. To remove.
  • the red phosphor 111 is patterned.
  • the phosphor pattern is a stripe pattern shown in FIG. 20, but this stripe pattern is merely an example. Of course, an “R GB G” pattern in which one pixel is composed of four dots may be used.
  • a green phosphor 112 and a blue phosphor 113 are formed by the same method.
  • a phosphor for example, a red phosphor 1 1 1 Y 2 0 2 S: E u ( ⁇ 2 2 - R), green phosphor 1 1 2 Z n S: Cu, A l (P 2 2—G).
  • ZnS Ag (P22—B) may be used.
  • the substrate 11 A1 is deposited on the entire surface to a thickness of about 5 nm to form a metal back film 114.
  • This metal back film 114 works as an accelerating electrode.
  • the substrate 110 is heated to about 400 ° C. in the air to thermally decompose organic substances such as a film and a PVA.
  • FIG. 21 is a cross-sectional view illustrating a schematic overall configuration of a display device according to Embodiment 5 of the present invention.
  • the figure (a) shows the cross-sectional structure along the line AA shown in Figs. 19 and 20 (a), and the figure (B) shows the figures 19 and 20 (a).
  • 2) is a cross-sectional view of a main part showing a cross-sectional structure along the line BB shown in FIG.
  • the thin film type electron source array substrate manufactured by the above procedure, a fluorescent display panel, and a frame member 116 are assembled via a spacer 30. After erection, the frame member 116 is sealed using the flat glass 115. The height of the spacer 30 is set so that the distance between the thin film type electron source array substrate and the fluorescent display panel is about 1 to 3 mm.
  • the spacer 30 is, for example, a plate-shaped glass or ceramic sensor, and the spacer 30 is arranged between the laminated bus electrodes 18.
  • the spacer 30 since the spacer 30 is disposed below the black matrix 120 of the fluorescent display panel, the spacer 30 does not hinder light emission.
  • a pillar-shaped spacer is used as the spacer 30. Panels can be assembled using the same method even when using grids or grid-shaped spacers.
  • Sealed panels is evacuated to 1 0_ 7 T 0 rr about vacuum, after sealed sealing to (sealing, rodents evening scratch activated to maintain the vacuum in the panel.
  • a getter film can be formed by high-frequency induction heating or the like.
  • a non-evaporable gas containing zirconium (Zr) as a main component may be used.
  • the acceleration voltage applied to the metal back film 114 is set to 3 to 6 KV and high voltage.
  • a phosphor for a cathode ray tube can be used as the phosphor.
  • the pass electrode forming the power supply wiring Since the resistance of the thin film type electron source element can be operated without uneven brightness, it is possible to prevent uneven brightness on the display screen.
  • FIG. 22 is a schematic diagram showing a state where a drive circuit is connected to the display device of the present embodiment.
  • the lower electrode 11 is driven by a lower electrode drive circuit 40, and the laminated bus electrode 18 is driven by an upper electrode drive circuit 50.
  • each drive circuit (40, 50) and the thin film type electron source array substrate is performed, for example, by pressing a tape carrier package with an anisotropic conductive film.
  • the semiconductor chips constituting the components and the drive circuits (40, 50) are formed by chip-on-glass, which is directly mounted on a substrate (eg, glass) of a thin-film type electron source array substrate.
  • An acceleration voltage of about 3 to 6 KV is applied to the metal back film 114 from the acceleration voltage source 60 at all times.
  • FIG. 23 is a timing chart showing an example of the waveform of the drive voltage output from each drive circuit shown in FIG.
  • the m-th lower electrode 11 is Km
  • the n-th laminated pass electrode 18 is C n
  • the intersection of the m-th lower electrode 11 and the n-th laminated bus electrode 18 is (m, n ).
  • the driving voltage of ( ⁇ V 1) from the lower electrode driving circuit 40 is applied to the lower electrode 11 of K 1, and the upper electrode driving circuit is applied to the laminated bus electrode 18 of (C 1, C 2).
  • a driving voltage of 50 to (+ V 2) is applied.
  • V 1 + V 2 Since a voltage (V 1 + V 2) is applied between the lower electrode 11 and the upper electrode 13 at the intersections (1, 1) and (1, 2), the (V 1 + V 2) If the voltage is set to be equal to or higher than the electron emission start voltage, electrons are emitted from the thin-film electron source at the intersection of these two into a vacuum.
  • the emitted electrons are accelerated by an accelerating voltage from an accelerating voltage source 60 applied to the metal back film 114, and then enter the phosphors (111 to 113) to emit light.
  • a drive voltage (-VI) from the lower electrode drive circuit 40 is applied to the lower electrode 11 of K2, and the upper electrode drive circuit 50 is applied to the laminated bus electrode 18 of C1. (+ V 2) P
  • a desired image or information can be displayed by changing the signal applied to the laminated bus electrode 18.
  • the application of the inversion voltage for releasing the charges accumulated in the tunnel insulating layer 12 is performed by applying the driving voltage of ( ⁇ VI) from the lower electrode driving circuit 40 to all of the lower electrodes 11.
  • the driving voltage of (+ V 3) from the lower electrode driving circuit 40 is applied to all the lower electrodes 11, and the driving voltage of ( ⁇ V 3,) from the upper electrode driving circuit 50 to all the laminated bus electrodes 18 This was achieved by applying a drive voltage.
  • a power supply bus electrode for applying a drive voltage to the electron source element is formed of a thin film electrode and a low-resistance thick film electrode lined on the thin film electrode.
  • the thin-film electrode was formed thin enough to be about the thickness of the electrode of the electron source, It is possible to prevent disconnection of the electrode of the electron source at the electron emission portion.
  • the resistance of the bus electrode constituting the power supply wiring can be reduced even on a large screen of a 40-inch class, and it is possible to prevent the occurrence of uneven brightness on the display screen. It becomes possible.

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Nanotechnology (AREA)
  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Theoretical Computer Science (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Cold Cathode And The Manufacture (AREA)
  • Cathode-Ray Tubes And Fluorescent Screens For Display (AREA)

Abstract

L'invention concerne une source d'électrons à film mince qui comprend plusieurs éléments sources comportant chacun un laminé d'électrode inférieure (11), de couche d'isolation (12) et d'électrode supérieure (13) formées dans cet ordre; et une pluralité de bus pour l'application d'une tension de commande à celle des électrodes supérieures (13) correspondant à un premier sens des éléments sources. Chaque bus comprend une électrode à film mince (15) reliée à l'électrode supérieure (13), et une électrode à film épais (16) établie sur l'électrode à film mince (15), plus épaisse que l'électrode à film mince (15). Cette structure empêche l'augmentation de la résistance des bus d'alimentation pour l'application de la tension de commande aux éléments sources et supprime les risques de dégâts d'électrode supérieure (13) dans la partie relative à l'émission d'électrons.
PCT/JP1999/005401 1999-09-30 1999-09-30 Source d'electrons, procede de fabrication, et dispositif d'affichage WO2001026128A1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
PCT/JP1999/005401 WO2001026128A1 (fr) 1999-09-30 1999-09-30 Source d'electrons, procede de fabrication, et dispositif d'affichage
KR1020027003567A KR20020030827A (ko) 1999-09-30 1999-09-30 전자원, 전자원의 제조방법 및 표시장치

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP1999/005401 WO2001026128A1 (fr) 1999-09-30 1999-09-30 Source d'electrons, procede de fabrication, et dispositif d'affichage

Publications (1)

Publication Number Publication Date
WO2001026128A1 true WO2001026128A1 (fr) 2001-04-12

Family

ID=14236891

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP1999/005401 WO2001026128A1 (fr) 1999-09-30 1999-09-30 Source d'electrons, procede de fabrication, et dispositif d'affichage

Country Status (2)

Country Link
KR (1) KR20020030827A (fr)
WO (1) WO2001026128A1 (fr)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2397941A (en) * 2002-12-26 2004-08-04 Hitachi Ltd Display device
US6975075B2 (en) 2002-07-25 2005-12-13 Hitachi, Ltd. Field emission display
JPWO2018016433A1 (ja) * 2016-07-21 2019-05-16 シャープ株式会社 電子放出素子、帯電装置、および画像形成装置

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0683501A2 (fr) * 1994-05-20 1995-11-22 Canon Kabushiki Kaisha Appareil de formation d'images et procédé de fabrication
JPH1079221A (ja) * 1996-09-04 1998-03-24 Hitachi Ltd 薄膜型電子源およびこれを用いた表示装置
JPH1092299A (ja) * 1996-09-20 1998-04-10 Hitachi Ltd 薄膜型電子源及び薄膜型電子源マトリクス並びにそれらの製造方法並びに薄膜型電子源マトリクス表示装置
JPH11120898A (ja) * 1997-10-20 1999-04-30 Hitachi Ltd 薄膜型電子源およびそれを用いた表示装置

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0683501A2 (fr) * 1994-05-20 1995-11-22 Canon Kabushiki Kaisha Appareil de formation d'images et procédé de fabrication
JPH1079221A (ja) * 1996-09-04 1998-03-24 Hitachi Ltd 薄膜型電子源およびこれを用いた表示装置
JPH1092299A (ja) * 1996-09-20 1998-04-10 Hitachi Ltd 薄膜型電子源及び薄膜型電子源マトリクス並びにそれらの製造方法並びに薄膜型電子源マトリクス表示装置
JPH11120898A (ja) * 1997-10-20 1999-04-30 Hitachi Ltd 薄膜型電子源およびそれを用いた表示装置

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6975075B2 (en) 2002-07-25 2005-12-13 Hitachi, Ltd. Field emission display
GB2397941A (en) * 2002-12-26 2004-08-04 Hitachi Ltd Display device
GB2397941B (en) * 2002-12-26 2007-07-11 Hitachi Ltd Display device
JPWO2018016433A1 (ja) * 2016-07-21 2019-05-16 シャープ株式会社 電子放出素子、帯電装置、および画像形成装置

Also Published As

Publication number Publication date
KR20020030827A (ko) 2002-04-25

Similar Documents

Publication Publication Date Title
US6975075B2 (en) Field emission display
US7218058B2 (en) Cold cathode type flat panel display
US6713947B2 (en) Display device and method of manufacturing the same
JP4865434B2 (ja) 熱電子放出用の電子放出体、それを備えた電子放出素子、及びそれを備えた平板ディスプレイ装置
TW583707B (en) Flat-panel display and flat-panel display cathode manufacturing method
US6765347B2 (en) Display device
US7601043B2 (en) Method of manufacturing microholes in a cathode substrate of a field emission display using anodic oxidation
JP3630036B2 (ja) 薄膜型電子源、およびそれを用いた表示装置
JPH07182994A (ja) 三極発光素子を組み込んだ単一基板真空蛍光表示装置
WO2001026128A1 (fr) Source d'electrons, procede de fabrication, et dispositif d'affichage
JP3397520B2 (ja) 電子源、表示パネルおよび画像形成装置ならびにそれらの製造方法
JP2001035357A (ja) 薄膜型電子源およびその製造方法並びに薄膜型電子源応用機器
JP3598267B2 (ja) 画像表示装置
JP4126987B2 (ja) 画像表示装置
JP3226442B2 (ja) 画像形成装置
JP2001023553A (ja) 表示装置
JP2003109487A (ja) 電子励起発光体および画像表示装置
EP1786016A1 (fr) Unite d'affichage
JP2001256907A (ja) 画像表示装置
JP2004111053A (ja) 電界放出型画像表示装置
JP2004207090A (ja) 画像表示装置
WO2004036615A1 (fr) Ecran plat a cathode froide
JP2000243222A (ja) 電子放出素子、電子源、画像形成装置及びその製造方法
JPH11306959A (ja) 電子放出素子、電子源、画像形成装置及びそれらの製造方法
JP2006107776A (ja) 画像表示装置の製造方法

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A1

Designated state(s): JP KR US

AL Designated countries for regional patents

Kind code of ref document: A1

Designated state(s): AT BE CH CY DE DK ES FI FR GB GR IE IT LU MC NL PT SE

DFPE Request for preliminary examination filed prior to expiration of 19th month from priority date (pct application filed before 20040101)
121 Ep: the epo has been informed by wipo that ep was designated in this application
WWE Wipo information: entry into national phase

Ref document number: 10089170

Country of ref document: US

WWE Wipo information: entry into national phase

Ref document number: 1020027003567

Country of ref document: KR

WWP Wipo information: published in national office

Ref document number: 1020027003567

Country of ref document: KR

122 Ep: pct application non-entry in european phase
WWR Wipo information: refused in national office

Ref document number: 1020027003567

Country of ref document: KR