WO2000039890A1 - Antenne a balayage electronique - Google Patents
Antenne a balayage electronique Download PDFInfo
- Publication number
- WO2000039890A1 WO2000039890A1 PCT/JP1999/006513 JP9906513W WO0039890A1 WO 2000039890 A1 WO2000039890 A1 WO 2000039890A1 JP 9906513 W JP9906513 W JP 9906513W WO 0039890 A1 WO0039890 A1 WO 0039890A1
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- WIPO (PCT)
- Prior art keywords
- layer
- array antenna
- phased array
- phase
- phase control
- Prior art date
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01Q—ANTENNAS, i.e. RADIO AERIALS
- H01Q3/00—Arrangements for changing or varying the orientation or the shape of the directional pattern of the waves radiated from an antenna or antenna system
- H01Q3/26—Arrangements for changing or varying the orientation or the shape of the directional pattern of the waves radiated from an antenna or antenna system varying the relative phase or relative amplitude of energisation between two or more active radiating elements; varying the distribution of energy across a radiating aperture
- H01Q3/2605—Array of radiating elements provided with a feedback control over the element weights, e.g. adaptive arrays
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01Q—ANTENNAS, i.e. RADIO AERIALS
- H01Q21/00—Antenna arrays or systems
- H01Q21/0087—Apparatus or processes specially adapted for manufacturing antenna arrays
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01Q—ANTENNAS, i.e. RADIO AERIALS
- H01Q21/00—Antenna arrays or systems
- H01Q21/06—Arrays of individually energised antenna units similarly polarised and spaced apart
- H01Q21/061—Two dimensional planar arrays
- H01Q21/065—Patch antenna array
Definitions
- the present invention is used for transmitting and receiving high-frequency signals such as microwaves, and controls the phase supplied to each radiating element to electrically adjust the beam radiation direction.
- This type of phased array antenna has the function of arbitrarily changing the beam direction by electronically changing the phase fed to each radiating element.
- phase shifter is used as a means for changing the feed phase of each radiating element.
- a phase shifter a digital phase shifter composed of a plurality of phase shift circuits each having a fixed different phase shift amount (hereinafter, the digital phase shifter is simply referred to as a phase shifter) is used. You.
- Each phase shift circuit is turned on / off by a 1-bit digital control signal.By combining the phase shift amounts of the phase shift circuits, power supply of 0 to 360 ° is provided for the entire phase shifter. The phase is obtained.
- phased array antennas use a large number of semiconductor devices such as PIN diodes and GaAs FETs as switching elements in each phase shift circuit, and many drive circuit components for driving these devices. .
- an antenna for a low-Earth orbit satellite tracking terminal for example, frequency: 3 OGHz,
- Beam scanning range 50 ° beam tilt angle from the front
- Opening area approx. 0.13 m 2 (36 O mm X 360 mm)
- the required force s Mel to avoid and spaced radiating elements (5 mm back and forth 3 0 GH z) about 1 Z 2 wavelength occurrence of grating lobes.
- phase shift circuit used for each phase shifter must have 4 bits (minimum bit shift). (Phase 22.5 °) or more is desirable.
- a phased array antenna having such a high gain and applicable to a high frequency band is realized by the above-described conventional technique, for example, a phased array antenna described in Japanese Patent Application Laid-Open No. H 1-292031 shown in FIG. If you try to achieve this, there are the following problems Was.
- the spacing between the radiating elements must be around 5 mm, but in the conventional technology, the width of the wiring bundle is large. Too physical to be physically located.
- phase shifter such as a switching element and its driving circuit
- the number of mounted components becomes enormous as the number of radiating elements increases.
- An object of the present invention is to solve such a problem, and an object of the present invention is to provide a phased array antenna having a high gain and applicable to a high frequency band. Disclosure of the invention
- a fused array antenna forms a radiating element and a phase shift unit in separate radiating element layers and phase control layers, respectively, and combines these layers with a first coupling layer.
- the whole structure is joined by layers to form a multilayer structure.
- the distribution / combination unit is formed in the distribution / combination layer, and the phase control layer and the distribution / combination layer are connected to The entire structure is joined by two joining layers to form a multilayer structure. Therefore, the radiating element and the distributing / combining unit are removed from the phase control layer, and the area occupied by these elements in the phase control layer is reduced.
- phase shift unit located at the intersection thereof. It is something to set. Therefore, since signal wiring for controlling each phase shift unit can be shared, the number of wirings can be greatly reduced.
- a drive circuit constituting the phase shift unit is formed by a thin film transistor on a glass substrate, and a micromachine switch is used for the phase shift circuit. Therefore, the area occupied by these circuit components can be reduced as compared with the conventional case.
- a single phase shift unit can be configured with a very small area, a large number of radiating elements can be arranged in units of several thousands at optimal intervals (about 5 mm) for high-frequency signals of about 30 GHz, for example.
- a fused array antenna that can be applied to a high frequency band with a gain can be realized.
- FIG. 1 is a block diagram of a phased array antenna according to one embodiment of the present invention.
- FIG. 2 is an explanatory diagram showing a configuration example of a multilayer substrate.
- FIG. 3 is an explanatory view showing a configuration example of a multilayer substrate according to another embodiment of the present invention.
- FIG. 4 is an explanatory diagram showing a configuration example of a multilayer substrate according to another embodiment of the present invention.
- FIG. 5 is a block diagram showing a phase shift unit.
- FIG. 6 is a timing chart showing the operation of the phase control unit.
- FIG. 7 is a timing chart showing another operation of the phase control unit.
- FIG. 8 is a perspective view showing a configuration example of the switch.
- FIG. 9 is an explanatory diagram showing an example of a method for forming a phase unit according to one embodiment of the present invention.
- FIG. 10 is an explanatory diagram showing another example of a method for forming a phase unit according to one embodiment of the present invention.
- FIG. 11 is an explanatory view showing another example of a method for forming a phase unit according to one embodiment of the present invention.
- FIG. 12 is an explanatory diagram showing an example of mounting a switch.
- FIG. 13 is an explanatory diagram showing another implementation example of the switch.
- FIG. 14 is a circuit layout diagram showing the first embodiment.
- FIG. 15 is a circuit layout diagram showing the second embodiment.
- FIG. 16 is a circuit layout diagram showing the third embodiment.
- FIG. 17 is a circuit layout diagram showing the fourth embodiment.
- FIG. 18 is a circuit layout diagram showing the fifth embodiment.
- FIG. 19 is an explanatory diagram showing a conventional phased array antenna. BEST MODE FOR CARRYING OUT THE INVENTION
- FIG. 1 is a block diagram of a phased array antenna 1 according to one embodiment of the present invention.
- phased array antenna is used as a transmitting antenna for a high-frequency signal
- the present invention is not limited to this. It is also possible to use. Further, when the entire antenna is composed of a plurality of subarrays, the present invention may be applied to the phased array antenna of each subarray.
- FIG. 1 is a diagram for explaining the configuration of the phased array antenna 1.
- a phased array antenna 1 is composed of a multilayer substrate 2 on which an antenna radiating element and a phase control circuit are mounted on a multilayer substrate, a feeder 13 for supplying high-frequency power to the multilayer substrate 2, and a multilayer substrate 1.
- the control unit 11 controls the phase of each radiating element of the unit 2.
- m X n (m and n are integers equal to or greater than 2) radiating elements 15 are arranged in an array.
- the high-frequency signal is supplied via the bold line.
- the arrangement of the radiating elements 15 may be arranged in a rectangular lattice array or in another array such as a triangular array.
- Each radiating element 15 is provided with a phase shifter 17 and a phase controller 18 for controlling the same.
- phase shifter 17 provided for each radiating element 15, a part of the strip line connected to the phase shifter 17, and the phase control unit 18 are collectively described. Uto 16 and the letter.
- the phase shift unit 16 of the present invention is mounted on the multilayer substrate unit 2 by simultaneously forming a large number (500 in the example described in the preceding paragraph) simultaneously using, for example, a semiconductor element manufacturing process. .
- the control device 11 is a device that calculates a feed phase shift amount of each radiation element 15 based on a desired beam radiation direction.
- the calculated phase shift amount of each radiating element 15 is output from the control device 11 to the signal line driving unit 12X and the scanning line selecting unit 12Y by the control signals 11X and 11Y.
- the signal lines X1 to Xm and the scanning lines Y1 to Yn, which are outputs of the signal line driving unit 12X and the scanning line selecting unit 12Y, are connected to each phase control unit 18 in a grid pattern. . Therefore, the signal line driving section 12 X and the scanning line selecting section 12 # perform matrix driving, which will be described later, based on the control signals 11 X and 11 Y, so that each phase control section 18 is controlled.
- the phase shift amounts of the radiating elements 15 are individually set.
- the trigger signal T rg ′ is a signal that determines the timing at which the phase shift amount set in each phase control section 18 is instructed and output to each phase shifter 17.
- the amount of phase shift of power supply to each radiating element 15 can be updated at the same timing, and the beam radiation direction can be changed instantaneously.
- phase shifters 17 are partially switched without switching at the same time, instantaneous interruption of the radiation beam can be avoided.
- the multilayer substrate unit 2 of the phased array antenna according to the present embodiment will be described.
- FIG. 2 is an explanatory diagram showing the multilayer substrate unit 2, and shows a perspective view and a schematic cross-sectional view of each layer.
- Each of these layers is patterned by photolithography, etching, and printing techniques, and then laminated to form a multilayer.
- stacking order of each layer is not necessarily limited to the form shown in Fig. 2, but may be deleted or added or the stacking order may be partially changed according to the conditions of electrical and mechanical requirements.
- the present invention is also effective.
- a branch strip line 23 for distributing a high-frequency signal from the feeding unit 13 (not shown in FIG. 2) of FIG. 1 is formed.
- a tournament system in which two branches are repeated or a series distribution system in which the main line is gradually branched in a comb shape can be used.
- a dielectric layer 38 A and a grounding layer 39 A made of a conductor are further provided outside the distribution / combination layer 39. Is added.
- a bonding layer 37 (second bonding layer) is provided via a dielectric layer 38.
- the coupling layer 37 is formed of a conductor pattern in which a hole, that is, a coupling slot 22 is formed in the ground plane.
- phase control layer 35 is provided via a dielectric layer 36.
- each phase shift unit 16 and these phase shift units 16 are individually provided.
- Wirings X1 to Xm and Y1 to Yn for separate control are provided.
- phase control layer 35 a coupling layer 33 (first coupling layer) having a coupling slot 21 similar to that of the coupling layer 37 is provided via a dielectric layer 34. I have. Above it, a radiating element layer 31 on which a radiating element 15 is formed via a dielectric layer 32 is provided.
- a parasitic element layer 31A on which a parasitic element 15 # is formed via a dielectric layer 31 # is provided.
- the parasitic element 15 A is added for widening the band, and may be configured as necessary.
- dielectric layers 31 B, 32, and 38 a material having a low dielectric constant of about 1 to 4, such as a printed circuit board, a glass substrate, or a foam material is used.
- these dielectric layers may be spaces (air layers).
- a semiconductor substrate silicon, gallium arsenide compound, etc.
- a semiconductor substrate silicon, gallium arsenide compound, etc.
- a space air layer may be formed as the dielectric layer 34.
- the individual layers constituting the multilayer substrate section 2 have been individually disassembled and described, but the dielectric layers 31B, 32, 34, 36, 38, 38A have been replaced.
- Adjacent layers, for example, the radiating element layer 31 and the coupling layer 32 can be realized by forming a pattern on one or both sides of the dielectric layer.
- the dielectric layer does not necessarily need to be formed of a single material, and may have a configuration in which a plurality of materials are stacked.
- the high-frequency signal from the feeder 13 (not shown in FIG. 2) is transmitted from the strip line 23 of the distribution / combination layer 39 to the coupling slot 22 of the coupling layer 37. Then, the light propagates to the strip line of the phase control layer 35. Then, a predetermined feed phase shift amount is given by the phase shifter 17, and propagates to the radiating element 15 of the radiating element layer 31 via the coupling slot 21 of the coupling layer 33, and It is radiated from 15 to a predetermined beam direction.
- each phase shift unit 16 that is, a circuit provided for each radiating element
- Phase shifter 17, phase control section 18 strip line 24 for supplying a high-frequency signal to each phase shift unit
- signal line drive disposed outside the multilayer structure area on phase control layer 35.
- Section 1 2 X and scanning line selection section 1 2 Y Signal lines X 1 to X m and Y 1 to Y n for electrically connecting each phase control section, trigger signal line Trg, and various circuit drives
- the power supply pattern and the grounding pattern are simultaneously and collectively formed through a series of manufacturing processes, and are incorporated on the phase control layer 35.
- the signal lines X1 to Xm and the scanning lines Y1 to Yn are formed on the phase control layer 35 so as to intersect each other. I have.
- the signal line driving unit 12 1 sequentially transmits driving signals via the signal lines Xl to Xm, while the scanning line selecting unit 12Y transmits the scanning lines Y1 to Y ⁇ .
- the desired phase shift amount is set in the phase control unit 18 located at the intersection.
- each of the phase control sections 18 is connected in a grid pattern by the signal lines X1 to Xm and the scanning lines ⁇ 1 to ⁇ , and the signal lines X1 to Xm and the scanning lines are connected.
- a desired phase shift amount is set in the phase controller 18 located at the intersection.
- signal wiring for controlling each phase control unit 18 can be shared, the number of wirings can be significantly reduced, and the area required for these wirings can be significantly reduced.
- the radiating element 15 and the phase shift unit 16 are formed on separate radiating element layers 31 and phase control layers 35, respectively. It has a multilayer structure.
- the distributing / combining unit 14 is formed in a separate distributing / combining layer 39, and the phase control layer 35 and the distributing / combining layer 39 are connected by a connecting layer 37, so that the whole has a multilayer structure.
- the area occupied by the radiating element 15 and the distributing / combining unit 14 on the phase control layer 35 can be reduced, and the occupied area per radiating element can be reduced.
- one phase shift unit 16 can be configured with a relatively small area in this way, for example, for a high-frequency signal of about 3 GHz, each radiating element 15 is optimally spaced around 5 mm. High-gain, high-frequency band This makes it possible to realize a pseudo array antenna.
- the beam scanning angle at which the grating lobe occurs is widened, so that the beam can be scanned over a wide range centering on the front of the antenna.
- phase shifter 17, the phase control section 18, the control signal line, the power supply wiring, and the strip line 24 used in each phase shift unit are collectively formed on the phase control layer 35, so that the conventional As compared to the case where individual circuit components are mounted individually, the number of separately mounted components and the number of connection points are reduced, the number of assembly steps is reduced, and the manufacturing cost of the entire phased array antenna is greatly reduced. Can be reduced.
- a distributed constant line such as a triplate type, a coplanar waveguide type, or a slot type can be used in addition to the microstrip type.
- the radiating element 15 In addition to a patch antenna, a printed dipole antenna, a slot antenna, an aperture element, and the like can be used as the radiating element 15.
- the slot antenna is formed by enlarging the opening of the slot 21 of the coupling layer 33.
- the radiating element layer 31 is also used as the coupling layer 33, and the radiating element layer 31 and the parasitic element layer 31A become unnecessary.
- a high-frequency signal may be coupled using a conductive feed pin that connects the strip line of the phase control layer 35 to the radiating element 15.
- a conductive feed pin provided to project from the strip line of the phase control layer 35 into the dielectric layer 38 through a hole provided in the coupling layer 37 is provided. May be used to combine high frequency signals.
- the same function as that of the distribution / combination layer 39 can also be realized by using a radial waveguide.
- FIG. 3 is an explanatory diagram showing a configuration example of the present invention when a radial waveguide is used.
- the distribution / synthesis function is realized by the dielectric layer 38, the ground layer 39A, and the probe 25 of the multilayer substrate unit 2 shown in FIG. Layer 39 is not required.
- the dielectric layer 38 is formed of a printed circuit board, a foaming agent, or a space (air). Layer).
- ground layer 39A a copper foil on a printed circuit board may be used as it is, or a metal plate or a metal housing surrounding the entire side surface of the dielectric layer 38 may be separately provided.
- the present invention is applicable to a space-fed phased array antenna.
- FIG. 4 shows a configuration example of a reflection type space-fed fused array antenna.
- the phased array antenna 1 shown in FIG. 4 is composed of a radiation feed section 27 including a feed section 13 and a primary radiating section 26, a multilayer board section 2, and a control device 11 (not shown).
- the multilayer substrate part 2 is different from the form shown in FIG. 2, and is composed of a radiating element layer 31, a dielectric layer 32, a coupling layer 33, a dielectric layer 34, and a phase control layer 35. ing.
- the distribution / combination layer 39 is excluded from the multilayer substrate unit 2.
- phased array antenna 1 the high-frequency signal radiated from the radiation feeder 27 is received once by each radiating element 15 on the radiating element layer 31, and is received on the phase control layer 35 via the coupling layer 33.
- Phase shift units 16 respectively.
- the high-frequency signal is phase-controlled by each phase shift unit 16, propagates again to each radiating element 15 via the coupling layer 33, and has a predetermined beam direction from each radiating element 15. Is radiated.
- the present invention is also effective in a mode in which the multilayer distribution board 2 does not include the combined distribution layer 39 as in the space-fed phased array antenna described above.
- phase shift unit 16 provided for each radiating element 15 will be described with reference to FIG.
- FIG. 5 is a block diagram showing a phase shift unit.Here, four phase shift circuits 17 A to 17 A having different phase shift amounts of 22.5 °, 45 °, 90 °, and 180 ° are shown.
- a phase shifter 17 is configured from 17 D.
- Each of the phase shift circuits 17A to 17D is connected to a strip line 24 for transmitting a high-frequency signal from the distribution / combination unit 14 to the radiating element 15.
- each of the phase shift circuits 17A to 17D is provided with a switch 17S.
- the phase control unit 18 that individually controls the switches 17S of the phase shift circuits 17A to 17D includes a drive circuit 19A to 1D provided for each of the phase shift circuits 17A to 17D. It is composed of 9D.
- Each of the driving circuits 19A to 19D is provided with two latches 191, 192 connected in series.
- the latch (first latch) 191 latches the level of the signal line Xi connected to the input D at the rising timing of the scanning line Yi connected to the input CLK.
- the latch (second latch) 192 latches the output Q of the latch 191 at the rising edge of the trigger signal Trg 'connected to the input CLK, and outputs the output Q of the corresponding phase shift circuit. Output to switch 17S.
- two signal lines Xil and Xi2 and two scanning lines Yj1 and Yj2 are provided for one phase control unit 18, and four driving circuits 19
- the ON / OFF data of each switch is set individually for A ⁇ l9D.
- X i 1 and Y i 1 control the operation of the phase shift circuit 17 A
- X i 1 and Y j 2 control the operation of the phase shift circuit 17 B
- X i 2 and Y j 1 control the operation of the phase shift circuit 17 B.
- the operation of the phase shift circuit 17C is controlled
- the operation of the phase shift circuit 17D is controlled by Xi2 and Yj2.
- FIG. 6 is a timing chart showing the operation of the phase control unit.
- a drive circuit 19A corresponding to the phase shift circuit 17A is shown as an example.
- the signal line driving unit 1 2 X in FIG. 5 is a driving signal applied to the signal line X i 1, not only the signal for the driving circuit 19 A but also the other driving circuits connected to the signal line X i 1, that is, the same. Since the signals for the drive circuits 19B of the phase control section 18 and the drive circuits of the other phase control sections 18 are also flowing, they are constantly changing. On the other hand, since the scanning line selection unit 1 2 Y sequentially selects Y 1 1 to Y n 2 one by one during the period T 1, a pulse is applied to the scanning line Y j 1 only during the period T 1. It is only once during 1 (t 1 in the example of Fig. 7).
- the scanning line voltage Y j 1 ′ changes to the H level at the time t 1 of the cycle T 1
- the level of the signal line voltage X i 1 ′ that is, the H level is output from the output Q of the latch 191
- This state is maintained even after the scanning line voltage Y j 1 ′ returns to the L level.
- the switch 17 S of the phase shift circuit 17 A is kept on from the moment t 2 to the moment t 4 (the next moment when the trigger signal Trg ′ is applied), during which the propagation of the strip line 24 occurs. + 22.5 ° is supplied to the high-frequency signal to be supplied.
- the switch 17S of the phase shift circuit 17A is maintained in the OFF state, and the amount of phase shift of power supply to the high-frequency signal propagating through the strip line 24 is returned to 0 °.
- the trigger signal T rg ′ may always be maintained at the H level. In this case, the latch output Q of the latch 191 is immediately transferred to the latch 192. Output to switch 17S.
- a voltage amplifier or a current amplifier may be provided on the output side of the latch 1992.
- FIG. 8 is a perspective view showing a configuration example of the switch.
- This switch is connected to strip lines 62, It is composed of a micromachine switch that short-circuits Z3.
- the micromachine switch mentioned here is a microswitch suitable for being integrated by a semiconductor device manufacturing process.
- the strip lines (first and second strip lines) 62, 63 are formed on the substrate 61 with a small gap.
- a contact 64 (about 2 / xm thick) is supported by a support member 65 so as to be able to freely contact and separate from the strip lines 62, 63.
- the distance between the lower surface of the contact 64 and the upper surfaces of the strip lines 62 and 63 is about 4 m, and the height of the upper surface of the contact 64 with respect to the upper surface of the substrate 61, that is, the micromachine
- the overall height of the switch is about 7 m.
- a conductor electrode 66 (about 0.2 / m thick) is formed in the gap between the strip lines 62 and 63 on the substrate 61, and the height (thickness) of this electrode 66 is ) Is lower (thinner) than the height (thickness) of the strip lines 62, 63.
- Output voltages (for example, about 10 to 100 V) of the drive circuits 19 A to 19 D are individually supplied to the electrodes 66.
- the contact 64 contacts both the strip lines 62 and 63 and the strip line 62 , 63 become conductive at a high frequency via contact 64.
- a support made of a conductor is applied to the contact 64.
- the output voltage of the drive circuit may be applied via the holding member 65, and the same operation as described above can be obtained.
- the contact 64 has at least a lower surface formed of a conductor and makes ohmic contact with the strip lines 62 and 63, an insulator thin film is formed on the lower surface of the conductor member and the strip lines 62 and 63 are formed. 3 may be capacitively coupled.
- the contact 64 is a movable portion, when the phase control layer 35 is provided in a multilayer substrate as in a phased array antenna, the micromachine switch can freely move the contact 64. It is necessary to provide space.
- the micromachine switch is used as the switching element for controlling the power supply phase, so that power consumption at the semiconductor junction surface is reduced and power consumption is lower than when a semiconductor device such as a PIN diode is used. Can be reduced to about 1 / 10th.
- FIGS. 9 to 11 show a phase control unit 18 (not shown) as an example of means for forming circuit components by applying a semiconductor element manufacturing process, in particular, means for forming a thin film transistor (TFT) on a glass substrate.
- TFT thin film transistor
- Switch 17S Here, a case where a micromachine switch is formed at the same time is shown.
- a glass substrate 201 whose surface is precisely polished to a flatness Ra of about 4 to 5 nm is prepared, and a photoresist is applied thereon.
- FIG. 9A This is patterned by a known photolithography technique, and as shown in FIG. 9A, a resist pattern 202 having a groove 202A at a predetermined position is formed.
- a metal film 203 made of, for example, chromium or aluminum is formed on the resist pattern 202 including the groove 202A by a sputtering method.
- FIG. 9 (c) A gate electrode 203 A and a wiring pattern 220 are formed on a glass substrate 201.
- silicon oxide or the like is grown on the glass substrate 201 by sputtering so as to cover the gate electrode 203 A and the wiring pattern 220, and is insulated.
- a film 204 is formed.
- a photoresist is applied on the insulating film 204, and this is patterned by a known photolithography technique. As shown in FIG. 9 (e), an opening 2 is formed on the gate electrode 203A. A resist pattern 205 having 0 5 A is formed.
- a silicon film 206 is formed on the resist pattern 205 by sputtering so as to fill the opening 2 ° 5 A.
- the gate electrode 203 A on the insulating film 204 is formed.
- a semiconductor layer 206A is formed at an upper position.
- the gate electrode 203A is arranged below the semiconductor layer 206A with the insulating film 204 interposed therebetween.
- a drain electrode 207 and a source electrode 208 are formed on the insulating film 204 as shown in FIG. Form.
- a thin-film transistor composed of a semiconductor layer 206 A, an insulating film (gate insulating film) 204, a gate electrode 203 A, a drain electrode 207 and a source electrode 208 is formed. 2 10 is formed.
- the strip lines 62, 63 of the switch 17S, the electrode 66 for driving the switch, and the column electrode (not shown) of the support member 65 are simultaneously placed at predetermined positions near the electrodes. Form at the same time.
- a lift-off method may be used as in the case where the gate electrode 203 is formed.
- a metal film 209 made of gold or the like is selectively grown on the strip lines 62, 63.
- the wiring resistance is reduced and the passage loss in the high frequency band can be reduced.
- a gap is secured between the electrode 6 and 6, A short circuit between the contact 64 and the electrode 66 can be avoided.
- an insulating film 211 such as a silicon oxide film is formed by sputtering so as to entirely cover the substrate 201.
- a mask pattern 212 made of metal is formed in a region on the insulating film 211 by a lift-off method.
- etching is performed by a dry etching method using the mask pattern 212 as a mask, and as shown in FIG. 10 (k), a protective film 211 made of an insulating film 211 is formed on the thin film transistor 210.
- Form 1 A is
- the semiconductor layer 206A is sealed by the protective film 211A, and stable operation of the thin film transistor 210 is obtained.
- a polyimide or the like is applied, dried and cured to form a sacrificial layer 2 13 with a film thickness of about 5 to 6 m over the entire area of the substrate 201. .
- an opening (not shown) is formed at the column position of the support member 65 of the switch 17S using a known photolithography technique and an etching technique, and a metal is formed so as to fill the opening.
- a metal is formed so as to fill the opening.
- the arm (arm) of the support member 65 made of metal is located at a position that straddles the column 65A and the strip lines 62 and 63.
- the contact and the contact 64 are formed by a lift-off method.
- the micromachine switch (switch 17 S) is formed on the glass substrate 201, that is, on the phase control layer 35, simultaneously with the force S and the thin film transistor 210 described above (see FIG. 8).
- the means for simultaneously forming the thin film transistor 210 and the switch 17S constituting the phase control section 18 on the glass substrate has been described.
- the circuit components constituting the phase shift unit 16 of the present invention are described.
- c is the forming means is not limited to this, it is possible to a thin film transistor data separately form Suitsuchi 1 7 S after forming a glass substrate It is also possible to use a semiconductor substrate instead of the glass substrate 201, form an active element similar to that of the present example on the semiconductor substrate by an impurity diffusion method, and then separately form a switch 17S.
- the circuit components constituting the phase control unit 18 are formed on the phase control layer 35 on the same surface, all of which are collectively formed in the same process. This reduces the number of components and connection points that need to be mounted separately as compared to the case where individual circuit components are individually mounted as in the past, thus reducing the number of assembly steps and the manufacturing cost of the entire phased array antenna. Can be greatly reduced.
- FIGS. 12A and 12B an implementation of a switch used in the phase shifter will be described.
- the switches of the phase shifters are formed simultaneously and in large numbers on the same substrate.
- FIG. 12 is an explanatory diagram showing an example of mounting a switch.
- a space that is a mounting space of the switch is formed by a spacer that is a separate component
- phase control layer 35 is formed on a dielectric layer 36, and a switch 17S used in the phase shifter 17, here, a micromachine switch is a phase control layer 35 It is formed collectively on the top.
- a semiconductor (silicon, gallium arsenide) substrate can be used in addition to a glass substrate (relative permittivity: about 4 to 8).
- the thin film of the phase control layer 35 is formed by a vacuum evaporation method or a sputtering method as described above, and the pattern is formed by a metal mask or by a photoetching method.
- the two latches 191 and 192 constituting the drive circuits 19A to 19D are formed on the dielectric layer 36 by thin film transistors (TFT).
- TFT thin film transistors
- the mounting space is composed of a space 34S (internal space) formed between the phase control layer 35 and the coupling layer 33.
- the spacer 3 The space 34S is formed by providing 4A.
- the spacer 34 A may be arranged below the coupling slot 21, so that the area directly below the coupling slot 21, which is usually an empty area, is also used as the spacer 34 A arrangement area.
- the area occupied by the spacer 34 A can be reduced.
- the spacer 34A a material having a high dielectric constant of about 5 to 30 such as alumina may be used as the spacer 34A, and may be disposed below the coupling slot 21. And the strip line 24 on the phase control layer 35 are efficiently coupled at high frequency.
- the spacer 34 A is provided in the dielectric layer 36, and its front and back surfaces are disposed immediately above via holes (conductive holes) electrically connected to each other to form a ground pattern such as the coupling layer 33. And may be electrically connected with the conductor pattern of 37.
- the dielectric layer 36, the phase control layer 35, and the dielectric layer 34 are multilayered in the reverse order as compared with FIG. 12 (a) described above.
- the upper side of the dielectric layer 36 is in close contact with the coupling layer 33, and the spacer 34A is provided between the phase control layer 35 and the coupling layer 37 below the dielectric layer 36.
- the dielectric layer 34 is formed by the space 34S.
- the micromachine switch of the switch 17S has a shape in which a space 34S is secured on the lower surface of the phase control layer 35.
- FIG. 13 is an explanatory view showing another mounting example of the switch.
- a mounting space for the switch is formed by various members.
- FIG. 13 (a) shows a case where a space 34S is formed as a mounting space for the switch 17S using the dielectric film 34B.
- a dielectric film 34 B such as polyimide is selectively provided after a dielectric film is further provided on the sacrificial layer 2 13 used for forming the switch 17 S. Dielectric thicker than switch 17S height by removing part of 213 It is possible to form the film 34B.
- a photosensitive adhesive as the dielectric film 34B, it can be used also as an adhesive at the time of subsequent substrate lamination.
- FIG. 13 (b) shows a case where a wiring pattern conductor on the phase control layer 35 is formed thick to form a space 34 S as a mounting space for the switch 17 S.
- a stable mounting space can be obtained by using a relatively wide strip line 24 or a separately provided large-area spacer-dedicated wiring pattern as the wiring pattern conductor.
- FIG. 13 (c) shows a case where a space 34S as a mounting space for the switch 17S is formed by using a substrate 34D having a cavity (space) 34E.
- a cavity 34E is formed in advance on the substrate 34D so as to correspond to the position of the switch 17S mounted on the phase control layer 35.
- the substrate 34 D may be used as the dielectric layer 34 and laminated between the phase control layer 35 and the coupling layer 33. .
- a substrate having a relatively low dielectric constant (relative dielectric constant: about 1 to 4) is used.
- the surface of the substrate 34D may be cut by machining, or a through hole may be provided by die cutting or the like.
- the resin in the cavity 34E may be peeled off by exposure and development treatment, and various forming methods can be used.
- phase shifter 17 is composed of four phase shift circuits 17A to 17D having the following will be described.
- the driving circuits 19 A to 19 D are respectively arranged around the corresponding phase shift circuits, but correspond to one phase shift unit.
- the drive circuits may be integrated and arranged in one place, or the drive circuits corresponding to a plurality of phase shift units may be integrated and arranged in one place in a certain number. Also, it is assumed that a micromachine switch is used as a switching element of the phase shift circuit.
- FIG. 14 is a circuit layout diagram showing the first embodiment, (a) is a circuit layout diagram of a phase control layer showing the entire phase shift unit, (b) is a schematic diagram showing a multilayer structure, and (c) is a phase diagram.
- FIG. 4 is an enlarged view schematically illustrating a portion where a signal line, a scanning line, and the like, which are wired on a control layer 35, intersect.
- the phase shift unit 16 is provided corresponding to each of the radiation elements 15 arranged in an array, and has a substantially square (5 mm ⁇ 5 mm) area ( (See the dashed square in the figure.)
- the signal lines X i 1 and X i 2 from the signal line selection unit 12 X, the scanning lines Y j 1 and Y j 2 from the scanning line selection unit 12 Y, and the control unit 11 1 Trigger signal line T rg and switch drive power supply line V drv are arranged in a grid pattern.
- a strip line 24 that connects the upper part of the coupling slot 22 to the lower part of the coupling slot 21 is provided inside these wirings.
- phase shift circuits of 22.5 °, 45 °, 90 °, and 180 ° and corresponding drive circuits are arranged, respectively.
- the phase shift circuit and the drive circuits 19A to 19D are collectively formed on the same surface on the same substrate (glass substrate) as the phase control layer 35.
- a circular radiating element 15 (2.5 mm to 4 mm in diameter) (thin broken line in the figure) is arranged.
- FIG. 14B shows a multilayer structure according to the first embodiment, and the same parts as those in FIG. 12 described above are denoted by the same reference numerals.
- FIG. 14 (a) This figure schematically shows the multilayer structure, and does not show the specific cross section of FIG. 14 (a).
- the multilayer structure in this embodiment is composed of a ground layer 39A, a dielectric layer 38 (thickness lmm) forming a radial waveguide, a ground layer 37, and a dielectric layer 36 (thickness in order from bottom to top in FIG. 14B).
- 0.2 mm phase control layer 35, dielectric layer 34 (0.2 mm thick), ground layer 33 with coupling slot 21 formed, dielectric layer 32 (0.3 mm thick), radiation
- the element layer 31, the dielectric layer 31 B (thickness l mm), and the parasitic element layer 31 A are stacked.
- the dielectric layer 34 between the phase control layer 35 and the coupling layer 33 is formed of a space secured by a spacer 34 A having a thickness (height) of 0.2 mm.
- a switch 1S is formed in a bundle.
- the spacer 34 A may be arranged below the coupling slot 21, so that the space immediately below the coupling slot 21, which is usually an empty area, can also be used as the spacer 34 A arrangement area.
- the area occupied by the laser 34 A can be reduced.
- FIG. 14 (c) shows the scanning lines Y j 1 and Y j 2 formed on the phase control layer 35 and arranged in the horizontal direction, and the signal lines X i 1 and X i 2 arranged in the vertical direction.
- a wiring 36B is formed in advance on the dielectric layer 36, and the wiring 36B is formed thereon. After applying the insulating film 36A to the entire surface of the dielectric layer 36, the wiring 36C can be formed.
- the wiring is formed simultaneously with the formation of the gate electrode of the thin film transistor.
- a wiring 36 C is formed simultaneously with forming a source electrode and a drain electrode of the thin film transistor.
- FIG. 15 is a circuit layout diagram showing the second embodiment, (a) is a circuit layout diagram of a phase control layer showing the entire phase shift unit, (b) is a schematic diagram showing a multilayer structure, and (c) is a schematic diagram.
- FIG. 3 is an enlarged view schematically illustrating a portion where a signal line, a scanning line, and the like wired on a phase control layer 35 intersect.
- a switch 17S is formed on the phase control layer 35 and the dielectric layer 36 formed on the coupling layer 33 is formed. It is integrated, and the space as its mounting space is secured by spacers 34A. In this case, the switch 17S is mounted downward.
- the spacer 34 A having a high dielectric constant was used.
- the second embodiment shown in FIG. 15 has a configuration using a spacer made of a conductor. Is shown.
- a conductor spacer is arranged at the position of the via hole (conduction hole) provided in the dielectric layer 36 to electrically connect the ground pattern, for example, the ground patterns of the coupling layers 37 and 33. It is connected.
- the unnecessary mode between the ground plates can be suppressed without providing a means for coupling the ground potential separately.
- a via hole 36A is formed in the dielectric layer 36 in the first embodiment, and a conductor is used as the spacer 34A.
- a via hole is formed in the dielectric layer 36 in the second embodiment.
- a dielectric can be used as the spacer 34A without forming the hole 36A, and in this case, the same effect can be obtained.
- FIG. 16 is a circuit layout diagram showing the third embodiment, and (a) shows the entire phase shift unit.
- (B) is a schematic diagram showing a multilayer structure, and
- (C) is an enlarged view schematically showing a portion where signal lines, scanning lines, and the like arranged on the phase control layer 35 intersect. It is a large map.
- a space as a space for mounting the switch 17S is secured by the dielectric film 34B (thickness 10 / m).
- the dielectric layer 34 is composed of only the dielectric film 34B, but in this embodiment, the substrate is located between the dielectric film 34B and the coupling layer 33. 34 C has been introduced.
- the switch 17S of the dielectric layer 34 can be mounted.
- the substrate above the height of the space for this purpose is composed of the substrate 34C.
- the thickness of the dielectric film 34B can be reduced, and the process of forming the dielectric film 34B becomes easy.
- a high-frequency signal from the strip line 24 on the phase control layer 35 can be transmitted through the coupling slot 21. It is efficiently coupled to the radiating element 15.
- FIG. 17 is a circuit layout diagram showing the fourth embodiment, (a) is a circuit layout diagram of a phase shift control layer showing the entire phase shift unit, (b) is a schematic diagram showing a multilayer structure, (c) FIG. 3 is an enlarged view schematically showing a portion where a signal line, a scanning line, and the like wired on the phase control layer 35 intersect.
- a space as a space for mounting the switch 17S is secured by the wiring pattern thickness of the phase control layer 35.
- a part of the wiring pattern 24 B of the strip line 24 is formed to be thicker than the height of the switch 17 S due to a thickening method or the like.
- the substrate 34 is inserted between the thick film wiring pattern 24 B and the bonding layer 33.
- a high frequency signal from the strip line 24 on the phase control layer 35 can be coupled to the coupling slot. Through the antenna 21 to the radiating element 15 efficiently.
- FIG. 18 is a circuit layout diagram showing the fifth embodiment, (a) is a circuit layout diagram of a phase control layer showing the entire phase shift unit, (b) is a schematic diagram showing a multilayer structure, and c) is a phase diagram.
- FIG. 4 is an enlarged view schematically illustrating a portion where a signal line, a scanning line, and the like, which are wired on a control layer 35, intersect.
- a board 34D (thickness ⁇ ⁇ ) having a cavity 34E secures a space for mounting the switch 17S. I have.
- a cavity (space) 34 ⁇ is formed on the substrate 34D at the position of the switch 17S mounted on the phase control layer 35, and the switch 17 S is placed in the cavity 3 4 ⁇ .
- the high frequency signal of the strip line 24 on the phase control layer 35 can be coupled to the coupling port 2D. It is efficiently coupled to radiating element 15 through 1.
- a mechanical process of cutting the surface of the substrate 34D with a router or the like, or a mechanical process of forming a through hole by die cutting or the like may be used.
- the resin in the cavity 34% may be peeled off by exposure and development treatment, and various forming methods can be used.
- the present invention can be applied to a different stacking order from the embodiment shown in FIGS. 14 to 18.
- phase control layer 35 For example, the order of lamination is from bottom to top, phase control layer 35, dielectric layer 36, coupling layer 37, dielectric layer 38 3, distributing / combining layer 39, dielectric layer 38, coupling layer 33, dielectric layer 32, radiating element layer 31, distribution-combining layer 39 on inner layer, phase control layer 35 Can also be arranged on the outer layer.
- a high-frequency power supply pin between the distribution / combination layer 39 and the phase control layer 35 is provided by a feed pin passing through a hole provided on the coupling layer 37. What is necessary is just to make a high-frequency connection between the phase control layer 35 and the radiating element 15 by a feed pin penetrating the coupling layer 37 and the coupling layer 33.
- phase control layer 35 By arranging the phase control layer 35 on the outside in this way, a stacked configuration can be achieved regardless of the height of the phase unit 16.
- the layer functioning as the splitting / combining section 14 (the splitting section in FIG.
- the composite layer 27 and the radial waveguides in the embodiments of FIGS. 14 to 18 can be omitted from the multilayer substrate 2.
- the phased array antenna according to the present invention is a high gain antenna applicable to a high frequency band, and is particularly useful for a satellite tracking on-vehicle antenna used for satellite communication and an antenna mounted on a satellite.
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Variable-Direction Aerials And Aerial Arrays (AREA)
Description
Claims
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/869,202 US6559798B1 (en) | 1998-12-24 | 1999-11-22 | Phased array antenna and method of manufacturing the same |
CA002356265A CA2356265C (en) | 1998-12-24 | 1999-11-22 | Phased array antenna and method of manufacturing the same |
EP99973554A EP1143562A4 (en) | 1998-12-24 | 1999-11-22 | PHASE-CONTROLLED GROUP ANTENNA AND METHOD FOR THEIR PRODUCTION |
NO20013112A NO20013112L (no) | 1998-12-24 | 2001-06-21 | Fasegruppeantenne og fremgangsmate ved fremstilling av denne |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10/368033 | 1998-12-24 | ||
JP36803398A JP3481481B2 (ja) | 1998-12-24 | 1998-12-24 | フェーズドアレイアンテナおよびその製造方法 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2000039890A1 true WO2000039890A1 (fr) | 2000-07-06 |
Family
ID=18490813
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP1999/006513 WO2000039890A1 (fr) | 1998-12-24 | 1999-11-22 | Antenne a balayage electronique |
Country Status (6)
Country | Link |
---|---|
US (1) | US6559798B1 (ja) |
EP (1) | EP1143562A4 (ja) |
JP (1) | JP3481481B2 (ja) |
CA (1) | CA2356265C (ja) |
NO (1) | NO20013112L (ja) |
WO (1) | WO2000039890A1 (ja) |
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- 1999-11-22 WO PCT/JP1999/006513 patent/WO2000039890A1/ja not_active Application Discontinuation
- 1999-11-22 US US09/869,202 patent/US6559798B1/en not_active Expired - Fee Related
- 1999-11-22 EP EP99973554A patent/EP1143562A4/en not_active Withdrawn
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Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2002023672A2 (en) * | 2000-09-15 | 2002-03-21 | Raytheon Company | Microelectromechanical phased array antenna |
WO2002023672A3 (en) * | 2000-09-15 | 2002-10-17 | Raytheon Co | Microelectromechanical phased array antenna |
US6653985B2 (en) | 2000-09-15 | 2003-11-25 | Raytheon Company | Microelectromechanical phased array antenna |
CN110462841A (zh) * | 2017-04-07 | 2019-11-15 | 夏普株式会社 | Tft基板、具备tft基板的扫描天线以及tft基板的制造方法 |
Also Published As
Publication number | Publication date |
---|---|
EP1143562A4 (en) | 2003-02-12 |
NO20013112L (no) | 2001-08-24 |
JP2000196334A (ja) | 2000-07-14 |
EP1143562A1 (en) | 2001-10-10 |
NO20013112D0 (no) | 2001-06-21 |
CA2356265C (en) | 2004-02-24 |
JP3481481B2 (ja) | 2003-12-22 |
CA2356265A1 (en) | 2000-07-06 |
US6559798B1 (en) | 2003-05-06 |
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