WO2000016547A1 - Verfahren und vorrichtung zur auswertung eines digitalen datenstromes - Google Patents
Verfahren und vorrichtung zur auswertung eines digitalen datenstromes Download PDFInfo
- Publication number
- WO2000016547A1 WO2000016547A1 PCT/EP1999/006586 EP9906586W WO0016547A1 WO 2000016547 A1 WO2000016547 A1 WO 2000016547A1 EP 9906586 W EP9906586 W EP 9906586W WO 0016547 A1 WO0016547 A1 WO 0016547A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- data stream
- bit
- bits
- transmitted
- packets
- Prior art date
Links
- 238000000034 method Methods 0.000 title claims abstract description 24
- 230000001360 synchronised effect Effects 0.000 claims abstract description 8
- 230000008520 organization Effects 0.000 claims description 3
- 230000001419 dependent effect Effects 0.000 claims description 2
- 238000001514 detection method Methods 0.000 claims description 2
- 239000003550 marker Substances 0.000 abstract 5
- 230000011664 signaling Effects 0.000 abstract 1
- 238000010586 diagram Methods 0.000 description 5
- 230000005540 biological transmission Effects 0.000 description 2
- 238000001914 filtration Methods 0.000 description 2
- 238000003491 array Methods 0.000 description 1
- 238000013144 data compression Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000018109 developmental process Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 230000015654 memory Effects 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 238000011084 recovery Methods 0.000 description 1
- 230000001629 suppression Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
- H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
- H04N21/43—Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
- H04N21/434—Disassembling of a multiplex stream, e.g. demultiplexing audio and video streams, extraction of additional data from a video stream; Remultiplexing of multiplex streams; Extraction or processing of SI; Disassembling of packetised elementary stream
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/04—Speed or phase control by synchronisation signals
- H04L7/041—Speed or phase control by synchronisation signals using special codes as synchronising signal
Definitions
- the invention relates to a method for evaluating a digital data stream, in which the data are transmitted in packets, each packet has a synchronous byte, and bit positions are specified in the packets at which identification bits are transmitted.
- the invention further relates to a device for evaluating a digital data stream.
- a first of these tables is the “Program Association Ta ble (PAT) ", which contains a list of all the programs in the transport multiplex as well as cross-references to a corresponding" Program Map Table (PMT) ".
- This in turn contains information that is required to decode the respective program.
- This information includes, among other things, identifier bits which represent an identifier for the current table, the length of the table, an identifier for the current transport stream and the version number of the current table.
- the applicant's previously unpublished German patent application 198 20 936 describes a method and a device for evaluating a digital data stream, the data being transmitted in packets, each packet having a synchronous byte and bit positions in which packets are transmitted, at which identification bits are transmitted .
- the identifier bits transmitted at predetermined bit positions of successive packets are compared with one another, and when a detection of a mismatch between the identifier bits compared with one another is generated, which signals the inequality of the identifier bits compared with one another.
- the identification bits are always compared using a multi-bit comparator.
- An exemplary embodiment of such a known multi-bit comparator is shown in FIG. 2.
- the object of the invention is to provide a method for evaluating a digital data stream with the features specified in the preamble of claim 1, in which the comparator effort is reduced.
- the advantages of the invention are, in particular, that the actual comparator effort is reduced to a single bit due to the use of a bit serial comparator.
- the effort for a possible comparison of larger units than the usual 8 bit does not increase the comparator effort with the serial method, since even for long filter elements, for example for a 40 bit comparator, the Comparator unit, ie the ExcIusiv-or-element, does not have to be changed.
- reference characteristic bits which are made available, for example, by a microcomputer, can also be clocked very easily serially into the shift register provided in the signal path of the reference characteristic bits.
- bit-parallel comparator much more effort would have to be taken.
- the memories for the reference characteristic bits do not necessarily have to be arranged very close together locally. It is sufficient if only adjacent elements of the storage chain are arranged close to one another (placement). Only the comparator unit used must be designed quickly.
- serial filters according to the invention save connection resources from this block, which is regarded as a closed area. This has the advantage that they can be easily implemented as macro blocks in gate arrays, full customer chips or as external peripheral chips. Furthermore, better interference suppression measures can be taken, the fewer connections need to be provided with it.
- front-end chips demodulators
- demultiplexers demultiplexers
- multiplexers multiplexers
- encryption and decryption systems are front-end chips
- FIG. 1 is a block diagram for a serial filter according to the invention.
- FIG. 2 is a block diagram of a known multi-bit comparator.
- FIG. 1 shows a block diagram for a serial filter according to the invention.
- This filter is a filter by means of which a predetermined PID code (packet identifier) is to be recognized in a digital data stream, for example an MPEG data stream.
- PID code packet identifier
- Such a PID code consists of 13 bits. It is predetermined in each of the transmitted packets
- Bit positions are provided and indicate the membership of the respective packet to a specific sub-data stream of the MPEG data stream.
- These sub-data streams each contain video, audio or additional data associated with a specific television broadcasting program.
- a large number of packets are assigned to each sub-data stream.
- the packets assigned to different sub-data streams are transmitted interleaved in time division multiplex.
- a digital MPEG data stream also has sub-data streams which contain information about the organization of the digital data stream. These are structured in tabular form, with a large number of identification bit groups being transmitted within the tables, each having a predetermined number of identification bits. For example, there are references to in the tables Broadcast program updates included.
- the serial filter shown in FIG. 1 is provided, for example, in a demultiplexer of a digital satellite radio receiver in order to separate a specific sub-data stream from the MPEG data stream, for example a sub-data stream in which the video, audio or teletext signals associated with a specific television broadcasting program be transmitted.
- the MPEG data stream must be monitored in the demultiplexer for the occurrence of a bit sequence which corresponds to a predetermined sequence of reference identifier bits, the predetermined sequence of reference identifier bits corresponding to the PID of the desired sub-data stream.
- a digital data stream coded according to the MPEG standard is fed in bit-serial form to the input E1 of the block diagram shown in FIG.
- the reference identifier bits which correspond to the PID of the desired sub-data stream, are also available in bit-serial form.
- This Referenzkennbits be provided for example via a serial microprocessor interface (I 2 C, SPI) and is written into a serial 13-bit latch 1, which is preferably designed as a shift register.
- the processor generates the shift register clock and release signals independently, so that no further control is necessary for the shift register.
- the signal A present at the input E1 and the output signal B of the 13-bit shift register 1 are fed to a bit-serial comparator 2, implemented as an exclusive or element, in which a bit-wise and bit-serial comparison of a total of 13 successive bit values takes place.
- the comparison results obtained are fed to a synchronous RS flip-flop 3 acting as a result accumulator. This is from one
- the invention was explained above using an exemplary embodiment in which a predefined PID code is to be recognized in an MPEG data stream.
- the invention is also suitable for the recognition of other predetermined bit sequences, for example for the recognition of a 5-bit wide version number or for the recognition of further predetermined bit sequences which are transmitted in tables which are also part of the MPEG data stream.
- the invention can also be used with DAB data streams or DVD data streams.
- the invention can also be implemented in software using a fixed or freely programmable state machine.
- FIG. 2 shows a block diagram of a known multi-bit comparator, in which a total of 13 comparators, which are arranged in parallel with one another, are necessary for filtering the MPEG data stream with a view to recognizing a predetermined PID code.
- the effort to implement such a multi-bit comparator is evidently much higher than the effort to implement a bit-series comparator according to the invention.
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Time-Division Multiplex Systems (AREA)
- Television Systems (AREA)
- Testing, Inspecting, Measuring Of Stereoscopic Televisions And Televisions (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
Abstract
Description
Claims
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2000570962A JP2002525922A (ja) | 1998-09-10 | 1999-09-07 | デジタルデータの流れを評価する方法と装置 |
EP99947284A EP1033034A1 (de) | 1998-09-10 | 1999-09-07 | Verfahren und vorrichtung zur auswertung eines digitalen datenstromes |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19841371.8 | 1998-09-10 | ||
DE19841371A DE19841371B4 (de) | 1998-09-10 | 1998-09-10 | Verfahren und Vorrichtung zur Auswertung eines digitalen Datenstromes |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2000016547A1 true WO2000016547A1 (de) | 2000-03-23 |
Family
ID=7880487
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/EP1999/006586 WO2000016547A1 (de) | 1998-09-10 | 1999-09-07 | Verfahren und vorrichtung zur auswertung eines digitalen datenstromes |
Country Status (4)
Country | Link |
---|---|
EP (1) | EP1033034A1 (de) |
JP (1) | JP2002525922A (de) |
DE (1) | DE19841371B4 (de) |
WO (1) | WO2000016547A1 (de) |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5708689A (en) * | 1995-08-28 | 1998-01-13 | Samsung Electronics Co., Ltd. | Circuit for detecting a synchronization byte of a transport stream |
US5742361A (en) * | 1995-11-30 | 1998-04-21 | Hitachi, Ltd. | Data demultiplexer |
JPH10174072A (ja) * | 1996-12-05 | 1998-06-26 | Samsung Electron Co Ltd | Mpeg2デマルチプレクサのパケット識別子(pid)フィルタ及びそのフィルタリング方法 |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3729174C2 (de) * | 1987-09-01 | 1996-04-18 | Siemens Ag | Bitserieller Komparator |
KR930010942B1 (ko) * | 1991-08-16 | 1993-11-17 | 삼성전자 주식회사 | 직렬비교기 |
JP3189889B2 (ja) * | 1998-02-20 | 2001-07-16 | 日本電気株式会社 | Pidフィルタ回路 |
DE19820936C1 (de) * | 1998-05-09 | 1999-06-02 | Grundig Ag | Verfahren und Vorrichtung zur Auswertung eines digitalen Datenstromes |
-
1998
- 1998-09-10 DE DE19841371A patent/DE19841371B4/de not_active Expired - Lifetime
-
1999
- 1999-09-07 JP JP2000570962A patent/JP2002525922A/ja not_active Withdrawn
- 1999-09-07 EP EP99947284A patent/EP1033034A1/de not_active Ceased
- 1999-09-07 WO PCT/EP1999/006586 patent/WO2000016547A1/de not_active Application Discontinuation
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5708689A (en) * | 1995-08-28 | 1998-01-13 | Samsung Electronics Co., Ltd. | Circuit for detecting a synchronization byte of a transport stream |
US5742361A (en) * | 1995-11-30 | 1998-04-21 | Hitachi, Ltd. | Data demultiplexer |
JPH10174072A (ja) * | 1996-12-05 | 1998-06-26 | Samsung Electron Co Ltd | Mpeg2デマルチプレクサのパケット識別子(pid)フィルタ及びそのフィルタリング方法 |
Non-Patent Citations (1)
Title |
---|
PATENT ABSTRACTS OF JAPAN vol. 1998, no. 11 30 September 1998 (1998-09-30) * |
Also Published As
Publication number | Publication date |
---|---|
JP2002525922A (ja) | 2002-08-13 |
DE19841371B4 (de) | 2006-04-20 |
EP1033034A1 (de) | 2000-09-06 |
DE19841371A1 (de) | 2000-03-16 |
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