WO1999048184A1 - Procede de prevention des surcharges, circuit chargeur, dispositif electronique et compteur de temps - Google Patents
Procede de prevention des surcharges, circuit chargeur, dispositif electronique et compteur de temps Download PDFInfo
- Publication number
- WO1999048184A1 WO1999048184A1 PCT/JP1999/001383 JP9901383W WO9948184A1 WO 1999048184 A1 WO1999048184 A1 WO 1999048184A1 JP 9901383 W JP9901383 W JP 9901383W WO 9948184 A1 WO9948184 A1 WO 9948184A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- charging
- voltage
- input terminal
- power supply
- supply line
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/02—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries for charging batteries from ac mains by converters
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/0029—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with safety or protection devices or circuits
- H02J7/00302—Overcharge protection
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/0029—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with safety or protection devices or circuits
- H02J7/00308—Overvoltage protection
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/0047—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with monitoring or indicating devices or circuits
Definitions
- the present invention relates to an overcharge prevention method, a charging circuit, an overcharge prevention method, and an electronic device and a timepiece using the charging circuit that are suitable for preventing overcharge.
- a diode bridge circuit is known as a charging circuit for charging a large-capacity capacitor with an AC voltage generated by a generator.
- loss occurs by the voltage drop of two diodes, so it is not suitable for charging a small amplitude AC voltage.
- FIG. 15 is a circuit diagram of a conventional charging circuit.
- the comparator compares the voltage of the output terminals A and B of the generator AG with the voltage of the power supply Vdd — C0M1 and COM2, the voltage of the output terminals A and B of the generator AG and the voltage of the ground GND.
- Comparators COM3 and COM4 are provided, and a large-capacity capacitor C for storing the charging current is provided.
- the outputs of the comparators C0M1 to C0M4 control ON / OFF of the P-channel FET Pl, P2 and the N-channel FETNI, N2.
- the N-channel FETN1 is turned on by the comparator C0M3, and the output terminal A is grounded.
- the P-channel FET P2 is turned on by the comparator COM2, and the charge is charged to the capacitor C along the path shown by the arrow.
- the P-channel FET P2 does not turn on, so the current flows in the reverse direction of the arrow and the charging efficiency drops. Does not occur.
- An object of the present invention is to provide an overcharge prevention method capable of reliably preventing overcharge with a simple configuration and a charging circuit capable of reliably preventing overcharge.
- Another object of the present invention is to apply the charging circuit to an electronic device or a wristwatch. Disclosure of the invention
- the present invention uses a rectifier circuit that has a plurality of rectifier elements, converts AC input from an external AC power supply through a pair of input terminals into DC and outputs the DC, and charges the charging element with power.
- An overcharge prevention method used in a circuit comprising detecting a charging voltage of the charging element, and, if the detected charging voltage exceeds a predetermined voltage, does not pass through the plurality of rectifying elements.
- the pair of input terminals is short-circuited by a path.
- the present invention uses a rectifier circuit that has a plurality of rectifiers, converts AC input from an external AC power supply through a pair of input terminals into DC, and outputs the DC.
- An overcharge prevention method used in a charging circuit which detects a charging voltage of a charging element, compares the detected charging voltage with a predetermined reference voltage, and, when the charging voltage exceeds the reference voltage, It is characterized in that a pair of input terminals is short-circuited by a route that does not pass through a plurality of rectifying elements.
- an overcharge prevention method used in a charging circuit for rectifying an AC voltage and charging the charging element with power comprising detecting a charging voltage of the charging element, and determining the detected charging voltage in advance. If the charging voltage is higher than the reference voltage, the generated current flowing from one input terminal is supplied to the other input terminal through a path that does not pass through the first and second diodes.
- the present invention when the charging voltage exceeds the reference voltage, by short-circuiting both input terminals, the generated current flowing from one of the input terminals can be routed without passing through the first and second diodes. Is supplied to the other input terminal.
- the present invention uses a rectifier circuit that has a plurality of rectifiers, converts AC input from an external AC power supply through a pair of input terminals into DC, and outputs the DC.
- the charging circuit if the charging voltage detected by the charging voltage detection unit that detects the charging voltage of the charging element and the charging voltage detected by the charging voltage detection unit exceeds a predetermined voltage, do not pass through a plurality of rectifying elements.
- a short-circuit unit for short-circuiting a pair of input terminals along a path.
- the present invention uses a rectifier circuit that has a plurality of rectifiers, converts AC input from an external AC power supply through a pair of input terminals into DC, and outputs the DC.
- a charging circuit a charging voltage detection unit that detects a charging voltage of a charging element, a comparison unit that compares a charging voltage detected by the charging voltage detection unit with a predetermined reference voltage, and a comparison of the comparison unit.
- a short-circuit unit that short-circuits the pair of input terminals via a path that does not pass through a plurality of rectifying elements when the charging voltage exceeds the reference voltage based on the result.
- the present invention provides a charging circuit for rectifying an AC voltage supplied to first and second input terminals to charge a charging element provided between the first and second power supply lines, A first switch provided between the first input terminal and the first power supply line, the on / off of which is controlled based on the voltage of the second input terminal; a second switch connected to the first input terminal; A second switch whose on / off is controlled based on the voltage of the first input terminal, and a second switch which is provided between the first input terminal and the second power supply line.
- a second diode provided between the second input terminal and the second power supply line,
- a comparison unit that detects a charging voltage of the charging element and compares the detected charging voltage with a predetermined reference voltage.Based on a comparison result of the comparison unit, a generated current flowing from one input terminal is calculated based on a comparison result of the comparison unit.
- a short-circuit unit that short-circuits the first input terminal and the second input terminal by supplying the other input terminal with a path that does not pass through the first and second diodes. I have.
- the short-circuit unit may be a transistor provided between the first input terminal and the second input terminal.
- the short-circuit unit includes a third diode having one end connected to the first input terminal, and a fourth diode having one end connected to the second input terminal.
- the present invention provides a charging circuit for rectifying an AC voltage supplied to first and second input terminals and charging power to a charging element provided between a high-potential power line and a low-potential power line.
- a first diode having an anode connected to the first input terminal and a cathode connected to the high-potential-side power supply line, and a diode connected to the second input terminal and connected to the high-potential-side power supply line.
- a second diode to which the cathode is connected, a first input terminal to which the drain is connected, a source to the low potential side power supply line, and a first N terminal to which the gate is connected to the second input terminal A second N-channel field-effect transistor having a drain connected to the second input terminal, a source connected to the low-potential power supply line, and a gate connected to the first input terminal; , A comparator for comparing the charging voltage of the charging element with a predetermined reference voltage is provided between the first and second input terminals, and on / off is controlled based on a comparison result of the comparator. And a transmission gate.
- the present invention provides a charging circuit for rectifying an AC voltage supplied to first and second input terminals and charging power to a charging element provided between a high-potential power line and a low-potential power line.
- a first diode having a power source connected to the first input terminal and an anode connected to the low-potential power supply line, and a cathode connected to the second input terminal;
- Second diode with anode connected to line A first P-channel field-effect transistor having a drain connected to the first input terminal, a source connected to the high-potential power supply line, and a gate connected to the second input terminal;
- a second P-channel field-effect transistor having a drain connected to the input terminal of the second power supply line, a source connected to the high-potential power supply line, and a gate connected to the first input terminal;
- a transmission gate provided between the first and second input terminals, the on / off of which is controlled based on the comparison result of the comparator. It is characterized by.
- the present invention provides a charging circuit for rectifying an AC voltage supplied to first and second input terminals and charging power to a charging element provided between a high-potential power line and a low-potential power line.
- a first diode having an anode connected to the first input terminal and a cathode connected to the high-potential-side power supply line, and a diode connected to the second input terminal;
- a first N-channel field-effect transistor a second input terminal having a drain connected thereto, a low-potential power supply line having a source connected thereto, and a second input terminal having a gate connected to the first input terminal.
- the fourth diode is connected to the power source and drain of the third and fourth diodes, the low potential side power supply line is connected to the source, and the comparison result of the comparison is supplied to the gate.
- an N-channel field effect transistor is an N-channel field effect transistor.
- the present invention provides a charging circuit for rectifying an AC voltage supplied to first and second input terminals and charging power to a charging element provided between a high-potential power line and a low-potential power line.
- a first diode having a power source connected to the first input terminal and an anode connected to the low-potential power supply line, and a cathode connected to the second input terminal, The second diode to which the anode is connected, the drain to the first input terminal, and the source to the high-potential power supply line
- a first P-channel field effect transistor having a gate connected to the second input terminal, a drain connected to the second input terminal, a source connected to the high potential side power supply line
- a second P-channel field-effect transistor having a gate connected to the first input terminal; a comparator for comparing the charging voltage of the charging element with a predetermined reference voltage; and a force source connected to the first input terminal.
- a third diode connected to the second input terminal, a fourth diode connected to the second input terminal, a diode and a drain of the third and fourth diodes connected to the high potential side
- a third P-channel field-effect transistor connected to the power supply line and the source, and the comparison result of the comparator is supplied to the gate.
- the present invention provides a charging circuit for rectifying an AC voltage supplied to first and second input terminals and charging power to a charging element provided between a high-potential power line and a low-potential power line.
- a first diode having an anode connected to the first input terminal and a cathode connected to the high-potential-side power supply line, and an anode connected to the second input terminal.
- a second diode having a cathode connected to the line, a first N having a drain connected to the first input terminal, a source connected to the low potential side power supply line, and a gate connected to the second input terminal
- a second N-channel field-effect transistor having a drain connected to the second input terminal, a source connected to the low-potential power supply line, and a gate connected to the first input terminal;
- a comparator for comparing the charging voltage of the charging element with a predetermined reference voltage, a drain connected to the first input terminal, a source connected to the low-potential side power supply line, and an output of the comparator.
- a third N-channel field-effect transistor whose gate is connected to the terminal, a drain connected to the second input terminal, a source connected to the low-potential power supply line, and a gate connected to the output terminal of the comparator. And a fourth N-channel field-effect transistor to be connected.
- the electronic device of the present invention is characterized in that the electronic device incorporates the charging circuit of each of the above aspects, and operates by electric power supplied from the charging circuit.
- the timepiece of the present invention is characterized in that the timepiece circuit incorporates the charging circuit of each of the above aspects and measures a time with electric power supplied from the charging circuit.
- FIG. 1 is a diagram illustrating the principle of the first embodiment of the present invention.
- FIG. 2 is a circuit diagram of a charging circuit used in the wristwatch according to the first embodiment of the present invention.
- FIG. 3 is a perspective view showing a configuration of the AC generator according to the embodiment and a peripheral mechanism thereof.
- FIG. 4 is a timing chart showing a charging operation of the charging circuit according to the embodiment.
- FIG. 5 is a processing flowchart for explaining the operation of the limit transistor according to the embodiment.
- FIG. 6 is a circuit diagram of a charging circuit used for a wristwatch according to the second embodiment of the present invention.
- FIG. 7 is a timing chart showing the charging operation of the charging circuit according to the same embodiment.
- FIG. 8 is a circuit diagram of a charging circuit used for a wristwatch according to the third embodiment of the present invention.
- FIG. 9 is a circuit diagram of a charging circuit used for a wristwatch according to the fourth embodiment of the present invention.
- FIG. 10 is a circuit diagram showing a configuration of a charging circuit according to a modification of the first embodiment.
- FIG. 11 is a circuit diagram showing a configuration of a charging circuit according to a comparative example of the modification of the second embodiment.
- FIG. 12 is a circuit diagram showing a configuration of a charging circuit according to a modification of the second embodiment.
- ⁇ FIG. 13 is a perspective view showing a mechanical structure of an electronically controlled mechanical timepiece according to the modification.
- FIG. 9 is a block diagram showing an electrical configuration of an electronically controlled mechanical timepiece according to a modification.
- FIG. 15 is a circuit diagram of a conventional charging circuit.
- FIG. 16 is a diagram for explaining the back gate effect.
- FIG. 17 is a timing chart of a charging circuit according to a modification of the second embodiment.
- FIG. 18 is a circuit diagram illustrating a voltage detection determination unit according to the fifth embodiment.
- FIG. 1 is a diagram illustrating the principle of a charging circuit used in a wristwatch according to the first embodiment.
- the main part of the charging circuit 100 detects the charging voltage V a of the rectifying unit 10 for rectifying the generated voltage of the AC generator AG, the large capacity capacitor 20 for storing the charging current, and the large capacity capacitor 20, A voltage detection discriminator 3OA that outputs a control signal CS for controlling whether or not the input terminals AGl and AG2 are short-circuited based on the detected charging voltage Va, and connects the input terminals AG1 and AG2 based on the detection result. It consists of a short-circuit part 40 that short-circuits. Note that d shown in the figure is a parasitic diode.
- the charging current i flows into the large-capacity capacitor 20, and the charging voltage Va gradually increases.
- the voltage detection determination unit 3OA is configured to output a control signal CS for short-circuiting the input terminals AGl and AG2 when the charging voltage Va exceeds a predetermined voltage, or It is configured to determine whether the charging voltage Va has exceeded a predetermined voltage, and to output a control signal CS for short-circuiting the input terminals AG1 and AG2 when determining that the charging voltage Va has exceeded the predetermined voltage. .
- the short-circuit section 40 operates and the input terminals AG1 and AG2 are short-circuited.
- the arrow X The limit current ILIM flows through the path indicated by.
- FIG. 2 is a circuit diagram of a charging circuit used in the wristwatch according to the first embodiment.
- the main part of the charging circuit 100 is charged by detecting the charging voltage Va of the rectifier 10 that rectifies the voltage generated by the AC generator AG, the large-capacity capacitor 20 that stores the charging current, and the large-capacity capacitor 20 and charges the battery.
- the comparison unit 30 (two-voltage detection determination unit) that compares the voltage Va with the reference voltage Vref, and a short-circuit unit 40 that short-circuits the input terminals AG1 and AG2 based on the comparison result of the comparison unit 30.
- d shown in the figure is a parasitic diode.
- the rectifier 10 is configured as a bridge-type full-wave rectifier circuit, so that the input terminals AG1 and AG2 are supplied with the voltage generated by the AC generator AG.
- the input terminals AG1 and AG2 are connected to the anodes of the diodes Dl and D2 whose power sources are connected to the high potential side power supply line VDD. Therefore, when the terminal voltages V1 and V2 of the input terminals AG1 and AG2 exceed the sum of the charging voltage Va and the voltage drop Vf of the diodes Dl and D2, the diodes Dl and D2 are turned on.
- enhancement-type N-channel FETs N1 and N2 are provided between the input terminals AG1 and AG2 and the low-potential-side power supply line VSS.
- the gate of the N-channel FE TN1 is connected to the input terminal AG2, while the gate of the N-channel FE TN2 is connected to the input terminal AG1.
- the N-channel FE TN1 and N2 have the same electrical characteristics, and their threshold voltage is Vt.
- the N-channel FE TN1 is turned on. At this time, the N-channel FE TN2 is off. If the amplitude of the generated voltage is very small, the diode D2 is off.
- the diode D2 is turned on.
- the charging current i flows through the path of “input terminal AG2 ⁇ diode D2 ⁇ high-potential-side power supply line VDD—large-capacity capacitor 20 ⁇ low-potential-side power supply line VSS N-channel FE TN1 ⁇ input terminal AG1”.
- the capacitor 20 is charged.
- the terminal voltage VI exceeds the terminal voltage V2
- the charging current i flows through the path of “N2 ⁇ input terminal AG2”, and the large-capacity capacitor 20 is charged.
- this rectifying unit 10 does not require a comparator C0M1 to COM4, and thus has the advantage of a small circuit size of the charging circuit.
- the voltage loss is small, there is an advantage that charging can be performed efficiently even when the amplitude of the generated voltage is small.
- the large-capacity capacitor 20 is formed of, for example, a rechargeable secondary battery and has a certain withstand voltage. If the battery is charged beyond the withstand voltage, the battery is overcharged, the large-capacity capacitor 20 is deteriorated, and the charging efficiency is reduced.
- the comparing section 30 is composed of a comparator C0M, resistors Rl and R2 for dividing the charging voltage Va, and a reference voltage generating circuit 31 for generating a reference voltage Vref.
- the reference voltage Vref is supplied to the positive input terminal of the comparator COM, while the voltage Va ′ (two Va ⁇ R 2 / (R 1 + R) is applied to the negative input terminal of the comparator COM. 2)) are supplied.
- the comparator COM generates a control signal CS by comparing the reference voltage Vref with the voltage Va '. If the voltage Va 'is higher than the reference voltage Vref, the control signal CS is at the triangular level, while if the voltage Va' is lower than the reference voltage Vref, the control signal CS is at the high level.
- the reference voltage V ref is set in consideration of the withstand voltage of the large capacity capacitor 20 so that the large capacity capacitor 20 is not overcharged. Note that the reason why the charging voltage Va is not directly compared with the reference voltage Vref but is compared with the voltage Va ′ is because the reference voltage Vref is easily produced.
- the short-circuit portion 40 is configured by a limiter transistor LIMTr.
- LIMTr a P-channel enhancement-type transmission gate transistor is used and connected to the input terminals AG1 and AG2.
- Transmission gate The on / off of the transistor is controlled by its gate voltage, and the input and output are bidirectional.
- the control signal CS is composed of P channels, the control signal CS is on (connected) when the control signal CS is at the one-level level, and is off (open) when the control signal CS is at the high level. Therefore, when the charging voltage Va exceeds the predetermined voltage, the input terminals AG1 and AG2 are connected, the limiter current ILIM flows, and the charging current i does not flow into the large-capacity capacitor 20.
- FIG. 3 is a perspective view showing the configuration of the alternator AG and its peripheral mechanism.
- the alternator AG has a mouth 14 and a stay 15, and when the two-pole magnetized disk-shaped mouth 14 rotates, the AC generator AG outputs the stay 15.
- An electromotive force is generated in coil 16 so that AC output can be taken out.
- reference numeral 13 denotes a rotating weight that performs a turning motion in the wristwatch body case
- 11 denotes a wheel train mechanism that transmits the rotating motion of the rotating weight 13 to the generator AG.
- the oscillating weight 13 rotates according to the swing of the arm of the person wearing the wristwatch, so that an electromotive force can be obtained from the AC generator AG.
- the AC output from the AC generator AG is rectified by the charging circuit 100 and supplied to the processing device 9.
- the processing device 9 drives the clock device 7 with the electric power discharged from the charging circuit 100. Note that even when the AC generator AG is in a non-power generation state, the processing device 9 and the clock device 7 are driven by the power supplied from the large-capacity capacitor 20.
- the clock device 7 includes a crystal oscillator, a counter circuit, and the like.
- the master clock signal generated by the crystal oscillator is frequency-divided by a counter circuit, and time is measured based on the frequency division result. I have.
- FIG. 4 is a timing chart showing the charging operation of the charging circuit.
- the AC generator AG starts generating power
- the generated voltage is supplied to both input terminals AG1 and AG2.
- the phase of the terminal voltage VI of the input terminal AG1 and the phase of the terminal voltage V2 of the input terminal AG2 are inverted as shown in FIGS. 4 (a) and 4 (b).
- Vt in the figure is the threshold voltage of the N-channel FETN1, N2.
- the N-channel FETN2 is turned on. Thereafter, when the terminal voltage VI rises, exceeds the voltage of the high-potential power supply line VDD at time T2, and further rises by the voltage drop Vf of the diode D1 (time T3), the diode D1 is turned on. At this time, since the terminal voltage V2 is lower than the threshold voltage Vt, the N-channel FETN1 is in an off state.
- the terminal voltage VI decreases, the terminal voltage V2 increases, and the terminal voltage V2 exceeds the threshold voltage Vt at time T5. Then, the N-channel F ETN1 is turned on. Thereafter, when the terminal voltage V2 rises, exceeds the voltage of the high-potential-side power supply line VDD at time T6, and further rises by the voltage drop Vf of the diode D2 (time T7), the diode D2 is turned on. At this time, since the terminal voltage VI is lower than the threshold voltage Vt, the N-channel FETN2 is off.
- the charging current i flows into the large-capacity capacitor 20, so that the charging voltage Va gradually increases.
- step S2 since the limiter transistor LIMTr shifts from the off state to the on state (step S2), the input terminals AG1 and AG2 are short-circuited.
- the terminal voltage AG1 (V1) rises and the terminal voltage AG2 (V2 ) Drops, the limiting current ILIM flows through the path indicated by the arrow X in the figure.
- the overvoltage detection may be performed in a sampling manner even if the overvoltage is not always detected.
- the power supply of the comparator and the resistors Rl and R2 are configured to stop the power supply at the transistor switch. By turning on the switch and supplying power to the comparator COM and the resistors R1 and R2 to perform overvoltage detection, current consumption related to the detection operation can be reduced.
- a latch circuit may be provided at the comparator output to hold the comparator output signal during the sampling period.
- the charging circuit 100 has a self-control characteristic that the limit current ILIM is reduced by forming a short-circuit path.
- a limiter transistor LIMTr is provided between the rectifier 10 and the large-capacity capacitor 20, and the limiter transistor LIMTr is turned off when the charging voltage Va exceeds a predetermined voltage. It is also conceivable to disconnect the rectifier 10 and the large-capacitance capacitor 20 in the state. However, with such a configuration, a large generated voltage is generated at the input terminals AG1 and AG2, and it is necessary to increase the withstand voltage of the limiter transistor LIMTr. However, in the charging circuit of a small portable device such as a wristwatch, the withstand voltage is low. ICs are implemented using small transistors, so a large breakdown voltage transistor LIMTr is not suitable for IC implementation.
- the input terminals AG1 and AG2 are configured to be short-circuited, so that a limiter transistor LIMTr having a low withstand voltage can be used.
- the advantage is that it can be easily integrated into an IC.
- the circuit scale can be reduced, and the current consumption can be reduced.
- the short-circuiting section 40 is configured using a transmission gate, and when the voltage Va ′ obtained by dividing the charging voltage Va exceeds the reference voltage Vref, the transmission gate is controlled so as to be turned on.
- the charging voltage Va does not exceed the withstand voltage of the large-capacity capacitor 20 and overcharging of the large-capacity capacitor 20 can be prevented.
- the short-circuit section 40 does not cut off the rectifier section 10 and the large-capacity capacitor 20 but flows the generated current through a path that does not pass through the diodes Dl and D2.
- a transistor having a low withstand voltage can be used as the transistor used for the junction 40, and it is easy to implement an IC.
- Figure 16 shows the I DS-V GS characteristics of a general enhancement-type P-channel FET. From this figure, it can be seen that when the body potential Vsub decreases with respect to the source potential Vs, the IDS-VGS characteristics change and the threshold voltage Vt (absolute value between the gate and the source) decreases.
- the resistance value between the source and the gate of the limiter transistor LIMTr decreases, and the limiter transistor LIMTr becomes small. Evening current ILIM may flow. This is a problem especially when the generated current is large and the voltage drop Vf is large. Also, the watch IC, since the 1 ⁇ 0 3 £ 1 1 threshold voltage is set to 0. 5 V approximately and a low-voltage, large influence of the back gate effect.
- the second embodiment is made in view of such a point, and reliably opens the short-circuit path of the input terminals AG1 and AG2 when the charging voltage Va does not reach the reference voltage Vref. It is.
- FIG. 6 is a circuit diagram of a charging circuit used in a wristwatch according to the second embodiment.
- the charging circuit 101 uses a rectifier 10 0 ′ that is the reverse of the low-potential-side power supply line V SS and the high-potential-side power supply line VDD, instead of the rectifier 10 of the first embodiment.
- the configuration is the same as that of the charging circuit 100 of the first embodiment shown in FIG. Further, the configurations of the AC generator AG and its peripheral mechanism are the same as those of the first embodiment shown in FIG.
- the input terminals AG1 and AG2 are connected to the low-potential-side power supply line VSS via the diodes Dl and D2.
- input terminals AG1 and AG2 Between the power supply lines VDD, enhancement-type P-channel FETP1, ⁇ 2 are provided.
- the gate of the ⁇ channel FE TP1 is connected to the input terminal AG2, while the gate of the ⁇ channel FE TP2 is connected to the input terminal AG1. Therefore, when the voltage at the input terminal AG1 falls below the voltage at the input terminal AG2 and the voltage Vgs between the gate and the source of the channel F ⁇ 2 exceeds a certain value, the P-channel FETP2 is turned on.
- the diode D1 is turned on. Then, the charge current flows through the path of “input terminal AG2 P-channel FE TP2 ⁇ high-potential-side power line VDD large-capacity capacitor 20 diode Dl ⁇ input terminal AG1”, and charges the large-capacity capacitor 20 .
- the short-circuit section 40 ' is composed of a P-channel enhancement type limiter transistor LIMTr and diodes D3 and D4.
- the source and body of the limiter transistor and MTr are connected to the high-potential side power supply line VDD, the drain is connected to the anode of each of the diodes D3 and D4, and the control signal CS is supplied to the gate. It has become.
- the power sources of the diodes D3 and D4 are connected to the input terminals AG1 and AG2.
- the body of the limiter transistor LIMTr is at the same potential as the source, there is no inconvenience when the resistance value in the off state decreases due to the back gate effect. Therefore, the short-circuit portion 40, when charging the large-capacity capacitor 20, does not flow the limiting current ILIM, and thus can be charged efficiently.
- diodes D3 and D4 are provided, so even if the limit transistor LIMTr is turned on, the limit current ILIM does not immediately flow, but the following equation is used. 1. It is necessary to satisfy the condition given by Equation 2. However, the drain-source voltage of the limiter transistor LIMTr is Vds', and the drop voltage of the diodes D3 and D4 is Vf.
- FIG. 7 is a timing chart showing the charging operation of the charging circuit. Note that Vt in the figure is the threshold voltage of the P-channel FETs P1 and P2.
- the P-channel FET2 is turned on. Thereafter, when the terminal voltage VI falls, falls below the low-potential-side power supply line VSS at time T2, and further falls by the drop voltage Vf of the diode D1 (time T3), the diode D1 turns on. At this time, since the terminal voltage V2 is higher than the threshold voltage Vt, the P channel F ETP1 is off.
- the input terminal AG2 ⁇ P-channel FE TP2 High-potential power supply line VDD Large-capacity capacitor 20 ⁇ Low-potential power supply line VSS ⁇ Diode Dl
- the charging current flows through the path of “”, and the electric charge is charged in the large-capacity capacitor 20.
- the terminal voltage VI increases, the terminal voltage V2 decreases, and the terminal voltage V2 falls below the threshold voltage Vt at time T5. Then, the P-channel FETP1 is turned on. Thereafter, the terminal voltage V2 falls, falls below the voltage of the low-potential-side power supply line VSS at time T6, and further falls by the drop voltage Vf of the diode D2 (time T7), turning on the diode D2. At this time, since the terminal voltage VI has exceeded the threshold voltage Vt, the P-channel FET2 is off.
- the overcharge prevention operation will be described with reference to FIG.
- the charging current i flows into the large-capacity capacitor 20, so that the charging voltage Va gradually increases.
- the comparator COM of the comparison unit 30 constantly compares the charging voltage Va with the voltage Va '(two VaR2 / (R1 + R2)) obtained by dividing the charging voltage Va by the resistors R1 and R2 and the reference voltage Vref. In comparison, when the former exceeds the latter, the control signal CS is set to the verbal level. Do Then, the limiter transistor LIMTr shifts from the off state to the on state.
- the P-channel FET P1 when the terminal voltage V2 falls and falls below the threshold voltage Vt, the P-channel FET P1 is turned on, and when the terminal voltage V2 satisfies the condition of the above equation 2, the arrow X1 in the figure becomes The limiter current IUM flows in the path shown.
- the terminal voltage VI falls and the P-channel FET P2 is turned on, and if the terminal voltage V 1 satisfies the condition of the above-described equation 1, the limiting current ILIM Flows.
- the source and the body of the limiter transistor LIMTr are connected to the high potential side power supply line VDD, so that the body potential does not exceed the source potential.
- the limiter current ILIM does not flow during normal operation due to the back gate effect. As a result, the charging efficiency can be further improved.
- FIG. 8 is a circuit diagram of a charging circuit used for a wristwatch according to the third embodiment.
- the same parts as those in FIG. 2 are denoted by the same reference numerals.
- the difference between the charging circuit 100 "of the third embodiment and the charging circuit 100 of the first embodiment is that, instead of the limiter transistor LIMTr functioning as the short-circuit section 40, the input terminal AG 1 and the low-potential-side power supply
- the line is connected in parallel with the N-channel FET N1 between the line VSS and the limiter transistor LIMTrl, which is an enhancement-type N-channel FET with the gate terminal connected to the output terminal of the comparator and the input terminal AG2.
- An enhancement-type N-channel connected in parallel with the N-channel FET N2 between the potential side power supply line V SS and the gate terminal connected to the output terminal of the comparator COM.
- a limited transistor, LIMTr2 which is an FET.
- the limiter transistor LIMTrl and the limiter transistor LIMTr2 have the same electrical characteristics.
- the limiter transistor since the limiter transistor is configured with N channels, it is turned off (open) when the control signal CS is at the mouth level. ), When the control signal CS is at high level, it is turned on (connected). Therefore, when the charging voltage Va exceeds the predetermined voltage, the input terminals AG1 and AG2 are connected, the limiting current IUM flows, and the charging current i does not flow into the large-capacity capacitor 20.
- the charging current i flows into the large-capacity capacitor 20, and the charging voltage Va gradually increases.
- the comparator COM of the comparison unit 30 compares the voltage Va '(two Va, R2 / (R1 + R2)) obtained by dividing the charging voltage Va by the resistors Rl and R2 with the reference voltage Vref. Then, when the former exceeds the latter, the control signal CS is set to the high level.
- the overvoltage detection may be performed in a sampling manner even if the overvoltage is not always detected.
- the comparator C ⁇ M and the resistors Rl and R2 are configured so that the power supply is stopped by the transistor switch, and the transistor switch is turned on every few seconds to turn the comparator COM and the resistor Rl, By supplying power to R2 and performing overvoltage detection, current consumption related to the detection operation can be reduced.
- a latch circuit is preferably provided for the comparator output to hold the comparator output signal during the sampling period.
- this charging circuit 100 has a self-control characteristic that the limit current ILIM is reduced by forming a short-circuit path.
- the rectifier 10 is configured without using a comparator, the circuit scale can be reduced, and the current consumption can be reduced.
- the short-circuit section 40 is composed of two N-channel FETs, a limiter transistor LI MTrl and a limiter transistor LIMTr2.
- the limiter transistor 40 Evening L IMTrl and limiter transistor LIMTr2 are controlled to be turned on at the same time, so that the charging voltage Va does not exceed the withstand voltage of the large-capacity capacitor 20 and overcharging of the large-capacity capacitor 20 can be prevented.
- the short-circuit section 40 does not cut off the rectifier section 10 and the large-capacitance capacitor 20 but flows the generated current through a path that does not pass through the diodes Dl and D2.
- Transistors with low withstand voltage can be used, making it easy to implement ICs. Further, when the input terminals AG1 and AG2 are short-circuited, a short brake is applied, so that the amplitudes of the terminal voltages VI and V2 can be automatically reduced.
- the body potential does not exceed the source potential.
- the limiter current IL IM does not flow during normal operation due to the back gate effect. As a result, the charging efficiency can be further improved.
- FIG. 9 is a circuit diagram of a charging circuit used for a wristwatch according to the fourth embodiment.
- the same parts as those in the first embodiment in FIG. 2 are denoted by the same reference numerals.
- the main parts of the charging circuit 100 "" are a rectifier 10 that rectifies the voltage generated by the AC generator AG, a large-capacity capacitor 20 that stores the charging current, and a large-capacity capacitor 20.
- the comparing section 30 detects the charging voltage Va of the comparator section and compares the charging voltage Va with the reference voltage Vref.
- the high-potential-side power supply line VDD and the low-potential-side power supply line VSS are short-circuited based on the comparison result of the comparing section 30. It is composed of a short-circuit portion 40 and a reverse current prevention diode D for preventing a reverse current.
- the symbol shown in the figure is a parasitic diode. In this case, since the configurations of the rectifying unit 10, the large-capacity capacitor 20, and the comparing unit 30 are the same as those of the first embodiment, detailed description thereof will be omitted.
- the short-circuit section 40 is configured by a limiter transistor LIMTr.
- the limiter transistor LIMTr a P-channel enhancement transistor is used, which is connected to the power lines VDD and VSS.
- the control signal is constituted by the P channel, the control signal is in an on state (connection) when the control signal CS is at a low level, and is turned off (open) when the control signal CS is in a high level. Therefore, when the charging voltage Va exceeds the predetermined voltage, the high-potential power supply line VDD and the low-potential power supply line VSS are short-circuited, the limiter current ILIM flows, and the charging current i is prevented from flowing into the large-capacity capacitor 20. Become.
- the reverse current prevention diode DRP prevents the limiter current ILIM from flowing into the large-capacity capacitor 20 as the charging current i.
- the alternator AG starts generating power
- the generated voltage is supplied to both input terminals AG1 and AG2.
- the phase of the terminal voltage VI of the input terminal AG1 and the phase of the terminal voltage V2 of the input terminal AG2 are inverted as shown in FIGS. 4 (a) and 4 (b).
- Vt in the figure is the threshold voltage of N-channel FE TN1, N2.
- the N-channel FE TN2 is turned on. Thereafter, when the terminal voltage VI rises, exceeds the voltage of the high-potential power supply line VDD at time T2, and further rises by the voltage drop Vf of the diode D1 (time T3), the diode D1 is turned on. At this time, since the terminal voltage V2 is lower than the threshold voltage Vt, the N-channel FE TN1 is off.
- the terminal voltage VI decreases, the terminal voltage V2 increases, and the terminal voltage V2 exceeds the threshold voltage Vt at time T5. Then, the N-channel FE TN1 is turned on. Thereafter, when the terminal voltage V2 rises, exceeds the voltage of the high-potential-side power supply line VDD at time T6, and further rises by the voltage drop Vf of the diode D2 (time T7), the diode D2 is turned on. At this time, since the terminal voltage VI is lower than the threshold voltage Vt, the N-channel FETN2 is off.
- the charging current i flows through the path of TNlj, and the electric charge is charged in the large-capacity capacitor 20.
- the generated voltage is full-wave rectified, and the charging current i shown in FIG.
- the charging current i flows into the large-capacity capacitor 20, so that the charging voltage Va gradually increases.
- the limiter transistor LIMTr shifts from the off state to the on state (step S2), so that the high-potential power supply line VDD and the low-potential power supply line VSS are short-circuited.
- the terminal voltage AG1 (VI) rises and the terminal voltage AG2 (V2) falls, the limiting current ILIM flows in the path indicated by the arrow X in the figure.
- the charging circuit 100 has a self-control characteristic that the limit current ILIM is reduced by forming a short-circuit path.
- the rectifying unit 10 is configured without using a comparator, the circuit scale can be reduced, and the current consumption can be reduced.
- the short-circuit section 40 is configured using a field-effect transistor, and when the voltage Va ′ obtained by dividing the charging voltage Va exceeds the reference voltage Vref, control is performed such that the limiter transistor is turned on. However, it does not exceed the withstand voltage of the large-capacity capacitor 20 and can prevent the large-capacity capacitor 20 from being overcharged.
- FIG. 18 is a circuit diagram of a voltage detection determination unit according to another embodiment of the voltage detection determination unit of the first embodiment.
- the same parts as those in the first embodiment in FIG. 1 are denoted by the same reference numerals.
- the voltage detection discriminator 3 OA is composed of a constant current source CCNST with one end connected to the power supply VDD, a transistor Q1 with the drain D and gate G commonly connected to the other end of the constant current source CCNST, and a source of the transistor Q1.
- the input terminal is connected to the output terminal of the first I IN1 and the first I IN IN VI, and the second I IN2 that outputs the control signal CS, the source S of the transistor Q2 and the pull-down resistor RPD And a current mirror circuit CMC connected between the power supplies VSS.
- the drain D and the gate G are commonly connected to the source S of the transistor Q2, and the transistor QD whose source S is connected to the power supply VSS, and the drain D is connected to the other end of the pull-down resistor RPD And a transistor QC in which the gate G is connected to the gate G of the transistor QD and the source S is connected to the power supply VSS.
- the second inverter I NV2 sets the control signal CS to the “H” level, and the limiter transistor 40 holds the off state.
- VDD-VSS the power supply voltage
- a predetermined voltage in FIG. 18, the total voltage of the threshold voltages of the transistors Ql, Q2 and QD
- the constant current source CCNST A current flows to the power supply VSS through the transistors Ql, Q2, and QD, and a current of the same magnitude as the current between the drain D and the source S of the transistor QD flows between the drain D and the source S of the transistor QC.
- the current flowing through the transistor QC is set to be larger than the current that can flow through the pull-down resistor RPD.
- the voltage VI becomes a voltage corresponding to the “L” level.
- the first inverter INVI outputs an "H” level signal
- the second inverter INV2 sets the control signal CS to the "L” level, so that the limiter transistor 40 And the limiter current flows.
- the voltage detection / determination unit 3 OA ′ of the fifth embodiment consumes almost no current and prevents overvoltage in battery-operated portable electronic devices and the like. It is suitable as a circuit to perform.
- the charging circuit 100 of the first embodiment described above may be configured as a charging circuit 100 'by inverting the high-potential-side power supply line VDD and the low-potential-side power supply line VSS.
- Fig. 10 shows the configuration of the charging circuit 100 '.
- the charging circuit 100 ′ is the same as the charging circuit 100 of the first embodiment except that the rectification unit 10 ′ described in the second embodiment is used instead of the rectification unit 10.
- the charging circuit 101 of the second embodiment described above may be configured as a charging circuit 10 1 ′ by inverting the high-potential power line VDD and the low-potential power line VSS.
- the rectification unit 10 described in the first embodiment is applied instead of the rectification unit 10 ', the circuit shown in FIG. 11 is obtained.
- the limiter current ILIM flows through the path indicated by the arrow Y.
- the N-channel FETN2 is turned on, and the large-capacitance capacitor 2
- the charging circuit 10 1 ′ needs to be configured as shown in FIG.
- This charging circuit 10 1 ′ uses the rectification unit 10 described in the first embodiment in place of the rectification unit 10 ′, uses an enhancement N-channel FET as the limiter transistor LIMTr, and uses a comparator circuit. It is the same as the charging circuit 101 of the second embodiment except that the positive input terminal and the negative input terminal of COM are reversed. That is, it is necessary to prevent the limit current obtained by short-circuiting the generated current from flowing through the rectifying diodes D1 and D2.
- the comparator COM sets the control signal CS to the high level, and the limiter transistor LIMTr is turned on.
- the limiting current ILIM flows in a circuit indicated by an arrow Y 'in the figure, and overcharging of the large-capacity capacitor 20 is avoided.
- the overcharge prevention operation of the charging circuit 101 ' will be described with reference to a timing chart shown in FIG.
- the limiter current I LIM shown in Fig. 17 (e) flows through the path of "input terminal AG1 diode D3 limit transistor LIMTr ⁇ low potential side power supply line VSS ⁇ N channel FE TN2 ⁇ input terminal AG2".
- the diode D4 is turned on, and the input terminal AG2 ⁇ diode D4 limiter transistor UMTr low-side power supply line VSS ⁇ Limiter current ILIM flows through the path of ⁇ N-channel FE TN1 ⁇ input terminal AG1. Therefore, even if the terminal voltages V1 and V2 rise, the diodes D3 and D4 are turned on before the diodes D1 and D2 are turned on. It does not flow in and prevents overcharging.
- a wristwatch was described as an example of the electronic device using the charging circuits 100 and 101.
- the present invention is not limited to this. It can be applied to clocks such as clocks, portable blood pressure monitors, portable telephones, pagers, pedometers, calculators, portable personal computers, electronic notebooks, portable radios, and the like.
- the present invention may be applied to any electronic device that consumes power.
- the electronic circuit and the mechanical system built therein can be continuously operated without a battery, so that the electronic device can be used at any time, and it is troublesome. Battery replacement is not required. Furthermore, there is no problem associated with battery disposal.
- a battery having no power storage function and the charging circuits 100 and 101 may also be used.
- the electronic device when the electronic device is carried around for a long time, the electronic device is immediately replaced by the power from the battery.
- the electronic device can be operated by the user, and then the electronic device can be operated by the generated power when the user carries the electronic device.
- unipolar transistors such as P-channel FE TP1 and ⁇ ⁇ ⁇ ⁇ 2 and ⁇ -channel FE TNI and ⁇ 2 have been described as examples of switch means. Instead, use a PNP-type transistor. Replace N-channel FETs N1 and N2 with an NPN-type bipolar transistor. Evening may be used. However, these bipolar transistors usually have a saturation voltage of about 0.3 V between the emitter and the collector, so if the electromotive voltage of the AC generator AG is small, It is desirable to use FET as in the form.
- the comparator COM may be configured using FET, and the entire charging circuits 100 and 101 may be built in a one-chip IC.
- the diodes D1 to D4 may be of any type as long as they are unidirectional elements that allow current to flow in one direction.
- a Schottky diode other than a germanium diode may be used.
- the Schottky diode has a small voltage drop of 0.3 V, and is therefore suitable when the electromotive voltage of the AC generator AG is small.
- FIG. 13 is a perspective view showing the mechanical structure of the electronically controlled mechanical timepiece.
- the mainspring 11 ⁇ is connected to a crown (not shown), and winding the reuse allows mechanic energy to accumulate in the mainspring 110.
- a speed-up gear train 120 is provided between the mainspring 110 and the mouth 1131 of the generator 130.
- the speed increasing train 1 20 is composed of a second wheel 1 2 1, a third wheel 1 2 2 to which the minute hand 1 24 is fixed, a fourth wheel 123, and the like to which the second hand 1 25 is fixed. .
- the operation of the mainspring 110 is transmitted to the rotor 131 of the generator 130 by the speed-up gear train 120, so that power generation is performed.
- the generator 130 also functions as an electromagnetic brake, and rotates the pointer fixed to the speed-up gear train 120 at a constant speed. In this sense, the generator 130 also functions as a governor.
- FIG. 14 is a block diagram showing an electrical configuration of an electronically controlled mechanical timepiece to which the charging circuit 1 • 0 of the first embodiment is applied.
- the charging circuit 100 includes a generator 130 and a rectifier circuit 140.
- the oscillation circuit 160 generates the clock signal CLK using the crystal oscillator 161.
- the control circuit 103 Based on the detection result, the electromagnetic brake is adjusted so that the rotation cycle of the mouth 13 1 matches the cycle of the clock signal CLK, and the short-circuit part 4 keeps the rotation speed of the mouth 13 1 constant. 0 is controlled.
- the rotation control of the generator 130 is performed by turning on and off both ends of the coil of the AC generator AG at a short-circuit portion 40 capable of short-circuiting.
- This switch corresponds to the limiter transistor LIMTr in the above-described embodiment.
- the switch When the switch is turned on, the short brake is applied to the alternator AG and the electric energy is accumulated in the coil of the alternator AG when the switch is turned on.
- the switch when the switch is turned off, the AC generator AG operates and the electric energy stored in the coil is released, generating an electromotive voltage. At this time, the electric voltage at the time when the switch is turned off is added to the electromotive voltage, so that the value can be increased.
- the comparison operation in the comparison unit 30 in each of the above-described embodiments and modifications is always performed, the present invention is not limited to this, and the comparison operation is performed every sample period. Alternatively, the power generation state of the AC generator AG may be detected, and the comparison operation may be performed only when the AC generator AG is in the power generation state. Industrial applicability
- the charging voltage exceeds a predetermined voltage
- the generated current output from one input terminal is supplied to the other input terminal through a path that does not pass through the first and second diodes.
- overcharging of the charging element can be prevented.
- the circuit scale can be reduced, and low power consumption can be reduced.
- both input terminals are short-circuited, so that overcharging of the charging element can be prevented with a simple configuration. As a result, the manufacturing cost can be reduced, and the charging circuit can be easily incorporated into electronic devices such as wristwatches that require strict space saving.
- the off-resistance does not decrease due to the back-gate effect, so that the charging voltage is lower than a predetermined voltage.
- the charging current can be surely operated without a reduction in the charging efficiency caused by the flow of the limiting current.
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Charge And Discharge Circuits For Batteries Or The Like (AREA)
- Rectifiers (AREA)
- Electromechanical Clocks (AREA)
- Secondary Cells (AREA)
Description
Claims
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP54237999A JP3472878B2 (ja) | 1998-03-19 | 1999-03-19 | 過充電防止方法、充電回路、電子機器および時計 |
US09/423,785 US6429624B2 (en) | 1998-03-19 | 1999-03-19 | Overcharge prevention method, charging circuit, electronic equipment and timepiece for preventing overcharge of a charge storage device |
EP99909251A EP0998004B1 (en) | 1998-03-19 | 1999-03-19 | Method of overcharge prevention, charger circuit, electronic device, and timepiece |
DE69933522T DE69933522T2 (de) | 1998-03-19 | 1999-03-19 | Verfahren zur vermeidung von überladung, ladeschaltung, elektronische vorrichtung und uhr |
HK00105806A HK1026524A1 (en) | 1998-03-19 | 2000-09-14 | Method of overcharge prevention, charger circuit, electronic device, and timepiece |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10/70301 | 1998-03-19 | ||
JP7030198 | 1998-03-19 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO1999048184A1 true WO1999048184A1 (fr) | 1999-09-23 |
Family
ID=13427511
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP1999/001383 WO1999048184A1 (fr) | 1998-03-19 | 1999-03-19 | Procede de prevention des surcharges, circuit chargeur, dispositif electronique et compteur de temps |
Country Status (7)
Country | Link |
---|---|
US (1) | US6429624B2 (ja) |
EP (1) | EP0998004B1 (ja) |
JP (1) | JP3472878B2 (ja) |
CN (1) | CN100525003C (ja) |
DE (1) | DE69933522T2 (ja) |
HK (1) | HK1026524A1 (ja) |
WO (1) | WO1999048184A1 (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US11843274B2 (en) | 2017-12-04 | 2023-12-12 | Gs Yuasa International Ltd. | Charge control apparatus for controlling charging of an energy storage device via purality of charging paths connected in parallel anssociated energy storage appartus, and an associated charging method |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2006022738A1 (en) * | 2004-08-23 | 2006-03-02 | Semiconductor Components Industries, L.L.C. | Battery protection method and structure therefor |
KR100659272B1 (ko) * | 2005-12-15 | 2006-12-20 | 삼성전자주식회사 | 과전압 제어가 가능한 무선인증용 태그 및 그의 과전압제어 방법 |
US8654549B2 (en) * | 2011-06-25 | 2014-02-18 | Jlj, Inc. | Battery polarity control system |
JP5954913B2 (ja) * | 2012-06-05 | 2016-07-20 | フリースケール セミコンダクター インコーポレイテッド | ブートストラップ電荷蓄積デバイスを充電するための方法および装置 |
CN103036293A (zh) * | 2012-12-12 | 2013-04-10 | 辽宁省电力有限公司锦州供电公司 | Ftu用电源 |
US10176605B2 (en) * | 2014-03-26 | 2019-01-08 | Brigham Young University | Dynamic display of heirarchal data |
US10389804B2 (en) * | 2015-11-11 | 2019-08-20 | Adobe Inc. | Integration of content creation and sharing |
TWI639421B (zh) * | 2016-11-10 | 2018-11-01 | 睿傳數據股份有限公司 | Smart bedside card and its control management system |
US11383975B2 (en) | 2020-05-25 | 2022-07-12 | Silican Inc. | Composite for generating hydrogen |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63137541U (ja) * | 1987-02-26 | 1988-09-09 | ||
JP2652057B2 (ja) * | 1988-01-25 | 1997-09-10 | セイコーエプソン株式会社 | 発電装置 |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4365241A (en) * | 1978-09-12 | 1982-12-21 | Mitsubishi Denki Kabushiki Kaisha | Device for indicating the charging state of a battery |
JPS58162875A (ja) * | 1982-03-23 | 1983-09-27 | Mitsubishi Electric Corp | 充電表示兼警報装置 |
US4698740A (en) * | 1986-02-14 | 1987-10-06 | Westinghouse Electric Corp. | Current fed regulated voltage supply |
FR2648966B1 (fr) * | 1989-06-27 | 1991-10-04 | Alsthom Gec | Circuit redresseur de signaux electriques alternatifs |
EP0564149B1 (en) * | 1992-04-03 | 1997-09-24 | JEOL Ltd. | Storage capacitor power supply |
NO301917B1 (no) * | 1995-02-01 | 1997-12-22 | Fieldbus International As | Vekselström/likespennings-omformer |
JP3204160B2 (ja) * | 1997-05-12 | 2001-09-04 | インターナショナル・ビジネス・マシーンズ・コーポレーション | バッテリパック及び電気・電子機器 |
-
1999
- 1999-03-19 CN CNB99800782XA patent/CN100525003C/zh not_active Expired - Fee Related
- 1999-03-19 DE DE69933522T patent/DE69933522T2/de not_active Expired - Lifetime
- 1999-03-19 EP EP99909251A patent/EP0998004B1/en not_active Expired - Lifetime
- 1999-03-19 US US09/423,785 patent/US6429624B2/en not_active Expired - Lifetime
- 1999-03-19 WO PCT/JP1999/001383 patent/WO1999048184A1/ja active IP Right Grant
- 1999-03-19 JP JP54237999A patent/JP3472878B2/ja not_active Expired - Fee Related
-
2000
- 2000-09-14 HK HK00105806A patent/HK1026524A1/xx not_active IP Right Cessation
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63137541U (ja) * | 1987-02-26 | 1988-09-09 | ||
JP2652057B2 (ja) * | 1988-01-25 | 1997-09-10 | セイコーエプソン株式会社 | 発電装置 |
Non-Patent Citations (1)
Title |
---|
See also references of EP0998004A4 * |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US11843274B2 (en) | 2017-12-04 | 2023-12-12 | Gs Yuasa International Ltd. | Charge control apparatus for controlling charging of an energy storage device via purality of charging paths connected in parallel anssociated energy storage appartus, and an associated charging method |
Also Published As
Publication number | Publication date |
---|---|
DE69933522D1 (de) | 2006-11-23 |
CN1272236A (zh) | 2000-11-01 |
EP0998004A4 (en) | 2004-03-24 |
EP0998004A1 (en) | 2000-05-03 |
EP0998004B1 (en) | 2006-10-11 |
CN100525003C (zh) | 2009-08-05 |
JP3472878B2 (ja) | 2003-12-02 |
HK1026524A1 (en) | 2000-12-15 |
US20020011821A1 (en) | 2002-01-31 |
DE69933522T2 (de) | 2007-06-06 |
US6429624B2 (en) | 2002-08-06 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP3472879B2 (ja) | 過充電防止方法、充電回路、電子機器および時計 | |
JP3632209B2 (ja) | 電力供給装置および携帯型電子機器 | |
WO2000033454A1 (fr) | Dispositif et procede d'alimentation electrique, appareil electronique portable, et montre electronique | |
JP3678075B2 (ja) | 電源装置およびその制御方法、携帯型電子機器、計時装置およびその制御方法 | |
WO2000017993A1 (fr) | Dispositif d'alimentation, procede d'alimentation, dispositif electronique portatif et montre electronique | |
WO1999048184A1 (fr) | Procede de prevention des surcharges, circuit chargeur, dispositif electronique et compteur de temps | |
US6476580B1 (en) | Electronic apparatus and control method for electronic apparatus | |
JP3726666B2 (ja) | チョッパ回路、チョッパ回路の制御方法、チョッパ式充電回路、電子機器及び計時装置 | |
US6584043B1 (en) | Electronically controlled mechanical watch and method of preventing overcharge | |
US6421263B1 (en) | AC voltage detection circuit and method, charging circuit and method, chopper circuit and chopping method, chopper charging circuit and method, electronic apparatus, and timepiece | |
US6373789B2 (en) | Electronically controlled mechanical timepiece and method controlling the same | |
JP3663964B2 (ja) | 過充電防止方法、充電回路、電子機器および時計 | |
JP3575257B2 (ja) | 電源装置、発電装置および電子機器 | |
JP2870516B2 (ja) | 発電装置付電子時計 | |
JP3903911B2 (ja) | 電力供給装置および携帯型電子機器 | |
JP2004032980A (ja) | 過充電防止方法、充電回路、電子機器および時計 | |
JP2003235167A (ja) | 過充電防止方法、充電回路、電子機器および時計 | |
JP3528563B2 (ja) | チョッパ回路の給電方法、チョッパ回路、チョッパ式充電回路、電子機器および腕時計 | |
JP3575262B2 (ja) | チョッパ回路の給電停止方法、チョッパ回路、チョッパ式充電回路、電子機器および腕時計 | |
JP3582338B2 (ja) | スイッチングユニット、電源装置および電子機器 | |
JP3575256B2 (ja) | チョッパ回路、チョッパ式充電回路、電子機器および腕時計 | |
JP3680697B2 (ja) | 電子時計およびその駆動制御方法 | |
JP3246508B2 (ja) | 昇圧回路付発電装置、及びそれを有した電子時計 | |
JP2004140992A (ja) | 発電検出回路、電子機器および発電検出方法 | |
JP2001249191A (ja) | 発電装置付電子時計 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
WWE | Wipo information: entry into national phase |
Ref document number: 99800782.X Country of ref document: CN |
|
AK | Designated states |
Kind code of ref document: A1 Designated state(s): CN JP US |
|
AL | Designated countries for regional patents |
Kind code of ref document: A1 Designated state(s): AT BE CH CY DE DK ES FI FR GB GR IE IT LU MC NL PT SE |
|
121 | Ep: the epo has been informed by wipo that ep was designated in this application | ||
WWE | Wipo information: entry into national phase |
Ref document number: 1999909251 Country of ref document: EP |
|
WWE | Wipo information: entry into national phase |
Ref document number: 09423785 Country of ref document: US |
|
WWP | Wipo information: published in national office |
Ref document number: 1999909251 Country of ref document: EP |
|
WWG | Wipo information: grant in national office |
Ref document number: 1999909251 Country of ref document: EP |