WO1998058495A1 - Image processor and image processing method - Google Patents
Image processor and image processing method Download PDFInfo
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- WO1998058495A1 WO1998058495A1 PCT/JP1998/002581 JP9802581W WO9858495A1 WO 1998058495 A1 WO1998058495 A1 WO 1998058495A1 JP 9802581 W JP9802581 W JP 9802581W WO 9858495 A1 WO9858495 A1 WO 9858495A1
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/42—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
- H04N19/134—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the element, parameter or criterion affecting or controlling the adaptive coding
- H04N19/146—Data rate or code amount at the encoder output
- H04N19/152—Data rate or code amount at the encoder output by measuring the fullness of the transmission buffer
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/60—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using transform coding
- H04N19/61—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using transform coding in combination with predictive coding
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/50—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using predictive coding
Definitions
- the present invention relates to an image processing device and an image processing method, and more particularly to a ghost image process in which manually input image data is stored in a temporary storage unit, and an encoding process is performed on the stored image data.
- a non-image data is a moving image
- the original force 5 is analog data
- various and complex signal processing so it is possible Isseki de compression, etc., images digitized Technology is forming an important location area.
- the image processing apparatus according to the conventional technology is configured to input analog ghost image data, perform digital conversion and th-condensed encoding processing, and record or transmit the digital ghost image data.
- An example of such an image processing apparatus with temporary storage is disclosed in Japanese Patent Application No. 7-273641, in which digital image data is stored in a memory called an image frame memory. It is temporarily stored.
- FIG. 10 is a block diagram showing a configuration of an example of an image processing apparatus according to a conventional technique.
- a conventional image processing apparatus using branching includes an A / D conversion unit 1001, an image input control unit 1002, a memory control unit 1003, an encoding unit 1004, Input It has an image memory 1005 and a rate buffer 1006, receives analog video signal S1051 as device input, and outputs coded data S1057 as device output. It is assumed that.
- the signal indicated by the solid line indicates the flow of the data to be processed, and the signal indicated by the broken line indicates the flow of the symbol for control. is there.
- the A / D conversion unit 1001 performs analog-to-digital conversion processing on the input analog video signal S1051 to generate digital image data S1052.
- the image human power control unit 1002 generates an image input permission signal S1061 indicating validity / invalidity of the input digital image data S1052.
- the memory control unit 1003 controls storing and reading of the digital image data into and from the memory.
- the encoding unit 1004 performs a predetermined If compression processing on the digital ghost image data S105 so as to generate an encoded data S10056.
- the input image memory 1005 temporarily stores the digital image data S105 for the work of the compression encoding process.
- an input image memory is managed by being divided into a plurality of areas each of which stores a predetermined amount of digital image data.
- the input image memory 1005 stores a first area 1005a and a second area 1005, each of which can store one frame (corresponding to one screen) of digital image data. 5b.
- the rate buffer 1006 generates the encoded data S 1 generated by the encoder 104 so that the device output S 1 057 from the image processing device is output at a constant rate. 0 56 is temporarily stored and output. The operation of the thus configured image processing apparatus using the conventional branch operation will be described below.
- the analog video signal S1051 which is a device input of the image processing apparatus, is input, the analog video signal S1051 is input to the A / D conversion unit 1001, and the analog video signal is input. Conversion processing is performed.
- the 8/0 conversion unit 1001 outputs the generated digital image data S 1 0 52 to the image input control unit 1 0 2.
- the input analog video signal S1051 includes a signal of an effective area corresponding to a portion of an image to be displayed and a signal of another invalid area.
- the image input control unit 1002 generates an image input permission ⁇ signal S1061 indicating validity / invalidity of the input digital image data S1052, and generates the digital image data.
- the image input permission signal is output to the memory control section 103 together with the image input permission signal ⁇ 1 S 1061 .
- the u memory control section 103 outputs the image input permission signal input from the image input control section 103.
- the digital image data S 1 0 5 3 is stored in the input image memory 1 0 5 according to S 1 0 6 1 and an image input request signal S 1 0 5 3 input from the encoding unit 1 0 4 described below.
- the encoding unit 1004 is in a functioning state in which the encoding process is performed, and outputs an image input request signal S10S3 indicating a request for digital image data to be encoded.
- the memory controller: 03 When output to the memory controller 1003, the memory controller: 03 operates in accordance with the image input enable signal S1061 indicating that the digital image data S1053 is valid. First area of human-powered image memory] It is assumed that digital image data S1053 is stored in 005a.
- the memory control unit 1 0 An encoding start signal S1062 is generated and output to the encoding unit 004 so that 04 starts encoding processing.
- the memory control unit 1003 generates a signal when the unit of the digital image data is stored for one frame.
- the encoding unit 1004 does not perform the encoding process until an encoding start signal S1062 for instructing the encoding is input from the memory control unit 1003. If input, the digital image data S105 stored in the first area 1005a is input via the memory control unit 103 to execute the encoding process.
- the encoding process is performed according to a predetermined method. For example, one frame of digital image data can be divided into blocks having a predetermined size, and the blocks can be executed as a unit. In the case of performing such an encoding process, the size of the block is generally 8 ⁇ 8 pixels, or generally 16 ⁇ 16 pixels. Note that a pixel is a discrete unit of data constituting digital image data, and has a pixel value indicating luminance and color of an image.
- the encoder 104 outputs the encoded data S 1 056 generated by performing the encoding process to the rate buffer 1 0 6, and temporarily stores the encoded data S 1 0 6 in the rate buffer 1.
- the encoded data S1056 is output to the outside of the image processing apparatus as a device output S1057, and is transmitted and the like.
- the encoding unit 1004 generates an image input request signal S106 indicating that digital image data for one frame to be encoded next is to be input. 3 is generated, and this signal S1063 is output to the memory control unit 103.
- the digital image data is read in accordance with the image input request signal S1063 and the input permission signal S1061 indicating that the digital image data S1053 is valid.
- S 1 0 5 3 is stored in the input image memory 1 0 5.
- the digital image data for one frame is accumulated, but the memory control unit 1003 stores the second area different from the first area 1005a previously stored.
- the storage processing is performed on 1 0 0 5 b.
- the first area 1005a and the second area 1005b of the input image memory The image data is stored, read out alternately, and subjected to an encoding process in the encoding unit 104.
- FIG. 11 is an evening chart showing a normal processing state in which such processing is performed smoothly.
- image input request signal S 1 0 6 3 is a state of signal S 1 0 6 3 output from encoding section 1 0 4 to memory control section 1 0 3
- the Hi state indicates that the encoding unit 104 has a request for digital image data.
- Image input permission signal S 1 0 6 1 is
- the state of the signal S1061 generated by the generator 102 and output to the memory controller 103 is shown.
- the Hi state indicates that the digital image data is valid and that the digital image data is stored in the memory. Indicates that it is a kimono.
- Image data storage shown in the figure indicates an area of the input image memory 1005 in which digital image data S1054 is stored. As mentioned earlier, the memory controller
- the digital image data is stored in the first area 1005a (in the figure, denoted as memory (1)) in the area of the input image memory 1005, It is stored alternately in the second area 1005b (denoted as memory (2) in the figure).
- the "? Decoding start signal S1062" shown in the figure indicates the state of the signal S1062 output from the memory control unit 103 to the encoder 104. And the Hi state indicates that the encoding process should be started.
- the “encoding process” indicates the encoding process in the encoding unit 104, and the first region 1005 a (FIG. In the figure, the digital image data stored in the memory (1) is stored in the second area 1005b (in the figure, the memory (2)). Show.
- the timing chart shown in Fig. 12 shows the status of processing at the platform where an error has occurred for some reason and the normal processing shown in Fig. 11 cannot be performed. It is. Also in this case, the processing is performed in the same manner as the case shown in FIG. 11 until timing t120.
- the encoding process of the digital image data stored in the second area 1005 b (FIG. 1) performed after timing t 120 is long.
- the digital image data is read from the second area 1005b of the input image memory 1005 until the timing t121, so that the original (normal state)
- the storage of the digital image data in the second area shown in the figure “Image data storage” in the figure should not be performed. Therefore, as shown by the broken line in “Image data storage” in the figure, the digital image data not stored is discarded, and is not subjected to the encoding process.
- the image processing apparatus After the end of the encoding process at timing t 122, the normal state processing is performed again.
- the input image memory 100 5 The storage process and the read process are performed alternately on the area of the data.
- the image processing apparatus according to the conventional technology enables the digital image data storage processing and the encoding processing to be performed at the respective timings, thereby preventing delays in the encoding processing and the like. In other words, the digital image data is discarded to deal with it.
- the device described in the above-mentioned Japanese Patent Application No. 7-2373461 performs the same memory management as the above example.
- the encoding unit 1004 converts the digital image data to be encoded into digital image data. After a predetermined amount (one frame in the above example) has been stored, the encoding process is started in response to the encoding start signal S1062 (Fig. 11). Therefore, in the image processing apparatus according to the related art, since there is a delay between the signal input and the start of the encoding processing, it is difficult to display a good image when applied to such an application. Had become a problem. In addition, as in the case of the upper trace, the conventional image processing apparatus using the branch technique performs the unconditional discard of the digital image data for the EF processing. In such a case, data loss occurs, and the second problem is that if the encoding process is frequently delayed, the image quality is degraded.
- the input image memory 1005 is divided into a storage area and a read area, the input image memory is divided and managed, so that when the data amount of the digital image data to be processed is large, Accordingly, it is necessary to increase the storage capacity, and the need for a large amount of memory leads to an increase in cost, and it is difficult to manufacture an inexpensive device for dissemination. This was the third problem. Disclosure of the invention
- the present invention has been made in view of such circumstances, and has a reduced delay time from the start of signal input to the start of encoding processing, and is an image processing apparatus suitable for real-time use.
- the purpose is to provide a device.
- the present invention provides an image processing method capable of reducing a delay time until the start of encoding processing, an image processing method capable of reducing data discard even with respect to a delay in encoding processing, and the like. It is an object of the present invention to provide an image processing method capable of reducing a necessary amount of a memory for temporarily storing data.
- a rain image processing apparatus stores input image data in temporary storage means, and performs an encoding process on the stored image data.
- image input control means for controlling storage of the input image data in the temporary storage means
- the temporary storage means for storing the image data according to the control of the image input control means.
- storage control means for generating storage information indicating that, and image data stored in the temporary storage means are read out and stored in the temporary storage means.
- An encoding unit that performs an encoding process and, when encoding is performed by a predetermined amount of unit processing amount, generates processing information indicating the fact; storage information generated by the storage control unit; Sign The first control information used for controlling storage by the image input control means and the second control information used for controlling the encoding processing in the encoding means are determined based on the processing information generated by the means. And control information generating means for generating the control information. Thereby, the control information generating means generates control information for controlling the storage and the encoding process in accordance with the state of the image processing obtained from the storage information and the processing information.
- the image processing device S according to claim 2 is the device according to claim 1, wherein the control information generating means stops storing the input image data as the first control information. This is to generate storage stop information indicating that the encoding process should be performed, and generate, as the second control information, encoding stop information indicating that the encoding process should be stopped. This In this way, storage is stopped in response to image processing conditions to protect already stored data.By stopping encoding, data to be encoded is stored until it is stored. To wait for.
- the image processing device is the device according to claim 1, wherein the control information generation unit stops storing the input image data as the first control information.
- a storage stop information indicating a power to be generated is generated, and as the second control information, a continuous process indicating the number of times that the encoding unit can continuously execute the encoding process on the image data of the unit processing amount by the encoding unit. It generates information. In this way, storage is stopped in accordance with the situation of both image processing, thereby protecting already stored data, and executing continuous encoding processing according to the state of storage.
- control information generating means counts the stored information and stores a result of the counting as a stored information numerical value in the apparatus according to claim 1.
- An addition processing control unit that outputs an addition permission signal when the processing is performed, and outputs an addition prohibition signal when the counting processing of the processing information is performed a predetermined number of times; According to the addition prohibition signal, a predetermined value is added to the stored information count ffi to generate a post-processed stored information count value.
- a codeable unit number generating means for generating a codeable unit number, and comparing the codeable unit number with a first predetermined value, and generating a first control information if they match.
- a second control information generating means for comparing the number of units that can be encoded with a predetermined value of 3 ⁇ 42 and, if they match, generating the second control information It is provided with.
- the image processing device wherein in the concealment of claim 1,
- the control information generating means counts the stored information, and stores the result of the counting as a stored information numerical value.
- the stored information counting means counts the processing information and processes the result of the counting.
- a processing information counting means for holding as an information count value, and an addition permission signal is output when the count processing of the stored information is performed a predetermined number of times, and the count processing of the processing information is performed a predetermined number of times.
- An addition processing control means for outputting an addition prohibition signal in the event of the addition, and a predetermined value is added to the stored information count value in accordance with the addition permission signal or the addition prohibition signal, and the stored information after processing is processed.
- a storage value generating means for generating a count value A means for changing the count value, and a means for generating the number of codeable units for subtracting the information count value for processing from the count value for stored information after processing to generate an encoded SJ unit And above can be encoded
- the order is compared with a first predetermined value, and if they match, first control information generating means for generating the first control information; and Is what you do.
- the number of codeable units indicating the storage state of the data to be coded is obtained, and control information is generated in accordance with the number of codeable units.
- the storage and the continuous encoding process are controlled.
- a ghost image processing method wherein the input image data is stored in a temporary storage means, and the stored image data is encoded. Executing an image input control step for controlling the storage of the image data in the temporary storage in the temporary storage unit, and storing the image data in the -time storage means in accordance with the control in the image input control step; A storage control step of generating a storage volume report indicating that a unit storage amount that is a predetermined amount has been stored; and (4) reading out the image data stored in the self-temporary storage means and performing a predetermined encoding.
- an encoding step for generating processing information indicating that, a storage information generated in the storage control step, Sign Based on the processing information generated in the step, the first control information ffl for controlling the storage in the two-image input control step and the second control information used for controlling the encoding processing in the encoding step And a control information generation step for generating the control information.
- the storage Control information for controlling storage and encoding is generated in accordance with the state of image processing obtained from the information and the processing report.
- An image processing method is the method according to claim 6, wherein in the control information generating step, the storage of the input image data as the first control information is stopped. This is to generate storage stop information indicating the necessity, and generate, as the second control information, encoding stop information indicating that the encoding process should be stopped. In this way, storage is stopped in response to image processing conditions to protect already stored data, and encoding is stopped to wait until data to be encoded is stored. Plan.
- the image processing apparatus is the method according to claim ii, wherein in the control information generating step, the storage of the image data obtained by the user is stopped as the first control information. Generates storage stop information indicating that it should be performed, and as the second control information, a continuous process indicating the number of times that the encoding process on the unit amount of image data in the encoding step can be continuously performed. It generates information. In this way, storage is stopped in accordance with the state of image processing, thereby protecting already stored data and executing continuous encoding processing according to the state of storage.
- the image processing device is the method according to claim 6, wherein the control information generating step counts the stored information, and uses a result of the counting as a stored information count value.
- the addition control signal is output in accordance with the addition permission signal or the addition inhibition signal, and an addition prohibition signal is output when the processing information is counted a predetermined number of times.
- a storage information count value changing step of adding a predetermined value to the stored information count value to generate a post-processing storage information count value; and ⁇ Subtracting the 3 ⁇ 4 count, encodable unit number generating scan to generate a number of encodable units Step: comparing the codeable code number with a first predetermined value, and if they match, a first control information generation step for generating the first control information; and The method further includes a second control report generation step of comparing the number of units with a second predetermined value and, if they match, a second control information generating step of generating the second control information.
- the image processing apparatus is the method according to claim 6, wherein the control information generating step counts the storage information, and stores a result of the counting as a storage information count value.
- FIG. 1 is a block diagram showing a configuration of an image processing apparatus according to Embodiment 1 of the present invention.
- FIG. 2 is a block diagram showing an internal configuration of a flag generator provided in the image processing apparatus according to the embodiment.
- FIG. 3 is a diagram for explaining a configuration of digital image data to be processed by the image processing apparatus according to the embodiment.
- FIG. 4 and FIG. 5 are timing charts for explaining processing by the image processing apparatus according to the embodiment.
- FIG. 6 is a block diagram showing a configuration of an image processing device according to Embodiment 2 of the present invention.
- FIG. 7 is a block diagram showing an internal configuration of a flag generator provided in the image processing apparatus according to the embodiment.
- FIG. 8 and FIG. 9 are timing charts for explaining processing by the image processing apparatus according to the embodiment.
- FIG. 10 is a block diagram showing a configuration of an image processing apparatus according to a conventional technique.
- FIG. 11 and FIG. 12 are timing charts for explaining the processing of the image processing apparatus by the conventional branch operation.
- Embodiment 1-An image processing apparatus includes a flag generation unit, controls image processing using a control flag, and manages a memory.
- FIG. 1 is a block diagram showing a configuration of an image processing apparatus according to the first embodiment, which receives analog image data, performs digital conversion, and performs compression encoding processing.
- the image processing apparatus according to the first embodiment includes an A / D conversion unit 101, an image input control unit 102, a memory control unit 103, an encoding unit 104, an input image memory 105, a rate sensor sofa 106, and a flag generation unit 107, and the analog video code S155 is used as a device input, and the encoded data S157 is mounted.
- the signal shown by the solid line is the processing target.
- the data flow indicated by the broken line / 1 indicates the flow of signals for control.
- the AZD converter 101 performs analog / digital conversion processing on the input analog video signal S151 to generate digital image data S152.
- the image input control unit 102 generates an image input permission signal S161 indicating validity / invalidity of the input digital image data S152. Tree In the first embodiment, the image input control unit 102 generates an image input permission signal S 16 according to the valid area / invalid area of the digital image data as in the case of the conventional image processing apparatus. 1 is generated, but additionally refers to the error flag S 162 input from the flag generation unit 107 described later, and the error flag S 162 is invalid (Lo state State), the image input permission signal S 16 1 * indicating “valid”. If the error flag S 16 2 is valid (Hi state), the image input permission indicating “invalid” ⁇ 3 ⁇ 4 S 1 6 1 is generated.
- the memory control unit 103 controls storing and reading of digital image data in and from a memory.
- the memory control unit 1-3 in the first embodiment manages the storage and readout of digital image data into and from the input I-image memory 105 in units of a predetermined amount.
- a profiling end signal S 164 indicating this is generated, and this is output to the flag generation unit 107. Therefore, the memory control unit 103 stores the digital image data in the temporary storage unit (input image memory 105) under the control of the image input control unit (image input control unit 102).
- a storage control means for generating a storage report (damage end signal S1664) indicating that.
- the encoding unit 104 performs a predetermined compression encoding process on the digital image data S155 to generate encoded data S156.
- the encoding unit 104 refers to the empty flag S 165 input from the flag generation unit 107 described later, and the empty flag S 165 is in the Low state. In this case, the encoding process is executed, and if the empty flag S1 65 is in the Hi state, No encoding processing is performed.
- the encoding unit 104 performs the encoding process in units of a predetermined amount, and when the encoding process for the unit is completed, the encoding end signal 3 ⁇ 4S 1 6 is generated and output to the flag generation unit 107.
- the encoding unit 104 reads out the image data stored in the temporary storage T stage (input image memory 105), performs a predetermined encoding process, and performs only a predetermined amount of the ⁇ -position processing.
- the encoding process When the encoding process is performed, it functions as an encoding unit that generates processing information (encoding end signal ⁇ S166) indicating that.
- the input image memory 105 temporarily stores digital image data S154 for the work of the compression encoding process.
- the image data is not managed by being divided into specific (two in the example of the prior art) areas as in the case of the image processing apparatus using the conventional branch operation, and the capacity is not a predetermined area. Any amount that can store the amount of digital image data (here, one frame) is sufficient.
- the rate buffer 106 temporarily stores the encoder data S156 so that the encoded data S157, which is the device output from the image processing device, is output at a constant rate. .
- the flag generation unit 107 outputs a signal indicating the end of writing for each unit m manually input from the memory control unit 103 and a signal indicating the end of encoding for each unit amount input from the encoding unit 104. And a flag (empty flag and error flag) used for controlling data input / output to / from the memory is generated based on the result of the counting. Accordingly, the flag generator 107 includes the storage information (the write end signal S164) generated by the memory controller (memory controller 103) and the encoder (the encoder 1). Based on the processing information (encoding end signal S166) generated by the image input control means (image input control section 102), the first control information (error information) used by the image input control means (image input control section 102) for storage control. One flag) and second control information (event flag) used to control the encoding process in the encoding means (encoding unit 104).
- FIG. 2 is a block diagram showing the internal configuration of the fugu generation unit 107 (FIG. 1).
- the flag generator 107 includes a write block counter 201, a read block counter 202, a carry flag holder 203, and a selector 204.
- the write block counter 201 counts a write end signal S 164 input from the memory control unit 103 (FIG. 1) in units of a slice described later, and holds the count value. Output to adder 205. Counting is performed in accordance with the quaternary system.If the count value reaches “14j”, the next write end signal S166 is input, the count value is set to “0”, and the carry flag described later is held. Set part 203 to the set state. Also, the count value is set to “0” when the counter reset signal S166a for instructing initialization is input from the image input control unit 102 (FIG. 1). Therefore, the write block counter 201 functions as a storage information counting means that counts the storage information (write end signal S1664) and holds the result of the counting as a storage information count value. I do.
- the read block counter 202 counts the coding end signal ⁇ S166 input from the coding unit 104 (FIG. 1) in units of a slice described later, and holds the count value. And outputs it to the adder 206. Counting is performed according to the quaternary system, and when the count value reaches “14”, if the next code end signal S 16 4 is input, the count value is set to “0 j” and the carry flag described later is held. Therefore, the read block counter 202 counts the processing information (encoding end signal S165) and sets the result of the counting as a processing information count value. It functions as the processing information H count means to hold.
- the carry flag holding unit 203 detects that the count operation of the write block counter 201 corresponds to “15”, that is, the count value of the write CJ counter reaches “14”, and then the harm is performed. Set when the write end signal is input and becomes “0”. When the read block counter 202 counts "15”, that is, when the read block counter counts "14”. Is reached, and is reset when the encoding end signal is input and then becomes “0”. If it is in the set state, If it is in the off state, it outputs a low state signal S 253 to the selector 204.
- the selector 204 receives the value “0” (signal S 2 5 4 a) and the value “ ⁇ 5” (signal S 2 5 4 b), and outputs the signal S 2 input manually from the carry flag holding unit 203. Based on 53, one is selected and output to adder 205. The selection in the selector 204 selects “0” when the signal S 253 is in the Lo state, and selects “15 j” when the signal S 253 is in the Hi state.
- the adder 205 adds the count value (signal S251) of the write block counter 201 to the value output from the selector 204 (signal S256), and calculates the result (signal S 2 56) is output to the subtractor 206.
- the subtractor 206 subtracts the count value of the read block counter 202 (signal S252) from the addition result (signal S256) output from the adder 205.
- the subtractor 206 outputs a signal S257 indicating the result obtained by the subtraction to the first and second comparison units 206 and 207. Therefore, the carry flag holding unit 203, the selector 204, and the adder 205 determine whether the storage information (write end signal S164) has been counted a predetermined number of times.
- a predetermined value (signal S255) is added to the stored information count value (the count value of the write block D counter 201) in accordance with the addition prohibition signal, and the stored information after processing is processed.
- It functions as a stored information count value changing means that converts the count value (signal S256).
- the subtractor 206 subtracts the processing information count value (signal S252) from the post-processing stored report count value (signal S256) to obtain the number of coded units (signal). It functions as a unit for generating the number of codeable units that generates S 2 5 7).
- the first and second comparison sections 207 and 208 receive signals S256a and S256b representing the values "0" and "15", respectively.
- the comparison unit 206 compares the signal S 256 a and S 257, and the comparison unit 207 compares the signal S 256 b and S 257, and whether or not both match. Is determined.
- the comparison section 206 generates a signal S259 indicating whether or not the signal S256a matches the signal S257 according to the result of the comparison. And outputs it to the error flag holding unit 209.
- the comparison unit 207 generates a signal S260 indicating whether or not the signal S256b and S257 match according to the result of the comparison, and outputs the signal to the event flag holding unit 21. Output to 0.
- the error flag holding unit 209 determines whether the signal S 259 input from the comparison unit 206 indicates ⁇ match j, that is, when the signal S 257 has the value ⁇ 15 ''. It is set, and is reset when the error reset symbol S1663b is input from the image input control unit 102 (FIG. 1). From the error flag holding unit 209, an error flag S166 in the Hi state in the set state and in the Lo state in the reset state is output to the ghost image control unit 102 (No. 1 figure).
- the event flag S 165 is output to the encoding unit 104 as shown in FIG.
- the first comparison unit 207 and the error flag holding unit 209 determine that the number of units that can be encoded (signal S 2 57) is equal to the first predetermined value (signal S 2 b 8 a). If they match, they function as first control signal generation means for generating the first control information (the Hi state error flag S1662). Further, the first comparing section 208 and the empty flag holding section 210 store the number of codeable units (signal S257) in a second predetermined value (signal S258). If they match as compared with b), they function as the second control information generating means for generating the second control information (the high-state event flag S165).
- the Hi-state error flag S 16 2 is used as storage stop information indicating that the storage of the input image data is stopped.
- the Hi-state event flag S 16 5 It is used as encoding stop information indicating that the encoding process should be stopped.
- FIG. 3 is a diagram showing an example of a digital image format in the image processing apparatus according to the first embodiment.
- Digital image data output from the A / D converter 101 provided in the image processing apparatus according to the first embodiment is a discrete unit data.
- Digital data which is an array of pixels having pixels ft! Indicating luminance signals and color difference signals in an image. As shown in FIG. 3 (a), 32 pixels ⁇ 240 pixels constitute one frame. Which make up the game.
- FIG. 3 (b) shows an encoding block, which is a processing unit of the encoding processing in the encoding unit 104, wherein the encoding block has 16 ⁇ 16 pixels. Has become.
- one frame of digital image data contains 22 coded blocks in the horizontal direction and 15 coded blocks in the vertical direction.
- the third (c) indicates a slice serving as a unit of human output of digital image data in the first embodiment.
- One slice consists of one row of coding blocks in the horizontal direction.As shown in the figure, 22 coding blocks in the horizontal direction and 1 coding block in the vertical direction form one slice.
- One frame contains 15 slices.
- input / output of digital image data to / from the input image memory 105 is managed in units of slices. Therefore, both the unit storage amount and the unit processing amount are one slice.
- the operation of the image processing apparatus according to the first embodiment configured as shown in FIGS. 1 and 2 will be described below.
- the light block counter 201 (FIG. 2) and the read block counter (same as above) of the flag generator 107 (FIG. 1) are provided.
- the count value becomes 0, and the carry flag holding unit 203 (same) and the error flag holding unit 209 (same) are reset. Therefore, the error flag S166 output from the flag generator 107 shown in FIG. 1 is in an invalid state, that is, in a Lo state.
- the flag generator 107 shown in FIG. 2 performs the following operation. From the write block counter 201 to the adder 205, a signal S2 51 indicating a value 0 is output. In this case, since the carry flag holding section 203 is in the reset state, the signal S 253 is in the Lo state, the value 0 is selected in the selector 204, and the value 0 is selected. Is output to the adder 205. In the heater 205, the signal S 2 5 1 (fjfi 0) and the signal (value 0) are added. Then, a signal S2 56 indicating the value 0 as the addition result is output to the subtractor 206.
- the read block counter outputs a signal S 252 having the count value ⁇ to the subtractor 206.
- the subtractor 206 subtracts the signal S252 (value 0) from the signal S256 (value 0), and compares the resulting signal S257, which indicates the value 0, with the comparison unit 210. Output to 7, and 208.
- the comparison unit 207 compares the signal S 2 57 (value 0) with the signal S 2 58 a indicating the constant 15, and since the direction signals do not match, the error flag holding unit 2 09 No set operation is performed. Therefore, the error flag holding unit 209 remains in the reset state, and the output error flag S 166 is kept in the Lo state.
- the signal comparison unit 208 compares the signal S 257 (value 0) with the signal S 258 b indicating the constant 0. Since both signals match, the empty flag holding unit 2 1 A signal S260 indicating "match" is output to 0. As a result, the event flag holding unit 210 outputs the event flag S 165 in the Hi state.
- the fact that the empty flag S165 is in the Hi state indicates that the input image memory 105 does not store the digital image data to be encoded.
- the event flag S 165 is input to the encoder 104 as shown in FIG. 1, and the encoder 104 encodes when the event flag S 165 is in the Hi state. Do not process. Therefore, until a predetermined amount of data is stored in the input image memory 105, the encoding unit 104 is in a standby state.
- the analog video signal S151 which is a device input of the image processing apparatus
- the analog video signal S151 is input to the A / D converter 1 ⁇ 1.
- the A / E) conversion unit 101 outputs the generated digital image data S155 to the image input control unit 102.
- the image input control unit 102 reads the error flag S166 input from the flag generation unit 107.
- the image input control unit 102 sets the image input permission it No. S corresponding to the input digital image data S 152. 16 1 is generated (as a Hi state) to indicate validity, and Both the digital image data S153 and the image input enable signal S161 are output to the memory control unit 103.
- the memory control unit 103 stores the corresponding digital image data S152 in the input image memory 105 because the image input permission signal S1661 indicates that it is valid. As described with reference to FIG. 3, input / output of digital image data to / from the input image memory is performed in units of slices (FIG. 3 (c)). When the one-slice digital image data is stored in the input image memory, the control unit 103 generates a write end signal S164 and sends it to the flag control unit 107. Output.
- the write end signal S1664 is input to the write port 201 as shown in the second ⁇ , and the write block counter 201 holds the write end signal S164.
- Count-up operation to increase the count value to be performed by one.
- the signal S2 51 indicating the value 1 is sent from the write block counter 201 to the adder 205. Is output.
- the selector 204 selects the value 0 according to the signal S253 indicating the reset state, and the signal S255 indicating the value 0. Is output to the adder 205.
- the adder 205 the signal S25 1 (value 1) and the signal S255 (value 0) are added, and the signal S2 56 indicating the value 1 resulting from the addition is added to the subtractor 20. Output to 6.
- the readbook counter remains at the count value 0, and a signal S2 52 indicating the value 0 is output to the subtractor 206.
- the subtractor 206 subtracts the signal S252 (value 0) from the signal S256 (value 1), and compares the resulting signal S257, which indicates the value 1, with the comparison unit 20. Output to 7, and 208.
- the comparison unit 207 compares the signal S 257 (value 1) with the signal S 258 a indicating the constant 15, and the two signals do not match. No set operation is performed. Therefore, the error flag holding unit 209 remains in the reset state, and the output error flag S166 keeps the Lo state.
- the comparison section 208 the signal S257 (value 1) is compared with the signal S258b indicating the constant 0, and the two signals do not match. A signal S260 indicating "mismatch" is output to the lag holding unit 210. As a result, the empty flag holding unit 210 outputs the empty flag S165 in the Lo state.
- the encoding unit 104 receives the L-state empty flag S165, and the L-state empty flag S165 is stored in the input image memory 105. Indicates that the digital image data to be encoded is stored. If this is detected, the encoding process is executed.
- the digital image data stored in the input image memory 105 is read out by the encoder 104 via the memory controller 103, and the encoder 104 receives the input digital image data.
- S 155 is sign-coded to generate encoded data S 156, which is output to the rate sofa 106. From the rate buffer 106, encoded data S157 is output to the outside as a device output of the image processing device at a constant rate.
- the encoding unit 104 when the encoding process on the digital image data for one slice is completed, the encoding unit 104 generates an encoding end signal S166 indicating that, and generates a flag. Output to section 107.
- the flag generator 107 the encoding end signal S166 is input to the read block counter 202 as shown in FIG. 2, and the read block counter 202 counts the held value by one. Performs a count-up operation to increase only.
- the image input control unit 102 confirms the state of the error flag S166, and the digital image data continues to be stored in the input image memory 105 while the error flag is in the Lo state.
- the encoding unit 104 checks the state of the event flag S165 every time encoding processing of digital image data in slice units is performed, and if the state is Lo, the human-powered image memory is used. The digital image data stored in 105 is read out and subjected to encoding processing.
- the light ⁇ block counter 201 shown in FIG. The count-up operation is performed every time the write end signal S166 output from the memory controller 103 (Fig. 1) is input. Then, when the counted value reaches 14 and the write end signal S 164 is further input, the set state is instructed to the carry flag holding unit 203 and the own counted value is set to 0. I do. In other words, the carry flag holding unit 203 is used when the count power in the light block counter 201 is equal to 15 (FIG. 3 (c)), which is the number of slices constituting one frame. It is in a set state.
- the read block counter 202 shown in FIG. 2 performs a count-up operation every time the encoding end signal S 166 output from the encoding unit 104 (FIG. 1) is input. Then, when the count value reaches 14 and the encoding end signal S166 is further input, the reset state is instructed to the carry flag holding unit 203 to set its own count value to 0. I do. That is, the carry flag holding unit 203 resets when the count value in the read block count 202 corresponds to 15 (FIG. 3 (c)), which is the number of slices constituting one frame. It is in a state.
- the selector 204 selects the signal S254b indicating the value 15 and The signal S255 indicating the value 15 is output to the adder 205. Therefore, in this case, the value 15 is added to the count value of the light block counter 201 in the adder 205, and as a result, S256 is output to the subtractor 206. Become.
- the embedding flag S 165 is in the Hi state, and the encoding process in the encoding unit 104 is stopped. Will do.
- the error flag S 16 2 is in the Hi state, and the image input control unit 102 generates the image input permission signal S 16 1 indicating invalidity. This means that the digital image is not stored in the input image memory overnight.
- FIGS. 4 and 5 are timing charts showing an example of the processing state of the image processing apparatus according to the first embodiment.
- the “image input permission signal S 161” shown in FIGS. 4 and 5 is a signal generated by the image input control unit 102 in FIG. 1 and output to the memory control unit 03. Yes, the Hi state indicates ⁇ valid j '', indicating that digital image data should be stored in the input image memory 105, and the Lo state indicates ⁇ invalid '', and the digital image data input image memory It is not instructed to store them in 105.
- "Digital image data S153" indicates digital image data in slice units output to the memory control unit 103 together with the image input permission signal S161.
- Light block count 201 in FIGS. 4 and 5 indicates the count value held by light block count 201 in FIG.
- the write block power counter 201 counts a write end signal 164 output from the memory control unit 103 shown in FIG. 1 and indicating that digital image data has been stored in slice units.
- the count value corresponds to the number of slices of digital image data stored in the input image memory 105.
- the carry flag (S 2 53) j in FIGS. 4 and 5 indicates whether the carry flag holding unit 203 is in the set state or the reset state in FIG.
- This signal indicates the state of the signal S 253.
- the signal S 253 is a Hi state signal in the set state, and a Lo state signal in the reset state. This is a signal for controlling the selection of 204.
- the “empty flag S 165” in FIGS. 4 and 5 indicates the state of the signal generated by the flag generator 107 and output to the encoder 104 in FIG.
- the digital image to be encoded It indicates that no image data is stored, and instructs the encoding unit 104 to stop the encoding process.
- the Lo state indicates that digital image data to be encoded is stored in the input image memory 105, and instructs the encoding unit 104 to execute encoding processing. is there.
- the “error flag S 162” in FIGS. 4 and 5 is the state of the signal generated by the flag generation unit 107 and output to the image input control unit 102 in FIG.
- the Hi state indicates an overflow in the input image memory 105, and generates an image input permission signal indicating “invalid” to the image human power control unit 102 (input image memo).
- the Lo state indicates that the image can be stored in the input image memory 105, and generates an image input permission signal indicating “valid” to the image input control unit 102 (input image memory 105). (Execution of storage in the file).
- the read block counter 202j in FIGS. 4 and 5 indicates the count value held by the read block counter 202 in FIG. 2.
- the read block force counter 202 is the first block.
- the encoding unit 104 counts an encoding end signal S166, which is output from the encoding unit 104 shown in the figure and indicates that encoding processing in a slice-based manner has been performed. It corresponds to the number of slices of the digital image data subjected to the conversion processing.
- Encoding processing (104) in FIGS. 4 and 5 shows the encoding processing in the encoding unit 10 in units of slices.
- the time required for the digital image data encoding process varies greatly depending on the nature of the image. As shown in the figure, the time required for processing one slice may be long or short.
- the image input control section 102 Since the effective area of the image is not input until timing t40 shown in the figure, the image input control section 102 outputs the image input enable signal S166 in the L0 state, and the digital signal is output. No image data is stored. From the timing t40, the first frame digital Both image data S 15 3 are input and processed. Since the error flag S166 is in the Lo state in the initial state, the image input control unit 102 generates the Hi-state image input enable signal S166 indicating "valid". The digital image data S 153 is stored in the input image memory 105.
- the memory control unit 103 outputs a write end signal S 164 to the flag generation unit 107, so that the flag generation unit
- the light block counter 201 included in 7 performs a power-up operation corresponding to the signal S164.
- the count value increases to 14 every time a slice (15 slices from 0 to 14) constituting the digital image data of the first frame is input.
- the value of the light block count 210 changes from 0 to 1 as described above.
- the event flag changes from the Hi state to the Lo state.
- the encoding unit 104 that has detected that the event flag has entered the Lo state reads the digital ghost image data stored in the input image memory 105 and performs the encoding process. Then, each time the encoding process for one slice is completed, an encoding end signal S166 is output, and the read block counter 202 of the flag generation unit 107 receives the signal S16. Performs the count-up operation corresponding to 6.
- the encoding process is quickly performed between timings t41 and t42, and immediately after t42, the digital image data to be encoded is stored in the input image memory 1 yet. It reaches the state where it is not stored in 05. In this case, since the value of the signal S257 output from the subtractor 206 shown in FIG. 2 is 0, the event flag is set to the Hi state according to the comparison result in the comparison unit 208. Is output as Therefore, as shown in FIG. 4, the encoding unit 104 stops encoding. Here, if the next slice is stored in the input image memory 105, the empty flag S165 returns to the Lo state, and the encoding process is performed again.
- the input image memory 105 has the first frame of digital data.
- Image data S 153 is stored.
- the harmful end signal S166 is input when the count flii14 is held.
- the signal S2553 output by the carry flag holding unit 203 becomes Hi, and the adder 205 adds the value 15 to the count value of the write block counter 201.
- the Rukoto is the input image memory 105 has the first frame of digital data.
- the image input control unit 102 outputs the image input permission signal S 16 1 indicating valid j.
- the first slice of the input digital image data is stored while being damaged by the encoded slice of the digital image data of one frame.
- the slice of S153 is also overwritten and stored in the input image memory 105.
- the encoding unit 104 performs the first frame.
- the read end counter 202 (the numerical value 14) to which the encoding end / signal S166 has been input is carried out as shown in FIG.
- the flag holding unit 203 is reset, and its own count value is set to 0. Therefore, the signal S 253 shown in FIG. 4 becomes a low state, and the adder 205 changes the value added to the light block count 201 from the value 15 to ⁇ 0 in the adder 205. .
- the image processing apparatus even if the input image memory 105, which has a content a for one frame, stores data for one frame, One frame of data is overwritten and processed at the slice level, and one frame of data is not immediately discarded as in the case of the conventional image processing device.
- the digital image data of the second frame is discarded without being encoded in the example shown in [4] of the fourth example.
- the encoding processing is performed without performing such processing.
- digital image data may be discarded in accordance with control using an error flag.
- FIG. 5 is a diagram for explaining the processing in such a case.
- the i-th frame of the digital image data S153 is stored in the input image memory 105 from the timing t50, and then the coding unit 104 performs the coding process.
- the storage of the digital I-way one image data S153 of the i-th frame ends.
- the output of the carry flag holding unit 203, the signal S 253 becomes Hi state, and the timing t 52 shows that Similarly, the digital image data of the (i + 1) th frame is stored in a state of being damaged.
- the data of the 11th slice of the i + 1st frame should be stored, but at this point, the 1st slice of the ith frame will be stored.
- the count value 11 of the light block count and the value 15 outputted from the selector 204 are added by the adder 205 in FIG. (Signal S 2 56) or subtractor 206.
- the count value of the read block counter 202 becomes the value 11, and the signal S 25 2 indicating the value 11 is output to the subtractor 206.
- the image input control unit 102 outputs a counter reset signal S166 to the flag generation unit 107.
- the light block counter 201 shown in FIG. 2 sets the count value to 0 in response to the signal S] 63 a.
- Input image The number of slices of digital image data stored in the image memory 105 is the number of remaining slices of the i-th digital image data that have not been subjected to the bowing processing. It will be shown.
- Timing t55 is a timing at which the storage of the digital image data of the (i + 1) th frame has been completed when it is assumed that normal processing has been performed.
- the image input control unit 102 shown in FIG. 1 outputs an error reset signal S166 to the flag generation unit 107.
- the error reset signal S166b is input to the error flag holding unit 209, and the state of the error flag holding unit 109 is changed from the set state to the reset state. You. Accordingly, the error flag output from the flag generator 107 changes from the Hi state to the Lo state.
- the read block counter 202 holds the count value 14, the encoding end signal S166 is input, and the carry flag holding unit 203 is reset.
- the encoding unit 104 stops the encoding process, and as shown in FIG. 5, a period in which the encoding process is suspended until the subsequent data is stored.
- the digital image data S153 of the second frame is stored in the input image memory 1 ⁇ 5, and therefore, in FIG. Since the count value is changed from 0 to 1, and the value of the signal S257 also changes from 0 to 1, the empty flag S165 is output in the Lo state. Therefore, as shown in FIG. 5, after timing t57 when the event flag S165 becomes the Lo state, the encoding process by the decoding unit 104 is resumed, and the i + 2 frame Is performed on the data of.
- the image processing apparatus uses slice units as shown in FIG. By performing overwrite storage, even if the encoding process is delayed, the second frame of digital image data is not discarded, but as shown in Fig. 5, the delay increases. If the data is overwritten on a slice basis and the shadow data reaches the unprocessed data on the i-th frame, the above processing is performed to restore the data on the i-th frame. Evening is the object of the encoding process. ⁇ The data in the ⁇ th frame is protected, and the data in the i + 2th frame is subsequently processed.
- the flag generation unit 107 that holds the carry flag internally and performs the combination of the error flag and the event flag is provided. Since the decoding process starts in accordance with the status of the event flag, the encoding process is performed after the digital image data for one slice is stored in the input image memory 105. Compared to the ghost image processing device using the conventional technology that requires the storage of one frame (15 slices in the image format shown in Fig. 3) for one frame, the encoding is This makes it possible to reduce the delay until the start of processing, making it more suitable for real-time applications.
- the image size stored in the input image memory is 35 2 pixels X 240 pixels (3 pixels).
- the slice size which is the unit of processing in the first embodiment, is as follows: 1 slice is 3 52 2 pixels XI 6 pixels (35 2 pixels XI 6 lines) ).
- the time required to store one frame of image data in the input image memory is 240 lines X 63.5i) s, which is about 15 seconds. Will be required.
- the delay time from the start of image capture to the start of encoding is 15 ms as described above.
- the time required for storing one slice of image data in the input image memory is 16 lines ⁇ 63.5 us, which is about 1 ms. It will be necessary. This approximately 1 ms starts encoding. 3]
- the delay time can be greatly reduced compared to the case of the conventional technology.
- the amount of memory S may be enough to store one frame, and at least two frames are required. Compared with the conventional image processing apparatus using a branch operation, it has a small capacity, so that it is possible to reduce the mounting cost.
- the flag generation unit 107 holds the carry flag, the input ghost image memory 105 can be overwritten on a slice basis, so that even if the encoding process is delayed, It is possible to reduce the possibility of performing frame discarding and to improve ffl.
- Image processing instrumentation g according to a second embodiment of the present 3 ⁇ 4 Ming implementation, E emissions used in the same manner as the first embodiment, the control ffl force 5 controls the both images processed using a flag, in the first embodiment Instead of the boutique flag, the remaining number of block units is used.
- FIG. 6 is a block diagram showing a configuration of the image processing apparatus according to the second embodiment.
- the image processing apparatus g according to the second embodiment includes a / 0 conversion unit 601, an image input control unit 602, a memory control unit 603, an encoding unit 604, an input image It is equipped with a memory 605, a rate controller, a buffer 606, and a flag generator 607.
- the analog video signal S651 is used as a device input, and the encoded data S656. Is the device output.
- the encoding unit 604 of the image processing device according to the second embodiment includes a loop setting unit 604 1 and an interrupt processing unit 604 2. As in FIG. 1 of the first embodiment, a signal indicated by a solid line indicates data to be processed, and a signal indicated by a broken line indicates a signal for control.
- the image input control unit 602 generates an image input permission signal indicating whether the input digital image data is valid or invalid.
- the image input control unit 602 sets both images according to the valid area / invalid area M of the digital image data.
- the form of implementation Like the input image control unit 102 in the state 1, the error flag input from the flag generation unit 607 described later is referred to.
- the image input permission signal indicating “valid” is output and the error flag is valid (Hi State)
- an image input permission signal indicating “invalid” is generated.
- the encoding unit 604 performs a predetermined compression encoding process on the digital image data to generate encoded data.
- the loop setting unit 601 included in the encoding unit 604 includes the number of consecutively executed encoding processes based on the number of remaining blocks S 665 input from the flag generation unit 607 described later. Set the number of loops indicating
- the interrupt processing unit 6002 included in the encoding unit 604 resets the number of loops held by the loop setting unit 604 in response to the error flag input from the flag generation unit 607. Execute. If the value of the remaining block number S 665 to be input is 0, the encoding unit 604 of the second embodiment does not perform the encoding process.
- the loop setting unit 60 0 41 which continuously encodes digital image data of the number of slices corresponding to the number of loops in 1. As in the encoding unit 104 in the first embodiment, the encoding of one slice is performed. Each time the encoding process is completed, an encoding end signal S666 is output to the flag generator 607.
- the flag generator 607 counts the signal indicating the end of writing in slice units input from the memory controller 603 and the signal indicating the end of coding in slice units input from the encoder 604. Then, based on the result of the counting, a flag (the number of remaining blocks and the error flag) used for controlling data input / output to / from the memory is generated.
- the flag generation unit 607 includes a continuous process indicating the number of times that the encoding unit (encoding unit 604) can continuously execute the encoding process for the unit processing amount (one slice). It generates logical information (the number of remaining blocks).
- FIG. 7 is a block diagram showing the internal configuration of the flag generator 607 (FIG. 6).
- the flag generator 607 includes a write block counter 701, a lead block counter 702, a carry flag holder 703, a selector 704, and an adder. 705, subtractor 706, first and second comparison ⁇ 707, 708, error flag storage 709, and remaining block storage 710 And
- the block remaining number storage unit # 10 converts the result output from the subtractor 705 into digital image data that can be subjected to encoding processing; Is stored as the number of remaining blocks (m) in slice units.
- the second comparison units 707 and 708, and the error flag holding unit 7 • 9 are the same as 201 to 209 of the first embodiment shown in FIG.
- the remaining block number m held by the remaining block holding unit becomes 0, and a signal S666 indicating a value of 0 is output to the encoding unit 604. Then, the encoding unit 604 to which the number of remaining blocks S 665 is input does not execute the encoding process because the value is 0.
- the analog video signal S651 which is a device input of the image processing device
- the analog video signal S651 is sent to the A / D conversion unit 6001. Input and analog / digital conversion processing.
- the AZD converter 601 outputs the generated digital image data S652 to the image input controller 602. Since the error flag S166 is in an invalid state (Lo state), the image input control section 602 sets the image input permission f-number S6661 corresponding to the input digital image data S652.
- the memory controller 603 stores the corresponding digital image data S652 in the input image memory 600 because the image input permission signal S6661 indicates that it is valid. After that, when one slice is stored, a write end signal S6664 is output to the flag generator 607.
- the signals S 7 5 S 7 56 and S 7 57 The value takes the value 1 from the value 0, and the number m of remaining blocks also changes from 0 to 1.
- the signal S6665 is output to the encoding unit 604 as indicating the value "1". Accordingly, the encoding unit 604 executes the encoding process, and outputs the encoding end signal S 666 to the flag generation unit 607 when the encoding process for one slice is completed. I do.
- the loop including the value m as the number of loops is input. This is set in the setting section 6 0 4 1. Then, when the encoding process for the digital two-image data for one slice is completed, the number of loops is reduced by 1 until the number of loops reaches 0. The encoding process is continuously performed on the next one slice of digital image data without detecting 65. When the number of loops becomes 0, the signal S6665 is detected, the number m of remaining blocks is obtained, and the number of loops is set.
- the signal S 757 generated inside the flag generation section 607 is a count value of the write-back counter 701 (when the carry flag is in the reset state). )
- the number of stored slices and the count value of the read block counter 702 Is the difference from the number of slices that have been subjected to the encoding processing, and the value is the number of remaining blocks m. Accordingly, since the digital image data of the number of slices corresponding to the number m of remaining blocks is present in the input image memory 105 so as to be subjected to the encoding process, the arching unit 704 determines the number of remaining blocks.
- the digital image data of the number of slices corresponding to the remaining number m of blocks can be continuously read out and subjected to the encoding process without detection again.
- the encoding unit 104 in the first embodiment needs to detect the state of the empty flag every time encoding processing of one slice of digital image data is performed.
- the encoding unit 604 detects the signal S 665 indicating the number of remaining blocks only when the number of loops becomes 0, and the frequency of detection is reduced, so that more efficient processing is performed. Is to do.
- the image input control unit 602 checks the state of the error flag S666, and the digital image data is kept stored in the input image memory 605 while the error flag is in the L0 state.
- the encoding unit 604 executes the encoding process as described above.
- the count values of the write block counter 701 and the read block counter 702 of the flag generator 607 are updated in accordance with the storage of the digital image data and the encoding processing, and the difference is compensated.
- the value of the signal S 757 is set to the remaining block number m.
- the set / reset of the carry flag holding unit 703 is performed in the same manner as in the first embodiment.
- the adder 705 sets the light block counter 701 in the adder 705. 15 will be added to the count value.
- the input control section 602 sets the image input permission signal to “invalid”. By indicating, the digital image data is not stored in the input image memory.
- FIGS. 8 and 9 are timing charts showing an example of the processing state of the image processing apparatus according to the second embodiment.
- the block remaining number mI shown in FIG. 8 and FIG. 9 is held in the 7K block remaining number holding unit 710, and in FIG. It shows the value of the signal S666 output from the lag generator 607 to the encoder 604.
- “Image input enable signal S666”, “Digital image data S635”, “Write block counter 701”, “Carry flag (S753)” , “Error flag S6662”, “Read block count 702”, and “Encoding process (604)” are the same as those in FIGS. 4 and 5 in the first embodiment. It is.
- the image input control section 602 outputs the image input enable signal S666 in the Lo state, and There is no storage of total image data.
- the digital image data S653 of the first frame is input and processed. Since the error flag S666 is in the Lo state in the initial state, the image input control ⁇ 602 generates the image human-power permission signal S6661 in the Hi state indicating the valid j.
- the image data S653 is stored in the input image memory 605. Then, each time one slice is stored, the memory control unit 603 sends the flag data to the flag generation unit 607.
- the count value increases to 14 each time a slice (15 slices from 0 to 14) constituting the digital image data of the first frame is input.
- the remaining block number m changes from 0 to 1.
- the encoding unit 604 to which the signal S666 is input sets the number of loops to 1 in the included loop setting unit 6041, and performs encoding processing on digital image data for one slice. Then, the number of loops is changed from 1 to 0 because the number of loops is reduced by one. Since the number of loops has become 0, the coding unit 604 detects the signal S665 at timing t82, and acquires the number m of remaining blocks.
- the encoding process is performed quickly, and the remaining number m of blocks becomes zero at timing t83.
- the encoding unit 604 which has detected the signal S6665 and obtained the number m of remaining blocks, stops the encoding process because the value is 0.
- the encoding process by the encoding unit 604 is restarted by detecting the signal S665 indicating that the remaining block number m has changed from 0 to 1 as shown in the figure.
- the number of loops 3 is set in the loop setting section 60041.
- the encoding unit 604 encodes one slice of the digital image data S163 stored in the input image memory 105 (the seventh slice of the first frame), and calculates the number of loops. Subtract 1 to 2.
- the encoding unit 604 does not detect the signal S6665 and encodes the next one slice (eight slices are encoded and the number of loops is set to 1.
- the number of loops is not 0, so
- the encoding unit 604 encodes the next one slice (the ninth slice) without detecting the signal S6665, and sets the number of loops to 0.
- the number of loops is 0
- the encoding unit 604 detects the signal S6665 and obtains the value 6 as the remaining number of blocks m.
- the number of loops is set to 6, and the same processing is repeated. It is.
- the damage is completed in the state of the count value 14 of the write block count 701, and S666 is input, so the carry flag holding unit 703 is set.
- the signal S 7 53 becomes Hi.
- 15 is added to the count value of the write block counter 701 inside the flag generator 607, as in the first embodiment.
- Embodiment 1 the encoding process for the first frame of digital image data is not completed, and the second frame digital image data is input there.
- the data is not overwritten and stored in slice units, and the second frame data is not discarded unlike the conventional image processing device.
- the read block counter 702 inputs the encoding end signal S666 in the state of the counting place 14, so that the carry flag holding section 703 is reset to reset. As a result, the signal S753 changes to the Lo state.
- the error Digital image data may be discarded in accordance with the control using lag.
- FIG. 9 is a flowchart for explaining the processing in such a case.
- the i-th frame of digital image data S653 is input field from timing t90. ⁇ Stored in the memory 605, and then the encoding unit 604 starts the encoding process.
- the storage of the digital image data S653 of the i-th frame ends.
- the signal S753 output from the carry flag holding unit 703 becomes Hi state, and from timing t92, as in the case of FIG.
- the digital image data of the first frame is overwritten and stored, and the data of the 11th slice of the (i + 1) th frame should be stored.
- the encoding process for the data of the 11th slice of the i-th frame has not been completed.
- the error flag S662 is set to the Hi state, and the image input control unit 62 receives the image input enable signal S6. 6] is set to “Lo state indicating invalid j”, so that the digital image data S653 is not stored in the input ghost image memory 105. Therefore, [the encoding process is not completed.
- the digital image data after the 11th slice of the i-frame g is kept without being harmed.
- the count reset signal S6663a since the count reset signal S6663a is output, the count value of the light block count 701 is set to the value 0, and in FIG. 5 1 force; 0, the signal S 756 obtained by adding the value 15 in the adder 705 becomes the value 15. Since the count value 11 of the lead block counter 702 is input to the subtractor 206, the value of the signal S757 is 4, which is the subtraction result, and the remaining number of blocks m Also has the value 4.
- the interrupt processing unit 604 2 Inputs the signal S666 indicating the remaining block number m to obtain the remaining block number m.
- the loop setting unit 604 1 The number of loops to be held is reset.
- the remaining number m of blocks is stored in the input image memory 605, and indicates the number of slices in the i-th frame that has not been subjected to the bowing-encoding process. Then, the encoding process is continuously performed by the number of the slices, and at timing t95, the encoding process for the entirety of the i-th frame is completed.
- the error flag holding unit 709 is reset by the error reset signal S666b (FIG. 7), and the error flag S 6 62 (Fig. 9) is in the Lo state.
- the coding unit 604 Stop the encoding process. Thereafter, at timing t96 when the digital image data S653 for one slice of the (i + 2) th frame is stored, the remaining block number m becomes the value 1, so the encoding process is restarted. Is done.
- the encoding unit 604 includes the loop setting unit 604 1 and the interrupt processing unit 604 2, and the flag generation unit It is assumed that 607 generates and outputs an error flag and the number of remaining blocks. Since the coding unit 6104 starts the coding process in accordance with the value of the remaining block number m, the input image memory 6 In step 5, the encoding process can be performed after the digital image data for one slice is stored, and the data storage for one frame (15 slices in the image format shown in FIG. 3) is performed. Compared with the required conventional image processing apparatus, it is possible to reduce the delay until the start of the encoding processing, which is more suitable for real-time use.
- the memory capacity is sufficient to store one frame, and the conventional technology requires a capacity of at least two frames. Since the capacity is smaller than that of the image processing apparatus, it is possible to reduce the cost of the apparatus.
- the flag generation unit 607 holds the carry flag, so that the input Since the overwriting process can be performed on the slice 605 in units of slices, even if the encoding process is delayed, the possibility of performing frame discarding is reduced, and the image quality can be improved. .
- the encoding unit 604 performs the detection processing of the signal S 666 only for the number of loops held by the included loop setting unit 604 1 Since the encoding process is performed continuously without any processing, the effect of improving the processing efficiency is obtained as compared with the first embodiment in which the event flag is detected for each encoding process for one slice.
- the format image data is used in FIG. 3, but the present invention is not limited to this.
- the digital image data is horizontal 3 52 2 pixels x vertical 2 88 8
- a block of 8 * 8 pixels may be used as an encoding processing unit.
- the two image data to be processed are capable of handling luminance data, color difference data, RGB data, and the like, and the same effects can be obtained.
- the delay time until the start of encoding is reduced. Even in applications requiring real-time performance such as monitoring of array arrays, better display can be achieved.
- the image data is unified when the image data is encoded. It is possible to use a relatively small-capacity storage device as a storage device for storing time, thereby realizing a ghost image processing device with a low cost.
- an image processing apparatus which can reduce the chance of discarding image data in order to cope with a delay in encoding processing and can improve the image quality by reducing the degree of discarding. It is.
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- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Compression Or Coding Systems Of Tv Signals (AREA)
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- Editing Of Facsimile Originals (AREA)
- Television Signal Processing For Recording (AREA)
Description
Claims
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CA002293458A CA2293458C (en) | 1997-06-16 | 1998-06-11 | Image processing apparatus, and image processing method |
US09/446,022 US6690378B1 (en) | 1997-06-16 | 1998-06-11 | Image processor and image processing method |
EP98924581A EP0989753A4 (en) | 1997-06-16 | 1998-06-11 | IMAGE PROCESSOR AND METHOD FOR IMAGE PROCESSING |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
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JP15884397 | 1997-06-16 | ||
JP9/158843 | 1997-06-16 |
Publications (1)
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WO1998058495A1 true WO1998058495A1 (en) | 1998-12-23 |
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ID=15680629
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PCT/JP1998/002581 WO1998058495A1 (en) | 1997-06-16 | 1998-06-11 | Image processor and image processing method |
Country Status (7)
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US (1) | US6690378B1 (ja) |
EP (1) | EP0989753A4 (ja) |
KR (1) | KR100360005B1 (ja) |
CN (1) | CN1144466C (ja) |
CA (1) | CA2293458C (ja) |
TW (1) | TW509849B (ja) |
WO (1) | WO1998058495A1 (ja) |
Cited By (3)
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US6934336B2 (en) | 2001-07-26 | 2005-08-23 | Matsushita Electric Industrial Co., Ltd. | Area expansion apparatus, area expansion method, and area expansion program |
JP2009135836A (ja) * | 2007-11-30 | 2009-06-18 | Victor Co Of Japan Ltd | ディジタル画像無線伝送装置及びその画像データ処理方法、ディジタル画像無線受信装置及びディジタル画像無線送受信システム |
JP2015073177A (ja) * | 2013-10-02 | 2015-04-16 | ルネサスエレクトロニクス株式会社 | 動画像符号化装置およびその動作方法 |
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JP2003046938A (ja) * | 2001-07-30 | 2003-02-14 | Fujitsu Ltd | 半導体装置 |
JP2005012494A (ja) * | 2003-06-19 | 2005-01-13 | Olympus Corp | 画像処理装置 |
US7719579B2 (en) * | 2005-05-24 | 2010-05-18 | Zoran Corporation | Digital camera architecture with improved performance |
TWI349259B (en) * | 2006-05-23 | 2011-09-21 | Au Optronics Corp | A panel module and power saving method thereof |
US7812827B2 (en) * | 2007-01-03 | 2010-10-12 | Apple Inc. | Simultaneous sensing arrangement |
CN101521829B (zh) * | 2009-01-23 | 2014-01-08 | 浙江大学 | 一种深度图像序列处理的方法及装置 |
JP2012138661A (ja) * | 2010-12-24 | 2012-07-19 | Sony Corp | 画像処理装置および方法 |
CN112945283B (zh) * | 2021-02-05 | 2022-11-04 | 浙江禾川科技股份有限公司 | 绝对编码器的圈数解码方法、装置、系统 |
CN114347679B (zh) * | 2021-12-31 | 2022-11-29 | 东莞市启思达智能技术有限公司 | 一种变精度的信号处理方法及系统 |
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- 1998-06-11 CN CNB988062828A patent/CN1144466C/zh not_active Expired - Fee Related
- 1998-06-11 CA CA002293458A patent/CA2293458C/en not_active Expired - Fee Related
- 1998-06-11 US US09/446,022 patent/US6690378B1/en not_active Expired - Fee Related
- 1998-06-11 EP EP98924581A patent/EP0989753A4/en not_active Withdrawn
- 1998-06-11 KR KR1019997011822A patent/KR100360005B1/ko not_active IP Right Cessation
- 1998-06-11 WO PCT/JP1998/002581 patent/WO1998058495A1/ja not_active Application Discontinuation
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US6934336B2 (en) | 2001-07-26 | 2005-08-23 | Matsushita Electric Industrial Co., Ltd. | Area expansion apparatus, area expansion method, and area expansion program |
JP2009135836A (ja) * | 2007-11-30 | 2009-06-18 | Victor Co Of Japan Ltd | ディジタル画像無線伝送装置及びその画像データ処理方法、ディジタル画像無線受信装置及びディジタル画像無線送受信システム |
JP2015073177A (ja) * | 2013-10-02 | 2015-04-16 | ルネサスエレクトロニクス株式会社 | 動画像符号化装置およびその動作方法 |
Also Published As
Publication number | Publication date |
---|---|
US6690378B1 (en) | 2004-02-10 |
EP0989753A1 (en) | 2000-03-29 |
TW509849B (en) | 2002-11-11 |
CA2293458C (en) | 2004-11-16 |
CA2293458A1 (en) | 1998-12-23 |
CN1144466C (zh) | 2004-03-31 |
KR20010013804A (ko) | 2001-02-26 |
CN1260936A (zh) | 2000-07-19 |
EP0989753A4 (en) | 2001-08-16 |
KR100360005B1 (ko) | 2002-11-07 |
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