WO1998047065A1 - Dispositif et procede de commande de support d'enregistrement - Google Patents
Dispositif et procede de commande de support d'enregistrement Download PDFInfo
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- WO1998047065A1 WO1998047065A1 PCT/JP1998/001754 JP9801754W WO9847065A1 WO 1998047065 A1 WO1998047065 A1 WO 1998047065A1 JP 9801754 W JP9801754 W JP 9801754W WO 9847065 A1 WO9847065 A1 WO 9847065A1
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- WIPO (PCT)
- Prior art keywords
- recording medium
- control
- value
- address
- file
- Prior art date
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Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/061—Improving I/O performance
- G06F3/0613—Improving I/O performance in relation to throughput
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
- G06F3/0658—Controller construction arrangements
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0673—Single storage device
- G06F3/0679—Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B19/00—Driving, starting, stopping record carriers not specifically of filamentary or web form, or of supports therefor; Control thereof; Control of operating function ; Driving both disc and head
- G11B19/02—Control of operating function, e.g. switching from recording to reproducing
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B27/00—Editing; Indexing; Addressing; Timing or synchronising; Monitoring; Measuring tape travel
- G11B27/02—Editing, e.g. varying the order of information signals recorded on, or reproduced from, record carriers
- G11B27/031—Electronic editing of digitised analogue information signals, e.g. audio or video signals
Definitions
- the present invention is for a variety of recording medium pieces, of a preferred recording medium control device and method using the case of a control such as writing and reading faster and flexible Things.
- Reappearance technology The present applicant has disclosed in Japanese Patent Application Laid-Open Nos. Hei 6-131131, Hei 6-215010, and Hei 6-301601.
- an information providing device information transfer device
- FIG. 1 is an external view of a conventional information recording / reproducing apparatus proposed in the above publication.
- the information recording / reproducing device 200A includes a coupling terminal 201 with an information providing device (not shown), and the information recording / reproducing device 200A is connected to the information recording / reproducing device 200A via the coupling terminal 201.
- the information can be copied to the provided recording medium.
- There is no particular limitation on the type of recording medium but it is convenient to use a semiconductor memory that can be copied at high speed, is easy to access randomly, and has excellent portability.
- the information recording / reproducing device 200A includes a display 202 for displaying characters, images, and the like, and a function selection unit 203 including a push button switch and the like. Since the information recording / reproducing apparatus 200A displays the contents of the information recorded in the recording medium on the display unit 202, the user selects desired information using the function selection unit 203. Can be played back.
- the content of the information provided from the information providing device includes text information, audio information, video information, computer programs, and the like, and is not particularly limited.
- the reproduction of the program means that the program is executed. In this case, the user may input information as needed at the time of execution.
- the reproduction signal is text information or a video signal, it can be displayed on a display 202 constituted by, for example, a liquid crystal display device.
- audio information it can be output to the earphone 204.
- a speaker may be provided instead of the earphone 204 or in addition to the earphone 204, or a playback signal output terminal is provided to connect to an external display device, speaker, or the like. You may be able to.
- FIG. 2 is an external view of another conventional information recording / reproducing apparatus proposed in the above publication.
- the information recording / reproducing device 200 B shown in FIG. 2 is obtained by separating the information recording / reproducing device 200 A shown in FIG. 1 into an information recording device 210 and an information reproducing device 220.
- the information recording / reproducing apparatus 200 B reproduces information from the information recording apparatus 210 by inserting the information recording apparatus 210 into the insertion / ejection port 221 of the information reproducing apparatus 220. It can be transmitted to the device 220 for playback.
- a coupling terminal 2 12 with the information reproducing device 2 20 is provided on the information recording device 210, and a coupling terminal corresponding to the coupling terminal 2 12 is provided. Is provided on the information reproducing apparatus 220 side, and both coupling terminals are configured to be coupled in a state where the information recording apparatus 210 is mounted on the information reproducing apparatus 220.
- the information recording device 210 has two connecting terminals, a connecting terminal 211 for connecting to an information providing device and a connecting terminal 211 for connecting to an information reproducing device.
- the configuration may be as follows.
- the information recording device 210 may be constituted only by a recording medium. By using only the recording medium, a smaller and lighter portable information recording device can be obtained. In this case, control such as reading from the recording medium or writing to the recording medium is performed by the information reproducing device 220 or the information providing device.
- FIG. 3 is an external view of a conventional information providing device proposed in the above publication.
- the information providing device 230 includes a display 231 for displaying the content and price of information that can be provided, and an output selection unit 232 for selecting information desired by a user.
- the user inserts the information recording device 210 shown in FIG. 2 into the insertion outlet 233 of the information providing device 230 and refers to the information displayed on the display 231 while referring to the information.
- the desired information can be copied to the information recording device 210 by operating the output selector 2 32 and selecting the desired information.
- the information can be copied by connecting the coupling terminal provided in the information providing device 230 to the coupling terminal 201 of the information recording / reproducing device 200A shown in FIG.
- the information providing device 230 includes a recording medium storing information to be provided, Information copy control unit (not shown) for reading information desired by the user from the recording medium and writing the read information to the information recording device 210 and the information recording / reproducing device 20 OA. I have.
- the information providing device 230 is connected to an information providing center (not shown) via a wired or wireless communication unit, and provides information desired by the user via the communication unit. It may be configured. With such a configuration, it is not necessary to provide a recording medium in the information providing device 230. Also, even when a recording medium is provided in the information providing device 230, the information stored in the recording medium is updated via the communication unit, so that the latest information can be provided while suppressing communication costs. Becomes
- FIG. 4 is an external view of another conventional information providing device proposed in the above publication.
- the information providing device 240 an inlet 241 and an outlet 242 for the information recording device 210 are arranged at a distance from each other.
- the information providing device 240 includes a moving unit (not shown) that conveys the information recording device 210 inserted from the entrance 241, and provides information to be provided to the inserted information recording device 210. After copying, discharge from outlet 2 4 2.
- the applicant H can receive a copy of the information while walking in the direction of arrow A in the figure. This information providing device 240 can quickly provide information to many people.
- non-volatile memory which does not require backup of information by a battery. That is, according to this nonvolatile memory, the recorded information is not erased, which is convenient.
- non-volatile memory include “32-Mbit NAND flash memory” by Iwata et al. Materials EEPR0M (Electrically Erasable and Programmable ROM) described in June 1995, pp.32-37) can be used.
- DMA Direct Memory Acceses
- CPU Central Processing Unit
- DMAC DMA controller
- This is used when a large amount of data needs to be transferred at a high speed, for example, in data transmission with an auxiliary storage device such as a hard disk device, or in image processing for processing image data.
- FIG. 5 shows a configuration example of a conventional information recording / reproducing apparatus.
- a DMA transfer between an I / O device such as a hard disk controller and a SCSI (Small Computer System Interface) controller and a memory such as a magnetic disk and SRAM (Static Random Access Memory). Seen when you do.
- I / O device such as a hard disk controller and a SCSI (Small Computer System Interface) controller
- a memory such as a magnetic disk and SRAM (Static Random Access Memory). Seen when you do.
- the DMAC 251 of the information recording / reproducing device 250 indicates the address of a transfer destination such as a memory, and is incremented (increased by 1) at each data transfer. -The number of data is counted and decremented each time data is transferred (one is performed). Word A Word Counter c is built in, and these initial values are set to the CPU 25 before the DMA transfer. Set by 2.
- DMA transfer is started by a data transfer request from the I / O device 254.
- the I / O device 254 transmits a signal DREQ requesting a data transfer to the DMAC 251 in order to perform a data transfer with the above-described information providing device via the data input / output terminal 255.
- the CPU 252 having received this signal completes the necessary processing such as suspending the execution of the program and returns a signal BUSACK indicating the release of the bus to the DMAC 251.
- the DMAC 251 recognizes that it has acquired the right to use the bus, and the substantial data transfer with the DMAC 251 as the bus master is started.
- the addressless bus and the data bus indicated by the dotted lines in the figure indicate portions used when the CPU 252 exercises the bus use right as the bus master, and once the bus use right is released, the high bus is used. Because of the impedance, the DMAC 251 indicates that DMA transfer can be performed using the address bus and the data bus indicated by solid lines in the figure.
- the DMAC 251 sets the I / O device 254 to the DMA transfer enable state by the response signal DACK to the DMA transfer request from the I / O device 254, and at the same time, the memory 253 by the chip enable signal CE. Is set to the enable state. At the same time, the DMAC 251 inputs the address indicated by the address register p into the memory 253 via the address bus.
- the DMA transfer for one node is executed as follows. In the case of overnight transfer from the I / 0 device 254 to the memory 253, both the I / O device read signal I0R and the memory write signal MEMW are made active, while the memory 253 In the case of transfer to the I / O device 254, both the memory read signal MEMR and the I / O device write signal I0W are activated. At this time, the signal appearing on the data bus is transferred. Data.
- the value of the address register p is incremented, and at the same time, the first count c is also decremented.
- the DMA transfer continues until the word count c becomes 0 or the DMA transfer request DREQ from the I / O device 254 is canceled. In either case, at the same time as the end of the DMA transfer, the DMA C 25 1 withdraws the bus use right request signal BUSREQ output to the CPU 25 2, and the CPU 25 2 2 Cancel the use right release signal BUSACK and resume the interrupted processing.
- DMA transfer attempts to make effective use of the bus bandwidth, and performs bursty data transfer that requires processing time via the CPU, and bus processing other than the CPU causes CPU processing to take place. It is possible to efficiently control memory, I / O devices, etc. without reducing the performance.
- the information recording / reproducing apparatus is constituted by a hard disk drive, a PC drive, or the like
- a file is initially recorded at a physically continuous recording position on a recording medium. After repeating, the file is divided and recorded at physically separated locations.
- the performance required of the DMAC is that data transfer can be performed independently of the recording medium and recording format. In other words, it is desirable to be able to flexibly cope with the case where the configuration and the type of the recording medium are different and the case where the recording position and the recording order are different.
- the present invention has been made in view of the above-described circumstances, and simultaneously executes high-speed data transfer by parallel control of recording medium pieces, suppresses overhead processing in data transfer, and realizes more versatility. It is an object of the present invention to provide a recording medium control device and method capable of high-speed data transfer.
- the recording medium control device sequentially selects a plurality of ordered address registers for holding address values for a recording medium on which information can be recorded, and one effective address register from the plurality of address registers. Control to output an address value of the address register designated by the above-mentioned binding area and a control signal for the recording medium so as to perform parallel control on a plurality of addresses on the recording medium. And a control circuit for performing the control.
- a recording medium control device includes: an address register that holds an address value for a recording medium including a plurality of recording medium pieces capable of recording information; A selection circuit for generating a recording medium selection signal corresponding to each of the recording medium pieces; and a control for the address value, the recording medium selection signal, and the recording medium pieces for controlling the plurality of recording medium pieces. And a control circuit for performing control for outputting a signal.
- a recording medium control device performs control to output an address register for holding an address value for a recording medium on which information can be recorded, an address value for the address register, and a control signal for the recording medium. And a control circuit for changing control of the recording medium in accordance with the value of the address register.
- a recording medium control method provides a recording medium capable of recording information.
- One effective address register is sequentially selected from a plurality of ordered address registers that hold an address value for the above, and the above address selection is performed so as to perform parallel control on the plurality of addresses on the recording medium. Control to output the address value of the address register and the control signal for the recording medium.
- a recording medium control method includes: storing an address value for a recording medium composed of a plurality of recording medium pieces capable of recording information; and controlling each of the plurality of recording medium pieces based on the address value.
- control for outputting the address value, the recording medium selection signal, and the control signal for the recording medium piece is performed.
- FIG. 1 is an external view of a conventional information recording / reproducing apparatus.
- FIG. 2 is an external view of another conventional information recording / reproducing apparatus.
- FIG. 3 is an external view of a conventional information providing apparatus.
- FIG. 4 is an external view of another conventional information providing apparatus.
- FIG. 5 is a block circuit diagram showing a schematic configuration of a conventional information recording / reproducing apparatus.
- FIG. 6 is a block diagram showing a schematic configuration of the information recording / reproducing apparatus according to the embodiment of the present invention.
- FIG. 7 is a diagram (memory map) for explaining a file recording method in the information recording / reproducing apparatus according to the embodiment of the present invention.
- FIG. 8 is a diagram for explaining a sequence of file writing and reading control in the information recording / reproducing apparatus according to the embodiment of the present invention.
- FIG. 9 is a diagram for explaining a sequence of file erasure control in the information recording / reproducing apparatus according to the embodiment of the present invention.
- FIG. 10 is a diagram (memory map) for explaining another recording method of a file in the information recording / reproducing apparatus according to the embodiment of the present invention.
- FIG. 11 is a diagram for explaining another sequence of file writing and reading control in the information recording / reproducing apparatus according to the embodiment of the present invention.
- FIG. 12 is a diagram for explaining another sequence of file erasure control in the information recording / reproducing apparatus according to the embodiment of the present invention.
- BEST MODE FOR CARRYING OUT THE INVENTION hereinafter, embodiments of the present invention will be described with reference to the drawings.
- FIG. 6 is a block diagram showing the overall configuration of the information recording / reproducing apparatus. The main configuration is almost the same as that of FIG. 5 described above, but further includes a detailed recording medium control unit 100 realizing the present invention.
- the information recording / reproducing apparatus 1 includes a transfer that executes input / output of transfer data via an input / output terminal 10 for connection to the information providing apparatus, the information reproducing apparatus, and the like described above.
- a control unit 101 a recording medium control unit 100 that writes or reads the transfer data to or from the recording medium 103, and a file that is recorded on the recording medium 103.
- a CPU 102 that controls the setting and execution of the above components.
- the recording medium control unit 100 includes a page counter (Page Counter) 112 for counting the number of pages in a data transfer, and, for example, eight address registers. Evening Address Register (Address Register), which consists of P [0], p [1], ⁇ , p [7], and which holds the addressing value to specify the address (Address) for recording medium 103 ) Group 1 13 and a value for specifying the type of control for the boy 1 (Pointer) 1 1 1 and the recording medium 10 3 for selecting one of the valid address registrations from among these multiple address registrations.
- Page Counter consists of P [0], p [1], ⁇ , p [7]
- the recording medium 103 is composed of four physically separated recording medium pieces 103 a, 103 b, 103 c, and 103 d. Is shown. Also, the address (Address) and the control signals MEMR and MEMW given to the recording medium 103 are to be input to all the recording medium pieces, and the four recording medium selections output from the recording medium selection circuit 114 are selected. The signals CE0, CE1, CE2, and CE3 are input to the four recording medium pieces 103a, 103b, 103c, and 103d, respectively. Further, the number of each address register group constituting the address register group 113 is arbitrary, and can be selected variously according to the configuration of the recording medium and the like. Also, the recording medium control unit 100 is controlled. As long as the number of controllable recording medium pieces, that is, the number of recording medium selection signals, is within the range, the number of recording medium pieces is also arbitrary.
- a recording medium selection circuit 114 for generating recording medium selection signals CE 0 to CE 3 corresponding to the address values of the address register group 113 is provided with a recording medium control unit 110.
- a recording medium control unit 100 that can be directly connected to the recording medium 103 is realized, and an external circuit such as an address decoder is not required.
- the present embodiment has been described as generating the recording medium selection signals CE0 to CE3 corresponding to the address values, it is needless to say that the recording medium selection signals correspond to the individual address registers. Such a method is also included in the present invention.
- the processing contents of the control circuit 110 in the recording medium control unit 100 include the transfer control unit 101, the CPU 102, and the recording medium 1 according to the value of the control register 115.
- the pointer to the address register group 1 1 1 Update the value of.
- the control circuit 110 decrements (reduces "1") each time a one-page data transfer is performed. Increment the address value (advance "1"). At the start of the data transfer, the pointer 1 1 1 has the initial value for the first address register p [0] as the initial value, and every time the data transfer for one page ends, the pointer address for the next address register is set. Updated to pointer value.
- the next address register is indicated by the pointer 1 1 1
- the next address register will be p [0]. That is, the pointers 1 1 1 are stored in the order of p [0] ⁇ p [l] ⁇ p [2] "... ⁇ p [7] ⁇ p [] ⁇ Repeat the address registration.
- a control command that can be recognized by the control circuit 110 other than the address value for the recording medium 103.
- a control command for example, a value of 11 as a control command
- the pointer 1 1 1 is set as follows. [0] ⁇ p [1]-p [2] ⁇ ⁇ ⁇ Repeat the address register specification in the order of '.
- control circuit 110 can change the processing content according to the address value held in the current address register. For example, if the address value that overflowed during the current address register is retained or the address value in the system area is retained, the boy address skips the current address register and skips to the next address register. It is also possible to point to the start address or the start address register p [0], and it is also possible to interrupt the data transfer process. In the example of Fig. 6, for example, during the data transfer, the third address register p [2] Assuming that the address value has been updated to an overflow value, the address register setting must be repeated in the following order in the following order: p [1] ⁇ p [3] ⁇ p [0] ⁇ - Is possible.
- An important feature of the present invention is that an operation other than control on a recording medium and another control on a recording medium are performed by a value of an address register holding an address value of a recording medium which is usually a target of writing or reading control. That is, it implements a circuit to execute.
- the present invention also includes a control circuit that executes the erase control when the address value of the address register becomes the value indicating the head address of the block which is the data erase unit during the write control.
- the recording medium selection circuit 114 decodes the address value held in the address register indicated by the point-in-time value of the data area 111 and recognizes which of the plurality of recording medium pieces the address is for. Then, the corresponding recording medium selection signal is output to the recording medium 103. That is, in the example of FIG. 6, the second address register p [1] holds CBP [1: 1: 0] as an address value, which is a recording medium piece 103 as described later. Since the address is for b, the recording medium selection circuit 114 outputs a recording medium selection signal CE 1 to the recording medium piece 103 b.
- the CPU 102 instructs the transfer control unit 101 to transfer and input a desired file, and at the same time, performs initial settings for the recording medium control unit 100.
- the transfer file is written.
- the free area in the recording medium 103 for writing is searched from the file management unit 104.
- the corresponding address value is set in the address register group 113, and the number of pages of the transfer file is set to the page count.
- Write control is specified in the control register.
- the pointer 111 is set to point to the start address register p [0].
- the transfer control unit 101 Upon detecting a file transferred and input from the input / output terminal 10, the transfer control unit 101 outputs a signal DREQ to the recording medium control unit 100, and writes data to the recording medium 103. Request.
- the recording medium control unit 100 needs to use an address bus to execute the data transfer, and outputs a signal BUSREQ to the CPU 102 to output the bus. Request usage rights.
- the CPU 102 Upon receiving this, the CPU 102 completes necessary processing, such as interrupting the execution of the program, and then returns a signal BUSACK indicating bus release to the recording medium control unit 100.
- the recording medium control unit 1000 subsequently returns a signal DACK for acknowledging the overnight transfer to the transfer control unit 101.
- writing of the transfer file input from the input / output terminal 10 to the transfer control unit 101 to the recording medium 103 is started. Details of the file write control will be described later.
- the transfer control unit 101 cancels the signal DREQ. Therefore, the recording medium control unit 100 also cancels the signal BUSREQ after completing necessary processing such as verification of a write result. Then, the CPU 102 having recovered the right to use the bus records the management information on the written file in the file management unit 104, thereby Complete the transfer input of the file.
- the CPU 102 instructs the transfer control unit 101 to transfer and output a desired file, and at the same time, performs the initial setting for the recording medium control unit 100.
- the management information of the transfer file to be read is searched from the file management unit 104, the corresponding address value is set in the address register group 113, and the transfer is performed. Set the number of pages in the file to page count 1 1 2.
- read control is specified in the control register.
- the pointer 1 1 1 is set to point to the first address register p [0].
- the transfer control unit 101 outputs a signal DREQ to the recording medium control unit 100 to request the data transfer.
- the recording medium control unit 100 needs to use an address bus or a data bus to execute data transfer, and outputs a signal BUSREQ to the CPU 102 to request a bus use right. I do.
- the CPU 102 Upon receiving this, the CPU 102 completes necessary processing, such as interrupting the execution of the program, and then returns a signal BUSACK indicating bus release to the recording medium control unit 100.
- the recording medium control unit 100 recognizes that the right to use the bus has been acquired by the signal BUSACK, the recording medium control unit 100 outputs a file from the input / output terminal 10 via the transfer control unit 101. 0 Start reading from 3. Details of the file read control will be described later.
- the transfer control unit 101 In order to cancel the signal DREQ, the recording medium control unit 100 also completes the necessary processing and then cancels the signal BUSREQ signal, thereby completing the transfer output of the file.
- the recording medium 103 of the information recording / reproducing apparatus 1 When a semiconductor memory medium or a disk medium capable of random access is used as the recording medium 103 of the information recording / reproducing apparatus 1, an effect of high-speed information transfer can be obtained. Further, the information can be obtained by using a non-volatile memory. A power source for holding is unnecessary, and the device 1 can be further downsized. For example, a rewritable nonvolatile memory such as a flash memory can be used.
- FIG. 7 shows a specific example of the recording state of a file in the recording medium 103 recorded by the recording medium control unit 100 and the file management unit 104 according to the embodiment of the present invention.
- the recording medium 103 is composed of four recording medium pieces 103a, 103b, 103c, and 103d.
- a recording medium piece composed of 4 blocks per chip and 4 pages per block will be described.
- the block is a unit of data erasing
- the page is a unit of data erasing.
- C corresponds to the memory chip number c
- B corresponds to the block number b which is the minimum unit of erasure
- P corresponds to the page number P which is the minimum unit of writing, and is expressed as CBP [c: b: p].
- the capacity of one page is, for example, 512 bytes, which is the same as the capacity of one sector in order to facilitate application to a FAT (File Allocation Table) file system.
- F File Allocation Table
- S S
- each recording medium piece C [0], C [l], C [2] and C [3] is composed of four blocks from block B [0] to B [3].
- This figure shows a state in which there are four pages, P [0] to P [3].
- the file management unit 104 converts the name (File) or number, size (Size), and start address (Loc) of each file recorded on the recording medium 103 from M [0] to M [m-1]. In addition to recording and managing in the recording area, the logical order of each file is managed.
- m is the maximum number of files that can be managed by the file management unit 104.
- the value ( ⁇ 1) described in the file management unit 104 in the figure indicates that the file management data is invalid.
- the sector data is recorded from the first address in the block.
- Such a recording method has already been proposed in the specification and drawings of Japanese Patent Application Publication No. 10-69420 by the present applicant.
- the recording method described in the specification and drawings of Japanese Patent Application Publication No. 10-69420 is used for recording file data on a recording medium in which the unit of erasing information is larger than the unit of writing information. Then, the data of the file is written from the head position of the erasing unit. If the capacity of the file to be recorded is larger than the capacity that can be recorded in the erasing unit, the file to be recorded is divided, and each of the divided files is written from the beginning of the erasing unit.
- a plurality of recording medium pieces having an information erasing unit larger than the information writing unit are used, and a plurality of recording medium pieces are ordered to form a group of recording medium pieces.
- the recording medium is divided for each writing unit, and each divided data is sequentially written in parallel to the plurality of recording medium pieces by associating the divided order with the order of the recording medium pieces.
- the contents recorded in the recording area of the file management unit 104 in the example of FIG. 7 indicate the following.
- Three files are recorded in the recording medium 103, and their logical order is F [1], F [2], and F [0].
- File F [l] starts from block B [l] starting address CBP [0: 1: 0] for 23 sectors.
- File F [2] starts from block B [3] starting address CBP [0: 3: 0].
- the following describes that the file F [1] shown in FIG. 7 is written to the recording medium 103 by performing the initial setting described in the recording medium control unit 100 of FIG. 6 by the CPU 102. .
- the CPU 102 When starting writing data to the recording medium 103 with the data of 23 sectors transferred to the information recording / reproducing apparatus 1 as a file F [l], the CPU 102 sets a file in the free space of 23 sectors as a file. Search by the management unit 104. However, due to the limitation of the file management unit 104, the free area is searched for by an integral multiple of four blocks.
- FIG. 8 shows a sequence in which the file F [l] to be transferred and input is written to the recording medium 103 as shown in FIG. 7 in the example of the initial setting shown in the recording medium control unit 100 in FIG. I have.
- the values marked with * indicate the initial values of Boyne Evening 11, Page Count Evening 112, and Addressless Evening Group 113.
- Each row in Figure 8 shows the value of the page counter (Page Counter) 1 12 for each data transfer of one page and the address register (Pointer) pointed to by the Pointer 1 1 1 at that time. Register) indicates the address value held.
- the leftmost column in FIG. 8 shows Sector Data.
- the parallel control is executed by associating four address registers among four address registers in the recording medium control unit 100 with four recording medium pieces, respectively. I have.
- the first data FS [1: 0] is recorded in the address register CBP [0: 1: 0] held by the address register p [0] pointed to by the first boyne. After that, the address value of the address register p [0] is updated to CBP [0: 1: 1] and the input value of the address register is updated to 22.
- the next data FS [1: 1] is recorded in the address CBP [1: 1: 0] held by the address register p [1] pointed to by the updated pointer. After that, the address value of the address register p [1] is updated to CBP [1: 1: 1] and the count value is updated to 21.
- the data overnight FS [1: 2] is recorded in the address CBP [2: 1: 0] pointed to by the address register p [2]
- the data overnight FS [1: 3] is recorded in the address register p [2].
- 3] is recorded in the address CBP [3: 1: 0] indicated by Since the control command (—1) is held in the address register p [4] pointed to by the next updated pointer, the pointer is updated again by the control circuit 110 and the address register p [0] is updated. Point. Therefore, the next data FS [1: 4] is recorded in CBP [0: 1: 1] held by the address register p [0] indicated by the pointer.
- the CPU 102 When the writing operation in the recording medium control unit 100 is completed, the CPU 102 records the management information on the file F [l] in the file management unit 104 as described above.
- the capacity of the file to be transferred is known before the transfer is started.
- the page counter is initialized to 0, and the transfer control unit 101 drops the signal DREQ. It is also possible to record in the file management unit 104 the file capacity obtained by incrementing (+1) and counting the number of pages transferred and input during the period.
- the file can be read in parallel by the same sequence as in FIG. That is, the CPU 102 can recognize from the file management unit 104 that the file F [1] is recorded with a capacity of 23 pages from the start position of the block B [1].
- the read control is specified for the sectors F, which constitute the file F [1]
- the sectors FS [1: 0] to FS [ 1:22] Read in one can.
- Fig. 9 shows the recording medium controller when deleting file F [1] in Fig. 7.
- each row holds the value of Page Counter (Page Counter) 1 12 and the address register (Address Register) pointed to by Pointer 1 1 1 at that time.
- the leftmost column in FIG. 9 shows a block address.
- the CPU 102 as in the case of the read operation described above,
- the difference from 1 12 is that the number of blocks to be erased is set as the initial value.
- the number of blocks to be deleted depends on the properties of the file management unit 104.
- the recording medium control unit 100 erases one block (four consecutive pages) from the address CBP [0: 1: 0] held by the address register P [0] pointed to by the first pointer, and then deletes the address register p [
- the first line in Figure 9 shows that the address value of [0] is updated to CBP [0: 2: 0] and the count value is updated to 7.
- the address value of the address register p [1] is changed to CBP [1].
- the second line shows that the count value is updated to 6.
- CBP [3: 2: 0] held by the address register p [3] pointed to by the pointer is erased.
- the address value is updated to CBP [3: 3: 0], but since it is updated to 0 in the count, the control circuit 110 recognizes that the erase operation has been completed and ends the processing. I do.
- the CPU 102 updates the management information on the file F [l] to the file management unit 104 as described above.
- the control of the control circuit 110 differs from the write operation and the read operation in that the address value is updated not in the page unit but in the block unit.
- An important feature of the present invention is that, in addition to the conventional write control and read control, erasure control can be performed on a recording medium, and a circuit for executing erasure operations on a plurality of recording medium pieces in parallel. That is,
- FIG. 10 is an example of another recording state of the file on the recording medium 103.
- the file F [l] in this example has been written by initializing the recording medium control unit 100 as shown in FIG.
- address CBP [2: 1: 0], CBP [3: 1: 0], CBP [0: 2: 0], CBP [1: 2: 0], CBP [2: 2: 0], CBP [3: 2: 0] are specified, and control commands (—1) are assigned to address registers p [6] and p [7].
- a value (23) which is the file capacity is set in the page counter 112, and p [0] indicating the head address register is set in the pointer 111.
- the write control is designated in the control register 115, so that the recording medium control unit 100 enters an active state.
- the parallel control for the six blocks is performed in the sequence shown in FIG. 11, so that the file is recorded in a state as shown in FIG.
- the file is composed of a file block sequence composed of a block sequence of an arbitrary length, and an arbitrary first address. And writing file management information corresponding to the writing of the file and storing the file management information in the file management process. That is, the recording medium control unit 100 does not perform control depending on a specific file management method, but performs control corresponding to any of various file management methods considered to be employed in the information recording / reproducing apparatus 1. What to do.
- the most important feature of the present invention is that a circuit for executing operations such as writing and reading in parallel for a plurality of addresses dispersed in a recording medium is realized. It is not necessary to have a specific regularity, and it is possible to specify an arbitrary address of an arbitrary recording medium piece within the range permitted by the file management method, so that the recording medium can be controlled according to various file management methods. Is possible.
- FIG. 12 shows a sequence in the recording medium control unit 100 when erasing the file F [l] in FIG.
- the CPU 102 obtains the address where the file F [1] is recorded and the number of blocks constituting the file F [l] from the file management unit 104, and sets them as initial values in the address register and the page count, respectively. .
- the recording medium control unit 100 erases one block from the address CBP [2: 1: 0] held by the address register P [0] pointed to by the first pointer, and then erases the address register p [0].
- the first line in Figure 12 shows that the address value is updated to CBP [2: 2: 0] and the count is updated to 5. Then, after deleting one block from the address CB P [3: 1: 0] held by the address register p [1] pointed to by the updated pointer, the address value of the address register p [11] is changed to CBP. [3: 2: 0], The second line shows that the count value is updated to 4.
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Description
Claims
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP98914056A EP0923023A4 (en) | 1997-04-16 | 1998-04-16 | CONTROL ARRANGEMENT AND METHOD FOR A RECORDING MEDIUM |
US09/202,168 US6523105B1 (en) | 1997-04-16 | 1998-04-16 | Recording medium control device and method |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
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JP9919997 | 1997-04-16 | ||
JP9/99199 | 1997-04-16 |
Publications (1)
Publication Number | Publication Date |
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WO1998047065A1 true WO1998047065A1 (fr) | 1998-10-22 |
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PCT/JP1998/001754 WO1998047065A1 (fr) | 1997-04-16 | 1998-04-16 | Dispositif et procede de commande de support d'enregistrement |
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Country | Link |
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US (1) | US6523105B1 (ja) |
EP (1) | EP0923023A4 (ja) |
WO (1) | WO1998047065A1 (ja) |
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JP2005285191A (ja) * | 2004-03-29 | 2005-10-13 | Nec Electronics Corp | 不揮発性半導体記憶装置及びその駆動方法 |
JPWO2006051780A1 (ja) * | 2004-11-10 | 2008-05-29 | 松下電器産業株式会社 | 不揮発性メモリ装置および不揮発性メモリ装置のアクセス方法 |
US8725975B2 (en) * | 2007-01-03 | 2014-05-13 | Freescale Semiconductor, Inc. | Progressive memory initialization with waitpoints |
US20080162858A1 (en) * | 2007-01-03 | 2008-07-03 | Freescale Semiconductor, Inc. | Hardware-based memory initialization with software support |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62251991A (ja) * | 1986-04-25 | 1987-11-02 | Fujitsu Ltd | Icカ−ドのフアイルアクセス方式 |
JPH06139140A (ja) * | 1990-12-31 | 1994-05-20 | Intel Corp | 不揮発性半導体メモリのファイル構造 |
JPH07200181A (ja) * | 1993-11-29 | 1995-08-04 | Sony Corp | 情報転送装置及び情報記録装置 |
JPH07302176A (ja) * | 1994-05-09 | 1995-11-14 | Toshiba Corp | 半導体ディスク装置 |
JPH0877081A (ja) * | 1994-09-02 | 1996-03-22 | Hitachi Ltd | ファイルメモリシステム |
JPH1069420A (ja) * | 1996-08-29 | 1998-03-10 | Sony Corp | 情報記録装置、情報記録再生装置、情報記録方法および情報再生方法 |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5144692A (en) * | 1989-05-17 | 1992-09-01 | International Business Machines Corporation | System for controlling access by first system to portion of main memory dedicated exclusively to second system to facilitate input/output processing via first system |
AU5442494A (en) * | 1992-10-13 | 1994-05-09 | Compaq Computer Corporation | Disk array controller having advanced internal bus protocol |
US5459850A (en) * | 1993-02-19 | 1995-10-17 | Conner Peripherals, Inc. | Flash solid state drive that emulates a disk drive and stores variable length and fixed lenth data blocks |
JPH06266596A (ja) * | 1993-03-11 | 1994-09-22 | Hitachi Ltd | フラッシュメモリファイル記憶装置および情報処理装置 |
US5465338A (en) * | 1993-08-24 | 1995-11-07 | Conner Peripherals, Inc. | Disk drive system interface architecture employing state machines |
US5603001A (en) * | 1994-05-09 | 1997-02-11 | Kabushiki Kaisha Toshiba | Semiconductor disk system having a plurality of flash memories |
US5724617A (en) * | 1995-09-07 | 1998-03-03 | Nikon Corporation | Photographing apparatus having vibration reducing mechanism |
JPH1069520A (ja) | 1996-06-18 | 1998-03-10 | Nippon Steel Corp | 文字認識方法及びプログラムを記録した記録媒体 |
-
1998
- 1998-04-16 EP EP98914056A patent/EP0923023A4/en not_active Ceased
- 1998-04-16 WO PCT/JP1998/001754 patent/WO1998047065A1/ja active IP Right Grant
- 1998-04-16 US US09/202,168 patent/US6523105B1/en not_active Expired - Fee Related
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62251991A (ja) * | 1986-04-25 | 1987-11-02 | Fujitsu Ltd | Icカ−ドのフアイルアクセス方式 |
JPH06139140A (ja) * | 1990-12-31 | 1994-05-20 | Intel Corp | 不揮発性半導体メモリのファイル構造 |
JPH07200181A (ja) * | 1993-11-29 | 1995-08-04 | Sony Corp | 情報転送装置及び情報記録装置 |
JPH07302176A (ja) * | 1994-05-09 | 1995-11-14 | Toshiba Corp | 半導体ディスク装置 |
JPH0877081A (ja) * | 1994-09-02 | 1996-03-22 | Hitachi Ltd | ファイルメモリシステム |
JPH1069420A (ja) * | 1996-08-29 | 1998-03-10 | Sony Corp | 情報記録装置、情報記録再生装置、情報記録方法および情報再生方法 |
Non-Patent Citations (1)
Title |
---|
See also references of EP0923023A4 * |
Also Published As
Publication number | Publication date |
---|---|
EP0923023A4 (en) | 2007-04-25 |
EP0923023A1 (en) | 1999-06-16 |
US6523105B1 (en) | 2003-02-18 |
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