Classifications

• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
  • H10F71/00—Manufacture or treatment of devices covered by this subclass
  • H10F71/121—The active layers comprising only Group IV materials
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
  • H10F10/00—Individual photovoltaic cells, e.g. solar cells
  • H10F10/10—Individual photovoltaic cells, e.g. solar cells having potential barriers
  • H10F10/14—Photovoltaic cells having only PN homojunction potential barriers
  • H10F10/146—Back-junction photovoltaic cells, e.g. having interdigitated base-emitter regions on the back side
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
  • H10F77/00—Constructional details of devices covered by this subclass
  • H10F77/10—Semiconductor bodies
  • H10F77/16—Material structures, e.g. crystalline structures, film structures or crystal plane orientations
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
  • H10F77/00—Constructional details of devices covered by this subclass
  • H10F77/20—Electrodes
  • H10F77/206—Electrodes for devices having potential barriers
  • H10F77/211—Electrodes for devices having potential barriers for photovoltaic cells
  • H10F77/219—Arrangements for electrodes of back-contact photovoltaic cells
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
  • H10F77/00—Constructional details of devices covered by this subclass
  • H10F77/20—Electrodes
  • H10F77/206—Electrodes for devices having potential barriers
  • H10F77/211—Electrodes for devices having potential barriers for photovoltaic cells
  • H10F77/219—Arrangements for electrodes of back-contact photovoltaic cells
  • H10F77/227—Arrangements for electrodes of back-contact photovoltaic cells for emitter wrap-through [EWT] photovoltaic cells, e.g. interdigitated emitter-base back-contacts
• • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
  • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
  • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
  • Y02E10/00—Energy generation through renewable energy sources
  • Y02E10/50—Photovoltaic [PV] energy
  • Y02E10/547—Monocrystalline silicon PV cells
• • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
  • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
  • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
  • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
  • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

• a low level of shading can be achieved, for example, in a solar cell in which both the n and the p contacts are on the back. ' In this way, the front is not shaded by any contact and is therefore fully available for light exposure.
• a solar cell without front-side metallization is, for example, from RA Sinton, PJ Verlinden, RA Crane, RM Swanson, C. Tilford, J. Perkins and K. Garrison, "Large-Area 21% Efficient Si Solar Cells", Proc. Of the 23rd IEEE Photovoltaic Specialists Conference, Louisville, 1993, pages 157 to 161. To produce them, differently doped areas are produced next to one another in several masking steps and metallized or contacted by applying a multilayer metal structure.
• the contact holes and the associated contacts arranged on the rear side have to be aligned with one another.
• the contact holes drilled with a laser can lead to undesirable structural changes in the silicon, which means additional recombination centers can be created for charge carrier pairs, which further reduce the collection efficiency The reduced mechanical strength can lead to breakage with these solar cells.
• the object of the present invention is to provide a solar cell without shading front contacts, which is simple and inexpensive to manufacture and which fulfills the further requirements for a high-performance solar cell.
• the solar cell according to the invention is made up of a crystalline silicon substrate with (110) orientation.
• This material has the advantage that it has (111) planes oriented vertically to the (110) surface.
• Anisotropic etching oriented to the crystal structure makes it possible to produce depressions, holes or perforations with a high aspect ratio and two vertical side walls in the (110) substrate.
• the solar cell according to the invention has a multiplicity of aligned parallel to (111) planes, elongated slots that extend through or break through the entire thickness of the silicon substrate.
• the inner surfaces of the slots have a high doping corresponding to the conductivity type of the flat emitter layer produced at least on the front.
• On the back of the solar cell there is a grid-shaped first contact pattern for the electrical connection of the bulk material. Interdigital to this, a second grid-shaped contact pattern is arranged on the back, which at least partially overlaps the slots and thus ensures the electrical connection of the emitter layer.
• the front of the solar cell according to the invention is undisturbed except for the slots and has a high-quality surface that enables good passivation and an effective anti-reflective layer.
• the slots with high aspect ratios of, for example, 1: 600 can be created in the silicon substrate. In this way it is possible to minimize the size of the slots and thus the surface losses.
• Slots anisotropically etched in (110) silicon have sidewalls that consist of (111) planes. Two of these planes are arranged vertically to the substrate surface, while the two “narrow sides” run obliquely through the substrate. When etching from the rear of the silicon substrate, the cross section of the slots tapers towards the front, so that the surface losses through the slots The elongated expansion of the slots makes it easier to adjust the second contact pattern, which overlaps the slots on the back.
• the silicon substrate is highly doped in the slots. This creates sufficiently electrically conductive current paths which connect the front of the solar cell to the back or to the contact pattern applied there. With a sufficiently dense pattern of slots and due to the relatively small substrate thickness, the current paths for charge carriers collected on the front side remain short.
• the series resistance of the solar cell is also low and a high fill factor is possible.
• a so-called tricrystal wafer is used as the substrate, as is known, for example, from an article by G. Martinelli in Solid State Pheno ena Vol. 32 to 33, 1993, pp 21-26.
• Such a wafer has three mutually tilted monocrystalline regions, each of which is (110) oriented.
• the interfaces between the monocrystalline regions run radially towards the center of the wafer, so that the monocrystalline regions form circular sectors of the tricrystalline wafer.
• Two of the three interfaces are first order twin grain boundaries at (111) planes, which are particularly low in defects.
• a solar cell according to the invention manufactured from such a tricrystal wafer has the advantage that the mechanical stability of the wafer and thus of the solar cell is greatly increased in comparison to a monocrystalline substrate. In this way, the substrate thickness can be reduced to values of 30 to 70 ⁇ m without having to accept an increased risk of breakage during processing.
• the tricrystal wafer is particularly suitable for the invention, since it only has (110) -oriented surfaces or, for the first time, makes (110) -oriented silicon substrates sufficiently available. Crystal pulling monocrystalline (110) - oriented rods is considerably more difficult than that, since it is faster to crystal dislocations and 'loss of structure, which leads from conventional (100) -Siliziumstäben to premature termination of the drawing process.
• the crystal pulling of a tricrystal is 2 to 3 times faster than with (110) oriented silicon rods. No cone is required at the end of the rod. It can therefore be quasi-continuously and carry out settlement-free.
• a crucible can be used up to ten times.
• a solar cell with a thinner silicon substrate has additional technical advantages.
• the requirement for a high-performance solar cell that the diffusion length of the minority charge carriers is greater than three times the thickness of the substrate is already met by a material of lower electronic quality with a thinner substrate.
• a thinner silicon substrate therefore leads to lower recombination losses in a solar cell than a thicker substrate.
• a solar cell with a tricrystalline silicon substrate is sufficiently stable even with a large number of slots breaking through the substrate. Nevertheless, it is advantageous if the slots running parallel to (111) planes are offset from one another, so that in one and the same (111) plane there are not several slots arranged one behind the other that break the substrate parallel to crystal planes by the given “ Perforation ".
• a first and a second contact pattern on the back of the solar cell are preferably applied as thick film contacts and in particular as a conductive paste to be sintered on.
• the first and second contact patterns form an interdigital structure in which finger-shaped contacts are arranged alternately, the finger-shaped contacts of the first and second contact patterns intermeshing like the teeth of a zipper.
• Each contact pattern comprises at least one bus structure that connects all finger-shaped contacts to one another.
• One of the bus structures is preferably arranged all around in the vicinity of the edge of the rear side of the solar cell.
• the area proportions of the first and second contact patterns are preferably approximately the same, since the same amount of charge has to be transported for both types of charge carriers and the series resistance is thus minimized.
• FIGS. 1 to 7 show, using schematic cross sections through the substrate, different process stages in the production of the solar cell.
• FIGS. 8 and 9 show, using schematic cross sections through the substrate, different process stages of a process variant
• FIG. 10 shows a slot in a perspective top view of a silicon substrate.
• FIG. 11 shows a tricrystal wafer in a top view.
• FIG. 12 shows a possible arrangement for the first and second contact patterns on the back.
• the starting point for the method according to the invention is, for example, a p-doped silicon wafer 1 with (110) -
• the slots or a pattern of slots are created.
• an oxide or nitride layer 2 is first applied all over to the front side VS and rear side RS. Rectangular openings 3 corresponding to the slit pattern are then defined and freely etched in this oxide or nitride layer 2 by photolithography.
• This process stage is shown in FIG. 1 on the basis of a schematic and not to scale cross section through a silicon substrate.
• a dopant contained in the paste for the first contact pattern 7 produces a p doping 9, which overcompensates the emitter layer 5 and establishes the ohmic contact with the p-doped region of the substrate 1 located inside.
• the material of the second contact pattern 8 creates a conductive connection to the n + -doped region 5, the emitter layer.
• FIG. 7 With the aid of the first and second contact patterns 7 and 8 as a self-adjusting mask, the pn junction between the first and second contact patterns can optionally be separated in the next step, for example by plasma etching, depressions 13 being formed between the first and second contact patterns.
• the p doping 9 which at the same time represents a back surface field (BSF)
• BSF back surface field
• FIG. 8 In a process variant (following the process stage corresponding to FIG. 4), the passivation layer 6 and the emitter layer 5 are removed in a lift-off process, for example by brief plasma etching, in an area 14 which is used to receive the first contact pattern is provided. It is therefore dimensioned somewhat larger than the first contact pattern.
• FIG. 9 The first and second contact patterns 7, 8 are then applied, for example by printing, and optionally baked.
• the first contact pattern can in turn contain a doping suitable for producing a BSF.
• the second contact pattern 8 is also possible, following the state shown in FIG. 4, to first apply the second contact pattern 8 and to use it as a mask for the lift-off method for removing the passivation layer 6 and emitter layer 5, the regions 14 corresponding to the bulk material reaching recesses are generated. In the- The first contact pattern 7 is then applied to the recesses. In this variant, it is advantageous to generate the second contact pattern 8 with a larger area than the first contact pattern 7, in order to maintain a maximum emitter area after the lift-off process.
• the first and second contact patterns 7 and 8 are applied in such a way that the two do not overlap and are electrically separated from one another.
• FIG. 10 shows a perspective view of the rear side of the silicon substrate 1 with one of the slots 4.
• This has two opposite vertical walls 11, which correspond to (111) planes in the substrate.
• the narrow sides of the slots 4, on the other hand, are delimited by crystal surfaces 12 which run obliquely thereto and which likewise represent (111) planes.
• the slot width b is set to 5 to 50 ⁇ m and is, for example, 15 to 20 ⁇ m.
• the slot length 1 is dependent on the thickness of the silicon substrate 1.
• the length 1 is preferably chosen such that the virtual intersection of the surfaces 12 delimiting the narrow sides of the slot is arranged just above the front side VS of the silicon substrate 1. In this way, a slot viewed from the front side VS of the substrate 1 is obtained, the "length" of which corresponds to b and the "width" parallel to the slot length 1 is minimized.
• FIG. 11 shows a tricrystal wafer, which is preferably used as a substrate for the solar cell according to the invention.
• This has three monocrystalline areas M1, M2, M3, which are all (110) -oriented but tilted towards one another are.
• the tricrystal wafer is arranged in such a way that a first-order twin grain boundary KG12 with (111) planes as grain-limiting crystal surfaces is formed between the monocrystalline regions M1 and M2.
• the grain boundary KG13 between Ml and M3 is also a first-order twin grain boundary with limiting (111) crystal planes.
• An optimally grown tricrystal with the two first order twin grain boundaries has ideal inside angles between the different monocrystalline areas, which are exactly 109.47 ° for Wl and exactly 125.26 ° for W2 and W3.
• deviating internal angles also lead to a stable tricrystal wafer. This can be obtained by sawing from appropriate tricrystal rods, with safe handling of the corresponding wafer being guaranteed down to wafer thicknesses of 30 ⁇ m without increased risk of breakage.
• Preferred wafer thicknesses for a solar cell are, for example, in the range from 60 to 150 ⁇ m.
• FIG. 11 shows an exemplary embodiment for the arrangement of the first and second contact patterns on the back of a tri-crystal wafer.
• the two lower legs of the "star" formed by the grain boundaries form first-order twin grain boundaries in accordance with the orientation shown in FIG. 9.
• the slots in the tricrystal wafer are preferably arranged such that their length 1 is aligned parallel to one of the first-order twin grain boundaries According to the arrangement of the tri-crystal wafer shown in Figure 9, the slot pattern is aligned parallel to the grain boundary KG13 in the first half of the wafer to the left of the imaginary axis A, in the right On the other hand, the wafer half located from the axis A is parallel to the grain boundary KG 12.
• the slots are preferably arranged offset with respect to one another, so that slots arranged side by side do not lie in one and the same (111) plane. they are wisely offset from each other by more than an entire slot width.
• the first contact pattern 7 has a bus structure which is arranged all around in the vicinity of the substrate edge. Contact fingers emanating therefrom point obliquely to the central axis of the substrate.
• the second contact pattern 8 has a central bus structure which is arranged, for example, parallel to the axis A shown in FIG. 9.
• the finger-shaped contacts emanating therefrom are arranged interdigital to the first contact structure 7 without touching it.
• the geometrical alignment of the first contact pattern 8 is selected in the exemplary embodiment such that the contact fingers are aligned parallel to the length 1 of the slots and therefore overlap in length.
• the first contact pattern 7 does not overlap any of the slots.
• the contact pattern with the surrounding bus structure overlaps the slots and therefore contacts the n-doped regions while the contact pattern with the central bus structure serves to contact the p-doped bulk material.
• the width of the finger-shaped contacts for the first and second contact patterns is set to approximately 300 ⁇ m, for example.
• Such a contact pattern can be produced reliably and reproducibly using conventional screen printing techniques. However, they are also significantly wider or narrower finger-shaped
• the finger - shaped contacts of a contact structure are approx. 3 mm apart.
• one or more anti-reflective layers of suitable thickness can be applied to the passivation layer 6.
• a solar cell according to the invention produced in this way has all of the prerequisites that are required to achieve a collection efficiency of over 20 percent.
• the requirement that the diffusion length for the minority charge carriers is greater than three times the thickness of the silicon substrate is already met with inexpensive CZ silicon in which the diffusion length L is the same with the solar cell according to the invention
• a high surface quality which is expressed by a low surface recombination speed S, can be safely achieved in a simple manner both on the front and on the back with passivation layers.
• a high surface quality of S ⁇ 1000 cm / s can be set with an oxide passivation above the emitter.
• a surface recombination speed S ⁇ 100 cm / s is required, which can be achieved with the solar cell according to the invention without further measures.
• Required shading losses below 4 percent are also exceeded with the solar cell according to the invention, since it has practically no shadowing.
• Low required reflection values ⁇ 4 percent are obtained with standard anti-reflective coatings.
• the invention also achieves a high fill factor of at least 80 percent.
• a further advantage of solar cells with contacts applied exclusively on the rear side is that mechanical interconnection of different solar cells to form a module is facilitated, since bushings on the front side are no longer required to solder corresponding connections. This simplifies the interconnection process and increases process reliability.
• the solar cells according to the invention are therefore fully automated and can be produced on an industrial scale.

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• 1996
  • 1996-12-03 DE DE19650111A patent/DE19650111B4/de not_active Expired - Fee Related
• 1997
  • 1997-11-19 WO PCT/EP1997/006465 patent/WO1998025312A1/de not_active Ceased
  • 1997-11-19 US US09/319,397 patent/US6143976A/en not_active Expired - Fee Related
  • 1997-11-19 DE DE59708512T patent/DE59708512D1/de not_active Expired - Fee Related
  • 1997-11-19 AU AU53231/98A patent/AU718786B2/en not_active Ceased
  • 1997-11-19 JP JP52512698A patent/JP3924327B2/ja not_active Expired - Fee Related
  • 1997-11-19 EP EP97950204A patent/EP0948820B1/de not_active Expired - Lifetime
  • 1997-11-19 RU RU99114608/28A patent/RU2185688C2/ru not_active IP Right Cessation
  • 1997-11-19 ES ES97950204T patent/ES2186011T3/es not_active Expired - Lifetime

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