WO1998001903A1 - Procede de fabrication d'un composant de circuit integre a semi-conducteur - Google Patents

Procede de fabrication d'un composant de circuit integre a semi-conducteur Download PDF

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Publication number
WO1998001903A1
WO1998001903A1 PCT/JP1996/001901 JP9601901W WO9801903A1 WO 1998001903 A1 WO1998001903 A1 WO 1998001903A1 JP 9601901 W JP9601901 W JP 9601901W WO 9801903 A1 WO9801903 A1 WO 9801903A1
Authority
WO
WIPO (PCT)
Prior art keywords
photomask
coordinate system
pattern
manufacturing
inspection
Prior art date
Application number
PCT/JP1996/001901
Other languages
English (en)
Japanese (ja)
Inventor
Masami Ikota
Aritoshi Sugimoto
Original Assignee
Hitachi, Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi, Ltd. filed Critical Hitachi, Ltd.
Priority to PCT/JP1996/001901 priority Critical patent/WO1998001903A1/fr
Publication of WO1998001903A1 publication Critical patent/WO1998001903A1/fr

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Classifications

    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y40/00—Manufacture or treatment of nanostructures
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N21/00—Investigating or analysing materials by the use of optical means, i.e. using sub-millimetre waves, infrared, visible or ultraviolet light
    • G01N21/84—Systems specially adapted for particular applications
    • G01N21/88—Investigating the presence of flaws or contamination
    • G01N21/95—Investigating the presence of flaws or contamination characterised by the material or shape of the object to be examined
    • G01N21/9501—Semiconductor wafers
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N21/00—Investigating or analysing materials by the use of optical means, i.e. using sub-millimetre waves, infrared, visible or ultraviolet light
    • G01N21/84—Systems specially adapted for particular applications
    • G01N21/88—Investigating the presence of flaws or contamination
    • G01N21/95—Investigating the presence of flaws or contamination characterised by the material or shape of the object to be examined
    • G01N21/956—Inspecting patterns on the surface of objects
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00—Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/68—Preparation processes not covered by groups G03F1/20 - G03F1/50
    • G03F1/82—Auxiliary processes, e.g. cleaning or inspecting
    • G03F1/84—Inspecting
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/70425—Imaging strategies, e.g. for increasing throughput or resolution, printing product fields larger than the image field or compensating lithography- or non-lithography errors, e.g. proximity correction, mix-and-match, stitching or double patterning
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/70425—Imaging strategies, e.g. for increasing throughput or resolution, printing product fields larger than the image field or compensating lithography- or non-lithography errors, e.g. proximity correction, mix-and-match, stitching or double patterning
    • G03F7/70433—Layout for increasing efficiency or for compensating imaging errors, e.g. layout of exposure fields for reducing focus errors; Use of mask features for increasing efficiency or for compensating imaging errors
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/70483—Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
    • G03F7/70605—Workpiece metrology
    • G03F7/70616—Monitoring the printed patterns
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/70483—Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
    • G03F7/70605—Workpiece metrology
    • G03F7/70616—Monitoring the printed patterns
    • G03F7/7065—Defects, e.g. optical inspection of patterned layer for defects
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/30—Electron-beam or ion-beam tubes for localised treatment of objects
    • H01J37/317—Electron-beam or ion-beam tubes for localised treatment of objects for changing properties of the objects or for applying thin layers thereon, e.g. for ion implantation
    • H01J37/3174—Particle-beam lithography, e.g. electron beam lithography

Definitions

  • the present invention relates to a method for manufacturing a semiconductor integrated circuit device, and more particularly to a method for manufacturing a semiconductor integrated circuit device in which a pattern drawn on a photomask is transferred to a semiconductor wafer.
  • the manufacturing method of a semiconductor integrated circuit device is based on a method in which a pattern drawn on a photomask (hereinafter, referred to as a photomask) such as an enlarged mask called a 1: 1 mask reticle is formed on a semiconductor wafer (hereinafter, referred to as a wafer).
  • a photomask such as an enlarged mask called a 1: 1 mask reticle
  • a wafer semiconductor wafer
  • each manufacturing process of the IC manufacturing line is an ultra-fine process, adhesion of foreign matter to the wafer, defects in the transferred pattern, etc. may cause product defects. Therefore, in the IC production line, the thickness of the thin film formed on the wafer, the dimensions of the pattern, and foreign substances adhering to the wafer and defects in the appearance of the pattern are quantitatively inspected. Inspections in each manufacturing process promptly find defects in each manufacturing process, and prevent defective wafers from flowing in subsequent manufacturing processes.
  • Examples of methods for inspecting foreign substances on patterned wafers include Japanese Patent Office Publication Nos. 3-1 1 2 1 46, 4-1 6 2 858, and 4-1 2 There is 3 4 5 4
  • No. 4-6 258 58 describes a technique for setting a coordinate system by setting a coordinate reference on a wafer.
  • No. 4-1 2 3 4 5 4 shows the position coordinate data of the foreign matter adhering to the wafer.
  • Wafer surface foreign matter inspection device Wafer surface foreign matter inspection device, micro probe 'Oge electron spectrometer and laser micro probe mass spectrometer
  • Japanese Patent Application Laid-Open Publications Nos. 6-45428 and 5-1102262 describe examples of technology relating to coordinates in a method of manufacturing a semiconductor integrated circuit device.
  • inspection result data is also output using a unique coordinate system for each inspection device, it is necessary to convert the coordinate systems to each other when collating inspection result data.
  • An example is as follows.
  • the position of a defect detected by the pattern wafer inspection device is specified by the chip coordinate system, and the position of the foreign object detected by the pattern wafer particle inspection device is specified by the wafer coordinate system. It is necessary to convert the chip coordinate system and the wafer coordinate system to each other in order to compare the inspection result data of both.
  • the inspection result data of the wafer inspection device with a pattern is output in a physical coordinate system called distance from the chip origin.
  • the inspection result data of the probe inspection device is output by the logical address of the bit at address X and address Y.
  • An object of the present invention is to provide a method of manufacturing a semiconductor integrated circuit device that can unify a coordinate system.
  • DISCLOSURE OF THE INVENTION The present invention relates to a method for inputting / outputting manufacturing condition data and data or control data in various semiconductor manufacturing apparatuses used in a plurality of semiconductor wafer processing steps including a photomask inspection / correction step and a probe inspection step.
  • the coordinate system of the disk drawing surface data (in general, it indicates the physical pattern data that is the basis for creating the processing data unique to the electron beam drawing device when actually drawing the pattern with the electron beam drawing device.)
  • a coordinate system in which the physical mask design pattern data pattern data of the same type as the pattern on the mask or its black-and-white inverted pattern
  • the physical mask design pattern data is expanded to describe chip-to-wafer as a substantially common coordinate system It is especially important to use ⁇ .
  • FIG. 1 is a flowchart showing main steps of an IC manufacturing method according to an embodiment of the present invention.
  • FIG. 2 is a block diagram showing an electron beam lithography apparatus used in the photomask manufacturing process.
  • FIG. 3 is a schematic diagram showing a one-sided drawing expression method in a library format.
  • FIG. 4 shows the manufactured photomask, (a) is a plan view, and (b) is an enlarged partial cross-sectional view.
  • Fig. 5 (a) is a block diagram showing a photomask inspection apparatus used in the photomask inspection process
  • Fig. 5 (b) is a schematic diagram showing an example of coordinate system conversion
  • Fig. 6 (a) shows the coordinate system of a defect
  • FIG. 2B is a plan view showing the state after the defect correction.
  • FIG. 7 is a block diagram showing a photomask correcting apparatus used in the photomask correcting step.
  • FIG. 8A is a block diagram showing a stepper used in the exposure step
  • FIG. 8B is an enlarged partial sectional view showing the work.
  • FIG. 9 is a schematic diagram for explaining the principle of super-resolution exposure using a phase shift photomask.
  • FIG. 10 is a schematic diagram showing a patterned wafer after the transfer step.
  • FIG. 11 is a block diagram showing a patterned wafer inspection apparatus used in the patterned wafer inspection process.
  • FIG. 12 is a block diagram showing a wafer prober used in the probe inspection process. BEST MODE FOR CARRYING OUT THE INVENTION
  • a hole pattern hereinafter, in principle, referred to as a pattern
  • a photomask an outrigger type phase shift mask
  • the method for manufacturing a semiconductor integrated circuit device includes the steps shown in FIG. Hereinafter, each step will be sequentially described.
  • Photomask manufacturing process 2 is a process of drawing a pattern described by circuit design data on a mask blank using an electron beam drawing apparatus, and manufacturing a photomask through lithography and etching.
  • the electron beam drawing device 10 controls the stage 11 that holds the mask blank that is the work, the electron optical system 12 that irradiates the mask blank with an electron beam, and the stage 11 Stage control unit 13, Kasumiko optical system control unit 14 that controls electron optical system 12, data transfer control system 15 that transfers data to stage control unit 13 and electron optical system control unit 14, data It has a processing system 16 and a drawing control system 17.
  • FIG. 3 shows an example of a method for expressing drawing data in a library format.
  • a drawing method of a pattern by the electron beam drawing device 10 will be described.
  • a mask blank (not shown), which is a work, is manufactured in advance, and a mask coating is applied to one main surface of a quartz glass formed in a substantially square plate shape by a vapor deposition method or the like. On the chromium film, a resist exposed by an electron beam is applied.
  • the drawing data from the data processing system 16 and the drawing surface control system 17 are transmitted via the data transfer control system 15 to the stage control unit 13 and The information is transferred to the electron optical system controller 14.
  • the stage 11 and the electron optical system 12 irradiate an electron beam onto the mask blank resist under the control of the stage control unit 1S and the electron optical system control unit 14.
  • the electron beam is two-dimensionally moved relative to the mask plank with reference to the coordinate system of the writing data. Since the resist irradiated with the electron beam is exposed to light, the mask blank is drawn with the pattern determined by the drawing surface. Since the electron beam is moved two-dimensionally relative to the mask blank based on the coordinate system of the drawing data, the position of the drawn pattern is The mark system is in a state corresponding to the coordinate system of the drawing data.
  • the mask blank exposed to the resist as described above is developed with a pattern by a lithographic process, and then etched using the resist pattern as a mask to form a pattern.
  • FIG. 4 shows a photomask manufactured in the photomask manufacturing process.
  • the photomask 20 is provided with quartz glass 21 as a transparent substrate, and a pattern (hereinafter, referred to as a mask pattern) is formed on a first main surface (hereinafter, referred to as a lower surface) of the quartz glass 21 by a chrome coating 22. 23 are formed.
  • the mask pattern 23 forms a hole pattern.
  • the mask pattern 23 has an area 24 for transferring the first chip (hereinafter, referred to as a first area) 24, and an area for transferring the second chip (hereinafter, referred to as a second area) 25,
  • a target pattern 27 indicating the X-axis of the coordinates X hereinafter referred to as the X-axis
  • a Y-axis of the coordinates It is provided with an evening getter 28 indicating Y (hereinafter referred to as the Y axis).
  • a coordinate system 29 composed of the origin 0, the X axis, and the Y axis corresponds to the coordinate system of the drawing data.
  • the origin 0 may be set at the center of the photomask 20, in the present embodiment, it is assumed that the origin 0 is set at the left corner of the photomask 20 for convenience of avoiding a negative display.
  • the photomask 20 is configured as an error-triggered phase shift photomask.
  • the shifter 30 is formed at a designated place (a place where the phase information is simply and laid out in the drawing surface data) in the mask pattern 23 formed by the chromium film 22.
  • the shifter 30 is formed of a transparent material such as quartz glass which can transmit the exposure light beam, and the position of the exposure light beam transmitted through the shifter 30 is changed. Shift the phases.
  • Phase shift photomasks are used to improve the resolution characteristics and depth of focus of exposure equipment. Defects in the phase shifter of the phase shift photomask have good transfer characteristics, and require 0.079 ⁇ m defect detection for devices with a design rule of 0.0.
  • a protective film called a pellicle is attached to the photomask 20 to prevent foreign substances from adhering to the mask pattern 23, but a description and illustration thereof are omitted for convenience.
  • the photomask inspection / correction process 3 is a process for inspecting the mask pattern of the photomask manufactured in the photomask manufacturing process 2 and correcting the defect if a defect is detected during the mask pattern. is there.
  • a shape defect inspection which is the most important type of inspection, requires a high degree of technology, and accounts for a large proportion of the inspection cost.
  • Figure 5 (a) shows a shape defect inspection system (hereinafter referred to as a photomask inspection system) that compares the mask pattern with the pattern data.
  • the photomask inspection apparatus 40 includes a stage 41 for holding a photomask 20 to be inspected, a stage controller 42 for controlling the stage 41, and an illumination optical system for illuminating the photomask 20 on the stage 41.
  • System 43 Surface image recognition system 44 for recognizing mask patterns, Data processing unit 45, Data comparison unit 46, Internal coordinate system storage unit 47, Drawing data from drawing surface data storage unit 48 And a coordinate system conversion unit 49 for converting the evening coordinate system into the coordinate system of the unit internal coordinate system storage unit 47.
  • the surface image recognition system 44 is composed of an image sensor such as a line sensor and a processing circuit for processing the output signal.
  • Apparatus Internal coordinate system storage unit 47 stores a coordinate system preset exclusively for photomask inspection device 40 in order to match the coordinate system of design data with the coordinate system used in image recognition system 44. are doing.
  • the coordinate system conversion section 49 reads out the drawing surface data from the drawing data storage section 48 and stores the coordinate system storage section 47 inside the apparatus. Is converted into a coordinate system of data that can be compared with the surface image data of the image recognition system 44 using the internal coordinate system of the device.
  • the drawing data storage unit 48 stores the drawing data used in the photomask manufacturing process 2 for each photomask 20.
  • the drawing data storage section 48 can be constituted by a storage medium such as a magnetic disk or a magnetic tape, but can also be constituted by a storage section of a host computer. That is, it is possible to construct so that the drawing data stored in the host computer is read out by the terminal device via the communication line. Further, the drawing data storage unit 48 may be constituted by a hard medium such as print paper or bar code paper. The same applies to the cat face data storage unit in other processes.
  • the coordinate system conversion unit 49 reads out the drawing surface data used for manufacturing the photomask 20 to be inspected from the drawing data storage unit 48, Reads the device internal coordinate system from the device internal coordinate system storage unit 47.
  • the coordinate system conversion unit 49 uses the device internal coordinate system from the device internal coordinate system storage unit 47 to convert the read drawing data into data that can be compared with the image data of the surface image defacement system 4. Convert to coordinate system.
  • the coordinate system conversion unit 49 transmits the drawing surface data obtained by converting the coordinate system to the data processing unit 45.
  • the data processing unit 45 transfers the drawing data whose coordinate system has been converted to the data comparison unit 46 as one comparison data required for the comparison inspection.
  • the coordinate data in the Zanuka system inside the device is (Xi, Yi), and the coordinate data in the drawing surface coordinate system is (Xk, Yk).
  • (X i, Y i) the origin offset of (X k, Y k) is (a, b), and the rotation angles of both coordinate systems are (9). Is represented by
  • the stage 41 holding the photomask 20 is two-dimensionally moved by the stage controller 42.
  • the photomask 20 is illuminated by the illumination optics 43.
  • the mask pattern 23 of the photomask 20 is recognized by the image recognition system 44.
  • the recognition data of the mask pattern 23 by the image recognition system 44 is input to the data comparison unit 46 as the other comparison data required for the comparison inspection.
  • the data comparing unit 46 compares the drawing pattern data from the data processing unit 45 with the mask pattern 23 from the surface image recognition system 44 while comparing the same location. Since the drawing data and the mask pattern 23 should be the same, it is determined as “good” if the signal of the same part of both matches, and it is determined as “defect” if they do not match. . When a defect is detected, the data comparing unit 46 transmits the coordinate value of the defect position and defect data based on the content of the defect (for example, a black defect or a white defect) to the data processing unit 45. The data processing unit 45 transfers the inspection result data including the defect data (hereinafter referred to as defect data) to the coordinate system conversion unit 49.
  • defect data the inspection result data including the defect data (hereinafter referred to as defect data) to the coordinate system conversion unit 49.
  • the coordinate system conversion unit 49 converts the transferred defect data into the original drawing data using the device internal coordinate system from the device internal coordinate system storage unit 47.
  • the coordinate system conversion unit 49 outputs the defect data in a state where the coordinate system has been converted to the original drawing surface data coordinate system. That is, the coordinate values of the defect data are specified by the coordinate system of the drawing data.
  • the coordinate values of the black defect 31 and the white defect 32 are as shown in FIG. Coordinate system of photomask 20 shown in Identified by 2 9.
  • the stage control unit 42, the illumination optical system 43, and the image recognition system 44 are configured to be controlled by the coordinate system 29 of the drawing data in the photomask inspection device 40
  • the device internal coordinate system storage unit 47 and the coordinate system conversion unit 49 can be omitted.
  • the photomask inspection device 40 be configured to be controlled by the drawing data coordinate system 29.
  • FIG. 7 shows a laser mask repair device (hereinafter referred to as a photomask repair device).
  • the photomask correction device 50 is a laser optical system that irradiates a laser to the photomask 20 on the stage 51, a stage 51 that holds the photomask 20 as a work, the stage 51 that controls the stage 51, and the stage 51. 53, Image recognition system 54 for recognizing mask pattern 23 4, Data processing unit 55, Defect data storage unit 5 for retrieving and storing defect data of photomask inspection device 40 via a communication line, etc. 6, a coordinate system conversion unit 59 for converting the defect data of the device internal coordinate system storage unit 57, the drawing data storage unit 48, and the defect data storage unit 56 to the coordinate system of the device internal coordinate system storage unit 57. Is provided.
  • the apparatus internal coordinate system storage unit 57 is a photomask correction unit 50 0 so that the design data can be matched with the coordinate system used by the stage control unit 52, the laser optical system 53, and the image recognition system 54.
  • a coordinate system set in advance for exclusive use is stored.
  • the coordinate system conversion unit 59 converts the defect data specified by the coordinate system of the drawing data into a coordinate system of data usable by the stage control unit 52, the laser optical system 58, and the image recognition system 54. The conversion is performed using the device internal coordinate system from the device internal coordinate system storage unit 57.
  • the coordinate system conversion unit 59 reads the defect data of the photomask 20 to be corrected from the defect data storage unit 56.
  • the coordinate system conversion unit 59 reads the defect data using the device internal coordinate system from the device internal coordinate system storage unit 57 and the coordinate system of the drawing data from the drawing data storage unit 48. Is converted into a coordinate system of data usable by the stage control unit 52, the laser optical system 53, and the image recognition system 54.
  • the coordinate system conversion unit 59 transmits the defect data obtained by converting the coordinate system to the data processing unit 55.
  • the data processing unit 55 creates a control signal based on the defect data, and transmits the control signal to the stage control unit 52, the laser optical system 53, and the surface image recognition system 54.
  • the stage 51 When the stage 51 is operated by the stage control unit 52 and the defect 31 shown in FIG. 6A is located at the irradiation slot of the laser optical system 53, the laser optical system 53 Then, a laser beam is irradiated from the substrate, and the black defect 31 is incinerated as shown in FIG. 6 (b).
  • the white defect can be corrected by a FIB (FocusedIonBeam) correction device.
  • the photomask correction device 50 if the stage control unit 52, the laser optical system 53, and the image recognition system 54 are constructed so that they can be controlled by the coordinate system of the drawing data 1, the device The internal coordinate system storage unit 57 and the coordinate system conversion unit 59 can be omitted. In other words, it is desirable that the photomask correction device 50 be configured to be controlled by a coordinate system of drawing surface data.
  • the photomask inspection and repair process may be omitted.
  • the exposure step 4 is a step in which the mask pattern of the photomask manufactured and inspected as described above is exposed on the wafer by the exposure apparatus.
  • Exposure process 4 is performed using an enlarged photomask called a reticle
  • a reduction projection exposure apparatus hereinafter, referred to as a stepper
  • the photomask is two-dimensionally scanned relative to the wafer. Since it is necessary to scan the photomask two-dimensionally, the stepper has a coordinate system, and it is desirable that this coordinate system match the coordinate system of the photomask. Therefore, in the present embodiment, the rubbing system of the drawing surface data is used as the coordinate system of the step.
  • the step shown in FIG. 8 is used for the exposure step.
  • the stepper 60 includes a stage 61 for holding a wafer as a workpiece, an exposure optical system 62 for irradiating an exposure light beam, and a stage controller 6 for controlling the stage 11.
  • 3.Exposure optical system control unit 64 that controls the exposure optical system 62, stage control unit 63, and transfer system 65 that transfers control signals to the exposure optical system control unit 64, control signal processing system 66, and It is equipped with a drawing section 6 7.
  • a resist irradiated by exposure light is applied onto the insulating film 71 of the wafer 7G and the resist is applied.
  • the membrane 72 is pre-deposited.
  • the control signal from the control signal processing system 66 is transmitted via the transfer system 65 to the stage controller 63 and the exposure. Transferred to the optical system control unit 64.
  • the stage 61 is step-moved under the control of the stage controller 63.
  • the exposure optical system 62 sequentially repeats exposure in accordance with the step movement. Since the resist film 72 irradiated with the exposure light beam is exposed to light, the mask pattern 23 of the photomask 20 is reduced and projected onto the wafer 70, and is subjected to step-and-repeat exposure over substantially the entirety. State.
  • the stage 61 is step-moved with reference to the drawing data 1 coordinate system. That is, the control signal processing system 66 reads out the drawing data 1 from the drawing data storage unit 67 and creates a control signal necessary for the step movement of the stage 61 based on the coordinate system of the drawing surface data 1. .
  • the X axis in the coordinate system of the next shot is matched with the X axis in the rubbing system of the drawing data 1 of the previous shot. Therefore, the coordinate system of the pattern formed on the wafer by the step-and-repeat exposure corresponds to the coordinate system of the drawing data 1.
  • FIG. 9 shows the principle of super-resolution exposure using a phase shift mask.
  • the shifter 30 of the photomask 20 shown in FIG. 9 (a) gives a 180 ° phase difference to the close opening as shown in FIG. 9 (b).
  • the exposure intensity to the resist film sharply rises at a position corresponding to the opening adjacent to the mask pattern 23. Therefore, even a very fine mask pattern 23 can be transferred onto the resist film with good resolution.
  • the transfer step 5 after the resist film subjected to the step-and-repeat exposure of the mask pattern in the exposure step is developed by lithography, the insulating film is selectively etched using the developed resist pattern as a mask. This is a process in which the reduced mask pattern is transferred to the wafer in a state in which it has been restored by etching.
  • FIG. 10 shows the patterned wafer 74 having undergone the transfer step 5.
  • the patterned wafer 74 has a pattern (hereinafter, referred to as a wafer pattern) 75 formed by the exposure step 4 and the transfer step 5.
  • the wafer pattern 75 is a pattern in which the mask pattern 23 is reduced and projected for each one-shot (hereinafter referred to as a reduced pattern). It is arranged regularly.
  • the reduced pattern 76 forms a hole pattern, and the hole pattern is formed on the insulating film 71.
  • the reduced pattern 76 is a pattern obtained by reducing the mask pattern 28
  • a coordinate system (hereinafter, referred to as a wafer coordinate system) 79 corresponding to the coordinate system 29 of the mask pattern 23 is provided.
  • the seat value is regularly shrinking according to the decrease rate. That is, the wafer pattern 75 has a wafer coordinate system 79 defined by the arrangement of the reduced patterns 76.
  • the wafer coordinate system 79 is a coordinate origin (hereinafter, referred to as a wafer origin) Ow, a coordinate X axis (hereinafter, referred to as a wafer X axis) Xw, and a coordinate Y axis (hereinafter, referred to as a wafer Y axis).
  • Y consists of w.
  • the patterned wafer 7 is manufactured by performing the step-and-repeat exposure based on the drawing surface data 1, it is constituted by the wafer origin O w, the wafer X axis X w and the wafer Y axis Y w
  • the wafer coordinate system 79 corresponds to the coordinate system for drawing data overnight.
  • the wafer origin Ow may be set at the center of the patterned wafer 74, in this embodiment, the wafer origin Ow is set at the left corner of the wafer pattern 75 for convenience of avoiding a negative display. Shall be
  • the wafer pattern 75 has a shot matrix 77, and the shot matrix 77 has a row number Cs and a column number Rs for each shot unit.
  • the shot matrix 77 has a shot coordinate system 78, and the shot coordinate system 78 has a shot origin Os, a shot X axis Xs, and a shot Y axis Ys.
  • the patterned wafer inspection step 6 is a step of inspecting the wafer pattern of the patterned wafer.
  • a description will be given of an example of a patterned wafer inspection in which a defect is detected by comparing images.
  • FIG. 11 shows a pattern-equipped wafer inspection apparatus 80 for detecting a defect in a wafer pattern by comparing images.
  • the patterned wafer inspection apparatus 80 includes a stage 81 for holding a patterned wafer 74 to be inspected, a stage control unit 82 for controlling the stage 81, and a patterned wafer 74 above the stage 81.
  • An irradiation optical system 83 that irradiates the inspection light beam to the inspection beam, a detection optical system 84 that detects the reflected light from the wafer 74 with the pattern, and a detection signal from the detection optical system 84 are processed to generate a pair of signals.
  • the coordinate system conversion unit 89 draws the drawing surface data 1 of the photomask 20 used to manufacture the patterned wafer 74 to be inspected. Data is read from the data storage unit 8.
  • the coordinate system conversion unit 89 uses the device internal coordinate system from the device internal coordinate system storage unit 87 to convert the read drawing data 1 into data of a coordinate system that can be used for a surface image comparison inspection.
  • the coordinate data in the device internal coordinate system is (Xm, Ym)
  • the coordinate data in the drawing data coordinate system is (Xk, Yk)
  • the repetition pitch of the shot in the X direction is (Px).
  • the repetition pitch of the shot in the Y direction is (P y)
  • the coordinate system conversion unit 89 sends the coordinate system converted drawing data 1 to the stage control unit 82, the irradiation optical system 83, the data processing unit 85, and the data comparison unit 86. I believe. Based on the input drawing data 1, the stage control unit 82 scans the stage 81, and the irradiation optical system 83 scans the inspection light beam.
  • the reflected light from the patterned wafer 7 with the irradiation of the inspection light is detected by the detection optical system 84 in time series.
  • the detection optical system 84 generates an electric signal corresponding to the intensity of the detected reflected light, and inputs the electric signal to the data processing unit 85 as a detection signal.
  • the data processing unit 85 generates a pair of signals to be compared based on the drawing surface data 1 from the coordinate system conversion unit 89, and inputs the paired signals to the data comparison unit 86.
  • the data processing unit 85 outputs the signal currently input from the detection optical system 84, for example, for one chip as it is, and outputs a delayed signal delayed by one chip.
  • the area to be compared, such as one chip can be specified by the drawing surface data 1 from the coordinate system conversion unit 89.
  • the data comparing unit 86 compares the current signal from the data processing unit 85 with the delayed signal, and determines “good” if they match, and “defect J” if they do not match. Assuming that the first area 2 and the second area 25 shown in FIG. 4 are the same, the delay signal corresponding to the first area 24 and the current signal detecting the second area 25 If they do not match, one of them is defective, and the delay signal corresponding to the first area 24 is determined to be "good” first. Therefore, the second area 25 of the current detection signal is determined to be “defect”. When a defect is detected, the data comparing section 86 outputs defect data based on the coordinate value of the defect and the content of the defect (for example, a black defect or a white defect).
  • the data comparing section 86 uses the coordinate system of the drawing data 1 from the coordinate system converting section 89 to output the defect data in a state converted to the coordinate system of the drawing data 1. That is, the coordinates of the defect data are specified by the coordinate system of the drawing data.
  • the apparatus The internal coordinate system storage unit 87 and the coordinate system conversion unit 89 can be omitted. In other words, it is desirable that the patterned wafer inspection apparatus 80 be configured to be controlled by the coordinate system of the drawing surface data 1.
  • a defect due to a phase abnormality of the phase shift mask is likely to be detected as a transfer failure in a step with a patterned wafer or in a place where process conditions are severe. That is, a defect due to a phase abnormality of the phase shift mask can be detected as a defect of the wafer pattern 75 in the patterned wafer inspection process 6.
  • the photomask 20 used for transferring the wafer pattern 75 where the defect is detected is used.
  • the re-precision inspection for is performed in photomask inspection and correction process 3.
  • the inspection of patterned wafer The inspection result data of inspection and concealment 80 is transferred to photomask inspection and correction process 3.
  • the inspection result data of the patterned wafer inspection apparatus 80 is specified by the coordinate system of the drawing data 1, the inspection result data is directly used in the correction process 3 be able to. That is, the inspection result data of the patterned wafer inspection apparatus 80 is input to the coordinate system conversion section 49 via the drawing surface data storage section 48 of the photomask inspection apparatus 40 shown in FIG. Can be used in common.
  • the photomask inspection device 40 shown in FIG. 5 uses the inspection result data transferred from the patterned wafer inspection device 80 to detect a defect indicated by the inspection result data. Inspect whether there is a defect at the position of the mask pattern 23 corresponding to the coordinate value. If there is no defect in the mask pattern 23, the phase information is stored at the coordinate position of the drawing data 1 corresponding to the coordinate value of the defect to be treated by the inspection result data transferred from the patterned wafer inspection apparatus 80. Investigate whether the symbol is attached. When the phase information symbol is attached, the photomask inspection device 40 changes the wavelength of the illumination light of the illumination optical system 43 or the threshold of the image recognition system 44 by changing the threshold value.
  • Inspect shifter 30 closely.
  • the photomask 20 subjected to the re-precision inspection is sent to a photomask correction process.
  • the shifter 30 in which the abnormalities have been detected is corrected in the photomask 20.
  • the patterned wafer 74 judged as “good” in the patterned wafer inspection process 6 is used for the subsequent exposure process 4 to Wafer inspection process 6 is repeated. During this time, a thin film formation step and an impurity implantation step may be included . When all wafers and process steps have been completed, the completed patterned wafer (hereinafter referred to as “completed wafer”) is sent to the probe inspection step 7, as shown in Figure 1.
  • the probe inspection step 7 is a step of inspecting the electrical characteristics of the completed wafer for each step.
  • FIG. 12 shows a wafer prober for performing probe inspection.
  • the wafer bar 90 includes a stage 91 for holding the completed wafer 100, a stage controller 92 for controlling the stage 91, and an electrode group in the chip of the completed wafer 100 held on the stage 91.
  • the position identification unit 96 that identifies the position of the fail bit detected based on the detection signal by a logical address, the internal coordinate system storage unit 97, and the coordinate system of the drawing data 1 from the drawing data storage unit 98 inside the device
  • a probe inspection method using the wafer prober 90 will be described.
  • the data processing unit 9 When the probe needle 9 comes in contact with the tip electrode group, the data processing unit 9
  • the position specifying unit 96 specifies the position of the fail bit in the logical address coordinate system based on the logical address coordinate system from the device internal coordinate system storage unit 97, and inputs the result to the coordinate system converting unit 99. .
  • the coordinate system conversion unit 99 reads out the coordinate system of the drawing surface data 1 used for manufacturing the chip to be inspected from the drawing data storage unit 98, and
  • the logical address coordinate system is read from the internal coordinate system storage unit 97 of the device.
  • Coordinate The system conversion unit 99 compares the coordinate system of the drawing surface data 1 with the logical address coordinate system, and converts the inspection result data represented by the logical address coordinate system from the position specifying unit 96 into the drawing data room system. Convert to The transformation unit 99 outputs the inspection result data represented by the drawing data coordinate system as probe inspection result data.
  • defects in the mask pattern are ultimately detected as poor electrical characteristics. That is, defects in the mask pattern are detected as fail bits in the probe inspection process.
  • shifter defects of a phase shift mask that cannot be inspected by a general photomask inspection apparatus.
  • the probe inspection result data of the wafer prober 90 is transferred to the photomask inspection 'correction step 3.
  • the probe inspection result data of the wafer blower 90 since the coordinate values of the probe inspection result data of the wafer blower 90 are specified by the coordinate system of the drawing surface data 1, the probe inspection result data must be directly used in the photomask inspection 'correction process 3'. Can be. That is, the probe inspection result data of the wafer prober 90 is input to the coordinate system conversion unit 49 via the drawing data storage unit 48 of the photomask inspection apparatus 40 shown in FIG. Can be used.
  • the photomask inspection device 40 shown in FIG. 5 uses the failure inspection data pointed out by the probe inspection data transferred from the wafer ⁇ -bar 90 to indicate a failure.
  • Bit coordinates Inspect whether there is a defect at the position of the mask pattern 28 corresponding to the value. If there is no defect in the mask pattern 23, the phase information is stored at the coordinate position of the drawing data 1 corresponding to the coordinate value of the fail bit to be determined by the probe inspection result data transferred from the wafer blower 90. Investigate whether the symbol is attached. When the phase information symbol is attached, the photomask inspection apparatus 40 changes the wavelength of the illumination light of the illumination optical system 43 or changes the threshold value of the image recognition system 44 to change the shifter.
  • Inspect 30 carefully.
  • the photomask 20 subjected to the re-inspection is sent to a photomask correction process.
  • the photomask 20 is corrected for the shifter 30 that has been pointed out as abnormal.
  • the completed wafer that has gone through the probe inspection step 7 is sent to a so-called post-step 8 in the manufacturing process of the semiconductor integrated circuit device.
  • the following effects can be obtained.
  • the required work data such as control data
  • the required work data is input and output in a unified manner by the coordinate system of the drawing data via the communication line etc. connecting each semiconductor manufacturing equipment, thereby improving the process efficiency of each semiconductor manufacturing equipment. Can be enhanced.
  • the inspection result data of the process can correspond to the inspection result data of the patterned wafer inspection process, and the inspection result data of the patterned wafer inspection process can be used for the photomask correction process. Difficult phase shift masks can be accurately corrected.
  • the fail bit of the inspection result data in the probe inspection process can be made to correspond to the actual position of the photomask, so that the photomask can be easily corrected.
  • failure analysis of circuit design data can be easily performed.
  • the method for manufacturing a semiconductor integrated circuit device according to the present invention exerts an excellent effect in the step of transferring a desired pattern to a wafer, and is therefore widely used throughout the method for manufacturing a semiconductor integrated circuit device. Can be.

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Abstract

Procédé de fabrication d'un composant de circuit intégré à semi-conducteur consistant à transférer des motifs sur des masques photographiques vers une tranche à semi-conducteur et, en particulier, à mettre en application des techniques utilisant des données de commande, des données d'état de fabrication et des données de contrôle conjointement dans différentes étapes de fabrication. On fabrique un masque photographique au niveau d'une étape de fabrication au moyen d'une technique de lithographie par faisceau d'électrons. On utilise le même système coordonné de données de motifs mis en application dans l'étape de fabrication du masque photographique dans les étapes de contrôle et de correction. Les motifs du masque photographique sont transférés à la tranche au moyen d'une technique de photorépétition. Dans cet exemple, le déroulement de l'étape dépend du système coordonné de données de motifs. On procède ensuite au développement et la gravure par attaque chimique de la tranche exposée de cette façon, afin d'obtenir des répétitions de motifs réduits sur ladite tranche, c'est-à-dire que les motifs de la tranche sont composés des motifs réduits produits au moyen d'une technique de photorépétition selon le système coordonné de données de motifs. On utilise ce dernier afin de contrôler les tranches pourvues des motifs sur un dispositif de contrôle de tranche. Si on détecte un défaut sur une tranche, on exécute un contrôle détaillé du masque photographique correspondant dans une étape de contrôle et de correction basée sur les résultats de l'étape de contrôle de la tranche revêtue de motifs. Etant donné que les données de résultat de contrôle comprennent le système coordonné des données de motifs, on peut les utiliser en tant que données de contrôle détaillé.
PCT/JP1996/001901 1996-07-09 1996-07-09 Procede de fabrication d'un composant de circuit integre a semi-conducteur WO1998001903A1 (fr)

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PCT/JP1996/001901 WO1998001903A1 (fr) 1996-07-09 1996-07-09 Procede de fabrication d'un composant de circuit integre a semi-conducteur

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PCT/JP1996/001901 WO1998001903A1 (fr) 1996-07-09 1996-07-09 Procede de fabrication d'un composant de circuit integre a semi-conducteur

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Cited By (8)

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Publication number Priority date Publication date Assignee Title
JP2002214757A (ja) * 2001-01-18 2002-07-31 Dainippon Printing Co Ltd 測定データの補正方法および測定処理装置
DE10245621A1 (de) * 2002-09-30 2004-04-22 Infineon Technologies Ag Verfahren zur Übergabe einer Meßposition eines auf einer Maske zu bildenden Strukturelementes
JP2006010544A (ja) * 2004-06-28 2006-01-12 Horiba Ltd 異物検査装置および異物検査方法
JP2006078589A (ja) * 2004-09-07 2006-03-23 Toshiba Corp 形状検査システム及び形状検査方法
JP2007147366A (ja) * 2005-11-25 2007-06-14 Hitachi High-Technologies Corp 半導体パターン形状評価装置および形状評価方法
JP2008112178A (ja) * 2007-11-22 2008-05-15 Advanced Mask Inspection Technology Kk マスク検査装置
CN106154768A (zh) * 2016-07-01 2016-11-23 无锡中微掩模电子有限公司 一种基于掩模板的集成电路基板二次曝光方法
CN113034435A (zh) * 2021-02-24 2021-06-25 上海华力微电子有限公司 一种缺陷检测方法

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JPS58165337A (ja) * 1982-03-26 1983-09-30 Hitachi Ltd 半導体製造プラントにおける不良解析方法
JPS59103336A (ja) * 1983-09-21 1984-06-14 Hitachi Ltd マスク検査修正装置
JPH0375650A (ja) * 1989-08-16 1991-03-29 Matsushita Electron Corp フォトマスク修正装置
JPH03102845A (ja) * 1989-09-18 1991-04-30 Hitachi Ltd 検査方法及び検査システム
JPH06265480A (ja) * 1993-03-12 1994-09-22 Toshiba Corp パターン欠陥検査方法および検査装置

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JPS58165337A (ja) * 1982-03-26 1983-09-30 Hitachi Ltd 半導体製造プラントにおける不良解析方法
JPS59103336A (ja) * 1983-09-21 1984-06-14 Hitachi Ltd マスク検査修正装置
JPH0375650A (ja) * 1989-08-16 1991-03-29 Matsushita Electron Corp フォトマスク修正装置
JPH03102845A (ja) * 1989-09-18 1991-04-30 Hitachi Ltd 検査方法及び検査システム
JPH06265480A (ja) * 1993-03-12 1994-09-22 Toshiba Corp パターン欠陥検査方法および検査装置

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002214757A (ja) * 2001-01-18 2002-07-31 Dainippon Printing Co Ltd 測定データの補正方法および測定処理装置
DE10245621A1 (de) * 2002-09-30 2004-04-22 Infineon Technologies Ag Verfahren zur Übergabe einer Meßposition eines auf einer Maske zu bildenden Strukturelementes
US7124379B2 (en) 2002-09-30 2006-10-17 Infineon Technologies Ag Method for communicating a measuring position of a structural element that is to be formed on a mask
DE10245621B4 (de) * 2002-09-30 2006-12-28 Infineon Technologies Ag Verfahren zur Übergabe einer Meßposition eines auf einer Maske zu bildenden Strukturelementes
JP2006010544A (ja) * 2004-06-28 2006-01-12 Horiba Ltd 異物検査装置および異物検査方法
JP2006078589A (ja) * 2004-09-07 2006-03-23 Toshiba Corp 形状検査システム及び形状検査方法
JP2007147366A (ja) * 2005-11-25 2007-06-14 Hitachi High-Technologies Corp 半導体パターン形状評価装置および形状評価方法
JP4634289B2 (ja) * 2005-11-25 2011-02-16 株式会社日立ハイテクノロジーズ 半導体パターン形状評価装置および形状評価方法
JP2008112178A (ja) * 2007-11-22 2008-05-15 Advanced Mask Inspection Technology Kk マスク検査装置
CN106154768A (zh) * 2016-07-01 2016-11-23 无锡中微掩模电子有限公司 一种基于掩模板的集成电路基板二次曝光方法
CN113034435A (zh) * 2021-02-24 2021-06-25 上海华力微电子有限公司 一种缺陷检测方法
CN113034435B (zh) * 2021-02-24 2024-04-12 上海华力微电子有限公司 一种缺陷检测方法

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