WO1993002415A1 - Einrichtung zum prüfen von entsprechend dem anwendungsfall miteinander verbundenen elektronischen komponenten einer baugruppe - Google Patents

Einrichtung zum prüfen von entsprechend dem anwendungsfall miteinander verbundenen elektronischen komponenten einer baugruppe Download PDF

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Publication number
WO1993002415A1
WO1993002415A1 PCT/DE1992/000535 DE9200535W WO9302415A1 WO 1993002415 A1 WO1993002415 A1 WO 1993002415A1 DE 9200535 W DE9200535 W DE 9200535W WO 9302415 A1 WO9302415 A1 WO 9302415A1
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WO
WIPO (PCT)
Prior art keywords
test
components
module
self
microprocessor
Prior art date
Application number
PCT/DE1992/000535
Other languages
German (de)
English (en)
French (fr)
Inventor
Christoph Beck
Franck Dymann
Bernd Hanstein
Horst Severloh
Original Assignee
Siemens Aktiengesellschaft
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Aktiengesellschaft filed Critical Siemens Aktiengesellschaft
Publication of WO1993002415A1 publication Critical patent/WO1993002415A1/de

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Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/319Tester hardware, i.e. output processing circuits
    • G01R31/31903Tester hardware, i.e. output processing circuits tester configuration
    • G01R31/31915In-circuit Testers

Definitions

  • Testing assemblies consisting of interconnected electronic components is a growing challenge. Examples of such assemblies are printed circuit boards on which electronic components are arranged, which are connected via lines. The complexity of such printed circuit boards increases, and new manufacturing technologies are also developed, e.g. S D (Surface Mounted Devices).
  • the electronic components can be digital or analog components, as well as components from the sensor and power electronics.
  • test option is to test the circuit board with the aid of an automatic test machine.
  • the test machine is a complex one-off production, with the help of which the real embedding of a printed circuit board or an assembly is to be simulated.
  • the tests running on the measuring tower are complex and time-consuming. Testing under extreme dynamic conditions is another problem.
  • the object on which the invention is based is to specify a further device with which assemblies made of electronic components, for example printed circuit boards, can be tested, the test being possible without great effort already during development, but also during use of the product. This object is achieved in accordance with the features of patent claim 1.
  • test device can be used for purely digital, but also general circuit boards and assemblies.
  • Digital, analog, sensory components can thus be arranged on the assembly and connected to one another.
  • a microprocessor or microcontroller is used for testing, which is arranged as a component on the printed circuit board or on the assembly and controls the function of the system consisting of the assembly and self-test adapter there during operation.
  • the self-test principle is therefore a self-test of the assembly.
  • the test vectors or test patterns can be generated on the module and the test response can also be evaluated on the module using the microprocessor.
  • the self-test adapter for these purposes. For this it makes sense if the test program is stored in the system to be tested.
  • the test is carried out in such a way that, under the control of the microprocessor, the electrical lines which already connect the components on the module are connected to form internal measuring loops.
  • external measuring loops can be formed using an self-test adapter.
  • the self-test adapter is connected, for example, to the inputs and outputs via a cable harness.
  • Electronic components can be arranged on the self-test adapter, which are the application of the module simulate, and therefore supply the inputs of the module with signals that correspond to those of the application of the module.
  • the method according to the self-test principle has the further advantage that it is possible to check the assembly both during manufacture and during use. It is only necessary that the test program is stored on the system and is also started at certain times. A good time would be e.g. given when the supply voltage for the module is switched on.
  • the circuits arranged on the self-test adapter which form the external measuring loops, are adapted to the respective application. They can consist of purely electrical connecting lines, but it is also possible to use more complicated circuits in order to simulate the real application.
  • Figure 1 shows a system consisting of a printed circuit board plus
  • FIG. 2 and FIG. 3 show as an example how a measuring loop can be implemented on the self-test adapter.
  • a test device or system TA is shown in principle in FIG.
  • the test device TA is used to check an assembly LP, for example a printed circuit board LP, for errors.
  • the assembly LP can consist of components K, which are shown by way of example in FIG. 1.
  • component K1 can be a PROM
  • component K2 can be a microprocessor
  • component K3 can be a sensor circuit
  • component K5 can be an input and output circuit
  • component K6 can be an analog / digital converter
  • component K7 can be an ASIC component his.
  • the electronic components K1 to K7 are electrical Connected lines, which are only partially shown in Figure 1. These connections result from the application of the module.
  • the test device TA also has an self-test adapter AD, via which outputs of the module can be connected to inputs of the module. Circuits are arranged on the self-test adapter AD, which simulate the real application when the outputs are connected to the inputs of the module.
  • the microprocessor K2 which is provided as a component on the assembly anyway, is used to test the assembly LP.
  • a test program is executed in the microprocessor K2, which initiates the following steps: First, internal measuring loops MI are formed, for which the existing electrical connections of the components K are used. These measuring loops MI are formed in such a way that the testing of the individual components K is possible.
  • the self-test adapter AD is connected to the inputs and outputs of the module LP via a cable harness BB.
  • External measuring loops ME are now generated via the self-test adapter AD.
  • the external measuring loops ME connect outputs of the assembly LP to inputs of the assembly LP via simulation circuits EM.
  • the microprocessor K2 After the internal measuring loops MI and the external measuring loops ME have been formed, the microprocessor K2 generates test patterns or test vectors consisting of individual test signals. These test patterns are fed from the microprocessor K2 to the inputs of the internal measuring loops and from there via the internal measuring loops MI and external measuring loops ME components to the output of the measuring loop and thus back to the micro-processor.
  • the microprocessor K2 can thus check the test response signals occurring at the outputs of the measuring loops for errors, for example by he compares them with target signals. However, it is also possible to have the test responses checked externally, for example using a TM terminal.
  • an external measuring loop ME was formed by the microprocessor K2 via the input / output circuit K5, the self-test adapter AD back via the analog circuit K6 to the sensor circuit K4 and from there back to the microprocessor K2.
  • other internal or external measuring loops are of course also generated.
  • the self-test adapter AD has the task already specified, it is to supply signals which appear at the outputs of the module LP to inputs of the module, in such a way that the signals supplied to the inputs of the module correspond to those which would occur in real application .
  • the self-test adapter AD thus represents the real application during testing.
  • the test response signals can of course also be emitted by the self-test adapter AD in order to be fed to an external test device TM for comparison of the actual value with the setpoint.
  • the circuits EM arranged on the self-test adapter AD for simulating the real outside world can generally consist of passive components. If the module is to perform more complicated functions, the corresponding circuit EM must be correspondingly more complicated.
  • An example of a first such circuit EM is shown in FIG. 2. It consists of passive components, in the example of FIG. 2, of resistors, R2, R3, R4.
  • the assembly LP is shown twice in FIG. 2, once as the output AD and once as the input EG.
  • the output AG of the module contains, for example, a pull-up resistor R1, the input a pull-down resistor R5.
  • a resistance network is connected between the output AD and the input EG, which ensures that a signal supplied to the input is composed of signals is derived at the output, which has values that correspond to the application.
  • the circuit according to FIG. 2 can be used, for example, to connect a digital output to a digital input. It can also be used to connect a simple analog output to an analog input.
  • Figure 3 shows a further circuit EM. It consists of transformer UT1, passive phase shifter PHP, active phase shifter PHA, carrier TR, second transformer UT2 and frequency divider FT. With this circuit, signals given at the output AG can be changed with respect to phase, frequency and amplitude and can thus be adapted to the application.
  • the test device described has the advantage that the module can be tested using a microprocessor which is present on the module anyway.
  • the test program used for the test is located on the module to be tested, ie on a memory of the microprocessor, for example a ROM or PROM.
  • the test program can be triggered at certain times, for example when the supply voltage is switched on.
  • the test of the module runs automatically, whereby both the generation of the test vector and the test test response on the module itself can be carried out by the microprocessor. This would ensure that the module can also be tested in the operating environment, i.e. under the climatic conditions Conditions to which the assembly is exposed. With these self-test procedures, all faults on the module that can be detected via measuring loops can be discovered.

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  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)
PCT/DE1992/000535 1991-07-25 1992-06-29 Einrichtung zum prüfen von entsprechend dem anwendungsfall miteinander verbundenen elektronischen komponenten einer baugruppe WO1993002415A1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE19914124708 DE4124708A1 (de) 1991-07-25 1991-07-25 Einrichtung zum pruefen von entsprechend dem anwendungsfall miteinander verbundenen elektronischen komponenten einer baugruppe
DEP4124708.6 1991-07-25

Publications (1)

Publication Number Publication Date
WO1993002415A1 true WO1993002415A1 (de) 1993-02-04

Family

ID=6437012

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/DE1992/000535 WO1993002415A1 (de) 1991-07-25 1992-06-29 Einrichtung zum prüfen von entsprechend dem anwendungsfall miteinander verbundenen elektronischen komponenten einer baugruppe

Country Status (2)

Country Link
DE (1) DE4124708A1 (enrdf_load_stackoverflow)
WO (1) WO1993002415A1 (enrdf_load_stackoverflow)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10018172B4 (de) * 2000-04-12 2010-02-25 Robert Bosch Gmbh Verfahren zum Prüfen der Funktionsfähigkeit einer Leiterplatte mit programmiertem Mikrocomputer einer elektrischen Steuer- oder Regeleinrichtung
DE10018173B4 (de) * 2000-04-12 2010-03-18 Robert Bosch Gmbh Verfahren zum Prüfen der Funktionsfähigkeit einer Leiterplatte mit programmiertem Mikrocomputer einer elektrischen Steuer- oder Regeleinrichtung
JP2010514050A (ja) * 2006-12-18 2010-04-30 トムソン ライセンシング セルフテスト装置コンポーネント
DE102013204873A1 (de) 2013-03-20 2014-09-25 Schaeffler Technologies Gmbh & Co. Kg Elektronische Baugruppe und Verfahren zu deren Diagnose

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4275464A (en) * 1979-02-16 1981-06-23 Robertshaw Controls Company Universal self-diagnosing appliance control
GB2121997A (en) * 1982-06-11 1984-01-04 Int Computers Ltd Testing modular data processing systems

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3143768C2 (de) * 1981-11-04 1987-04-16 Siemens AG, 1000 Berlin und 8000 München Adapter zur Verbindung von in einer Ebene angeordneten Kontaktpunkten eines Prüflings mit den Anschlüssen einer Prüfeinrichtung
DE3313449C2 (de) * 1983-04-13 1987-01-02 Computer Gesellschaft Konstanz Mbh, 7750 Konstanz Vorrichtung zum Prüfen von Flachbaugruppen
DE3710093A1 (de) * 1987-03-27 1988-10-06 Ptr Messtechnik Gmbh Messmitte Leiterplattenpruefgeraet fuer beidseitig smd-bestueckte leiterplatten

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4275464A (en) * 1979-02-16 1981-06-23 Robertshaw Controls Company Universal self-diagnosing appliance control
GB2121997A (en) * 1982-06-11 1984-01-04 Int Computers Ltd Testing modular data processing systems

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
COMPUTER Bd. 13, Nr. 3, März 1980, LONG BEACH US Seiten 17 - 25 J.P. HAYES ET AL. 'Testability considerations in microprocessor based design' *
IBM TECHNICAL DISCLOSURE BULLETIN. Bd. 33, Nr. 1B, Juni 1990, NEW YORK US Seiten 306 - 309 'Built-in self-test of arrays embedded in logic chips' *

Also Published As

Publication number Publication date
DE4124708A1 (de) 1993-01-28
DE4124708C2 (enrdf_load_stackoverflow) 1993-09-09

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