WO1992007250A1 - Procede et dispositif de controle automatique de la fabrication de composants semi-conducteurs - Google Patents

Procede et dispositif de controle automatique de la fabrication de composants semi-conducteurs Download PDF

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Publication number
WO1992007250A1
WO1992007250A1 PCT/EP1991/001648 EP9101648W WO9207250A1 WO 1992007250 A1 WO1992007250 A1 WO 1992007250A1 EP 9101648 W EP9101648 W EP 9101648W WO 9207250 A1 WO9207250 A1 WO 9207250A1
Authority
WO
WIPO (PCT)
Prior art keywords
lighting
light
directions
semiconductor components
camera
Prior art date
Application number
PCT/EP1991/001648
Other languages
German (de)
English (en)
Inventor
Antonius Beckmann
Bernd Sommer
Original Assignee
Abos Automation, Bildverarbeitung Optische System Gmbh
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Abos Automation, Bildverarbeitung Optische System Gmbh filed Critical Abos Automation, Bildverarbeitung Optische System Gmbh
Publication of WO1992007250A1 publication Critical patent/WO1992007250A1/fr

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Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01NINVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N21/00Investigating or analysing materials by the use of optical means, i.e. using sub-millimetre waves, infrared, visible or ultraviolet light
    • G01N21/84Systems specially adapted for particular applications
    • G01N21/88Investigating the presence of flaws or contamination
    • G01N21/95Investigating the presence of flaws or contamination characterised by the material or shape of the object to be examined
    • G01N21/956Inspecting patterns on the surface of objects
    • G01N21/95684Patterns showing highly reflecting parts, e.g. metallic elements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/78Apparatus for connecting with wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01NINVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N21/00Investigating or analysing materials by the use of optical means, i.e. using sub-millimetre waves, infrared, visible or ultraviolet light
    • G01N21/84Systems specially adapted for particular applications
    • G01N21/88Investigating the presence of flaws or contamination
    • G01N21/8806Specially adapted optical and illumination features
    • G01N2021/8809Adjustment for highlighting flaws
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01NINVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N21/00Investigating or analysing materials by the use of optical means, i.e. using sub-millimetre waves, infrared, visible or ultraviolet light
    • G01N21/84Systems specially adapted for particular applications
    • G01N21/88Investigating the presence of flaws or contamination
    • G01N21/8851Scan or image signal processing specially adapted therefor, e.g. for scan signal adjustment, for detecting different kinds of defects, for compensating for structures, markings, edges
    • G01N2021/8887Scan or image signal processing specially adapted therefor, e.g. for scan signal adjustment, for detecting different kinds of defects, for compensating for structures, markings, edges based on image processing techniques
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/78Apparatus for connecting with wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/859Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector involving monitoring, e.g. feedback loop
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details

Definitions

  • the invention relates to a method for the automatic monitoring of the production of semiconductor components according to the preamble of claim 1 and a corresponding device according to the preamble of claim 6.
  • a major problem in the semiconductor industry is that the reliability of manufactured components must be guaranteed by the manufacturer.
  • the reliability of the components depends on the quality of the installation of the chip in the housing, provided the chip is correctly manufactured. This includes both the state in which the chip is installed, the position of the chip in the housing and the type and quality of the electrical connections between the chip and the housing connection contacts. For this reason, the chip surfaces are checked for mechanical damage or soiling, the position of the chip in the housing, the adhesive points between the chip and the housing, and the bond wire connections between the chip and the housing connection contacts. So far, this inspection has essentially been carried out exclusively by human personnel using microscopes. On the one hand, this process is very tiring for the staff and cost-intensive for the entrepreneur, on the other hand, at today's high production speeds, only spot checks of the components are possible.
  • REPLACEMENT LEAF allow about the spatial shape of the object surface.
  • the invention is based on the object of further developing methods and devices of the type mentioned at the outset such that the essential data for detecting errors in the production of semiconductor components can be derived and checked in a simple manner.
  • An essential idea of the invention is that for each individual point (not in the mathematical sense) an optimal direction of illumination and / or illumination intensity is possible in such a way that this point can be seen with high contrast above the background. This means that either the point is bright (highly reflective) and the background dark all around or - conversely - the background in this area is well illuminated, but the point on the bond wire appears dark. These useful lighting directions are obtained by varying the possible lighting directions with simultaneous evaluation of the image signals.
  • the lighting can be varied so that a currently selected lighting direction is recognized as the useful lighting direction whenever the corresponding light source or Illumination from precisely this direction produces a point of high contrast which immediately adjoins the previously found point (or starting point).
  • the pattern recognition can be limited to a narrowly limited area following the line point just found, with only the lighting directions as useful lighting directions in To be considered are those which do not differ too much from the previously found useful lighting direction, since one can assume a certain continuity of the line course (bond wire course) and exclude discontinuous or abrupt transitions.
  • a field between a known start point and a known end point of the contour to be examined (bonding wire) can also be defined, within which the pattern recognition method evaluates image signals and outside which all information is rejected as "uninteresting".
  • the further checking of series components can take place on the basis of the "lighting setting" defined in this way.
  • the illuminance can furthermore be set in such a way that, on the one hand, a sufficient contrast to the background is guaranteed, and, on the other hand, a blooming effect is avoided, in which overexposure and thus a type of optical enlargement or blurring of the reflective point occurs.
  • the illuminance can take place via a pulse duration, pulse frequency or pulse number control of the light sources for the individual directions of illumination.
  • lighting is simultaneously carried out from all the lighting directions provided in the corresponding device, but each lighting direction is assigned a specific light color or color combination.
  • a useful lighting direction is then defined on the basis of one color, so that (when using a color camera) other colors are "hidden" in the pattern recognition.
  • REPLACEMENTB early advantage that diffusely reflecting surfaces, such as the chip surface, appear white, since a mixture of all colors takes place there. A corresponding signal can be derived from a color camera, so that the pattern recognition process is simplified.
  • Individually controllable light sources are suitable as lighting sources, e.g. LEDs, which are then controlled by a computer. If a different color or color combination is assigned to each of the different directions of illumination, this can be done via suitable color filters which are illuminated by a (single) light source which emits at least the essential spectral components transmitted by the color filter.
  • a color filter can e.g. be produced from a slide positive film with which a standardized color spectrum (from blue to red) was photographed.
  • light emitted by a white light source is broken down into its spectral components (e.g. through a prism), with a corresponding number behind the prism of light guides with their input ends is arranged such that each light guide is assigned a defined color.
  • the other ends of the light guides then represent "light sources" which, with a corresponding arrangement, illuminate a component to be examined with a specific color from a corresponding direction of illumination.
  • FIG. 1 shows an embodiment of the invention in a schematic representation
  • Fig. 2 AC schematic image sections for bond wire localization
  • FIG. 3 shows a perspective partial illustration of a chip with bond wire
  • FIG. 6 shows a further embodiment of the invention in a schematic representation similar to that of FIG. 1;
  • Fig. 7 is a partial perspective view along the line VIII-VIII of Fig. 6;
  • FIG 8 shows an embodiment of a light guide illumination with light of different colors.
  • FIG. 1 schematically shows an embodiment of a device for monitoring the production of semiconductor components.
  • This comprises a holder 22 to which a number of individual light sources 16a to 16n are attached.
  • the individual light sources 16a-16n are arranged at certain angular distances from one another and directed towards a common center.
  • a holder (not shown) is provided under the holder 22 with the light sources 16a-16n, on which a semiconductor component to be examined can be positioned.
  • the semiconductor component is indicated in the drawing by the schematic representation of a chip 10, the connection points of which are connected via bond wires 12 and connection contacts 13 of a housing (not shown).
  • a (CCD) camera 14 is held above the semiconductor component such that the optical axis O of its objective 25 is essentially perpendicular to the surface 11 of the chip 10.
  • a beam splitter 24 is attached behind the lens 25 of the camera 14 in such a way that a light source 23 arranged next to the camera 14 can illuminate the semiconductor component coaxially to the optical axis O.
  • All the illumination sources 16a-16n and 23 are in a controlled connection with a processing device 17, to which the image output signals of the camera 14 are also fed. With this arrangement it is possible to illuminate the component to be examined from different directions in accordance with the light sources controlled by the processing device 17 and to record the image signals generated in the camera 14 for further processing.
  • FIGS. 3 and 4 are intended to explain the description of the method according to the invention made at the beginning.
  • 3 shows a schematic representation of a semiconductor component in which a chip 10 is mounted (glued) on a substrate 15. Terminal contacts on the surface 11 of the chip 10 are connected via bonding wires 12 to terminal contacts 13, which are connected to contact pins (not shown) protruding outwards (out of the housing).
  • each bonding wire 12 is guided in an arc between the corresponding connection point on the chip 10 and the contact 3, so that the bonding wire 12 runs essentially in a plane A which is practically perpendicular to the surface 11 of the chip 10 is.
  • the surface 11 runs in an X-Y plane, the bond wires thus extend upwards in a direction Z beyond the surface 11 of the chip 10.
  • a first light beam In from a first useful lighting direction is required.
  • a subsequent point or region 28b of the bonding wire 12 must be illuminated from another direction of illumination by means of a light beam Im, as shown in FIG. 4.
  • the illumination from almost all (possible) directions of illumination also leads to the fact that light from the chip surface enters the lens of the camera 14, the luminance of the light emitted by the areas 28 on the bonding wire 12 is much higher because the bond wire 12 reflects due to its surface quality with only minor losses, but the chip surface scatters very strongly.
  • FIGS. 2A-C The effect of the illumination of a bond wire from two directions is shown again in FIGS. 2A-C.
  • This results in a brightness pattern 26 for the background, a brightness image 28 for the area in which the respective bonding wire 12 reflects, and a brightness pattern 27 which corresponds to a shadow which the respective bonding wire casts on the background for each of the images .
  • the image according to FIG. 2C results, in which the (dark) shadow region 27, which in the two images according to FIGS. 2A and 2B lies at the same point (in the XY plane), is rich in contrast against the lighter background. This corresponds to a reversal of the image compared to the examples shown above.
  • an illumination unit consisting of a plurality of white light sources 31 is provided, the light of which is transmitted through a color filter 32 attached in a holder 22 to the chip 10 to be examined.
  • the color filter 32 is designed such that a defined color is assigned to each lighting direction. For example, the color filter 32 in FIGS. 6 and 7 can run through the color spectrum from blue to red from bottom to top. It comes here
  • each direction from which the chip 10 is illuminated can be assigned a specific color.
  • the camera 14 is designed as a color camera, so that a signal (analog or digital) can be obtained from its output signal via a color signal converter 30, from which those color values are extracted, which directions of useful lighting, and those color values are suppressed which correspond to unfavorable directions of illumination.
  • hollow spherical lighting device (with camera) can be understood, the color filter then being preferably axially symmetrical to the optical axis 0 of the camera 14.
  • the light from a (single) white light source 31 is sent through a prism 18 and broken down into its spectral components.
  • the spectrum falls on the input ends of light guides L1-Ln, so that each light guide is assigned a color (wavelength)
  • the light guide 30 is ordered and the light guide only emits light of this wavelength at its other end.
  • each light source 16a-16n that is to say each light-guide end, has a light beam 11 -Inn speaks, which is directed to the chip 10.
  • the camera 14 is again a color camera, so that the lighting directions (useful lighting directions) identified as favorable
  • REPLACEMENT LEAF 10 can be defined as color values of the camera output signal.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Analytical Chemistry (AREA)
  • Chemical & Material Sciences (AREA)
  • General Health & Medical Sciences (AREA)
  • General Physics & Mathematics (AREA)
  • Immunology (AREA)
  • Pathology (AREA)
  • Physics & Mathematics (AREA)
  • Biochemistry (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Health & Medical Sciences (AREA)
  • Manufacturing & Machinery (AREA)
  • Investigating Materials By The Use Of Optical Means Adapted For Particular Applications (AREA)
  • Length Measuring Devices By Optical Means (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Abstract

Lors de la fabrication de composants semi-conducteurs, il faut contrôler la qualité de surface des puces semi-conductrices, ainsi que leur position par rapport à un boîtier, notamment les plots de connexion entre la puce et les éléments de raccordement du boîtier. A cet effet, les composants semi-conducteurs sont éclairés par un dispositif d'éclairage et surveillés au moyen d'une caméra dont les signaux vidéo de sortie peuvent être transmis à un dispositif de traitement de signaux vidéo à des fins de reconnaissance de défauts de fabrication. Selon un procédé de reconnaissance des formes, les directions effectives d'éclairage sont fixées de sorte que des images riches en contrastes des structures à examiner ou de leurs contours puissent être reconnues de manière reproductible.
PCT/EP1991/001648 1990-10-11 1991-08-30 Procede et dispositif de controle automatique de la fabrication de composants semi-conducteurs WO1992007250A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DEP4032327.7 1990-10-11
DE4032327A DE4032327A1 (de) 1990-10-11 1990-10-11 Verfahren und vorrichtung zur automatisierten ueberwachung der herstellung von halbleiterbauteilen

Publications (1)

Publication Number Publication Date
WO1992007250A1 true WO1992007250A1 (fr) 1992-04-30

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PCT/EP1991/001648 WO1992007250A1 (fr) 1990-10-11 1991-08-30 Procede et dispositif de controle automatique de la fabrication de composants semi-conducteurs

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WO (1) WO1992007250A1 (fr)

Cited By (9)

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US5825499A (en) * 1995-10-25 1998-10-20 Siemens Aktiengesellschaft Method for checking wafers having a lacquer layer for faults
US5909285A (en) * 1997-05-05 1999-06-01 Beaty; Elwin M. Three dimensional inspection system
US6055054A (en) * 1997-05-05 2000-04-25 Beaty; Elwin M. Three dimensional inspection system
US6072898A (en) * 1998-01-16 2000-06-06 Beaty; Elwin M. Method and apparatus for three dimensional inspection of electronic components
EP1420244A2 (fr) * 1992-12-14 2004-05-19 Pressco Technology Inc. Système de contrôle video utilisant une illumination multispectrale par diodes électroluminescentes
US6915007B2 (en) 1998-01-16 2005-07-05 Elwin M. Beaty Method and apparatus for three dimensional inspection of electronic components
US7079678B2 (en) 1998-01-16 2006-07-18 Scanner Technologies Corporation Electronic component products made according to a process that includes a method for three dimensional inspection
DE10230891B4 (de) * 2001-07-11 2006-08-17 Samsung Electronics Co., Ltd., Suwon Photolithographisches System und photolithographes Verfahren zur Erfassung von Verunreinigungen aufder Oberfläche von Wafern
US7374744B2 (en) 1994-09-28 2008-05-20 Imcor Pharmaceutical Co. Harmonic ultrasound imaging with microbubbles

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DE4413831C2 (de) * 1994-04-20 2000-05-31 Siemens Ag Verfahren zur Kontrolle von Halbleiterscheiben
DE4413832C2 (de) * 1994-04-20 2000-05-31 Siemens Ag Vorrichtungen zur Kontrolle von Halbleiterscheiben
DE19511854A1 (de) * 1994-08-11 1996-02-15 Graessle Walter Gmbh Vorrichtung und Verfahren zum Prüfen von kleinen Gegenständen
US5661249A (en) * 1994-08-11 1997-08-26 Walter Grassle Gmbh Apparatus and method for inspecting small articles
DE19511197C2 (de) * 1995-03-27 1999-05-12 Basler Gmbh Verfahren und Vorrichtung zum optischen Prüfen einer Oberfläche, insbesondere einer Compact-Disc
DE19511195C2 (de) * 1995-03-27 1999-01-28 Basler Gmbh Verfahren und Vorrichtung zum optischen Prüfen einer Oberfläche
DE19639892C1 (de) * 1996-09-27 1998-02-12 Siemens Ag Verfahren zur Qualitätssicherung in einer Fertigung
DE19652124C2 (de) * 1996-12-14 2002-10-17 Micronas Gmbh Verfahren und Vorrichtung zum automatischen Überprüfen von Positionsdaten j-förmiger elektrischer Kontaktanschlüsse
DE19754871C2 (de) * 1997-12-10 2003-12-18 Fraunhofer Ges Forschung Verfahren und Vorrichtung zum Überprüfen der Qualität von Drahtverbindungen elektrischer Bauteile
DE19930043A1 (de) * 1999-06-30 2001-01-04 Wolf Systeme Ag Beleuchtungsvorrichtung für die elektronische Bildverarbeitung
EP1400802A1 (fr) * 2002-09-23 2004-03-24 Ford Global Technologies, Inc. Méthode et dispositif de détection et d'évaluation des irrégularités de surface
KR20070085589A (ko) * 2004-12-14 2007-08-27 아크조노벨코팅스인터내셔널비.브이. 표면의 시각적 특성을 분석하는 방법 및 장치
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Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1420244A2 (fr) * 1992-12-14 2004-05-19 Pressco Technology Inc. Système de contrôle video utilisant une illumination multispectrale par diodes électroluminescentes
EP1420244A3 (fr) * 1992-12-14 2005-09-14 Pressco Technology Inc. Système de contrôle video utilisant une illumination multispectrale par diodes électroluminescentes
US7374744B2 (en) 1994-09-28 2008-05-20 Imcor Pharmaceutical Co. Harmonic ultrasound imaging with microbubbles
US5825499A (en) * 1995-10-25 1998-10-20 Siemens Aktiengesellschaft Method for checking wafers having a lacquer layer for faults
US5909285A (en) * 1997-05-05 1999-06-01 Beaty; Elwin M. Three dimensional inspection system
US6055054A (en) * 1997-05-05 2000-04-25 Beaty; Elwin M. Three dimensional inspection system
US6072898A (en) * 1998-01-16 2000-06-06 Beaty; Elwin M. Method and apparatus for three dimensional inspection of electronic components
US6862365B1 (en) 1998-01-16 2005-03-01 Elwin Beaty & Elaine Beaty Method and apparatus for three dimensional inspection of electronic components
US6915007B2 (en) 1998-01-16 2005-07-05 Elwin M. Beaty Method and apparatus for three dimensional inspection of electronic components
US7079678B2 (en) 1998-01-16 2006-07-18 Scanner Technologies Corporation Electronic component products made according to a process that includes a method for three dimensional inspection
US7085411B2 (en) 1998-01-16 2006-08-01 Scanner Technologies Corporation Method of manufacturing electronic components including a method for three dimensional inspection
DE10230891B4 (de) * 2001-07-11 2006-08-17 Samsung Electronics Co., Ltd., Suwon Photolithographisches System und photolithographes Verfahren zur Erfassung von Verunreinigungen aufder Oberfläche von Wafern

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