US7880784B2 - Arrangement for generating a 3D video signal - Google Patents

Arrangement for generating a 3D video signal Download PDF

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Publication number
US7880784B2
US7880784B2 US10/548,743 US54874305A US7880784B2 US 7880784 B2 US7880784 B2 US 7880784B2 US 54874305 A US54874305 A US 54874305A US 7880784 B2 US7880784 B2 US 7880784B2
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video signal
fields
arrangement
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US20060187325A1 (en
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Burkhard Laue
Nils Lahann
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Dynamic Data Technologies LLC
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Trident Microsystems Far East Ltd Cayman Islands
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/50—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using predictive coding
    • H04N19/597—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using predictive coding specially adapted for multi-view video sequence encoding
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N13/00—Stereoscopic video systems; Multi-view video systems; Details thereof
    • H04N13/20—Image signal generators
    • H04N13/261—Image signal generators with monoscopic-to-stereoscopic image conversion

Definitions

  • the invention relates to an arrangement for generating a 3D video signal, which produces a 3D effect when it is displayed on a screen, from an input video signal that is made up of frames.
  • Each frame has an odd field and an even field.
  • an even field n and an odd field n ⁇ 1 are displayed.
  • next fields that is to say an even field n+1 and an odd field n, are alternately displayed.
  • this displaying can also take place in the inverse manner, that is to say for example an even field n ⁇ 1 and an odd field n may alternate.
  • U.S. Pat. No. 5,682,437 discloses an arrangement which uses fields from two different frames to produce such a 3D effect.
  • An arrangement for generating a 3D video signal which produces a 3D effect when it is displayed on a screen, from an input video signal that is made up of frames, each of which has an odd field and an even field, where in order to generate the 3D video signal alternately an odd field and an even field, which originate from two successive frames, and subsequently the identical fields of the in each case next frames are recorded in the 3D video signal, where in order to generate the 3D video signal a scan converter is used which can display two signals in the split screen mode, one of which is delayed by means of a special function memory in the scan converter, where the non-delayed signal and the delayed signal are written, horizontally compressed by a factor of two, into a conversion memory and, for the purposes of displaying on a screen, when they are read are scaled up by a factor of two in the horizontal direction and shifted horizontally such that they are displayed in the correct convergence.
  • Scan converters are in many cases provided in television sets in order to double or increase the field frequency. For example, a video signal having a field frequency of 50 Hz is converted into a video signal having a field frequency of 100 Hz. Such a 100 Hz scan converter for this purpose has a number of field memories and computing units.
  • the idea of the arrangement according to the invention is to use such a scan converter, as provided in any case in a large number of television sets, additionally to generate the 3D video signal or to produce the 3D effect in the video signal supplied by the scan converter on the output side.
  • the field memories provided in any case in scan converters may be additionally used for the suitable intermediate storage of the fields for producing the 3D effect.
  • Scan converters that are able to display two signals in the so-called split screen mode have, by virtue of their architecture, all the means necessary to process two video signals independently of one another. They thus have two signal paths for processing two video signals. This property is used in the arrangement according to the invention to process the abovementioned field sequences separately from one another in the two paths.
  • the odd fields of the frames are processed in one path and the even fields of the frames are processed in the other path, and these are then displayed alternately on the output side in the manner described above.
  • a scan converter which can display two signals in the split screen mode
  • One of the two field sequences is read field by field into this memory. This sequence of fields is thus delayed by a desired duration, usually by the duration of one frame.
  • the other path of the scan converter processes in each case the other field sequence and reads the latter into a conversion memory.
  • the field sequence read into the special function memory is read from said memory and likewise written into the same conversion memory.
  • the two field sequences are then present in the conversion memory, with one field sequence being delayed by a desired value relative to the other field sequence.
  • the conversion memory is configured such that the two signals are written into the conversion memory in a form scaled down, that is to say compressed, horizontally by a factor of 2.
  • the two fields are read from the conversion memory again and scaled up in the horizontal direction by a factor of 2 so that both fields again exist in the normal size.
  • the fields may then be displayed alternately in the manner described above, by being read in the appropriate sequence from the conversion memory.
  • the arrangement according to the invention uses all the hardware possibilities of a scan converter that can display two signals in the split screen mode. No additional hardware elements are required to generate the 3D video signal.
  • the changes which need to be made to a scan converter in order to generate such a signal for implementing the arrangement according to the invention are limited to software changes.
  • the arrangement according to the invention has on the input side two multistandard digital decoders, of which one processes the odd fields and one processes the even fields.
  • Such multistandard decoders also have possibilities for scaling the image sequences processed by them.
  • one of the two multistandard decoders which supplies the fields directly to the conversion memory is also used to perform such a horizontal scaling by a factor of 2, so that the fields supplied by this multistandard decoder are assigned to the conversion memory in a form already scaled down by a factor of 2.
  • the other multistandard decoder, which processes the other field sequence does not perform any such scaling down. This is carried out only when the data are read from the special function memory and then read into the conversion memory. This is readily possible at this point since scan converters have enough computing capacity to perform this scaling down.
  • the arrangement according to the invention may additionally be used to convert the input video signal having a field frequency of 50 Hertz into a 3D video signal having a field frequency of 100 Hertz.
  • the abovementioned field sequences are doubled in the process; for example a field n, a field n ⁇ 1, a field n and a field n ⁇ 1 are displayed in this sequence.
  • the respectively next fields are then likewise displayed twice alternately.
  • the single FIGURE shows, in the form of a block diagram, an arrangement according to the invention for generating a 3D video signal from a conventional input video signal.
  • the input video signal designated V E in the FIGURE may be a conventional video signal having a field frequency of 50 Hertz, for example of the PAL standard.
  • this signal is converted into a 3D video signal which is designated V 3D in the FIGURE.
  • the arrangement according to the invention additionally doubles the field frequency, so that the 3D video signal has a field frequency of 100 Hertz.
  • the embodiments are 100 Hz scan converters. Scan converters producing another field frequency, for example 75 Hz, may also be used as desired.
  • the arrangement according to the invention on the input side has two digital multistandard color decoders 2 which on the output side supply in each case a field stream TB 1 and TB 2 .
  • One of the digital multistandard color decoders in each case supplies the even fields and one the odd fields.
  • the first digital multistandard color decoder supplies in the field sequence TB 1 the in each case odd fields of the input video signal V E and the second digital multistandard color decoder 2 supplies in its output field sequence TB 2 the in each case even fields of the input video signal V E .
  • the arrangement has a 100 Hz scan converter which consists of circuit blocks 3 and 5 that are provided to generate a 100 Hertz signal.
  • This 100 Hz scan converter may be provided for further purposes, such as movement estimation and movement correction, zooming of images, jitter correction or the like for example.
  • 100 Hz scan converters which are provided to display two image signals in the split screen mode, in which two signals are displayed next to one another in horizontally offset form, have two signal paths for the independent processing of two signals. This property is used in the arrangement according to the invention to process the two field streams TB 1 and TB 2 .
  • the memories provided in any case in the 100 Hz scan converter which memories are designated 4 and 6 in the FIGURE, are likewise used to produce the 3D effect.
  • the first circuit block 3 of the 100 Hz scan converter there is a memory 4 which is usually provided for special functions produced by means of the 100 Hz scan converter.
  • the second field stream TB 2 which is supplied by the second digital multistandard color decoder 2 , is read into this special function memory 4 .
  • this conversion memory 6 is also used to store two fields.
  • the first digital multistandard color decoder 1 supplies the field sequence TB 1 consisting of the odd fields of the frames, in a form that has already been scaled down, that is to say compressed, horizontally by a factor of 2.
  • the fields are written into the conversion memory 6 in this scaled-down form.
  • the fields of the second field stream TB 2 which are initially stored uncompressed in the special function memory 4 , are likewise scaled down, that is to say compressed, horizontally by a factor of 2 after they have been read from the memory 4 and before they are written into the conversion memory 6 . Following this, in each case at least two fields are available in the conversion memory 6 . Since the field stream 2 is delayed by the duration of one frame relative to the field stream 1 , in each case an odd field of a frame n and an even field of a frame n ⁇ 1 or n+1 are available in the conversion memory 6 . In each case, there are then two fields in the conversion memory, said two fields belonging to successive frames, that is to say not to the same frame. On account of this selection of the fields, the above-described 3D effect is amplified since in this way movements which have occurred in the time that has lapsed between the fields are emphasized in an amplified manner.
  • the fields are now in the conversion memory 6 but still in compressed form, as is normally provided for the split screen mode. However, since the fields are to be displayed sequentially in full on the screen, the fields are scaled up again by a factor of 2 in the horizontal direction when they are read from the conversion memory 6 . This may be effected by means of a further circuit block 7 , which may normally be provided for example for display in the split screen mode.
  • the images scaled up in this way are generated in correct convergence with respect to one another, that is to say in the same position.
  • the video signal thus processed in supplied on the output side as a 3D video signal V 3D .
  • a 100 Hz scan conversion can be performed so that the two fields stored in the conversion memory 6 alternately appear twice in the 3D video signal V 3D .
  • the arrangement according to the invention as shown in the FIGURE may also be configured such that not only the first digital multistandard color decoder 1 but also the second digital multistandard color decoder 2 performs a scaling down of the field stream TB 2 supplied to it.
  • the fields read into the special function memory 4 are likewise read into this memory 4 in a form already scaled down horizontally by a factor of 2. There is then no need for the scaling down between the process of reading from the memory 4 and the process of reading into the conversion memory 6 .
  • the arrangement according to the invention thus uses a 100 Hz scan converter to generate a 3D signal, where no hardware changes to the 100 Hz scan converter are necessary. Rather, the changes are limited to an appropriate software adaptation.

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  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Controls And Circuits For Display Device (AREA)
  • Testing, Inspecting, Measuring Of Stereoscopic Televisions And Televisions (AREA)
  • Liquid Crystal (AREA)
US10/548,743 2003-03-14 2004-03-05 Arrangement for generating a 3D video signal Expired - Fee Related US7880784B2 (en)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
EP03100653 2003-03-14
EP03100653 2003-03-14
EP03100653.9 2003-03-14
PCT/IB2004/000680 WO2004082296A1 (en) 2003-03-14 2004-03-05 Arrangement for generating a 3d video signal

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US20060187325A1 US20060187325A1 (en) 2006-08-24
US7880784B2 true US7880784B2 (en) 2011-02-01

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US (1) US7880784B2 (ja)
EP (1) EP1606954B1 (ja)
JP (1) JP4489760B2 (ja)
AT (1) ATE360962T1 (ja)
DE (1) DE602004006102T2 (ja)
WO (1) WO2004082296A1 (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20110310096A1 (en) * 2010-06-21 2011-12-22 Samsung Electronics Co., Ltd. Timing control unit and apparatus and method for displaying using the same

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7909928B2 (en) * 2006-03-24 2011-03-22 The Regents Of The University Of Michigan Reactive coatings for regioselective surface modification
US7947148B2 (en) * 2006-06-01 2011-05-24 The Regents Of The University Of Michigan Dry adhesion bonding
US8399047B2 (en) * 2007-03-22 2013-03-19 The Regents Of The Univeristy Of Michigan Multifunctional CVD coatings

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5682437A (en) * 1994-09-22 1997-10-28 Sanyo Electric Co., Ltd. Method of converting two-dimensional images into three-dimensional images
US6445833B1 (en) * 1996-07-18 2002-09-03 Sanyo Electric Co., Ltd Device and method for converting two-dimensional video into three-dimensional video

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1533238A (en) * 1975-12-23 1978-11-22 Post Office Split-screen television apparatus
US5396890A (en) * 1993-09-30 1995-03-14 Siemens Medical Systems, Inc. Three-dimensional scan converter for ultrasound imaging
KR100358021B1 (ko) * 1994-02-01 2003-01-24 산요 덴키 가부시키가이샤 2차원영상을3차원영상으로변환시키는방법및입체영상표시시스템
EP0862340A4 (en) * 1996-09-17 2002-06-12 Imard K K IMAGE PROCESSING UNIT SIGNAL

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5682437A (en) * 1994-09-22 1997-10-28 Sanyo Electric Co., Ltd. Method of converting two-dimensional images into three-dimensional images
US6445833B1 (en) * 1996-07-18 2002-09-03 Sanyo Electric Co., Ltd Device and method for converting two-dimensional video into three-dimensional video

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20110310096A1 (en) * 2010-06-21 2011-12-22 Samsung Electronics Co., Ltd. Timing control unit and apparatus and method for displaying using the same
US9204137B2 (en) * 2010-06-21 2015-12-01 Samsung Electronics Co., Ltd. Timing control unit and apparatus and method for displaying using the same
US9514703B2 (en) 2010-06-21 2016-12-06 Samsung Electronics Co., Ltd. Timing control unit and apparatus and method for displaying using the same

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Publication number Publication date
EP1606954B1 (en) 2007-04-25
ATE360962T1 (de) 2007-05-15
JP4489760B2 (ja) 2010-06-23
EP1606954A1 (en) 2005-12-21
DE602004006102D1 (de) 2007-06-06
US20060187325A1 (en) 2006-08-24
WO2004082296A1 (en) 2004-09-23
DE602004006102T2 (de) 2007-12-27
JP2006520564A (ja) 2006-09-07

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