US6982484B2 - Semiconductor joining substrate utilizing a tape with adhesive and copper-clad laminate sheet - Google Patents

Semiconductor joining substrate utilizing a tape with adhesive and copper-clad laminate sheet Download PDF

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Publication number
US6982484B2
US6982484B2 US10/111,302 US11130202A US6982484B2 US 6982484 B2 US6982484 B2 US 6982484B2 US 11130202 A US11130202 A US 11130202A US 6982484 B2 US6982484 B2 US 6982484B2
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United States
Prior art keywords
adhesive
semiconductor devices
devices according
backed tape
tape
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Expired - Fee Related
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US10/111,302
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English (en)
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US20030031867A1 (en
Inventor
Mikihiro Ogura
Syouji Kigoshi
Masami Tokunaga
Yasuaki Tsutsumi
Ryuichi Kamei
Ken Shimizu
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Toray Industries Inc
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Toray Industries Inc
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Assigned to TORAY INDUSTRIES, INC. reassignment TORAY INDUSTRIES, INC. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: KAMEI, RYUICHI, KIGOSHI, SYOUJI, OGURA, MIKIHIRO, SHIMIZU, KEN, TOKUNAGA, MASAMI, TSUTSUMI, YASUAKI
Publication of US20030031867A1 publication Critical patent/US20030031867A1/en
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    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49572—Lead-frames or other flat leads consisting of thin flexible metallic tape with or without a film carrier
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Definitions

  • the present invention relates to an adhesive-backed tape suitable for the production of semiconductor devices where there is employed a film-form adhesive agent, such as in the case of the patterned tape used in tape automated bonding (TAB), the semiconductor connecting substrate such as an interposer used for a ball grid array (BGA) package, die bonding materials, lead frame fixing tape, LOC tape, the interlayer adhesive sheets of a multilayer substrate and the like, employed when mounting semiconductor integrated circuits; and to a copper-clad laminate, semiconductor connecting substrate and semiconductor device employing same.
  • a film-form adhesive agent such as in the case of the patterned tape used in tape automated bonding (TAB), the semiconductor connecting substrate such as an interposer used for a ball grid array (BGA) package, die bonding materials, lead frame fixing tape, LOC tape, the interlayer adhesive sheets of a multilayer substrate and the like, employed when mounting semiconductor integrated circuits; and to a copper-clad laminate, semiconductor connecting substrate and semiconductor device employing same.
  • TCP tape carrier package
  • TAB tape automated bonding
  • the tape for TAB use In producing the TCP connecting substrate (the patterned tape), there is, generally used an adhesive-backed tape for TAB (hereinafter this is referred to as the tape for TAB use).
  • the tape for TAB use has a three-layer construction comprising an uncured adhesive agent layer and a polyester film with release properties which serves as a protective film, provided on a flexible organic insulating film.
  • TAB tape (the patterned tape), which is the connecting substrate, via processing stages such as (1) providing sprocket and device holes, (2) hot lamination of copper foil and hot curing of the adhesive agent, (3) pattern formation (application of a resist, etching and removal of the resist), and (4) a tin or gold-plating treatment, etc.
  • FIG. 1 shows the form of the patterned tape.
  • On organic insulating film 1 are the adhesive agent 2 and the conductor pattern 5 , and there are provided sprocket holes 3 for feeding the film and device holes 4 in which the devices are set.
  • FIG. 2 shows in cross-section one embodiment of a TCP type semiconductor device.
  • the semiconductor integrated circuit is attached.
  • the semiconductor device is produced via a resin sealing process based on sealing resin 9 .
  • other components are connected to the attached integrated circuit, etc, via outer lead 7 , and the TCP type semiconductor device mounted on electronic equipment.
  • BGAs ball grid arrays
  • CSPs chip scale packages
  • FIG. 4 show cross-sections of embodiments of such semiconductor devices (BGA or CSP repectively).
  • 12 and 20 denote the organic insulating film
  • 13 and 21 the adhesive agent
  • 14 and 22 the conductor pattern
  • 15 and 23 the semiconductor integrated circuit
  • 16 and 24 the sealing resin
  • 17 and 25 gold bumps
  • 18 and 26 solder balls
  • 19 a reinforcing board
  • 27 a solder resist.
  • the interposer referred to here has the same kind of function as the aforesaid TCP patterned tape, so it is possible to employ the adhesive-backed tape used for TAB.
  • This will of course be useful in connection systems having an inner lead, but it is particularly applicable in a process where copper foil is laminated following the mechanical punching of holes for solder balls and device holes for ICs.
  • an inner lead is not, necessary, and in the process of introducing holes for solder balls and IC device holes along with the copper foil, there may be used a copper clad laminate where the lamination of the copper foil and hot curing of the adhesive have already been carried out.
  • the objective of the present invention lies in resolving such problems by improving the properties of the insulating film, such as the polyimide, which constitutes the base, film, and to offer an adhesive-backed tape for semiconductors which has outstanding dimensional stability and enables there to be simultaneously achieved both a reduction in warping in the copper-foil-laminated state and in the state following the formation of the circuit pattern; together with a copper clad laminate, a semiconductor connecting substrate and a semiconductor device employing said adhesive-backed tape.
  • the insulating film such as the polyimide
  • an adhesive-backed tape for semiconductors which has outstanding dimensional stability and enables there to be simultaneously achieved both a reduction in warping in the copper-foil-laminated state and in the state following the formation of the circuit pattern
  • a further objective of the present invention is an adhesive-backed tape for semiconductors which provides both good punchability and retention of adhesive agent modulus of elasticity at high temperatures.
  • the present invention relates to an adhesive-backed tape for semiconductors which is characterized in that it is composed of a laminate of an insulating film layer having the following characteristics (1) and (2), and at least one adhesive agent layer in the semi-cured state.
  • FIG. 1 shows a perspective view of an embodiment of the semiconductor connecting substrate (patterned tape) prior to the mounting of the semiconductor integrated circuits, which is obtained by processing the adhesive-backed tape for semiconductor devices of the present invention.
  • FIG. 2 shows, a cross-sectional view of an embodiment of a semiconductor device (TCP) using the adhesive-backed tape for semiconductor devices of the present invention.
  • FIG. 3 shows a cross-sectional view of an embodiment of a semiconductor device (BGA) using the adhesive-backed tape for semiconductor devices of the present invention.
  • FIG. 4 shows a cross-sectional view of an embodiment of a semiconductor device (CSP) using the adhesive-backed tape for semiconductor devices of the present invention.
  • CSP semiconductor device
  • the insulating film used in the present invention there are plastics such as polyimides, polyesters, polyphenylene sulphide, polyether sulphones, polyetherether ketones, aramids, polycarbonates, polyarylates and liquid crystal polymers, and also films which comprise a composite material such as a glass cloth impregnated with an epoxy resin. There may also be used a laminate of a plurality of these films.
  • films in which the chief component is a polyimide resin are outstanding in their mechanical, electrical, heat resistance and chemical properties, etc, and provide a good balance too in terms of cost, so are favourably employed.
  • the insulating film can be subjected to a surface treatment by, for example, a hydrolysis, corona discharge, low temperature plasma, physical roughening or adhesion-enhancing coating treatment, on one or both faces.
  • the thickness of the insulating film is preferably 10–65 ⁇ m and more preferably 25–55 ⁇ m. If it is less than 10 ⁇ m, the mechanical strength is low and the usability in the patterning and subsequent stages is impaired, so this is undesirable. If it is more than 65 ⁇ m, it is difficult to reduce the size of solder balls and via holes, so this is undesirable.
  • the transverse direction (TD) coefficient of linear expansion of the film is preferably greater than the coefficient of linear expansion of the clad metal foil.
  • the coefficient of linear expansion at 50–200° C. is preferably 17–30 ppm/° C. and more preferably 19–25 ppm/° C. in the case where the metal foil is an electrolytic copper foil. If it is less than 17 ppm/° C. or more than 30 ppm/° C., then there is considerable warping in the copper-foil-laminated state, which is undesirable.
  • the tensile modulus of elasticity in the present invention is the value at 25° C. defined by ASTM-D882.
  • the tensile modulus of elasticity is preferably 6–12 GPa, and more preferably 7–10 GPa. If it is less than 6 GPa, then the mechanical strength is low and the usability in the patterning and subsequent stages is impaired, which is undesirable. If it is higher than 12 GPa, then the flexibility is lowered which is undesirable.
  • the difference between these coefficients of linear expansion is preferably 3–10 ppm/° C., and more preferably 5–7 ppm/° C. If the difference is less than 3 ppm/° C. or more than 10 ppm/° C., then in both cases there is considerable warping in the copper-foil-laminated state, which is undesirable.
  • the value in the MD be smaller than that in the TD.
  • Reference here to the coefficient of linear expansion is the value measured by the TMA tensile loading method, and specifically it is the value given by evaluation method (2) of the examples.
  • the percentage heat shrinkage of the insulating film layer at 200° C. in the film transverse direction (TD) is preferably 0.0 to 0.2%, and more preferably 0.0 to 0.1%.
  • the percentage heat shrinkage influences the warping in the copper-foil-laminated state in the same way as the coefficient of linear expansion, and if it is less than 0.0% or more than 0.2% then in each case there is considerable warping in the copper-foil-laminated state, which is undesirable.
  • Reference here to the percentage heat shrinkage means the value measured by a method based on ASTM D1204, and is the value determined by the method given in evaluation method (3) of the examples.
  • the humidity coefficient of expansion of the insulating film layer in the film transverse direction (TD) is preferably no more than 23 ppm/% RH. More preferably, it is 5 to 20 ppm/% RH and still more preferably 5 to 15 ppm/% RH.
  • the humidity coefficient of expansion affects the warping in the copper-foil-laminated state and if the value exceeds 23 ppm/% RH then there is considerable warping in the copper-foil-laminated state, which is undesirable.
  • the precise measurement conditions for the humidity coefficient of expansion are given in evaluation method (4) of the examples.
  • the water absorption of the insulating film layer is preferably no more than 1.7% and more preferably no more than 1.5%. If the percentage water absorption exceeds 1.7%, the amount of moisture vaporized by the heat of soldering at the time of the semiconductor device mounting is considerable so, for example, separation occurs between structural components of the TAB tape, and the soldering heat resistance is poor.
  • the water absorption measurement conditions are given in evaluation method (5) of the examples.
  • the thermal conductivity of the insulating film layer is preferably no more than 0.40 W/m.K, and more preferably no more than 0.30 W/m.K. If the thermal conductivity exceeds 0.40 W/m.K, then the heat of soldering is transmitted to the insulating film layer and adhesive agent layer, so that moisture contained in the insulating film layer and in the adhesive agent layer is readily vaporized and caused to expand. As a result, separation occurs between the structural components of the TAB tape and there is poor solder heat resistance.
  • the conditions for measuring the thermal conductivity are given in evaluation method (6) of the examples.
  • the water vapour transmission of the insulating film layer is preferably at least 0.04 g/m 2 /24 hr. If the water vapour transmission is less than 0.04 g/m 2 /24 hr, then moisture absorbed by the substrate does not escape when heating at the time of soldering, and there is explosive vaporization and expansion, so that separation of the structural components occurs.
  • the conditions for measurement of the water vapour transmission are given in evaluation method (7) of the examples.
  • the adhesive agent layer is normally provided in a semi-cured state and its chemical structure is not particularly restricted providing that, following copper foil laminating, curing and crosslinking can be effected by the application of at least one type of energy selected from heat, pressure, an electric field, a magnetic field, ultraviolet light, radiation, ultrasonics or the like.
  • the amount of thermosetting resin added is preferably 2 to 20 wt % of the adhesive agent layer and more preferably 4 to 15 wt %.
  • the thickness of the adhesive agent layer prior to curing is preferably in the range 3 to 50 ⁇ m.
  • the epoxy resins are not especially restricted, providing that they possess two or more epoxy groups per molecule, and examples include the diglycidyl ethers of bisphenol F, bisphenol A, bisphenol S, dihydroxy-naphthalene, dicyclopentadiene diphenol, dicyclopentadiene dixylenol and the like, epoxidized phenolic novolaks, epoxidized cresol novolaks, epoxidized trisphenylol methane, epoxidized tetraphenylol ethane, epoxidized m-xylenediamine, cyclic epoxies and the like.
  • phenolic resins there can be used any known phenolic resin such as novolak type phenolic resins or resol type phenolic resins.
  • resins comprising phenol, alkyl-substituted phenols such as cresol, p-tert-butylphenol, nonylphenol and p-phenylphenol, terpene, dicyclopentadiene and other such cyclic alkyl-modified phenols, those with a functional group containing a heteroatom such as a nitro group, halogen group, cyano group, amino group or the like, those with a naphthalene, anthracene or similar skeletal structure, and polyfunctional phenols such as bisphenol F, bisphenol A, bisphenol S, resorcinol and pyrogallol.
  • polyimide resins there are those obtained by the imidation of polyamic acids obtained by the polycondensation of the dianhydride of an aromatic tetracarboxylic acid such as pyromellitic acid, 3,3′,4,4′-biphenyltetracarboxylic acid or 3,3′,4,4′-benzophenonetetracarboxylic acid, and a diamine such as 4,4′-diaminodiphenylether, 4,4-diaminodiphenyl-sulphone, p-phenylenediamine, dimethylbenzidine or 3,3′-diaminobenzophenone.
  • aromatic tetracarboxylic acid such as pyromellitic acid, 3,3′,4,4′-biphenyltetracarboxylic acid or 3,3′,4,4′-benzophenonetetracarboxylic acid
  • a diamine such as 4,4′-diaminodiphenylether, 4,
  • maleimide resins those which are at least difunctional are preferred, such as N,N′-(4,4′-diphenylmethane)bismaleimide, N,N′-p-phenylenebis-maleimide, N,N′-m-phenylenebismaleimide, N,N′-2,4-tolylenebismaleimide, N,N′-2,6-tolylenebismaleimide, N,N′-ethylenebismaleimide, N,N′-hexamethylenebis-maleimide and the like.
  • N,N′-(4,4′-diphenylmethane)bismaleimide N,N′-p-phenylenebis-maleimide, N,N′-m-phenylenebismaleimide, N,N′-2,4-tolylenebismaleimide, N,N′-2,6-tolylenebismaleimide, N,N′-ethylenebismaleimide, N,N′-hexamethylenebis-maleimide and the like.
  • thermosetting resin curing agents and curing accelerators there are no particular restrictions on the addition of thermosetting resin curing agents and curing accelerators to the adhesive agent layer of the present invention.
  • thermosetting resin curing agents and curing accelerators there can be used known materials such as diethylenetriamine, triethylene-tetramine or other such aliphatic polyamines, aromatic polyamines, boron trifluoride triethylamine complex or other such boron trifluoride amine complexes, 2-alkyl-4-methylimidazole, 2-phenyl-4-alkylimidazole or other such imidazole derivative, phthalic anhydride, trimellitic anhydride or other such organic acid, dicyandiamide, triphenylphosphine, diazabicycloundecene or the like.
  • the amount added is preferably from 0.1 to 10 parts by weight per 100 parts by weight of the adhesive agent layer.
  • antioxidants As well as the above components, there are no restrictions on the addition of antioxidants, ion arrestors or other such organic or inorganic components within a range such that the properties of the adhesive agent are not impaired.
  • the adhesive agent layer of the present invention can contain thermoplastic resins.
  • Thermoplastic resins are effective for controlling the softening temperature, and have the function of enhancing adhesive strength, flexibility, thermal stress mitigation, and insulation based on lower moisture absorption.
  • the amount of thermoplastic resin added is preferably 30–60 wt %, and more preferably 35–55 wt %, of the adhesive agent layer.
  • thermoplastic resins are acrylonitrile-butadiene copolymer (NBR), acrylonitrile-butadiene rubber-styrene resin (ABS), styrene-butadiene-ethylene resin (SEBS), acrylics, polyvinyl butyral, polyamides, polyesteramides, polyesters, polyimides, polyamide-imides, polyurethanes and the like.
  • these thermoplastic resins may also possess functional groups capable of reacting with the aforesaid phenolic resins, epoxy resins or other thermosetting resins. Specific examples of these groups are amino groups, carboxyl groups, epoxy groups, hydroxyl groups, methylol groups, isocyanate groups, vinyl groups, silanol groups and the like.
  • thermoplastic resins polyamide resins are preferred in terms of adhesion to the copper foil, flexibility and insulation properties, and various kinds of polyamide resin can be used.
  • Polyamide resins containing, as an essential component, dicarboxylic acid with 36 carbons (so-called dimer acid) are particularly suitable for conferring flexibility on the adhesive agent layer and, because of low moisture absorption, they are outstanding in their insulation properties.
  • polyamide resins which are polyamide resins of amine value at least 1 but less than 3 are favourably employed.
  • Polyamide resins containing dimer acid are obtained by the polycondensation of a diamine and dimer acid by the usual methods, and in such circumstances, as well as the dimer acid, there may also be included dicarboxylic acid such as adipic acid, azelaic acid or sebacic acid as a copolymer component.
  • dicarboxylic acid such as adipic acid, azelaic acid or sebacic acid
  • Known diamines such as ethylenediamine, hexamethylenediamine or piperazine can be used, and two or more types may be mixed together from the point of view of moisture absorption, solubility or the like.
  • Av acid value
  • F strength* 1 of the potassium hydroxide
  • A amount of potassium hydroxide solution required for the titration (ml)
  • B amount corresponding to A in a blank test (ml)
  • the strength of the potassium hydroxide is calculated from the following formula (2) by potassium hydrogen phthalate titration.
  • F 1000 ⁇ 0.5/(204.22 ⁇ ( V ⁇ b ) ⁇ 0.1) (2)
  • V amount of potassium hydroxide solution required in the titration (ml)
  • b amount corresponding to V in a blank test (ml)
  • An adhesive agent composed only using polyamide resin of acid value less than 3 is inferior in its punchability.
  • the proportion of polyamide resin contained in the adhesive agent layer lies in the range 1 to 90 wt %. If the amount is less than 1 wt %, problems are produced in terms of pliability, and there is a fear that the adhesive agent layer will separate away. With more than 90 wt %, the insulation properties are impaired, so the reliability is reduced. It is further preferred that the amount lies in the range 20–70 wt %.
  • the elastic modulus at 150° C. of the adhesive agent layer in the film transverse direction (TD) is preferably from 1 MPa to 5 GPa, more preferably from 2 MPa to 1 GPa, and still more preferably from 50 MPa to 1 GPa, and furthermore, the coefficient of linear expansion at 25–150° C. in the film transverse direction (TD) is preferably in the range 10–500 ppm/° C. and more preferably 20–300° C.
  • E′ the storage elastic modulus
  • the elastic modulus is less than 1 MPa, then there is a lowering of the heat resistance at the time of reflow, which is undesirable. If the elastic modulus is greater than 5 GPa, as well as there being insufficient flexibility, there is considerable warping following the circuit pattern formation, which is undesirable.
  • wire bonding temperatures are generally from 110° C. to 200° C. and taking, as a typical value, the elastic modulus (E′ determined by the dynamic viscoelasticity method) at 150° C. as an index, this should appropriately lie in the range given above.
  • the elastic modulus at 25° C. of the adhesive agent layer in the film transverse direction (TD) after curing preferably lies in the range 10 MPa to 5 GPa, and more preferably in the range 100 MPa to 3 GPa. If the elastic modulus is less than 10 MPa, then punching faults arise and the punchability is reduced, so this is undesirable. If the elastic modulus is greater than 5 GPa, then the adhesive strength to the copper foil is reduced, which is undesirable.
  • the coefficient of linear expansion in the film transverse direction (TD) at 25–150° C. lies in the range 10–500 ppm/° C. and more preferably in the range 20–300 ppm/° C. If the coefficient of linear expansion is less than 10 ppm/° C., or greater than 500 ppm/° C., then warping is increased which is undesirable.
  • the method of measuring the coefficient of linear expansion is given in evaluation method (9) of the examples.
  • the haze value of the adhesive agent layer is preferably no more than 20. If the haze is more than 20, then the wire bonding properties are poor.
  • haze refers to the cloudiness and is specified in JIS K7105, but the details are given in evaluation method (10) of the examples.
  • the adhesive-backed tape for semiconductor devices of the present invention may have a protective film layer.
  • the protective film layer is not particularly restricted providing that it can be peeled away from the adhesive agent surface prior to the hot lamination of the copper foil without adversely affecting the form of the adhesive-backed tape.
  • a coating material comprising an aforesaid adhesive agent composition dissolved in a solvent is applied onto an insulating film such as a polyimide which meets the requirements of the present invention, and then dried. It is preferred that the application be carried out so that there is formed an adhesive agent layer film thickness of 5 to 125 ⁇ m.
  • the drying conditions are preferably 1 to 5 minutes at 100–200° C.
  • the solvent is not particularly restricted but a solvent mixture of an aromatic such as toluene or xylene and an alcohol such as methanol or ethanol is favourably employed.
  • the compatibility is generally poor and the haze value of the adhesive agent is raised.
  • the compatibility is generally poor and the haze value of the adhesive agent is raised.
  • a protective film is laminated to the film obtained in this way, and then finally the film is slit to a specified width and the adhesive-backed tape obtained.
  • 3–35 ⁇ m electrolytic or rolled copper foil is laminated to the adhesive-backed tape sample from (1) under conditions comprising 110–180° C., 30 N/cm and 1 m/min. Where required, a stepwise hot curing treatment is carried out for 1 to 24 hours at 80–300° C. in an air oven and the copper-clad laminate produced. In such circumstances, device holes and solder ball holes may be introduced into the adhesive-backed tape sample prior to the copper-foil cladding.
  • a photoresist film is formed on the copper foil surface of the copper-clad laminate obtained in (2), and then etching, removal of the resist, electrolytic gold plating and solder resist film formation carried out, and a semiconductor connecting substrate (patterned tape) produced ( FIG. 1 ).
  • an integrated circuit is connected onto the patterned tape from (3) using an epoxy type die-bond material. Furthermore, die bonding is carried out for 3 seconds at 110–250° C. on the reverse face and, optionally, the die-bond material is cured. Next, under conditions comprising 110–200° C. and 60–110 kHz, wirebonding connection is effected. Finally, by sealing based on an epoxy sealing resin and solder ball connection stages, an FP-BGA type semiconductor device is obtained ( FIG. 2 ).
  • the die-bond material there may also be used adhesive tape with 10–100 ⁇ m adhesive agent layers on both faces of an insulating film such as polyimide which satisfies the requirements of the present invention.
  • the press bonding onto the patterned tape and the IC press bonding are preferably carried out for about 0.5 to 5 seconds at 80–200° C.
  • a stepwise hot curing treatment may be carried out for 1–24 hours at 80–300° C., and the adhesive agent cured.
  • the insulating film layer was immersed in water at 23° C. for 24 hours, and the change in weight of the insulating film layer before and after immersion measured, and then calculation carried out using the following formula.
  • water absorption (%) (weight after immersion ⁇ weight before immersion)/weight before immersion (6) Thermal Conductivity
  • the heat diffusivity was measured by cutting out a disc-shaped sample of diameter about 10 mm and thickness 50 ⁇ m, then coating both faces by sputtering platinum, after which both faces were given about a 1 ⁇ m coating with a carbon spray to blacken the faces, and then measurement carried out by the laser flash method at 150° C.
  • the heat capacity was calculated from the product of the density and the specific heat.
  • the density was measured by the Archimedes method at 23° C.
  • the specific heat was measured by DSC (Differential Scanning Calorimetry) at a rate of temperature rise of 10° C./min, and there was employed the specific heat measured at 150° C.
  • Layers of adhesive agent were superimposed to give a thickness of about 200 ⁇ m, and then a sequential curing treatment carried out for 4 hours at 80° C., 5 hours at 100° C. and 4 hours at 160° C. in an air oven, and a cured film of the adhesive obtained.
  • E′ storage elastic modulus
  • a film of cured adhesive agent was prepared in the same way as in (8) and used as the test-piece. This was fitted to a TMA device and the dimensional change in the test-piece over the range 25–150° C. read-off under conditions of 2 g loading and 20° C./min rate of temperature rise, after which calculation was performed using the following formula.
  • linear expansion coefficient (1 /° C .) ( L 1 ⁇ L 0 )/ L 0 (150 ⁇ 25)
  • the measurement sample an adhesive agent sheet comprising a PET film of thickness 25 ⁇ m on which had been coated a 12 ⁇ m adhesive agent layer. Furthermore, as a reference sample, there was used the uncoated PET film (25 ⁇ m).
  • the diffuse transmittance and the total luminous transmittance were measured. The haze (ratio of diffuse transmittance to total luminous transmittance) for the reference sample was determined and taken as 0 (standard). Next, the diffuse transmittance and total luminous transmittance of the adhesive sheet were measured, and the haze for just the adhesive agent layer alone determined.
  • a 20 mm square IC was press bonded onto the patterned tape prepared in (11) using an epoxy die-bonding material (“LE-5000” produced by Lintech), and then hot curing carried out for 30 minutes at 160° C. in this state.
  • an epoxy die-bonding material (“LE-5000” produced by Lintech)
  • resin sealing was performed.
  • the solder balls were attached by reflow and the semiconductor device used for evaluation obtained.
  • 18 ⁇ m electrolytic copper foil was laminated to the adhesive-backed tape under conditions of 140° C., 30 N/cm and 1 m/min.
  • the sample was cut to a width of 35 mm ⁇ 200 mm and a sequential curing treatment carried out in an air oven for 4 hours at 80° C., 5 hours at 100° C. and 4 hours at 160° C., and the sample used for evaluation of the warping obtained.
  • the measurement of warping was carried out after conditioning for 24 hours at 23° C. and 55% RH based on SEMI-G76-0299. With one edge of the sample pressed down, using vernier callipers the height on the other side of an upwardly warping sample was measured and this was taken as the amount of warping (where the copper foil curved upwards, this was taken as plus).
  • the copper foil side of the warping evaluation sample produced in (13) was subjected to photoresist film formation, etching, resist elimination and electrolytic gold plating, and an evaluation sample produced.
  • the area of the adhesive was taken as 100
  • the area of the conductor regions was 30.
  • the measurement of the warping was carried out in the same way as in (13).
  • a round hole (0.3 mm diameter) was introduced from the protective film side into a sample of the adhesive agent sheet with a protective film/adhesive agent layer/organic insulating film structure.
  • the protective film had been removed, the condition of the adhesive agent layer at the hole circumference was observed. Where there were splits or gaps in adhesive agent layer, or where there was separation from the organic insulating film, the punchability was regarded as poor.
  • polyamide reaction product was prepared by adding together mixtures of these acids/amine, antifoaming agent and up to 1% phosphoric acid catalyst. These were subjected to thermal polymerization at 205° C. and, following standard procedure, antioxidant then added, after which the polyamide resin was removed.
  • the four types of polyamide resin shown in Table 1 were obtained by suitable adjustment of the acid/amine component ratio and the polymerization time.
  • polyimide film L was prepared having the properties shown in Table 3.
  • the polyamide resins prepared in Reference Example 1 and the other starting materials shown in Table 1 were dissolved in the proportions shown in Table 2 in a solvent mixture of methanol/monochlorobenzene at a solids concentration of 20 wt %, and adhesive agent solutions prepared.
  • the polyamide resin was stirred for 5 hours at 70° C., then the epoxy resin was added and stirring continued for a further 3 hours.
  • the solution temperature was reduced to 30° C. and, while stirring, the phenolic resin and curing accelerator were added in turn and stirring carried out for 5 hours, to produce the adhesive agent solution.
  • the adhesive agent solution was applied, so as to give a thickness after drying of about 12 ⁇ m, onto polyethylene terephthalate film (Lumirror, produced by Toray Industries) of thickness 25 ⁇ m as a protective film, then drying carried out for 1 minute at 100° C. and 5 minutes at 160° C., to prepare adhesive agent sheets I, II, III and V. Furthermore, the adhesive agents sheets obtained were laminated under conditions of 120° C. and 0.1 MPa to the polyimide films A–H, K, L and M prepared in Reference Example 2, and to aforesaid films N, I, J, R and S. and also to aramid film O and liquid crystal polymer film P, and adhesive-backed tapes produced.
  • Table 3 show the combinations of adhesive agent sheet and polyimide film, and the properties of the adhesive-backed tapes obtained. Next, by the methods described in aforesaid Evaluation Methods (11) to (16), patterned tape and semiconductor device preparation and evaluation were carried out. The results are shown in Table 3.
  • adhesive sheet was prepared from this adhesive agent solution. Furthermore, using the polyimide film A prepared in Reference Example 2, an adhesive-backed tape, patterned tape and a semiconductor device were prepared by the aforesaid methods. The properties obtained are shown in Table 3.
  • the polyamide resins prepared in Reference Example 1 and the other starting materials indicated in Table 1 were dissolved in the proportions shown in Table 2 in a solvent mixture of methanol/monochlorobenzene to give a solids concentration of 20 wt %, and adhesive agent solutions prepared.
  • the polyamide resin was stirred for 5 hours at 70° C., then the epoxy resin was added and stirring continued for a further 3 hours.
  • the solution temperature was reduced to 30° C. and, while stirring, the phenolic resin and curing accelerator were added in turn and stirring carried out for 5 hours, to produce the adhesive agent solution.
  • the adhesive agent solution was applied, so as to give a thickness following drying of about 18 ⁇ m, on polyethylene terephthalate film (Lumirror, produced by Toray Industries) of thickness 25 ⁇ m as a protective film, then drying carried out for 1 minute at 100° C. and 5 minutes at 160° C., to prepare the adhesive agent sheet.
  • polyethylene terephthalate film Limirror, produced by Toray Industries
  • the adhesive agent sheet obtained was laminated under identical conditions to the polyimide film A prepared in Reference Example 2, and an adhesive-backed tape produced.
  • the properties of the adhesive-backed tape obtained are shown in Table 3.
  • a patterned tape and semiconductor device were prepared and evaluated by the aforesaid methods. The results are shown in Table 3.
  • the present invention offers, on an industrial basis, an adhesive-backed tape suitable for the production of semiconductor devices where there is employed a film-form adhesive agent such as in the case of the patterned tape used in tape automated bonding (TAB), the semiconductor connecting substrate such as an interposer used for a ball grid array (BGA) package, die bonding materials, lead frame fixing tape, LOC tape, the interlayer adhesive sheets of a multilayer substrate and the like, employed when mounting semiconductor integrated circuits; and to a copper-clad laminate, semiconductor connecting substrate and semiconductor device employing same.
  • a film-form adhesive agent such as in the case of the patterned tape used in tape automated bonding (TAB), the semiconductor connecting substrate such as an interposer used for a ball grid array (BGA) package, die bonding materials, lead frame fixing tape, LOC tape, the interlayer adhesive sheets of a multilayer substrate and the like, employed when mounting semiconductor integrated circuits; and to a copper-clad laminate, semiconductor connecting substrate and semiconductor device employing same.
  • Adhesive Agent Props hase 10 18 0 1 3 6 3 3 38 25 40 30 18 elastic 25° C. 1050 1250 1360 1550 1200 1000 1100 1100 100 150 300 350 400 modulus 110 Hz [MPa] 150° C.

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Cited By (7)

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Publication number Priority date Publication date Assignee Title
US20050233504A1 (en) * 2003-03-06 2005-10-20 Masato Doi Device transfer method and display apparatus
US20090041990A1 (en) * 2005-09-09 2009-02-12 Showa Denko K.K. Method for attachment of solder powder to electronic circuit board and soldered electronic circuit board
US20090056977A1 (en) * 2005-03-29 2009-03-05 Showa Denkok.K. Production method of solder circuit board
US8109432B2 (en) 2005-07-11 2012-02-07 Showa Denko K.K. Method for attachment of solder powder to electronic circuit board and solder-attached electronic circuit board
US9293387B2 (en) 2010-07-28 2016-03-22 Nitto Denko Corporation Film for flip chip type semiconductor back surface, dicing tape-integrated film for semiconductor back surface, process for producing semiconductor device, and flip chip type semiconductor device
US9831212B2 (en) * 2013-10-01 2017-11-28 Rohm Co., Ltd. Semiconductor device
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US20030190466A1 (en) * 2002-04-03 2003-10-09 Katsuji Nakaba Adhesive sheet for producing semiconductor devices
US7005729B2 (en) * 2002-04-24 2006-02-28 Intel Corporation Device packaging using tape automated bonding (TAB) strip bonded to strip carrier frame
JP3952196B2 (ja) * 2003-06-25 2007-08-01 信越化学工業株式会社 フレキシブル金属箔ポリイミド積層板の製造方法
JP4397653B2 (ja) * 2003-08-26 2010-01-13 日東電工株式会社 半導体装置製造用接着シート
US7132158B2 (en) * 2003-10-22 2006-11-07 Olin Corporation Support layer for thin copper foil
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Citations (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4868050A (en) * 1987-02-27 1989-09-19 Ube Industries, Ltd. Interleaf-containing, fiber-reinforced epoxy resin prepreg
US5365113A (en) * 1987-06-30 1994-11-15 Hitachi, Ltd. Semiconductor device
US5406124A (en) * 1992-12-04 1995-04-11 Mitsui Toatsu Chemicals, Inc. Insulating adhesive tape, and lead frame and semiconductor device employing the tape
JPH07278258A (ja) 1994-04-11 1995-10-24 Hitachi Chem Co Ltd 熱硬化性樹脂組成物、接着剤シート、接着剤付き金属はく、ポリイミドフィルム及び金属はく張りポリイミドフィルム
JPH08174659A (ja) 1994-12-22 1996-07-09 Kanegafuchi Chem Ind Co Ltd Ｔａｂ用テープの製造方法
JPH08335654A (ja) 1995-06-08 1996-12-17 Nec Corp 半導体装置
US5593774A (en) * 1993-05-26 1997-01-14 Hitachi Cable, Ltd. Insulating film with improved punching characteristics and lead frame using the same
US5739263A (en) * 1992-06-04 1998-04-14 Sumitomo Bakelite Company Limited Film adhesive and process for production thereof
JPH10107093A (ja) 1996-04-02 1998-04-24 Toray Ind Inc 半導体装置用接着剤付きテープおよびそれを用いた銅張り積層板、半導体接続用基板ならびに半導体装置
JPH10178054A (ja) 1996-10-15 1998-06-30 Toray Ind Inc 半導体集積回路接続用基板およびそれを構成する部品ならびに半導体装置
JPH11233567A (ja) 1998-02-12 1999-08-27 Toray Ind Inc 半導体装置用接着剤付きテープおよびそれを用いた銅張り積層板、半導体接続用基板ならびに半導体装置
US6031068A (en) * 1997-10-23 2000-02-29 Kanegafuchi Kagaku Kogyo Kabushiki Kaisha Polyimide composition and base tape for TAB carrier tape and flexible printed circuit board made from said composition
JP2000129001A (ja) * 1998-10-21 2000-05-09 Ube Ind Ltd ポリイミド樹脂成形体
JP2000174073A (ja) 1998-12-01 2000-06-23 Kanegafuchi Chem Ind Co Ltd Ｔａｂ用テープ
JP2000208563A (ja) 1999-01-11 2000-07-28 Ube Ind Ltd フィルムキャリアテ―プ
US6217996B1 (en) 1998-02-27 2001-04-17 Ube Industries, Ltd. Aromatic polyimide film and its composite sheet
US6265042B1 (en) 1997-09-17 2001-07-24 Tomoegawa Paper Co., Ltd. Adhesive tape for electronic parts
US6303219B1 (en) * 1996-02-19 2001-10-16 Toray Industries, Inc. Adhesive sheet for semiconductor connecting substrate, adhesive-backed tape for tab, adhesive-backed tape for wire-bonding connection, semiconductor connecting substrate, and semiconductor device
US6335571B1 (en) * 1997-07-21 2002-01-01 Miguel Albert Capote Semiconductor flip-chip package and method for the fabrication thereof
US20020072145A1 (en) * 2000-08-04 2002-06-13 Naotaka Tanaka Semiconductor device

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10138318A (ja) * 1996-09-13 1998-05-26 Ube Ind Ltd 多層押出しポリイミドフィルムの製法
JP3580128B2 (ja) * 1998-04-17 2004-10-20 宇部興産株式会社 金属箔積層フィルムの製法
JP3815912B2 (ja) * 1999-01-11 2006-08-30 宇部興産株式会社 Ｌｏｃ用テ−プ

Patent Citations (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4868050A (en) * 1987-02-27 1989-09-19 Ube Industries, Ltd. Interleaf-containing, fiber-reinforced epoxy resin prepreg
US5365113A (en) * 1987-06-30 1994-11-15 Hitachi, Ltd. Semiconductor device
US5742101A (en) * 1987-06-30 1998-04-21 Hitachi, Ltd. Semiconductor device
US5739263A (en) * 1992-06-04 1998-04-14 Sumitomo Bakelite Company Limited Film adhesive and process for production thereof
US5406124A (en) * 1992-12-04 1995-04-11 Mitsui Toatsu Chemicals, Inc. Insulating adhesive tape, and lead frame and semiconductor device employing the tape
US5593774A (en) * 1993-05-26 1997-01-14 Hitachi Cable, Ltd. Insulating film with improved punching characteristics and lead frame using the same
US5837368A (en) * 1993-05-26 1998-11-17 Hitachi Cable, Ltd. Insulating film with improved punching characteristics and lead frame using the same
JPH07278258A (ja) 1994-04-11 1995-10-24 Hitachi Chem Co Ltd 熱硬化性樹脂組成物、接着剤シート、接着剤付き金属はく、ポリイミドフィルム及び金属はく張りポリイミドフィルム
JPH08174659A (ja) 1994-12-22 1996-07-09 Kanegafuchi Chem Ind Co Ltd Ｔａｂ用テープの製造方法
JPH08335654A (ja) 1995-06-08 1996-12-17 Nec Corp 半導体装置
US6303219B1 (en) * 1996-02-19 2001-10-16 Toray Industries, Inc. Adhesive sheet for semiconductor connecting substrate, adhesive-backed tape for tab, adhesive-backed tape for wire-bonding connection, semiconductor connecting substrate, and semiconductor device
JPH10107093A (ja) 1996-04-02 1998-04-24 Toray Ind Inc 半導体装置用接着剤付きテープおよびそれを用いた銅張り積層板、半導体接続用基板ならびに半導体装置
JPH10178054A (ja) 1996-10-15 1998-06-30 Toray Ind Inc 半導体集積回路接続用基板およびそれを構成する部品ならびに半導体装置
US6335571B1 (en) * 1997-07-21 2002-01-01 Miguel Albert Capote Semiconductor flip-chip package and method for the fabrication thereof
US6265042B1 (en) 1997-09-17 2001-07-24 Tomoegawa Paper Co., Ltd. Adhesive tape for electronic parts
US6031068A (en) * 1997-10-23 2000-02-29 Kanegafuchi Kagaku Kogyo Kabushiki Kaisha Polyimide composition and base tape for TAB carrier tape and flexible printed circuit board made from said composition
JPH11233567A (ja) 1998-02-12 1999-08-27 Toray Ind Inc 半導体装置用接着剤付きテープおよびそれを用いた銅張り積層板、半導体接続用基板ならびに半導体装置
US6217996B1 (en) 1998-02-27 2001-04-17 Ube Industries, Ltd. Aromatic polyimide film and its composite sheet
JP2000129001A (ja) * 1998-10-21 2000-05-09 Ube Ind Ltd ポリイミド樹脂成形体
JP2000174073A (ja) 1998-12-01 2000-06-23 Kanegafuchi Chem Ind Co Ltd Ｔａｂ用テープ
JP2000208563A (ja) 1999-01-11 2000-07-28 Ube Ind Ltd フィルムキャリアテ―プ
US20020072145A1 (en) * 2000-08-04 2002-06-13 Naotaka Tanaka Semiconductor device

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
Supplementary European Search Report (Jan. 28, 2005).

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050233504A1 (en) * 2003-03-06 2005-10-20 Masato Doi Device transfer method and display apparatus
US20090056977A1 (en) * 2005-03-29 2009-03-05 Showa Denkok.K. Production method of solder circuit board
US8123111B2 (en) 2005-03-29 2012-02-28 Showa Denko K.K. Production method of solder circuit board
US8109432B2 (en) 2005-07-11 2012-02-07 Showa Denko K.K. Method for attachment of solder powder to electronic circuit board and solder-attached electronic circuit board
US20090041990A1 (en) * 2005-09-09 2009-02-12 Showa Denko K.K. Method for attachment of solder powder to electronic circuit board and soldered electronic circuit board
US10515801B2 (en) 2007-06-04 2019-12-24 Micron Technology, Inc. Pitch multiplication using self-assembling materials
US9293387B2 (en) 2010-07-28 2016-03-22 Nitto Denko Corporation Film for flip chip type semiconductor back surface, dicing tape-integrated film for semiconductor back surface, process for producing semiconductor device, and flip chip type semiconductor device
US9831212B2 (en) * 2013-10-01 2017-11-28 Rohm Co., Ltd. Semiconductor device
US10109611B2 (en) * 2013-10-01 2018-10-23 Rohm Co., Ltd. Semiconductor device

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TW594891B (en) 2004-06-21
JP4665298B2 (ja) 2011-04-06
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EP1249863A4 (en) 2005-03-16
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KR100602537B1 (ko) 2006-07-20
ATE380393T1 (de) 2007-12-15
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WO2002017379A1 (fr) 2002-02-28
HK1051441A1 (en) 2003-08-01

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