US5113093A - Semiconductor integrated circuit with multiple operation - Google Patents

Semiconductor integrated circuit with multiple operation Download PDF

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Publication number
US5113093A
US5113093A US07/550,604 US55060490A US5113093A US 5113093 A US5113093 A US 5113093A US 55060490 A US55060490 A US 55060490A US 5113093 A US5113093 A US 5113093A
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US
United States
Prior art keywords
operational mode
control information
reset input
mode control
mode
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Expired - Lifetime
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US07/550,604
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English (en)
Inventor
Tetsu Tashiro
Minoru Takeuchi
Yoshiyuki Ishimaru
Shinichi Hirose
Kazuo Hayashi
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Mitsubishi Electric Corp
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Mitsubishi Electric Corp
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Assigned to MITSUBISHI DENKI KABUSHIKI KAISHA reassignment MITSUBISHI DENKI KABUSHIKI KAISHA ASSIGNMENT OF ASSIGNORS INTEREST. Assignors: HAYASHI, KAZUO, HIROSE, SHINICHI, ISHIMARU, YOSHIYUKI, TAKEUCHI, MINORU, TASHIRO, TETSU
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/31701—Arrangements for setting the Unit Under Test [UUT] in a test mode
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate

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  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Theoretical Computer Science (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Quality & Reliability (AREA)
  • Microcomputers (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Dram (AREA)
US07/550,604 1989-07-11 1990-07-10 Semiconductor integrated circuit with multiple operation Expired - Lifetime US5113093A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP1-178417 1989-07-11
JP1178417A JP2650124B2 (ja) 1989-07-11 1989-07-11 半導体集積回路

Publications (1)

Publication Number Publication Date
US5113093A true US5113093A (en) 1992-05-12

Family

ID=16048134

Family Applications (1)

Application Number Title Priority Date Filing Date
US07/550,604 Expired - Lifetime US5113093A (en) 1989-07-11 1990-07-10 Semiconductor integrated circuit with multiple operation

Country Status (5)

Country Link
US (1) US5113093A (ko)
EP (1) EP0408353B1 (ko)
JP (1) JP2650124B2 (ko)
KR (1) KR940005203B1 (ko)
DE (1) DE69031671T2 (ko)

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5412260A (en) * 1991-05-03 1995-05-02 Lattice Semiconductor Corporation Multiplexed control pins for in-system programming and boundary scan state machines in a high density programmable logic device
US5606714A (en) * 1991-12-06 1997-02-25 National Semiconductor Corporation Integrated data processing system including CPU core and parallel, independently operating DSP module and having multiple operating modes
US5608341A (en) * 1995-05-09 1997-03-04 Level One Communications, Inc. Electrical circuit for setting internal chip functions without dedicated configuration pins
US5724603A (en) * 1993-10-13 1998-03-03 Nec Corporation Single-chip microcomputer with asynchronously accessible user designed circuit
US5926504A (en) * 1995-06-05 1999-07-20 Level One Communications, Inc. Electrical circuit for selectively connecting a repeater to a DTE port
US5978943A (en) * 1996-06-28 1999-11-02 Brother Kogyo Kabushiki Kaisha Application specified integrated circuit with user programmable logic circuit
US6107874A (en) * 1997-01-23 2000-08-22 Nec Corporation Semiconductor integrated circuit device produced from master slice and having operation mode easily changeable after selection on master slice
US6603331B1 (en) * 2001-12-18 2003-08-05 Xilinx, Inc. Low-voltage non-degenerative transmitter circuit
US20060279325A1 (en) * 2005-05-03 2006-12-14 Oki Electric Industry Co., Ltd. Input circuit for mode setting
US20070150769A1 (en) * 2005-12-27 2007-06-28 Hynix Semiconductor Inc. Apparatus and method for controlling active cycle of semiconductor memory apparatus
US20070159210A1 (en) * 2005-12-23 2007-07-12 Kabushiki Kaisha Toshiba Operation mode setting circuit, LSI having operation mode setting circuit, and operation mode setting method

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5396639A (en) * 1991-09-16 1995-03-07 Rohm Co., Ltd. One chip microcomputer having programmable I/O terminals programmed according to data stored in nonvolatile memory
SE505556C2 (sv) * 1995-12-21 1997-09-15 Ericsson Telefon Ab L M Förfarande för inställning av en integrerad krets i ett förutbestämt av minst två skilda driftlägen samt integrerad krets

Citations (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4350906A (en) * 1978-06-23 1982-09-21 Rca Corporation Circuit with dual-purpose terminal
EP0084247A2 (en) * 1981-12-29 1983-07-27 Fujitsu Limited Operation mode setting circuitry for microprocessor
JPS6031641A (ja) * 1983-08-02 1985-02-18 Nippon Denso Co Ltd ワンチツプマイクロコンピユ−タ
US4504926A (en) * 1981-04-21 1985-03-12 Tokyo Shibaura Denki Kabushiki Kaisha Mode setting control system
JPS62118567A (ja) * 1985-11-19 1987-05-29 Oki Electric Ind Co Ltd 半導体装置及びその製造方法
US4816665A (en) * 1987-08-06 1989-03-28 Maxtor Corporation Sensor array for focus detection
JPH01130394A (ja) * 1987-11-17 1989-05-23 Mitsubishi Electric Corp 半導体記憶装置
US4907203A (en) * 1987-11-19 1990-03-06 Mitsubishi Denki Kabushiki Kaisha Semiconductor memory device with changeable word organization modes including a test mode
US4910710A (en) * 1987-11-25 1990-03-20 Nec Corporation Input circuit incorporated in a semiconductor device
US4940909A (en) * 1989-05-12 1990-07-10 Plus Logic, Inc. Configuration control circuit for programmable logic devices
US4982113A (en) * 1988-12-16 1991-01-01 Nec Corporation Signal distributing unit for various input signals different in voltage level
US4987325A (en) * 1988-07-13 1991-01-22 Samsung Electronics Co., Ltd. Mode selecting circuit for semiconductor memory device
US4990800A (en) * 1987-12-30 1991-02-05 Samsung Electronics Co., Ltd. Mode selector for use in semiconductor memory device

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61292755A (ja) * 1985-06-20 1986-12-23 Fujitsu Ltd 半導体集積回路
JPS62118557A (ja) * 1985-11-19 1987-05-29 Ricoh Co Ltd 半導体集積回路装置のモ−ド切換え回路
JPH0682405B2 (ja) * 1986-01-14 1994-10-19 カシオ計算機株式会社 テストプログラム起動方式
JPS63298173A (ja) * 1987-05-29 1988-12-05 Matsushita Electric Ind Co Ltd 集積回路

Patent Citations (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4350906A (en) * 1978-06-23 1982-09-21 Rca Corporation Circuit with dual-purpose terminal
US4504926A (en) * 1981-04-21 1985-03-12 Tokyo Shibaura Denki Kabushiki Kaisha Mode setting control system
EP0084247A2 (en) * 1981-12-29 1983-07-27 Fujitsu Limited Operation mode setting circuitry for microprocessor
JPS6031641A (ja) * 1983-08-02 1985-02-18 Nippon Denso Co Ltd ワンチツプマイクロコンピユ−タ
JPS62118567A (ja) * 1985-11-19 1987-05-29 Oki Electric Ind Co Ltd 半導体装置及びその製造方法
US4816665A (en) * 1987-08-06 1989-03-28 Maxtor Corporation Sensor array for focus detection
JPH01130394A (ja) * 1987-11-17 1989-05-23 Mitsubishi Electric Corp 半導体記憶装置
US4970727A (en) * 1987-11-17 1990-11-13 Mitsubishi Denki Kabushiki Kaisha Semiconductor integrated circuit having multiple self-test functions and operating method therefor
US4907203A (en) * 1987-11-19 1990-03-06 Mitsubishi Denki Kabushiki Kaisha Semiconductor memory device with changeable word organization modes including a test mode
US4910710A (en) * 1987-11-25 1990-03-20 Nec Corporation Input circuit incorporated in a semiconductor device
US4990800A (en) * 1987-12-30 1991-02-05 Samsung Electronics Co., Ltd. Mode selector for use in semiconductor memory device
US4987325A (en) * 1988-07-13 1991-01-22 Samsung Electronics Co., Ltd. Mode selecting circuit for semiconductor memory device
US4982113A (en) * 1988-12-16 1991-01-01 Nec Corporation Signal distributing unit for various input signals different in voltage level
US4940909A (en) * 1989-05-12 1990-07-10 Plus Logic, Inc. Configuration control circuit for programmable logic devices

Non-Patent Citations (10)

* Cited by examiner, † Cited by third party
Title
Data Book of Mitsubishi Semiconductor, 1986, Mitsubishi. *
IBM Tech. Disc. Bulletin, vol. 30, No. 9, Feb. 1988, NY., N.Y., pp. 187 188. *
IBM Tech. Disc. Bulletin, vol. 30, No. 9, Feb. 1988, NY., N.Y., pp. 187-188.
Motorola Semiconductor Technical Data, 1985, Motorola. *
Pat. Abst. of Japan, vol. 11, No. 338, Nov. 5, 1987 & JP A 62 118567 (Ricoh) May 29, 1987. *
Pat. Abst. of Japan, vol. 11, No. 338, Nov. 5, 1987 & JP-A-62 118567 (Ricoh) May 29, 1987.
Pat. Abst. of Japan, vol. 23, No. 377 (P 922) 8/22/89 & JP A 1 130394 (Mitsubishi) May 23, 1989. *
Pat. Abst. of Japan, vol. 23, No. 377 (P-922) 8/22/89 & JP-A-1 130394 (Mitsubishi) May 23, 1989.
Pat. Abst. of Japan, vol. 9, No. 156 (P 368) (1879) Jun. 29, 1985 & JP A 60 031641 (Nippon Denso K.K.) Feb. 18, 1985. *
Pat. Abst. of Japan, vol. 9, No. 156 (P-368) (1879) Jun. 29, 1985 & JP-A-60 031641 (Nippon Denso K.K.) Feb. 18, 1985.

Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5412260A (en) * 1991-05-03 1995-05-02 Lattice Semiconductor Corporation Multiplexed control pins for in-system programming and boundary scan state machines in a high density programmable logic device
US5606714A (en) * 1991-12-06 1997-02-25 National Semiconductor Corporation Integrated data processing system including CPU core and parallel, independently operating DSP module and having multiple operating modes
US5724603A (en) * 1993-10-13 1998-03-03 Nec Corporation Single-chip microcomputer with asynchronously accessible user designed circuit
US5608341A (en) * 1995-05-09 1997-03-04 Level One Communications, Inc. Electrical circuit for setting internal chip functions without dedicated configuration pins
US5926504A (en) * 1995-06-05 1999-07-20 Level One Communications, Inc. Electrical circuit for selectively connecting a repeater to a DTE port
US5978943A (en) * 1996-06-28 1999-11-02 Brother Kogyo Kabushiki Kaisha Application specified integrated circuit with user programmable logic circuit
US6107874A (en) * 1997-01-23 2000-08-22 Nec Corporation Semiconductor integrated circuit device produced from master slice and having operation mode easily changeable after selection on master slice
US6603331B1 (en) * 2001-12-18 2003-08-05 Xilinx, Inc. Low-voltage non-degenerative transmitter circuit
US20060279325A1 (en) * 2005-05-03 2006-12-14 Oki Electric Industry Co., Ltd. Input circuit for mode setting
US7557604B2 (en) * 2005-05-03 2009-07-07 Oki Semiconductor Co., Ltd. Input circuit for mode setting
US20070159210A1 (en) * 2005-12-23 2007-07-12 Kabushiki Kaisha Toshiba Operation mode setting circuit, LSI having operation mode setting circuit, and operation mode setting method
US20070150769A1 (en) * 2005-12-27 2007-06-28 Hynix Semiconductor Inc. Apparatus and method for controlling active cycle of semiconductor memory apparatus
US7711969B2 (en) * 2005-12-27 2010-05-04 Hynix Semiconductor Inc. Apparatus and method for controlling active cycle of semiconductor memory apparatus

Also Published As

Publication number Publication date
EP0408353B1 (en) 1997-11-05
JPH0342732A (ja) 1991-02-22
KR910003798A (ko) 1991-02-28
JP2650124B2 (ja) 1997-09-03
EP0408353A3 (en) 1992-01-02
EP0408353A2 (en) 1991-01-16
DE69031671D1 (de) 1997-12-11
KR940005203B1 (ko) 1994-06-13
DE69031671T2 (de) 1998-06-04

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