US3924113A - Electron beam registration system - Google Patents

Electron beam registration system Download PDF

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Publication number
US3924113A
US3924113A US368384A US36838473A US3924113A US 3924113 A US3924113 A US 3924113A US 368384 A US368384 A US 368384A US 36838473 A US36838473 A US 36838473A US 3924113 A US3924113 A US 3924113A
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Prior art keywords
signal
noise
electronic memory
registration
memory
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Expired - Lifetime
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US368384A
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English (en)
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Charles D Gill
Philip M Ryan
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International Business Machines Corp
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International Business Machines Corp
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Priority to US368384A priority Critical patent/US3924113A/en
Priority to FR7414309A priority patent/FR2240484B1/fr
Priority to CA198,075A priority patent/CA1009766A/en
Priority to IT21992/74A priority patent/IT1010161B/it
Priority to GB1945374A priority patent/GB1427695A/en
Priority to DE2424313A priority patent/DE2424313C2/de
Priority to JP49056794A priority patent/JPS5248060B2/ja
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Publication of US3924113A publication Critical patent/US3924113A/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/30—Electron-beam or ion-beam tubes for localised treatment of objects
    • H01J37/304—Controlling tubes by information coming from the objects or from the beam, e.g. correction signals
    • H01J37/3045—Object or beam position registration
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof

Definitions

  • the method disclosed herein is a system of processing the signals encountered during beam References Cited contact with the registration marks on the chip usually UNITED STATES PATENTS at the four corners thereof, whereby the location of 3,328,795 6/1967 Hallmark 343/7 the marks is accurately.
  • the final step utilizes a least squares 3,717,756 2/1973 Stilt 235/150.53 X curve fitting procedure tuned up to extract the essen 13312125 ill??? 35111121 525.iliiiijjaiiflifiii Ptttttttttt that. the 0t ttt 3777133 -l2/l973 Beck et a] u 343/100 CL correlation, with a minimum of on-line computation. 3,823,398 7/1974 Horton et al. 343/5 DP Primary Examiner-Edward J. Wise Attorney, Agent, or Firm-Daniel E.
  • FIG. 1 A A first figure.
  • the invention relates to the utilization of an electron beam to fornr patterns properly registered with respect to previously generated electron beam patterns on semiconductor chips delineated on semiconductor substrates. For each chip to which the beam is applied, the position of the chip in registration to a predetermined prior pattern is determined to control the position of the electron beam and insure that the desired pattern is formed on each of the chips separately and in proper relation to one another.
  • the beam is in certain cases, stepped in raster type movement from one predetermined position to another to form the desired patterns. Accordingly, it is necessary that the position of the material to which the beam is to be applied be determined in relation to the position of the beam and the writing position of the beam modified in accordance therewith.
  • US. Pat. No. 3,644,700 entitled The Method and apparatus for Controlling an Electron Beam discloses the use of a square shaped electron beam in a stepped or raster fashion from one predetermined position to another to form a desired pattern on each chip of a semiconductor wafer to which the beam is applied.
  • each chip to which the beam is applied the position of the chip relative to a predetermined position is determined and the distance in these positions is utilized to control the position of the electron beam to insure that the desired pattern is formed on each of the chips separately.
  • the position of the beam is periodically checked against a calibration grid to ascertain any deviations in the beam from its original position. These differences are applied to properly position the beam.
  • the foregoing and other objects are accomplished by scanning previously established registration marks on semiconductor chips or other workpieces with a beam of electrons and monitoring the reflected or back-scattered electrons so as to detect where the beam crosses or encounters the said marks, wherein the said backscattered or reflected electrons are detected in a signal having a minimum noise ratio followed by a rapid cross-correlation between the average signal and a standard or ideal signal having the specially desired characteristics of signal configuration followed by the final step of employing least square curve fitting procedure to extract the essential parameter, i.e., the center of the cross-correlation with a minimum of on-line computation.
  • This process may also be described as a method for determining the exact location in time of a signal [x (t+t,,) n(t)] where x consists of k repetitions of a signal of known shape of specified periodicity and t is an unknown displacement (time-shift) whose value is to be found, and n is a noise process generally assumed to be white Gaussian noise although less stringent assumptions are possible.
  • the mechanism in which this process is applied allows the translation of the time-shift whose value is determined by the process into a geometrical displacement, which is then applied to controlling the deflection of the electron beam.
  • FIG. 1A is a cross-sectional illustration of a silicon semiconductor substrate having an SiO passivating layer containing a registration mark or groove, and a photoresist layer overlaying said oxide layer;
  • FIG. 1B is an idealized representation of a noiseless back-scattered or reflected electron signal
  • FIG. 1C represents the type of noise corrupted signal encountered from back-scattered or reflected electrons without the application of the method herein disclosed;
  • FIG. 2 is a flow diagram illustrating the method for processing the signal illustrated in FIG. IC;
  • FIG. 3 is a comparative functional flow diagram illustrating the method.
  • a radar pulse may have a wavelength of ten cm. and a duration of one usec, thus making it about 1,000 ft. long consisting a little less 3,000 cycles.
  • Radar of this type has an accuracy in the area of about ten feet. That is, the target is located to within 20 or 30 cycles in the train of from 2,000 to 3,000 cycles after averaging over a number of scans.
  • the sample rate must be at least twice as high as the highest significant signal frequency present in the spectrum of signal pulse noise. In practice, about ten times the said highest frequency in the signal is considered to be about the minimum sample rate. It is also considered that the sample interval should be not less than about five times the precision to which the center is to be found.
  • FIG. 1A is a cross-sectional illustration of a semiconductor chip 3 having a coating of photoresist illustrated at l and a layer of silicon dioxide on the surface thereof illustrated at 2 and having a registration mark indentation designated as 4.
  • the back-scatter or reflected electrons produce a signal illustrated by FIG.
  • FIG. 1C which contains the signal plus the noise associated with the back-scatter.
  • FIG. 1B is an illustration of an idealized representation of a noiseless back-scatter signal. It will be seen from the ensuing description that the invention described herein processes a signal characterized and illustrated by FIG. 1C to produce a signal comparable to that shown in FIG. 1B and the ultimate extraction of the center of the original signal.
  • FIG. 2 one observes an apparatus assembly for processing the signal as illustrated in FIG. 1C.
  • a small linear memory is provided having in the neighborhood of 200 to 400 words of ten bits each controlled by a memory address register and readwrite enable lines, and adder typically 12 bits wide.
  • the aforesaid pieces are associated with an analog to digital converter and designated as A/D in FIG. 2, typically digitizing the registration signal to about a six bit precision.
  • a shift register also shown in FIG. 2 and typically 200 to 400 bits long and one bit wide, associated with various gates and a controlling clock. It is obviously apparent that the memory could be replaced with a shift register of the same dimensions.
  • the memory and the address register are cleared, the control gate is conditioned to pass the memory output directly to one leg of the adder, and the multiplexer (MPLX) is conditioned to accept the output of the analog to digital converter for the other leg of the adder.
  • MPLX multiplexer
  • the A/D is triggered supplying one reading to the adder.
  • the corresponding entry in the memory is gated to the other adder input, and the sum is written back into the same address in memory.
  • the memory address register is incremented by one or decremented by one on alternating back and forth sweeps.
  • the clock is advanced and another sample triggered.
  • the memory contains a digital representation of the averaged signal.
  • the first phase or process step is terminated after a fixed number of scans, as in this particular application of electron beam registration, or by adding a significance detector to the adder and proceeding to the next phase after a specified number of sums in the memory has reached a significant value.
  • Other methods of terminating of this type of processing are readily apparent from the foregoing, including modifications of this preferred embodiment combination.
  • the second processing step is data extraction by cross-correlation.
  • the technique of cross-correlation has been used to extract intelligence from noisy data.
  • the defining equation for the cross-correlation of two signals X and Y is lim
  • the shift register contains the ideal signal of is and OS in the position for computing the first point of crosscorrelation function.
  • the address register is initialized to 0 while the multiplex gate is conditioned to accept data from the output of the adder which is initialized to 0 at the start of each pass through memory.
  • the gate in the output channel is disabled until the last step of each pass through memory.
  • the write enable is off to prevent results from being over-written in the memory.
  • the final cross-correlation at each point would be written into the memory instead of gated to the output channel for the aforesaid gate.
  • the address register would be conditioned and the write en- 6 able would be activated once after each pass through memory. A small amount of additional control logic would be required for an approach of this nature.
  • One full pass through memory is made for each point of the cross-correlation.
  • the shift register is circulated one position and the leading bit fed into gate.
  • the next sequential word of memory is read out and passes gate to the adder if the bit from the shift register is a 1; otherwise, control gate presents a 0 to the adder.
  • the adder sums its present output with the value on each successive clock cycle from the control gate, outputting the new sum.
  • the next" word of memory is either added into the running sum or not, depending on the next" bit in the shift register being 1 or 0.
  • the final sum is gated to the output register via the out register gate, a bit is raised to signal the channel that a data word is available, the summer output and address register are reinitialized to O, and the ideal binary signal is shifted one sample position relative to the averaged signal in memory. Then another complete pass through memory is initiated to generate the second point on the cross-correlation function. As each point of the crosscorrelation is completed, it is gated to the channel via the output register for input to a computer, which will complete the third phase of the registration. in this application, it appears that some l20 points on the crosscorrelation function will suffice for locating the two extrema expected.
  • the shift register is made two bits wide and each bit controls a gate from memory to an adder similar to the gate previously described. The only difference is that the memory word is shifted one bit left in going through one of the gates. This results in each sample in memory being weighted by 0, l, 2 or 3 instead of just 0 or I. This gives better amplitude definition of the ideal signal, at the cost of additional complexity of control, another adder, and increased cycle time.
  • the final step of signal fit and center extraction is accomplished by obtaining the mark center from the cross-correlation function by analysis of the cross-correlation function near the points of maximum and of minimum value.
  • a small amount of noise in the cross-correlation could lead to a substantial error in selecting the points of maximum and minimum correlation, thus rendering ineffective the determination of the mark center.
  • a least squares fit of a low degree polynomial utilizes all the information available from the cross-correlation function, and produces an accurate, non-quantized value for the center with a relatively small amount of computation.
  • the set of points may be selected as those lying in the region from half a nominal pulse width to the left of the maximum to half a pulse width to the right of the minimum, or else a fixed length sample may be chosen to bracket the minimum and maximum.
  • the second approach is more computationally convenient.
  • the apparatus illustrated in FIG. 2 can be assembled from components readily available and will sample and average the incoming signal at a rate well in excess of IOMhz. With a 256-sample window and 16 averaging sweeps over the registration marks, the operations of data assemblage can be completed in less than 500 usec. In practice, the operations can be run even faster than IOMhz, but assuming conservatively that each access-gate-add cycle of this cross-correlation function requires 100 nsec, one can get one point on the crosscorrelation function every 26 usec. Available channels can accept data at this rate.
  • a reasonable value for the number of points needed on the cross'correlation function is about 120, so the time from start to finish of the sampling, averaging, cross-correlation and transfer operations is under 4 msec.
  • a reasonable number for N. the number of sample points in the crosscorrelation actually to be used in the least squares fit is 80.
  • the integer arithmetic to perform these operations is primarily the calculation of the S,-, and can be performed in something less than msec. Assuming 4 marks each of two axes requires 8 complete registration computations. Since the acquisition and computation can be 8 overlapped for all but the first acquisition, total registration time can be kept below msec. This procedure, then, is technically feasible and a cost estimate of the equipment illustrated in the drawings reveals moderate hardware cost well within feasibility.
  • the construction of the binary valued cross-correlating signal and its use in extracting useful data from the noisy ensembled-average signal is a highly effective means of avoiding uncertainties to the registration mark width variations and simultaneously enabling very fast signal analysis utilizing known apparatus.
  • the use of the shift register shown in FIG. 2 and control gate at the left adder leg is a means for performing cross-correlation of two signals in a fast and accurate manner.
  • the procedure of polynomial least-squares fits to represent experimental data is a method of relatively common usage but for this particular method in registering work pieces or semiconductor chips, the method or procedure has been modified so that no on-line solution of simultaneous equations is required, and only half of the polynomial coefficients need be calculated as previously illustrated in the specification.
  • the combination of the functions of the ensembleaveraging and of cross-correlation is achieved in a unique and simple, inexpensive manner, in accordance with the apparatus and equipment illustrated in FIG. 2.
  • the variation of the cross-correlation method to allow a weighting of the cross correlating signal which allows better definition of its shape is a new means of achieving high speed cross-correlation without multiplication and without requiring one of the signals to be purely binary.
  • a method for extracting the true position of a random noise corrupted signal with respect to a pre-determined signal comprising multiple sampling of said random noise corrupted signal and adding corresponding points of said multiple samples and cross correlating said added samples with said pre-determined signal and extracting from a suitable portion of said cross-correlation an expression capable of determining the center of the original random noise corrupted signal.
  • noise-corrupted signal emanates from back-scattered electrons of a beam of charged particles.
  • a method of registering a sweeping beam relative to an object bearing a registration mark or marks representing a reference position on said object comprising serially scanning said registration mark or marks with a beam of charged particles and adding corresponding points of each scan of a resulting current of back-scatter particles and storing the sum in a memory and crosscorrelating the stored scan sum with an ideal signal and extracting from a suitable portion of the cross-correlation an expression capable of determining the center of the original noise-corrupted signal.
  • said center of the original noise-corrupted signal is determined by a least square curve fitting technique.
  • Apparatus for providing the true position of a noise corrupted signal comprising:
  • adder means operatively associated with and responsive to said means for sampling, said adding means also being operatively associated with and responsive to binary signals provided by an electronic memory;
  • said adder means adding the data contained in a selected address of memory to the sampled noise corrupted signal and providing said result to the said same selected address of electronic memory;
  • a second electronic memory storing a predetermined binary pattern
  • gating means electrically connected between said first electronic memory and said adding means for transferring data from said first electronic memory to said adding means under the control of said second electronic memory
  • output means for providing the output of said adding means to a computing means for determining the center of a waveform representative of the binary output of said adding means.
  • Apparatus for locating the precise position of registration marks on a semiconductor substrate comprising:
  • adder means operatively associated with and responsive to said means for sampling, said adding means also being operatively associated with and responsive to binary signals provided by an electronic memory;
  • said adder means adding the data contained in a selected address of memory to the sampled noise corrupted signal and providing said result to the said same selected address of electronic memory;
  • a second electronic memory storing a predetermined binary pattern
  • gating means electrically connected between said first electronic memory and said adding means for transferring data from said first electronic memory to said adding means under the control of said second electronic memory;
  • output means for providing the output of said adding means to a computing means for determining the center of a waveform representative of the binary output of said adding means.

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Analytical Chemistry (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electron Beam Exposure (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Radar Systems Or Details Thereof (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
US368384A 1973-06-08 1973-06-08 Electron beam registration system Expired - Lifetime US3924113A (en)

Priority Applications (7)

Application Number Priority Date Filing Date Title
US368384A US3924113A (en) 1973-06-08 1973-06-08 Electron beam registration system
FR7414309A FR2240484B1 (enrdf_load_stackoverflow) 1973-06-08 1974-04-12
CA198,075A CA1009766A (en) 1973-06-08 1974-04-19 Electron beam registration system
IT21992/74A IT1010161B (it) 1973-06-08 1974-04-29 Sistema perfezionato di registra zione di un fascio di elettroni
GB1945374A GB1427695A (en) 1973-06-08 1974-05-03 Signal processing system
DE2424313A DE2424313C2 (de) 1973-06-08 1974-05-18 Meßverfahren zum genauen Ermitteln des zeitlichen Mittelpunktes von stark verrauschten elektrischen Signalen und Anordnung zur Durchführung des Verfahrens
JP49056794A JPS5248060B2 (enrdf_load_stackoverflow) 1973-06-08 1974-05-22

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JP (1) JPS5248060B2 (enrdf_load_stackoverflow)
CA (1) CA1009766A (enrdf_load_stackoverflow)
DE (1) DE2424313C2 (enrdf_load_stackoverflow)
FR (1) FR2240484B1 (enrdf_load_stackoverflow)
GB (1) GB1427695A (enrdf_load_stackoverflow)
IT (1) IT1010161B (enrdf_load_stackoverflow)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4387433A (en) * 1980-12-24 1983-06-07 International Business Machines Corporation High speed data interface buffer for digitally controlled electron beam exposure system
US4405989A (en) * 1980-03-24 1983-09-20 Anelva Corporation Spectral monitoring device for both plasma etching and sputtering
US4546260A (en) * 1983-06-30 1985-10-08 International Business Machines Corporation Alignment technique
FR2586506A1 (fr) * 1985-08-20 1987-02-27 Primat Didier Procede et dispositif optique et electronique pour assurer la decoupe automatique de plaques
DE3735154A1 (de) * 1986-10-17 1988-05-11 Canon Kk Verfahren und einrichtung zum ermitteln der lage eines objektes
US4803644A (en) * 1985-09-20 1989-02-07 Hughes Aircraft Company Alignment mark detector for electron beam lithography
US10566169B1 (en) 2008-06-30 2020-02-18 Nexgen Semi Holding, Inc. Method and device for spatial charged particle bunching
US11335537B2 (en) 2008-06-30 2022-05-17 Nexgen Semi Holding, Inc. Method and device for spatial charged particle bunching

Families Citing this family (10)

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Publication number Priority date Publication date Assignee Title
FR2320665A1 (fr) * 1975-08-04 1977-03-04 Telecommunications Sa Perfectionnements aux filtres electromecaniques passe-bande de frequences
JPS5315076A (en) * 1976-07-28 1978-02-10 Nippon Telegr & Teleph Corp <Ntt> Electron beam position detection method
JPS5319764A (en) * 1976-08-09 1978-02-23 Nippon Telegr & Teleph Corp <Ntt> Mark detection system in electron beam exposure
DE2702448C2 (de) * 1977-01-20 1982-12-16 Siemens AG, 1000 Berlin und 8000 München Verfahren zur Positionierung eines mit einer Marke versehenen Werkstückes relativ zu einem Abtastfeld bzw. zu einer Maske
DE2846316A1 (de) * 1978-10-24 1980-06-04 Siemens Ag Verfahren und vorrichtung zur automatischen ausrichtung von zwei aufeinander einzujustierenden objekten
JPS57106130A (en) * 1980-12-24 1982-07-01 Jeol Ltd Detecting method for mark
JPS57122517A (en) * 1981-01-22 1982-07-30 Nippon Telegr & Teleph Corp <Ntt> Alignment mark detector for electron beam exposure
JPS58122725A (ja) * 1982-01-14 1983-07-21 Nippon Telegr & Teleph Corp <Ntt> ビ−ム形状測定装置
JPH0724256B2 (ja) * 1987-08-13 1995-03-15 日本電子株式会社 サイズ測定装置
DE102015117693A1 (de) * 2015-10-16 2017-04-20 Ald Vacuum Technologies Gmbh Verfahren zur Bestimmung der sich verändernden Lage des Auftreffpunktes eines energetischen Strahles auf einer begrenzten Fläche

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US3745317A (en) * 1970-05-04 1973-07-10 Commissariat Energie Atomique System for generating the fourier transform of a function
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US3823398A (en) * 1971-12-03 1974-07-09 Canadian Patents Dev Radar cross correlator

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US3328795A (en) * 1959-11-18 1967-06-27 Ling Temco Vought Inc Fixtaking means and method
US3329813A (en) * 1964-08-25 1967-07-04 Jeol Ltd Backscatter electron analysis apparatus to determine elemental content or surface topography of a specimen
US3535516A (en) * 1966-10-17 1970-10-20 Hitachi Ltd Electron microscope employing a modulated scanning beam and a phase sensitive detector to improve the signal to noise ratio
US3614736A (en) * 1968-05-21 1971-10-19 Ibm Pattern recognition apparatus and methods invariant to translation, scale change and rotation
US3646333A (en) * 1969-12-12 1972-02-29 Us Navy Digital correlator and integrator
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Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4405989A (en) * 1980-03-24 1983-09-20 Anelva Corporation Spectral monitoring device for both plasma etching and sputtering
US4387433A (en) * 1980-12-24 1983-06-07 International Business Machines Corporation High speed data interface buffer for digitally controlled electron beam exposure system
US4546260A (en) * 1983-06-30 1985-10-08 International Business Machines Corporation Alignment technique
FR2586506A1 (fr) * 1985-08-20 1987-02-27 Primat Didier Procede et dispositif optique et electronique pour assurer la decoupe automatique de plaques
US4803644A (en) * 1985-09-20 1989-02-07 Hughes Aircraft Company Alignment mark detector for electron beam lithography
DE3735154A1 (de) * 1986-10-17 1988-05-11 Canon Kk Verfahren und einrichtung zum ermitteln der lage eines objektes
DE3735154C2 (de) * 1986-10-17 1994-10-20 Canon Kk Verfahren zum Erfassen der Lage einer auf einem Objekt vorgesehenen Marke
US10566169B1 (en) 2008-06-30 2020-02-18 Nexgen Semi Holding, Inc. Method and device for spatial charged particle bunching
US11335537B2 (en) 2008-06-30 2022-05-17 Nexgen Semi Holding, Inc. Method and device for spatial charged particle bunching
US11605522B1 (en) 2008-06-30 2023-03-14 Nexgen Semi Holding, Inc. Method and device for spatial charged particle bunching
US11699568B2 (en) 2008-06-30 2023-07-11 NextGen Semi Holding, Inc. Method and device for spatial charged particle bunching
US12068130B2 (en) 2008-06-30 2024-08-20 Nexgen Semi Holding, Inc. Method and device for spatial charged particle bunching

Also Published As

Publication number Publication date
DE2424313C2 (de) 1984-03-01
DE2424313A1 (de) 1975-01-02
FR2240484A1 (enrdf_load_stackoverflow) 1975-03-07
IT1010161B (it) 1977-01-10
CA1009766A (en) 1977-05-03
JPS5248060B2 (enrdf_load_stackoverflow) 1977-12-07
JPS5023782A (enrdf_load_stackoverflow) 1975-03-14
FR2240484B1 (enrdf_load_stackoverflow) 1976-06-25
GB1427695A (en) 1976-03-10

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