US3924113A

US3924113A - Electron beam registration system

Info

Publication number: US3924113A
Application number: US368384A
Authority: US
Inventors: Charles D Gill; Philip M Ryan
Original assignee: International Business Machines Corp
Current assignee: International Business Machines Corp
Priority date: 1973-06-08
Filing date: 1973-06-08
Publication date: 1975-12-02
Anticipated expiration: 1992-12-02
Also published as: CA1009766A; JPS5248060B2; GB1427695A; DE2424313C2; FR2240484A1; IT1010161B; FR2240484B1; DE2424313A1; JPS5023782A

Abstract

In semiconductor manufacture, very accurate patterns must be formed in the photoresist on the surface of the semiconductor material. Chips are formed on a semiconductor wafer utilizing a beam of charged particles to expose the photoresist material on the surface of the semiconductor. If the plurality of chips, is to have the same characteristics and pattern, it is necessary that the electrons or beam of charged particles be moved such that any point within the field to which the beam is applied is always reached by the same history. This requires that patterns produced by an electron beam be properly registered with respect to previously generated patterns. This registration is accomplished by scanning previously placed registration marks on the chip with a beam of electrons and monitoring the reflected or back-scattered electrons to determine where the beam crosses said registration marks. The method disclosed herein is a system of processing the signals encountered during beam contact with the registration marks on the chip usually at the four corners thereof, whereby the location of the marks is accurately determined. This is accomplished by first improving the signal to noise ratio of the detected signal followed by a rapid crosscorrelation between the averaged signal and another signal having certain specific and especially desirable characteristics. The final step utilizes a least squares curve fitting procedure tuned up to extract the essential parameter, that is the center of the cross-correlation, with a minimum of on-line computation.

Description

United States Patent Gill et al. Dec. 2, 1975 [54l ELECTRON BEAM REGISTRATION [57] ABSTRACT SYSTEM In semiconductor manufacture, very accurate patterns l l lnvemorsi Charles Gill, Pleasant y; must be formed in the photoresist on the surface of Philip Ryan, Hopewell Junction, the semiconductor material. Chips are formed on a both Of semiconductor wafer utilizing a beam of charged par- [73] Assignee: International Business Machines tides tO'eXPOSe the photoresist mateiial on h surface Corporation, Armonk Y of the semiconductor. If the plurality of chips, is to have the same characteristics and pattern, it is necesl l Filedi J n 8. 1973 sary that the electrons or beam of charged particles be [21] Appl No: 368,384 moved such that any point within the field to which the beam 18 applied is always reached by the same history. This requires that patterns produced by an elecl l tron beam be properly registered with respect to pre- 235/156; 32 /77 4 viously generated patterns. This registration is accom- [51] Int. Cl. G06F 15/34; HOiJ 37/28 plighed by canning previously placed registration i 1 Field Of Search 324/57 PS, 77 G; marks on the chip with a beam of electrons and moni- 8 5 56, 50-53, 15 .3; 250/370, toring the reflected or back-scattered electrons to de- 37l, 307, 310, 311; 343/5 5 5 MM, 5 termine where the beam crosses said registration SC marks. The method disclosed herein is a system of processing the signals encountered during beam References Cited contact with the registration marks on the chip usually UNITED STATES PATENTS at the four corners thereof, whereby the location of 3,328,795 6/1967 Hallmark 343/7 the marks is accurately. determined This is accom' 3,3298l3 7/1967 Hashimom" 250/3Q7 plished by first improving the signal to noise ratio of 35355, 10/1970 250/310 the detected signal followed by a rapid cross- 3,6l4,736 10/1971 McLaughlin et al i. 235/181 X correlation between the averaged signal and another 3,644,899 2/1972 Boisvert. r

340/172-5 signal having certain specific and especially desirable 3646333 2/1972 Pryor, characteristics. The final step utilizes a least squares 3,717,756 2/1973 Stilt 235/150.53 X curve fitting procedure tuned up to extract the essen 13312125 ill??? 35111121 525.iliiiijjaiiflifiii Ptttttttttt that. the 0t ttt 3777133 -l2/l973 Beck et a] u 343/100 CL correlation, with a minimum of on-line computation. 3,823,398 7/1974 Horton et al. 343/5 DP Primary Examiner-Edward J. Wise Attorney, Agent, or Firm-Daniel E. Igo; Theodore E. Galanthay 14 Claims, 5 Drawing Figures CLOCK BACK SCAT T ER l SIGNAL X S R S REGISTER A/D MEMORY ENABLES is CONTROL OR on. GATE MPLX SHIFT REGISTER ADDER I i OUT REG i OUT REG CPU CHANNEL U.S. Patent DEC. 2, 1975 ShGet 1 01 2 3,924,113

FIG. 1 A

CLOCK BACK SCATTER T I SIGNAL TORRES REGISTER A/D MEMORY ENABLES F r V CONTROL 0R CTL GATE MPLX SHIFT i i REGISTER v ADDER GATE ou REG i OUT REG CPU CHANNEL FIG. 2

Patent Dec. 2, 1975 SET ENSEMBLE SUM Si=0 i=1,2,-N

I AGOUIRE A SET OF READINGS r i=1,2,-N

UPDATE ENSEMBLE SUM Si =S +ri I=1,2,N

N0 HAVE ENOUGH SETS OF YES READINGS BEEN TAKEN? Sheet 2 of 2 SIGNAL bi INITIALIZE BINARY CORRELATION T=1,2---N' i=1 GENERATE A POINT OF THE CROSS- I 'CORRELATION FUNCTION FIG-.3

SHIFT THE bi ONEPLAGE TO HAVE ENOUGH NO YES 1 5". CROSS-CORRELATION POINTS x BEENGOMPUTED? I DETERMINE INDIGES OF MAX & MIN VALUES OF Xj CHOOSE STARTING INDEX A SUGH THAT INTERVAL OF M POINTS EVENLY BRACKETS THE MAX A MIN GOMPUTE G5 AND 02 OF LEAST- SOUARES GUBIC POLYNOMIAL FIT TO THE BRAGKETED SEGMENT OF THE GROSS-CORRELATION POINT OF INFLEGTION IS (32/303 cu'mc FIT TO x IINFLECTION POINT ELECTRON BEAM REGISTRATION SYSTEM BACKGROUND OF THE INVENTION 1. Field of the Invention The invention relates to the utilization of an electron beam to fornr patterns properly registered with respect to previously generated electron beam patterns on semiconductor chips delineated on semiconductor substrates. For each chip to which the beam is applied, the position of the chip in registration to a predetermined prior pattern is determined to control the position of the electron beam and insure that the desired pattern is formed on each of the chips separately and in proper relation to one another.

To insure that patterns formed by the electron beam on a chip are sharp and that the width of each line of the pattern is controlled to its desired size, the beam is in certain cases, stepped in raster type movement from one predetermined position to another to form the desired patterns. Accordingly, it is necessary that the position of the material to which the beam is to be applied be determined in relation to the position of the beam and the writing position of the beam modified in accordance therewith.

US. Pat. No. 3,644,700 entitled The Method and apparatus for Controlling an Electron Beam" discloses the use of a square shaped electron beam in a stepped or raster fashion from one predetermined position to another to form a desired pattern on each chip of a semiconductor wafer to which the beam is applied. In this teaching, each chip to which the beam is applied, the position of the chip relative to a predetermined position is determined and the distance in these positions is utilized to control the position of the electron beam to insure that the desired pattern is formed on each of the chips separately. Furthermore, the position of the beam is periodically checked against a calibration grid to ascertain any deviations in the beam from its original position. These differences are applied to properly position the beam. Similarly, it is known to provide an automatically centering system for an electron beam on a given workpiece by registering the beam of an emission registration or target area adjacent to the workpiece. The beam, swept across the registration area in a sinusoidal pattern, produces secondary emission which is detected to produce an output error of voltage when the beam is off center. The error voltage is used to realign the beam on center.

2. Description of the Prior art Prior art registration of an electron beam is accomplished manually by scanning the beam over a circuitry semiconductor wafer surface and monitoring the position of the mask according to the display on the scanned area. However, the hand method is laborious and time consuming. Likewise, previously in the use of electron beam machines, considerable inconvenience was experienced in centering the beam for the initial setup at the start of each beam operating cycle. When the common prior art method of centering the beam consisted of positioning a suitable target such as a Tungsten disk under the beam at the location where the work was to be performed. it was accomplished by hand and the beam allowed to impinge on the Tungsten and a point of impingement was observed visually through an optical system sometimes comprising a microscope. It is obvious that these prior art methods are inadequate in view of the present state of mean for mass production of semiconductor components when it is necessary to determine both rapidly, that is in the order of 10 milliseconds and accurately, that is in the order of one microinch, the location of several points, for example, on the four corners of the chip within the beams field of view to properly register one chip to another and thus form appropriate patterns on each successive chip.

SUMMARY OF THE INVENTION It is the object of this invention to provide a method wehereby an electron beam is utilized to form patterns on a semiconductor chip properly registered with respect to a previously generated pattern.

It is another object of this invention to accurately register semiconductor workpieces for an electron beam exposure.

It is a further object of this invention to provide a highly rapid and accurate method for locating registration marks on semiconductor workpieces which are about to be subjected to electron beam exposure.

It is still a further object of this invention to provide a method for processing electron back-scatter signals tolerant of low signal-to-noise ratio in the back-scattered signal.

The foregoing and other objects are accomplished by scanning previously established registration marks on semiconductor chips or other workpieces with a beam of electrons and monitoring the reflected or back-scattered electrons so as to detect where the beam crosses or encounters the said marks, wherein the said backscattered or reflected electrons are detected in a signal having a minimum noise ratio followed by a rapid cross-correlation between the average signal and a standard or ideal signal having the specially desired characteristics of signal configuration followed by the final step of employing least square curve fitting procedure to extract the essential parameter, i.e., the center of the cross-correlation with a minimum of on-line computation.

This process may also be described as a method for determining the exact location in time of a signal [x (t+t,,) n(t)] where x consists of k repetitions of a signal of known shape of specified periodicity and t is an unknown displacement (time-shift) whose value is to be found, and n is a noise process generally assumed to be white Gaussian noise although less stringent assumptions are possible. The mechanism in which this process is applied allows the translation of the time-shift whose value is determined by the process into a geometrical displacement, which is then applied to controlling the deflection of the electron beam.

The following other objects, features and advantages of the invention will be apparent from the following more particular description of preferred embodiments of the invention as illustrated in the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1A is a cross-sectional illustration of a silicon semiconductor substrate having an SiO passivating layer containing a registration mark or groove, and a photoresist layer overlaying said oxide layer;

FIG. 1B is an idealized representation of a noiseless back-scattered or reflected electron signal;

FIG. 1C represents the type of noise corrupted signal encountered from back-scattered or reflected electrons without the application of the method herein disclosed;

FIG. 2 is a flow diagram illustrating the method for processing the signal illustrated in FIG. IC;

FIG. 3 is a comparative functional flow diagram illustrating the method.

DESCRIPTION OF THE PREFERRED EMBODIMENTS Typically, in order to write patterns with an electron beam, properly registered with respect to a previously generated pattern, it is necessary to determine both rapidly, in the order ofa tenth of one second, and accurately, in the order of one microinch, the location of several points located on the workpiece or semiconductor substrate, as the case may be, for example, at the four corners of the chip within the beams field of view. This is accomplished by scanning registration marks on the chip with a beam of electrons and monitoring the reflected or back-scattered electrons to detect where the beam crosses the marks. These marks are usually grooves or strips within the oxide surface of a semiconductor chip. The detection of the center of an oxide strip from such backscatter measurements is comparable to that of detecting radar targets in the presence of noise, except that the relative precision required is much greater in this situation. For example, a radar pulse may have a wavelength of ten cm. and a duration of one usec, thus making it about 1,000 ft. long consisting a little less 3,000 cycles. Radar of this type has an accuracy in the area of about ten feet. That is, the target is located to within 20 or 30 cycles in the train of from 2,000 to 3,000 cycles after averaging over a number of scans.

The sample rate must be at least twice as high as the highest significant signal frequency present in the spectrum of signal pulse noise. In practice, about ten times the said highest frequency in the signal is considered to be about the minimum sample rate. It is also considered that the sample interval should be not less than about five times the precision to which the center is to be found.

In the registration of semiconductor chips for electron beam exposure, a scan of from two to four marks within an area of one to two mils and scans from 20 to 40 usec, produces a signal having from two to four cycles. This center must be found with an accuracy of about two microinches, that is within 0.005 cycle, in a train of two to four cycles after averaging over a num' ber of scans. FIG. 1A is a cross-sectional illustration of a semiconductor chip 3 having a coating of photoresist illustrated at l and a layer of silicon dioxide on the surface thereof illustrated at 2 and having a registration mark indentation designated as 4. Upon exposure of a mark of this nature to an electron beam, the back-scatter or reflected electrons produce a signal illustrated by FIG. 1C which contains the signal plus the noise associated with the back-scatter. FIG. 1B is an illustration of an idealized representation of a noiseless back-scatter signal. It will be seen from the ensuing description that the invention described herein processes a signal characterized and illustrated by FIG. 1C to produce a signal comparable to that shown in FIG. 1B and the ultimate extraction of the center of the original signal.

Referring to FIG. 2, one observes an apparatus assembly for processing the signal as illustrated in FIG. 1C. Typically, a small linear memory is provided having in the neighborhood of 200 to 400 words of ten bits each controlled by a memory address register and readwrite enable lines, and adder typically 12 bits wide. The aforesaid pieces are associated with an analog to digital converter and designated as A/D in FIG. 2, typically digitizing the registration signal to about a six bit precision. Similarly, in combination with the aforesaid apparatus, is a shift register (also shown in FIG. 2) and typically 200 to 400 bits long and one bit wide, associated with various gates and a controlling clock. It is obviously apparent that the memory could be replaced with a shift register of the same dimensions. Nevertheless, in the application of an electron beam registration, it is well to utilize the memory as illustrated to allow back and forth scans of the signal thereby reducing the effect of bandwidth limitations in the detection circuits. Similarly, it is advisable to scan the work in the forward and back-sweeping motion because it is easier to follow this motion by running the address register up and down than to design a bidirectional shift register.

Typically, as the back-scatter signal is received, the memory and the address register are cleared, the control gate is conditioned to pass the memory output directly to one leg of the adder, and the multiplexer (MPLX) is conditioned to accept the output of the analog to digital converter for the other leg of the adder. At the start of each clock cycle, the A/D is triggered supplying one reading to the adder. The corresponding entry in the memory is gated to the other adder input, and the sum is written back into the same address in memory. Then, the memory address register is incremented by one or decremented by one on alternating back and forth sweeps. The clock is advanced and another sample triggered. Each time the memory address register reaches one end or the other of the memory, one full sweep has been completed and the direction of the registration scan and of the address incrementation is reversed. As succeeding scans continue, the values are recorded in the memory buildup so that each word is the summation of all samples of the signal encountered at specific points in a scan. This effectively averages out even the band-limited noise having approximately the same spectrum as the signal, which cannot be eliminated with an ordinary filter.

When a sufficient number of scans has been made, the memory contains a digital representation of the averaged signal. The first phase or process step is terminated after a fixed number of scans, as in this particular application of electron beam registration, or by adding a significance detector to the adder and proceeding to the next phase after a specified number of sums in the memory has reached a significant value. Other methods of terminating of this type of processing are readily apparent from the foregoing, including modifications of this preferred embodiment combination.

The second processing step is data extraction by cross-correlation. The technique of cross-correlation has been used to extract intelligence from noisy data. The defining equation for the cross-correlation of two signals X and Y is lim For digital signal processing, naturally, the discrete sample version of this relation is used. An important special case is where Y is a noise-corrupted version of X with an unknown shift in time, that is y(t)=x(t+l,,) "(1) where t is a time offset and n(r) is some kind of noise process.

Under appropriate assumptions regarding n (stationary, zero-mean white noise is sufficient), it can be shown that E (duty (1)) has a maximum at r=t,,,,where E is the expected value operator. This means that if a noise-corrupted version of a signal is slid along beside the ideal version of that signal, one expects to find the greatest degree of match when there is no time shift between the two (r=t,,).

The application of the aforesaid technique to backscatter measurements will allow one to determine the ideal signal expected from the detectors, to crosscorrelate with the signal actually received and use the maximum of the cross-correlation function to determine the mark or registration groove center. This approach and solution becomes rather cumbersome and impractical because the width of the registration marks in the oxide and the spacing between the positive and negative pulses in the back-scatter signal is affected by prior semiconductor processing steps. Etching affects strip width within the neighborhood of i percent. The centers of the marks are not significantly affected but the edge position may be modified and hence the pulse positions are affected. The use of an averaged ideal signal based on the intended mark width produces a cross-correlation function without a sharp maximum and indeed multiple maxima can result and the resulting registration becomes ineffective. This particular drawback is eliminated in accordance with the present method by cross-correlating the back-scattered signal with an artificial uni-polar pulse train containing one pulse for each pair expected in the back-scatter signal. The cross-correlation then has two extrema, one maximum and one minimum in the region of uncertainty. The two extrema are then used to locate the center of the registration independent of the mark width variations.

Further, the integral, or the defining sum in the discrete case, requires much multiplication of these two signals. This is costly in time and equipment and existing smaller computer machines are one or two orders of magnitude too slow to accomplish the computation in a timely fashion.

This type of deficiency disappears in accordance with the method herein disclosed by forcing the artificial pulse train to be rectangular with base line 0 and up level 1. The base line width is chosen primarily upon the width of the back-scatter pulses and secondarily on the signal-to-noise ratio in the average back-scatter signal. The many multiplications and additions required for a general cross-correlation are thus reduced to a smaller number of additions. Where a true cross-correlation requires n additions and n multiplications, this procedure takes about one-half n additions and no multiplications.

The shift register contains the ideal signal of is and OS in the position for computing the first point of crosscorrelation function. The address register is initialized to 0 while the multiplex gate is conditioned to accept data from the output of the adder which is initialized to 0 at the start of each pass through memory. The gate in the output channel is disabled until the last step of each pass through memory. The write enable is off to prevent results from being over-written in the memory.

In a modification of this type of manipulation, the final cross-correlation at each point would be written into the memory instead of gated to the output channel for the aforesaid gate. In this particular case, the address register would be conditioned and the write en- 6 able would be activated once after each pass through memory. A small amount of additional control logic would be required for an approach of this nature.

One full pass through memory is made for each point of the cross-correlation. At each cycle of the clock, the shift register is circulated one position and the leading bit fed into gate. The next sequential word of memory is read out and passes gate to the adder if the bit from the shift register is a 1; otherwise, control gate presents a 0 to the adder. The adder sums its present output with the value on each successive clock cycle from the control gate, outputting the new sum. The next" word of memory is either added into the running sum or not, depending on the next" bit in the shift register being 1 or 0. On completion of the full pass through memory, the final sum is gated to the output register via the out register gate, a bit is raised to signal the channel that a data word is available, the summer output and address register are reinitialized to O, and the ideal binary signal is shifted one sample position relative to the averaged signal in memory. Then another complete pass through memory is initiated to generate the second point on the cross-correlation function. As each point of the crosscorrelation is completed, it is gated to the channel via the output register for input to a computer, which will complete the third phase of the registration. in this application, it appears that some l20 points on the crosscorrelation function will suffice for locating the two extrema expected.

In a variation of the cross-correlation step heretofore described, the shift register is made two bits wide and each bit controls a gate from memory to an adder similar to the gate previously described. The only difference is that the memory word is shifted one bit left in going through one of the gates. This results in each sample in memory being weighted by 0, l, 2 or 3 instead of just 0 or I. This gives better amplitude definition of the ideal signal, at the cost of additional complexity of control, another adder, and increased cycle time.

The technique of simply selecting the point of maximum correlation produces very coarse quantization of position and some type of interpolation is required. This obvious drawback is avoided by the method disclosed in this specification, and explained in the following detailed description of the third step in the method.

The final step of signal fit and center extraction is accomplished by obtaining the mark center from the cross-correlation function by analysis of the cross-correlation function near the points of maximum and of minimum value. One mightaccomplish this simply by averaging the coordinates of maximum and minimum cross-correlation and assuming this average as the center. Aside from being subject to an unacceptably large quantization error, it is clear from a glance that a small amount of noise in the cross-correlation could lead to a substantial error in selecting the points of maximum and minimum correlation, thus rendering ineffective the determination of the mark center.

A least squares fit of a low degree polynomial utilizes all the information available from the cross-correlation function, and produces an accurate, non-quantized value for the center with a relatively small amount of computation.

Where the mark is narrow enough so the positive and negative pulses blend into each other, it is appropriate to fit a cubic equation. The set of points may be selected as those lying in the region from half a nominal pulse width to the left of the maximum to half a pulse width to the right of the minimum, or else a fixed length sample may be chosen to bracket the minimum and maximum. The second approach is more computationally convenient.

The derivation of the least squares equations is known. The general polynomial case yields: [A]C] S] where:

u Kill c the coefficients of the polynomial fit and where N is the number of points fitted and n is the order of the polynomial. For a fixed number of samples with even spacing, it is possible to compute A ahead of time, so the coefficients can be found as without on-line matrix inversion. Further, only the point of antisymmetry of the cubic is required, so only the ratio of the two leading coefficients of the polynomial is required. This leads to some further computational reduction.

Where the mark is wide and the pulses are widely separated relative to pulse width, it is necessary to fit each of the two major peaks of the cross-correlation function separately, determine their axes of symmetry separately, then average them to find the center. Two parabolic fits can be made on two sets of points; the number of points in each set may be fixed in advance, and depends primarily on the ratio of pulse width to sample spacing and secondarily on the signal-to-noise ratio in the cross-correlation function.

The apparatus illustrated in FIG. 2 can be assembled from components readily available and will sample and average the incoming signal at a rate well in excess of IOMhz. With a 256-sample window and 16 averaging sweeps over the registration marks, the operations of data assemblage can be completed in less than 500 usec. In practice, the operations can be run even faster than IOMhz, but assuming conservatively that each access-gate-add cycle of this cross-correlation function requires 100 nsec, one can get one point on the crosscorrelation function every 26 usec. Available channels can accept data at this rate. A reasonable value for the number of points needed on the cross'correlation function is about 120, so the time from start to finish of the sampling, averaging, cross-correlation and transfer operations is under 4 msec. A reasonable number for N. the number of sample points in the crosscorrelation actually to be used in the least squares fit is 80. The integer arithmetic to perform these operations is primarily the calculation of the S,-, and can be performed in something less than msec. Assuming 4 marks each of two axes requires 8 complete registration computations. Since the acquisition and computation can be 8 overlapped for all but the first acquisition, total registration time can be kept below msec. This procedure, then, is technically feasible and a cost estimate of the equipment illustrated in the drawings reveals moderate hardware cost well within feasibility.

The construction of the binary valued cross-correlating signal and its use in extracting useful data from the noisy ensembled-average signal is a highly effective means of avoiding uncertainties to the registration mark width variations and simultaneously enabling very fast signal analysis utilizing known apparatus. The use of the shift register shown in FIG. 2 and control gate at the left adder leg is a means for performing cross-correlation of two signals in a fast and accurate manner.

The procedure of polynomial least-squares fits to represent experimental data is a method of relatively common usage but for this particular method in registering work pieces or semiconductor chips, the method or procedure has been modified so that no on-line solution of simultaneous equations is required, and only half of the polynomial coefficients need be calculated as previously illustrated in the specification. Similarly, the combination of the functions of the ensembleaveraging and of cross-correlation is achieved in a unique and simple, inexpensive manner, in accordance with the apparatus and equipment illustrated in FIG. 2. The variation of the cross-correlation method to allow a weighting of the cross correlating signal which allows better definition of its shape is a new means of achieving high speed cross-correlation without multiplication and without requiring one of the signals to be purely binary.

While the invention has been particularly shown and described with reference the the preferred embodiments thereof, it will be understood by those skilled in the art that the foregoing and other changes in form and detail may be made therein without departing from the spirit and scope of the invention.

What is claimed is:

l. A method for extracting the true position of a random noise corrupted signal with respect to a pre-determined signal, comprising multiple sampling of said random noise corrupted signal and adding corresponding points of said multiple samples and cross correlating said added samples with said pre-determined signal and extracting from a suitable portion of said cross-correlation an expression capable of determining the center of the original random noise corrupted signal.

2. A method in accordance with claim 1 wherein said multiple sampled signal is digitized.

3. A method in accordance with claim 1 wherein said noise-corrupted signal emanates from back-scattered electrons of a beam of charged particles.

4. A method in accordance with claim 1 wherein said center of the first noise-corrupted signal is determined by a least squares curve fitting technique.

5. A method in accordance with claim 1 wherein said added sample is stored in a suitable memory.

6. A method of registering a sweeping beam relative to an object bearing a registration mark or marks representing a reference position on said object comprising serially scanning said registration mark or marks with a beam of charged particles and adding corresponding points of each scan of a resulting current of back-scatter particles and storing the sum in a memory and crosscorrelating the stored scan sum with an ideal signal and extracting from a suitable portion of the cross-correlation an expression capable of determining the center of the original noise-corrupted signal. 7. A method in accordance with claim 6 wherein said center of the original noise-corrupted signal is determined by a least square curve fitting technique.

8. Apparatus for providing the true position of a noise corrupted signal comprising:

means for sampling said noise corrupted signal and providing a binary value representative of the amplitude of the sampled noise corrupted signal;

adder means operatively associated with and responsive to said means for sampling, said adding means also being operatively associated with and responsive to binary signals provided by an electronic memory;

said adder means adding the data contained in a selected address of memory to the sampled noise corrupted signal and providing said result to the said same selected address of electronic memory;

a second electronic memory storing a predetermined binary pattern;

gating means electrically connected between said first electronic memory and said adding means for transferring data from said first electronic memory to said adding means under the control of said second electronic memory, and

output means for providing the output of said adding means to a computing means for determining the center of a waveform representative of the binary output of said adding means.

9. Apparatus as in claim 8 wherein said center of the original noise-corrupted signal is determined by a least curve fitting technique.

10. Apparatus for locating the precise position of registration marks on a semiconductor substrate comprising:

a semiconductor substrate having registration marks thereon with a beam of charged particles impinging on said registration marks;

means for sampling back-scattered particles emanating from said semiconductor substrate and for converting the analog level of said back scattered particles to a binary value representative of the resulting current from said back scattered particles;

a second electronic memory storing a predetermined binary pattern;

gating means electrically connected between said first electronic memory and said adding means for transferring data from said first electronic memory to said adding means under the control of said second electronic memory; and

11. Apparatus as in claim 10 wherein said registration mark comprises:

a stripe consisting of an oxide of silicon.

12. Apparatus as in claim 10 wherein said registration mark comprises:

a plurality of silicon oxide stripes.

l3. Appparatus as in claim 10 wherein said registration mark comprises:

a plurality of oxide stripes at least two of said stripes being placed transverse to at least two additional stripes.

14. Apparatus as in claim 10 wherein at least one registration mark is placed at each of the four corners of a field to be defined by said registration marks.

Claims

1. A method for extracting the true position of a random noise corrupted signal with respect to a pre-determined signal, comprising multiple sampling of said random noise corrupted signal and adding corresponding points of said multiple samples and cross correlating said added samples with said pre-determined signal and extracting from a suitable portion of said cross-correlation an expression capable of determining the center of the original random noise corrupted signal.

6. A method of registering a sweeping beam relative to an object bearing a registration mark or marks representing a reference position on said object comprising serially scanning said registration mark or marks with a beam of charged particles and adding corresponding points of each scan of a resulting current of back-scatter particles and storing the sum in a memory and cross-correlating the stored scan sum with an ideal signal and extracting from a suitable portion of the cross-correlation an expression capable of determining the center of the original noise-corrupted signal.

7. A method in accordance with claim 6 wherein said center of the original noise-corrupted signal is determined by a least square curve fitting technique.

8. Apparatus for providing the true position of a noise corrupted signal comprising: means for sampling said noise corrupted signal and providing a binary value representative of the amplitude of the sampled noise corrupted signal; adder means operatively associated with and responsive to said means for sampling, said adding means also being operatively associated with and responsive to binary signals provided by an electronic memory; said adder means adding the data contained in a selected address of memory to the sampled noise corrupted signal and providing said result to the said same selected address of electronic memory; a second electronic memory storing a predetermined binary pattern; gating means electrically connected between said first electronic memory and said adding means for transferring data from said first electronic memory to said adding means under the control of said second electronic memory, and output means for providing the output of said adding means to a computing means for determining the center of a waveform representative of the binary output of said adding means.

10. Apparatus for locating the precise position of registration marks on a semiconductor substrate comprising: a semiconductor substrate having registration marks thereon with a beam of charged particles impinging on said registration marks; means for sampling back-scattered particles emanating from said semiconductor substrate and for converting the analog level of said back scattered particles to a binary value representative of the resulting current from said back scattered particles; adder means operatively associated with and responsive to said means for sampling, said adding means also being operatively associated with and responsive to binary signals provided by an electronic memory; said adder means adding the data contained in a selected address of memory to the sampled noise corrupted signal and providing said result to the said same selected address of electronic memory; a second electronic memory storing a predetermined binary pattern; gating means electrically connected between said first electronic memory and said adding means for transferring data from said first electronic memory to said adding means under the control of said second electronic memory; and output means for providing the output of said adding means to a computing means for determining the center of a waveform representative of the binary output of said adding means.

11. Apparatus as in claim 10 wherein said registration mark comprises: a stripe consisting of an oxide of silicon.

12. Apparatus as in claim 10 wherein said registration mark comprises: a plurality of silicon oxide stripes.

13. Appparatus as in claim 10 wherein said registration mark comprises: a plurality of oxide stripes at least two of said stripes being placed transverse to at least two additional stripes.