US20130160978A1 - Heat dissipating substrate and method of manufacturing the same - Google Patents
Heat dissipating substrate and method of manufacturing the same Download PDFInfo
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- US20130160978A1 US20130160978A1 US13/722,219 US201213722219A US2013160978A1 US 20130160978 A1 US20130160978 A1 US 20130160978A1 US 201213722219 A US201213722219 A US 201213722219A US 2013160978 A1 US2013160978 A1 US 2013160978A1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
-
- F—MECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
- F28—HEAT EXCHANGE IN GENERAL
- F28F—DETAILS OF HEAT-EXCHANGE AND HEAT-TRANSFER APPARATUS, OF GENERAL APPLICATION
- F28F21/00—Constructions of heat-exchange apparatus characterised by the selection of particular materials
- F28F21/08—Constructions of heat-exchange apparatus characterised by the selection of particular materials of metal
- F28F21/081—Heat exchange elements made from metals or metal alloys
- F28F21/084—Heat exchange elements made from metals or metal alloys from aluminium or aluminium alloys
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/64—Heat extraction or cooling elements
- H01L33/641—Heat extraction or cooling elements characterized by the materials
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/44—Manufacturing insulated metal core circuits or other insulated electrically conductive core circuits
- H05K3/445—Manufacturing insulated metal core circuits or other insulated electrically conductive core circuits having insulated holes or insulated via connections through the metal core
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45139—Silver (Ag) as principal constituent
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0033—Processes relating to semiconductor body packages
- H01L2933/0075—Processes relating to semiconductor body packages relating to heat extraction or cooling elements
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/483—Containers
- H01L33/486—Containers adapted for surface mounting
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/05—Insulated conductive substrates, e.g. insulated metal substrate
- H05K1/053—Insulated conductive substrates, e.g. insulated metal substrate the metal substrate being covered by an inorganic insulating layer
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10007—Types of components
- H05K2201/10106—Light emitting diode [LED]
Definitions
- the non-conductive material filled in the via hole may be epoxy or polymer, and the through hole may be formed by drilling or laser processing.
- FIGS. 3A through 3H are schematic views illustrating a method of manufacturing a heat dissipating substrate according to an embodiment of the present invention.
- the insulating layer 120 may be formed on the entire surface of the substrate 110 including the inner wall surface of the via hole 111 .
- the insulating layer 120 may be formed on the substrate 110 , which is formed of aluminum, using an oxide coating layer (Al 2 O 3 ) by anodizing.
- the anodizing may be performed by using an organic acid, a sulfuric acid, or a mixture thereof.
- the metal patterns 150 may be formed on the insulating layer 120 as illustrated in FIG. 1 , or alternatively, a portion of the insulating layer 120 may be removed and the metal patterns 150 may be formed on an exposed portion of an upper surface of the substrate 110 . In this case, a lower surface of the metal pattern 150 directly contacts the upper surface of the substrate 110 , and a LED is mounted on an upper surface of the metal pattern 150 , thereby further enhancing the effects of heat dissipation of the LED.
- an inner portion of the via hole 111 may be completely filled with the metal layer 140 or the metal layer 140 may be formed as a thin layer on the coating layer 130 on the inner wall surface of the via hole 111 .
- a previous process that is, a process (not shown) of forming a through hole one more time so that the metal layer 140 filled in the via hole 111 is shorted, like a process of forming the through hole 131 in the non-conductive material filled in the via hole 111 may be performed.
- a coating layer 130 formed of a conductive material may be formed on an inner wall surface of the via hole 111 on which the insulating layer 120 is formed.
- the coating layer 130 may be formed in the via hole 111 on which the insulating layer 120 by using a plating process, and in detail, as a seed layer on the insulating layer 120 on the inner wall surface of the via hole 111 by electroplating or electroless plating.
- a filling material 160 is injected into the inner portion of the metal layer 140 in the via hole 111 so as to completely fill the inner portion of the via hole 111 .
- a filling material 160 may be a non-conductive material such as epoxy or polymer.
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Thermal Sciences (AREA)
- Mechanical Engineering (AREA)
- General Engineering & Computer Science (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
- Insulated Metal Substrates For Printed Circuits (AREA)
Abstract
Disclosed herein are a heat dissipating substrate and a method of manufacturing the same. The heat dissipating substrate includes: a substrate that is formed of a metal material, wherein at least one via hole is formed in the substrate; an insulating layer formed on a surface of the substrate; a coating layer that is formed on an inner wall surface of the via hole and is formed of a conductive or non-conductive material; a plurality of metal patterns that are formed on the insulating layer and are electrically separated from one another; a metal layer that is extended from the metal patterns to be formed on the coating layer formed on the inner wall surface of the via hole; and a filling material that is formed of a non-conductive material and is filled between the metal layers in the via hole.
Description
- This application claims the benefit under 35 U.S.C. Section 119 of Korean Patent Application Serial No. 10-2011-0139245, entitled “Heat Dissipating Substrate and Method of Manufacturing the Same” filed on Dec. 21, 2011, which is hereby incorporated by reference in its entirety into this application.
- 1. Technical Field
- The present invention relates to a heat dissipating substrate and a method of manufacturing the same, and more particularly, to a heat dissipating substrate formed of a metal, wherein a surface of the heat dissipating substrate is anodized, and an inner wall surface of a via of the heat dissipating substrate is plugged using a conductive or non-conductive material, and a method of manufacturing the heat dissipating substrate.
- 2. Description of the Related Art
- In general, various light emitting units such as a light emitting diode (LED) are mounted on a substrate, and when they are driven as a light-emitting body, heat is generated due to light emission, and the heat needs to be effectively dissipated to increase the lifespan and efficiency of the light emitting units.
- In particular a LED has low power consumption and high luminance, and thus is widely used as a light source for homes and industrial purposes.
- Recently, a LED is used as a light source of illuminating apparatuses and backlights for liquid crystal displays (LCD). The LED is supplied in a package which is easily mounted in various devices such as illuminating apparatuses.
- A LED package has a structure in which the LED package is mounted on a substrate and a LED is encapsulated by using a molding material. Here, not only are the functions of the LED package of protecting the LED and providing a connection to a light emitting device important, but heat dissipation performance of the LED package for dissipating heat from the LED is also an important evaluation standard for evaluating LED packages.
- Since a contact surface of a LED with a substrate is the largest, and heat may preferably be dissipated through the substrate, and various heat dissipation structures for dissipating heat through a substrate are being developed.
- The most effective way of dissipating heat of a light emitting unit is to include a metal substrate so that heat generated in the light emitting unit is dissipated through the metal substrate to the outside, and accordingly, various researches are being conducted into a heat dissipating substrate which may increase performance and lifetime of a LED, by simplifying a structure of the heat dissipating substrate and improving heat dissipation performance thereof.
- (Patent Document 1) Korean Patent Laid-Open Publication No. 2010-016737
- An object of the present invention is to provide a heat dissipating substrate in which an inner wall surface of a via formed in a metal substrate is plugged using a conductive or non-conductive material so as to fill an inner portion of the via using the non-conductive material, thereby reducing a size of the via hole, and a method of manufacturing the same.
- According to an exemplary embodiment of the present invention, there is provided a heat dissipating substrate, comprising: a substrate that is formed of a metal material, wherein at least one via hole is formed in the substrate; an insulating layer formed on a surface of the substrate; a coating layer that is formed on an inner wall surface of the via hole and is formed of a conductive or non-conductive material; a plurality of metal patterns that are formed on the insulating layer and are electrically separated from one another; a metal layer that is extended from the metal patterns to be formed on the coating layer formed on the inner wall surface of the via hole; and a filling material that is formed of a non-conductive material and is filed between the metal layers in the via hole.
- The substrate may be formed of a metal having an excellent thermal conductivity, and be formed of aluminum (Al).
- The insulating layer formed on the surface of the substrate may be formed of an oxide coating layer (Al2O3) by anodizing.
- The via hole may be formed by using a mechanical method such as drilling or punching or a chemical method such as etching.
- According to another exemplary embodiment of the present invention, there is provided a method of manufacturing a heat dissipating substrate, the method comprising: preparing a metal substrate and forming at least one via hole that passes through the metal substrate; forming an insulating layer on a surface of the metal substrate including the via hole; forming a coating layer using a non-conductive material on an inner wall surface of the via hole, on which the insulating layer is formed; forming a metal layer on the coating layer formed on the inner wall surface of the via hole and the insulating layer formed on the surface of the metal substrate; forming a plurality of metal patterns by patterning the metal layer formed on the insulating layer formed on the surface of the metal substrate; and injecting a filling material formed of a non-conductive material between coating layers formed on the inner wall surface of the via hole.
- In the forming of the insulating layer on a surface of the metal substrate, the insulating layer may be formed of an oxide coating layer by anodizing.
- The forming of the coating layer on an inner wall surface of the via hole may include: filling a non-conductive material in the via hole through a plugging process; and forming a through hole in the non-conductive material filled in the via hole.
- The non-conductive material filled in the via hole may be epoxy or polymer, and the through hole may be formed by drilling or laser processing.
- According to another exemplary embodiment of the present invention, there is provided a method of manufacturing a heat dissipating substrate, the method comprising: preparing a metal substrate and forming at least one via hole that passes through the metal substrate; forming an insulating layer on a surface of the metal substrate including the via hole; forming a coating layer formed of a conductive material on an inner wall surface of the via hole, on which the insulating layer is formed; forming a metal layer on the coating layer formed on the inner wall surface of the via hole and the insulating layer formed on the surface of the metal substrate; forming a plurality of metal patterns by patterning the metal layer formed on the insulating layer formed on the surface of the metal substrate; and injecting a filling material formed of a non-conductive material between the coating layers formed on the inner wall surface of the via hole.
- The forming of the coating layer on an inner wall surface of the via hole may include: fill plating an inner portion of the via hole using a conductive material through a plating process; and forming a through hole in the fill-plated conductive material formed in the via hole.
- In the forming of the coating layer on an inner wall surface of the via hole, the coating layer may be formed as a seed layer only on the inner wall surface of the via hole by using a conductive material and a plating process.
-
FIG. 1 is a cross-sectional view illustrating a heat dissipating substrate according to an embodiment of the present invention; -
FIG. 2 is a cross-sectional view of a heat dissipating substrate according to an embodiment of the present invention, on which a light emitting unit is mounted; -
FIGS. 3A through 3H are schematic views illustrating a method of manufacturing a heat dissipating substrate according to an embodiment of the present invention; and -
FIGS. 4A through 4G are schematic views illustrating a method of manufacturing a heat dissipating substrate according to another embodiment of the present invention. - Hereinafter, the technical configuration of the light emitting diode package according to the present invention and the effects thereof will be clearly understood from the detailed description below with reference to the accompanying drawings in which exemplary embodiments of the present invention are shown.
- First,
FIG. 1 is a cross-sectional view illustrating aheat dissipating substrate 100 according to an embodiment of the present invention. - As illustrated in
FIG. 1 , the heatdissipating substrate 100 may include asubstrate 110 formed of a metal material, aninsulating layer 120 formed on a surface of thesubstrate 110, acoating layer 130 formed on an inner wall surface of avia hole 111 formed in thesubstrate 110, ametal pattern 150 formed on theinsulating layer 120 formed on the surface of thesubstrate 110, ametal layer 140 formed on thecoating layer 130, and afilling material 160 filled in inner portions of themetal layer 140. - The
substrate 110 may be formed of a metal such as an aluminum (Al) which is a representative metal having excellent thermal conductivity, and at least one viahole 111 may be formed on thesubstrate 110. - The
via hole 111 may be formed by CNC drilling or etching. Also, thevia hole 111 may be used as an electrical connection portion that electrically connectsmetal patterns 150 formed on upper and lower surfaces of thesubstrate 110 which will be described below. - The
insulating layer 120 may be formed on the entire surface of thesubstrate 110 including the inner wall surface of thevia hole 111. Theinsulating layer 120 may be formed on thesubstrate 110, which is formed of aluminum, using an oxide coating layer (Al2O3) by anodizing. The anodizing may be performed by using an organic acid, a sulfuric acid, or a mixture thereof. - Aluminum used to form the
substrate 110 is a metal which is easily obtainable at relatively low price, and has excellent thermal conductivity, and an oxide coating layer formed on a surface of thesubstrate 110 may also be formed using a thin insulator that has a relatively high thermal conductivity of about 10 to 30 W/mK by anodizing, thereby providing low thermal resistance. - Accordingly, compared to copper or ceramics which is used to form a substrate according to the related art, not only has the
substrate 110 formed of aluminum excellent heat dissipation performance but also thesubstrate 110 may be anodized relatively easily, and thus the costs and time for processing may be reduced. - The
coating layer 130 is formed on the inner wall surface of thevia hole 111, and thecoating layer 130 may be formed of a conductive material such as a metal or a non-conductive material such as epoxy or polymer. - When the
coating layer 130 is formed of a conductive material, thecoating layer 130 may be formed by plating, and when thecoating layer 130 is formed of a non-conductive material, thevia hole 111 may be filled with a non-conductive material so as to completely fill thevia hole 111, and then a through hole is formed by drilling or laser processing so that thecoating layer 130 is formed only on the inner wall surface of thevia hole 111. - Also, the
metal patterns 150 are electrically separated from adjacent metal patterns on theinsulating layer 120, and a portion on themetal patterns 150 where a light emitting unit such as a LED is to be mounted may be formed as an electrode portion. Themetal patterns 150 may be extended inwardly into thevia hole 111 and be formed as themetal layer 140 on thecoating layer 130. Themetal patterns 150 may perform the function as an electrode and the function of heat dissipation at the same time. - The
metal patterns 150 may be formed on theinsulating layer 120 as illustrated inFIG. 1 , or alternatively, a portion of theinsulating layer 120 may be removed and themetal patterns 150 may be formed on an exposed portion of an upper surface of thesubstrate 110. In this case, a lower surface of themetal pattern 150 directly contacts the upper surface of thesubstrate 110, and a LED is mounted on an upper surface of themetal pattern 150, thereby further enhancing the effects of heat dissipation of the LED. - As described above, the
insulating layer 120, thecoating layer 130, and themetal layer 140 extended from themetal patterns 150 may be sequentially formed in the via hole ill, and a through hole is formed between portions of themetal layer 140 so as to fill afilling material 160 in the through hole. The fillingmaterial 160 may be epoxy or polymer formed of a non-conductive material, and themetal layer 140 formed on inner portions of thevia hole 111 is shorted by thefilling material 160 to thereby prevent a short circuit between themetal patterns 150. - Also, as described in the objective of the present invention, as the
insulating layer 120, thecoating layer 130, and themetal layer 140 are sequentially formed in thevia hole 111 which is formed to have a relatively large size by drilling or punching due to characteristics of themetal substrate 110, a diameter of thevia hole 111 may be reduced, and thefilling material 160 may be injected into the reduced viahole 111. - Consequently, when heat is dissipated through the
substrate 110 which is formed of a metal material, due to the characteristics of a metal substrate, thevia hole 111 is constricted or expanded by the heat, and here, by reducing the diameter of thevia hole 111 by using thecoating layer 130 formed on the inner wall surface of thevia hole 111, variation in the diameter of thevia hole 111 due to thermal deformation of thesubstrate 110 may be minimized. - Various types of light emitting units may be mounted on a heat dissipating substrate having the above-described structure according to the present invention, and a structure in which a LED is mounted as a light emitting unit will be briefly described as an example below.
-
FIG. 2 is a cross-sectional view of a heat dissipating substrate according to an embodiment of the present invention, on which a light emitting unit is mounted. - At least one via
hole 111 is formed so that alight emitting unit 200, for example, a LED (hereinafter referred to as a LED chip 200) may be mounted on asubstrate 110 which is formed of a metal material and on upper and lower surfaces of whichmetal patterns 150 are formed. - The
LED chip 200 is a LED chip having a vertical electrode structure, and one electrode (not shown) formed on theLED chip 200 is directly connected to themetal patterns 150, and the other electrode (not shown) may be electrically connected to themetal patterns 150, on which theLED chip 200 is not mounted, via awire 210. Here, themetal patterns 150 connected to theLED chip 200 via thewire 210 may be extended up to the lower surface of themetal substrate 110 via themetal layer 140 that is extended to an inner portion of the viahole 111. - Also, a
molding unit 220 that covers theLED chip 200 and thewire 210 may be formed on thesubstrate 110. Themolding unit 220 may be formed to a desired form by using a silicon resin, an epoxy resin, or an epoxy molding compound (EMC) or the like and by using a method using an injection molding method, a transfer molding method, or a pin gate molding method. - Hereinafter, a method of manufacturing the heat dissipating substrate having the above-described structure will be described.
-
FIGS. 3A through 3H are schematic views illustrating a method of manufacturing a heat dissipating substrate according to an embodiment of the present invention. - As illustrated in the drawings, first, a
metal substrate 110 is prepared as illustrated inFIG. 3A . Themetal substrate 110 may be preferably an aluminum substrate that is gone through a washing operation in which pollutants such as organic materials on a surface thereof are washed off. - The
metal substrate 110 may typically have a square shape, or other various forms such as a rectangular or a circular shape according to a processed aluminum substrate. In addition, a thickness of themetal substrate 110 may preferably be about 0.1 mm or greater in consideration of process reliability. - Next, as illustrated in
FIG. 3B , at least one viahole 111 that passes through themetal substrate 110 is formed. The viahole 111 may be formed by drilling, punching, or etching. - Also, an insulating
layer 120 may be formed on a surface of themetal substrate 110 including the viahole 111 by anodizing. - Next, a
coating layer 130 formed of a non-conductive material may be formed on an inner wall surface of the viahole 111, on which the insulatinglayer 120 is formed. Thecoating layer 130 may be formed by filling a resin material such as epoxy or polymer which is a non-conductive material, in the viahole 111 on which the insulatinglayer 120 is formed, and by forming a throughhole 131 that passes through a center portion of the non-conductive material filled in the viahole 111, as illustrated inFIG. 3E . Here, the throughhole 131 may be formed by drilling or laser processing. - Next, as illustrated in
FIG. 3F , ametal layer 140 may be formed on the insulatinglayer 120 of themetal substrate 110 that includes thecoating layer 130 formed on the inner wall surface of the viahole 111. Themetal layer 140 may be formed by using a method such as electroplating, electroless plating, or metal deposition. - While the
metal layer 140 is formed, an inner portion of the viahole 111 may be completely filled with themetal layer 140 or themetal layer 140 may be formed as a thin layer on thecoating layer 130 on the inner wall surface of the viahole 111. When themetal layer 140 is completely filled in the inner portion of the viahole 111, a previous process, that is, a process (not shown) of forming a through hole one more time so that themetal layer 140 filled in the viahole 111 is shorted, like a process of forming the throughhole 131 in the non-conductive material filled in the viahole 111 may be performed. - As described above, by further forming the
coating layer 130 and themetal layer 140 on the inner wall surface of the viahole 111, a size of the viahole 111 may be reduced, and variation in the size of the viahole 111 due to constriction or expansion of themetal substrate 110 due to thermal deformation may be minimized. - Next, as illustrated in
FIG. 3G , the fillingmaterial 160 is injected into the inner portion of themetal layer 140 in the viahole 111 so as to completely fill the inner portion of the viahole 111. Here, the fillingmaterial 160 may be a non-conductive material such as epoxy or polymer. - Finally, as illustrated in
FIG. 3H , themetal layer 140 formed on a surface of the insulatinglayer 120 may be patterned to form a plurality ofmetal patterns 150 that are formed on the insulatinglayer 120 formed on upper and lower surfaces of themetal substrate 110 and are electrically separated. -
FIGS. 4A through 4G are schematic views illustrating a method of manufacturing a heat dissipating substrate according to another embodiment of the present invention. - As illustrated in the drawings, first, a
metal substrate 110 is prepared as illustrated inFIG. 4A . Themetal substrate 110 may be preferably an aluminum substrate that is gone through a washing operation in which pollutants such as organic materials on a surface thereof are washed off. - The
metal substrate 110 may typically have a square shape, or other various forms such as a rectangular or circular shape according to a processed aluminum substrate. In addition, a thickness of themetal substrate 110 may preferably be about 0.1 mm or greater in consideration of process reliability. - Next, as illustrated in
FIG. 4B , at least one viahole 111 that passes through themetal substrate 110 is formed. The viahole 111 may be formed by drilling, punching, or etching. - Also, as illustrated in
FIG. 4C , an insulatinglayer 120 may be formed on a surface of themetal substrate 110 including the viahole 111 by anodizing. - Next, as illustrated in
FIG. 4D , acoating layer 130 formed of a conductive material may be formed on an inner wall surface of the viahole 111 on which the insulatinglayer 120 is formed. Thecoating layer 130 may be formed in the viahole 111 on which the insulatinglayer 120 by using a plating process, and in detail, as a seed layer on the insulatinglayer 120 on the inner wall surface of the viahole 111 by electroplating or electroless plating. - Also, the
coating layer 130 may be formed only on the inner wall surface of the viahole 111 by fill-plating an inner portion of the viahole 111 with a conductive material by plating, and then by forming a throughhole 131 in the conductive material filled in the viahole 111. The throughhole 131 may be formed by drilling or etching. - Next, as illustrated in
FIG. 4E , ametal layer 140 may be formed on the insulatinglayer 120 of themetal substrate 110 that includes thecoating layer 130 formed on the inner wall surface of the viahole 111. Themetal layer 140 may be formed by electroplating, electroless plating, or metal deposition. - Here, while the
metal layer 140 is formed, the inner portion of the viahole 111 may be completely filled with themetal layer 140 or themetal layer 140 may be formed as a thin layer on thecoating layer 130 on the inner wall surface of the viahole 111. When themetal layer 140 is completely filled in the inner portion of the viahole 111, a previous process, that is, a process of forming a through hole one more time so that themetal layer 140 filled in the viahole 111 is shorted, like a process of forming the throughhole 131 in the non-conductive material filled in the viahole 111 may be performed. - As described above, by further forming the
coating layer 130 and themetal layer 140 on the inner wall surface of the viahole 111, a size of the viahole 111 may be reduced, and variation in the size of the viahole 111 due to constriction or expansion of themetal substrate 110 due to thermal deformation may be minimized. - Next, as illustrated in
FIG. 4F , the fillingmaterial 160 is injected into the inner portion of themetal layer 140 in the viahole 111 so as to completely fill the inner portion of the viahole 111. Here, a fillingmaterial 160 may be a non-conductive material such as epoxy or polymer. - Finally, as illustrated in
FIG. 4G , themetal layer 140 formed on a surface of the insulatinglayer 120 may be patterned to form a plurality ofmetal patterns 150 that are formed on the insulatinglayer 120 on upper and lower surfaces of themetal substrate 110 and are electrically separated. - As described above, according to the heat dissipating substrate and the method of manufacturing the heat dissipating substrate according to the embodiments of the present invention, heat generated in a light emitting member mounted on the upper surface of the metal substrate may be efficiently dissipated through the metal substrate.
- In addition, a coating layer formed of a conductive or non-conductive material is formed on an inner wall surface of a via hole, and space inside the coating layer is filled, thereby reducing a size of a via. Accordingly, variation in a diameter of the via hole due to thermal deformation of a metal substrate according to contraction or expansion of a metal material may be minimized.
- Although the preferred embodiments of the present invention have been disclosed for illustrative purposes, those skilled in the art will appreciate that various modifications, additions and substitutions are possible, without departing from the scope and spirit of the invention as disclosed in the accompanying claims. Accordingly, such modifications, additions and substitutions should also be understood to fall within the scope of the present invention.
Claims (13)
1. A heat dissipating substrate, comprising:
a substrate that is formed of a metal material, wherein at least one via hole is formed in the substrate;
an insulating layer formed on a surface of the substrate;
a coating layer that is formed on an inner wall surface of the via hole and is formed of a conductive or non-conductive material;
a plurality of metal patterns that are formed on the insulating layer and are electrically separated from one another;
a metal layer that is extended from the metal patterns to be formed on the coating layer formed on the inner wall surface of the via hole; and
a filling material that is formed of a non-conductive material and is filled between the metal layers in the via hole.
2. The heat dissipating substrate according to claim 1 , wherein the substrate is formed of a metal having an excellent thermal conductivity and is formed of aluminum (Al).
3. The heat dissipating substrate according to claim 1 , wherein the insulating layer formed on the surface of the substrate is formed of an oxide coating layer (Al2O3) by anodizing.
4. The heat dissipating substrate according to claim 1 , wherein the via hole is formed by using a mechanical method such as drilling or punching or a chemical method such as etching.
5. The heat dissipating substrate according to claim 1 , wherein the metal patterns are formed on portions of an upper surface of the substrate that are exposed by removing a portion of the insulating layer.
6. The heat dissipating substrate according to claim 1 , wherein the filling material is formed of a non-conductive material such as epoxy or polymer.
7. A method of manufacturing a heat dissipating substrate, the method comprising:
preparing a metal substrate and forming at least one via hole that passes through the metal substrate;
forming an insulating layer on a surface of the metal substrate including the via hole;
forming a coating layer using a non-conductive material on an inner wall surface of the via hole, on which the insulating layer is formed;
forming a metal layer on the coating layer formed on the inner wall surface of the via hole and the insulating layer formed on the surface of the metal substrate;
forming a plurality of metal patterns by patterning the metal layer formed on the insulating layer formed on the surface of the metal substrate; and
injecting a filling material formed of a non-conductive material between coating layers formed on the inner wall surface of the via hole.
8. The method according to claim 7 , wherein in the forming of the insulating layer on a surface of the metal substrate, the insulating layer is formed of an oxide coating layer by anodizing.
9. The method according to claim 7 , wherein the forming of the coating layer on an inner wall surface of the via hole includes:
filling a non-conductive material in the via hole through a plugging process; and
forming a through hole in the non-conductive material filled in the via hole.
10. The method according to claim 1 , wherein the non-conductive material filled in the via hole is epoxy or polymer, and the through hole is formed by drilling or laser processing.
11. A method of manufacturing a heat dissipating substrate, the method comprising:
preparing a metal substrate and forming at least one via hole that passes through the metal substrate;
forming an insulating layer on a surface of the metal substrate including the via hole;
forming a coating layer formed of a conductive material on an inner wall surface of the via hole, on which the insulating layer is formed;
forming a metal layer on the coating layer formed on the inner wall surface of the via hole and the insulating layer formed on the surface of the metal substrate;
forming a plurality of metal patterns by patterning the metal layer formed on the insulating layer formed on the surface of the metal substrate; and
injecting a filling material formed of a non-conductive material between the coating layers formed on the inner wall surface of the via hole.
12. The method according to claim 11 , wherein the forming of the coating layer on an inner wall surface of the via hole includes:
fill plating an inner portion of the via hole using a conductive material through a plating process; and
forming a through hole in the fill-plated conductive material formed in the via hole.
13. The method according to claim 11 , wherein in the forming of the coating layer on an inner wall surface of the via hole, the conductive material is formed, as a seed layer, only on the inner wall surface of the via hole through a plating process.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
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KR1020110139245A KR101332032B1 (en) | 2011-12-21 | 2011-12-21 | Heat dissipating circuit board and method for manufacturing the same |
KR10-2011-0139245 | 2011-12-21 |
Publications (1)
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US20130160978A1 true US20130160978A1 (en) | 2013-06-27 |
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US13/722,219 Abandoned US20130160978A1 (en) | 2011-12-21 | 2012-12-20 | Heat dissipating substrate and method of manufacturing the same |
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US (1) | US20130160978A1 (en) |
JP (1) | JP2013131748A (en) |
KR (1) | KR101332032B1 (en) |
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WO2015164593A1 (en) * | 2014-04-25 | 2015-10-29 | Rogers Corporation | Metal core printed circuit board with insulation layer |
WO2016188867A1 (en) * | 2015-05-27 | 2016-12-01 | Osram Opto Semiconductors Gmbh | Method for producing optoelectronic semiconductor components, and optoelectronic semiconductor component |
US9706667B2 (en) * | 2014-05-19 | 2017-07-11 | Sierra Circuits, Inc. | Via in a printed circuit board |
US9961765B2 (en) * | 2015-12-15 | 2018-05-01 | International Business Machines Corporation | Security mesh and method of making |
WO2020115148A1 (en) * | 2018-12-07 | 2020-06-11 | Osram Opto Semiconductors Gmbh | Method for producing optoelectronic semiconductor components, and optoelectronic semiconductor component |
WO2020120287A1 (en) * | 2018-12-12 | 2020-06-18 | Osram Opto Semiconductors Gmbh | Substrate, assembly comprising a substrate, and method for producing a substrate |
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DE112015005127B4 (en) | 2014-11-12 | 2021-10-21 | OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung | Optoelectronic semiconductor component and method for producing an optoelectronic semiconductor component |
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US9799584B2 (en) | 2015-11-16 | 2017-10-24 | Intel Corporation | Heat spreaders with integrated preforms |
MX2019002172A (en) * | 2016-08-30 | 2019-10-02 | E Seven Systems Tech Management Ltd | Printed circuit board for connecting battery cells and battery. |
JP2022107932A (en) * | 2021-01-12 | 2022-07-25 | モレックス エルエルシー | Heatsink and electronic component module |
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JPS63262890A (en) * | 1987-04-21 | 1988-10-31 | キヤノン株式会社 | Manufacture of printed circuit board |
JPH0636462A (en) * | 1992-07-22 | 1994-02-10 | Matsushita Electric Ind Co Ltd | Digital signal recording and reproducing device |
JPH0799387A (en) * | 1993-09-28 | 1995-04-11 | Hitachi Chem Co Ltd | Manufacture of metal core wiring board |
JP2756094B2 (en) * | 1995-04-13 | 1998-05-25 | いわき電子株式会社 | Bump electrodes and components with bump electrodes |
JPH11298104A (en) * | 1998-04-16 | 1999-10-29 | Sumitomo Metal Electronics Devices Inc | Circuit board for mounting semiconductor |
KR100958024B1 (en) * | 2008-08-05 | 2010-05-17 | 삼성엘이디 주식회사 | Light emitting diode package and method of manufacturing the same |
KR20100125805A (en) * | 2009-05-21 | 2010-12-01 | 삼성전기주식회사 | Heat-dissipating substrate and fabricating method of the same |
JP5363886B2 (en) * | 2009-06-22 | 2013-12-11 | 京セラ株式会社 | Wiring board manufacturing method |
-
2011
- 2011-12-21 KR KR1020110139245A patent/KR101332032B1/en active IP Right Grant
-
2012
- 2012-12-14 JP JP2012273160A patent/JP2013131748A/en active Pending
- 2012-12-20 US US13/722,219 patent/US20130160978A1/en not_active Abandoned
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WO2015164593A1 (en) * | 2014-04-25 | 2015-10-29 | Rogers Corporation | Metal core printed circuit board with insulation layer |
US20160014878A1 (en) * | 2014-04-25 | 2016-01-14 | Rogers Corporation | Thermal management circuit materials, method of manufacture thereof, and articles formed therefrom |
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WO2016188867A1 (en) * | 2015-05-27 | 2016-12-01 | Osram Opto Semiconductors Gmbh | Method for producing optoelectronic semiconductor components, and optoelectronic semiconductor component |
US10205071B2 (en) | 2015-05-27 | 2019-02-12 | Osram Opto Semiconductors Gmbh | Method of producing optoelectronic semiconductor components, and optoelectronic semiconductor component |
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WO2020115148A1 (en) * | 2018-12-07 | 2020-06-11 | Osram Opto Semiconductors Gmbh | Method for producing optoelectronic semiconductor components, and optoelectronic semiconductor component |
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Also Published As
Publication number | Publication date |
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KR20130071812A (en) | 2013-07-01 |
JP2013131748A (en) | 2013-07-04 |
KR101332032B1 (en) | 2013-11-22 |
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