US20090011608A1 - Manufacturing method of semiconductor device - Google Patents

Manufacturing method of semiconductor device Download PDF

Info

Publication number
US20090011608A1
US20090011608A1 US12/116,940 US11694008A US2009011608A1 US 20090011608 A1 US20090011608 A1 US 20090011608A1 US 11694008 A US11694008 A US 11694008A US 2009011608 A1 US2009011608 A1 US 2009011608A1
Authority
US
United States
Prior art keywords
layer
oxygen
oxide
high dielectric
forming
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
US12/116,940
Inventor
Toshihide Nabatame
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Technology Corp
Original Assignee
Renesas Technology Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Technology Corp filed Critical Renesas Technology Corp
Assigned to RENESAS TECHNOLOGY CORP. reassignment RENESAS TECHNOLOGY CORP. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: NABATAME, TOSHIHIDE
Publication of US20090011608A1 publication Critical patent/US20090011608A1/en
Priority to US12/752,828 priority Critical patent/US8168547B2/en
Abandoned legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
    • H01L21/02181—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing hafnium, e.g. HfO2
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
    • H01L21/02178—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing aluminium, e.g. Al2O3
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
    • H01L21/02183—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing tantalum, e.g. Ta2O5
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/0228—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition deposition by cyclic CVD, e.g. ALD, ALE, pulsed CVD
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02337—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02362—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment formation of intermediate layers, e.g. capping layers or diffusion barriers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158—Making the insulator
    • H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
    • H01L21/28185—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation with a treatment, e.g. annealing, after the formation of the gate insulator and before the formation of the definitive gate conductor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158—Making the insulator
    • H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
    • H01L21/28194—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation by deposition, e.g. evaporation, ALD, CVD, sputtering, laser deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314—Inorganic layers
    • H01L21/3141—Deposition using atomic layer deposition techniques [ALD]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314—Inorganic layers
    • H01L21/316—Inorganic layers composed of oxides or glassy oxides or oxide based glass
    • H01L21/31604—Deposition from a gas or vapour
    • H01L21/31645—Deposition of Hafnium oxides, e.g. HfO2
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/51—Insulating materials associated therewith
    • H01L29/517—Insulating materials associated therewith the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7833—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's

Definitions

  • the present invention relates to a technology for manufacturing a semiconductor device. More particularly, it relates to a technology effectively applied to the manufacture of a semiconductor device provided with a MIS (Metal Insulator Semiconductor) transistor having a gate insulating film formed to contain oxide whose relative dielectric constant is higher than that of silicon oxide (SiO 2 ).
  • MIS Metal Insulator Semiconductor
  • oxides typified by hafnium-based oxides such as Hf—O, Hf—Si—O, Hf—Si—O—N, Hf—Al—O, and Hf—Al—O—N have been studied.
  • Patent Document 1 Japanese Patent Application Laid-Open Publication No. 2006-080133
  • Patent Document 2 Japanese Patent Application Laid-Open Publication No. 2006-310801
  • Patent Document 1 The main subject of Japanese Patent Application Laid-Open Publication No. 2006-080133 (Patent Document 1) is to form a gate insulating film by using hafnium oxide which is a high dielectric material and form gate electrodes of an n channel MIS transistor and a p channel MIS transistor by using gate electrode materials suitable for the respective work functions as a whole, and metal materials are used therein for achieving the main subject.
  • the Patent Document 1 does not describe the aspect of capping the high dielectric film forming the gate insulating film.
  • Patent Document 2 The main subject of Japanese Patent Application Laid-Open Publication No. 2006-310801 (Patent Document 2) is to solve a problem of trapping which occurs at an interface between a high dielectric film and a polysilicon film forming a gate electrode as a whole, and the gate insulating film is capped by an intermediate layer (so-called buffer layer) before forming the gate electrode for achieving the main subject.
  • a gate insulating film made of oxide such as hafnium-based oxide as a high dielectric material is deposited on a semiconductor substrate by Atomic Layer Deposition (ALD), Chemical Vapor Deposition (CVD), or sputtering.
  • ALD Atomic Layer Deposition
  • CVD Chemical Vapor Deposition
  • sputtering since impurities such as carbon generated from a raw material and impurities such as OH generated from H 2 O oxidant remain in a film deposited in this manner, a density of the film becomes relatively low, so that a dielectric constant thereof is lowered.
  • an oxide film formed by the rapid heat treatment in the non-oxidation atmosphere has sufficient densification, such an oxide film has oxygen deficiency which can be one of the defect sites to cause the deterioration of transistor characteristics such as mobility.
  • an oxide film formed by the heat treatment in the oxygen atmosphere can suppress the oxygen deficiency in the heat treatment, oxygen diffuses in the oxide to reach a silicon substrate and form an interface silicon oxide layer, and as a result, the capacitance of an equivalent silicon oxide thickness is increased.
  • An object of the present invention is to provide a technology capable of improving the transistor characteristics of a MIS transistor provided with a gate insulating film formed to contain oxide whose relative dielectric constant is higher than that of silicon oxide.
  • Another object of the present invention is to provide a technology capable of achieving the high dielectric constant of an oxide film, the reduction of oxygen deficiency in the oxide film, and the suppression of the interface silicon oxide growth.
  • a high dielectric layer made of oxide whose relative dielectric constant is higher than that of silicon oxide is formed on a main surface of a semiconductor substrate.
  • the main surface of the semiconductor substrate is heat-treated in a non-oxidation atmosphere.
  • an oxygen supplying layer made of oxide having an oxygen proportion higher than that in the high dielectric layer just after the step (b) is formed on the high dielectric layer.
  • a cap layer made of metal which suppresses diffusion of oxygen is formed on the oxygen supplying layer.
  • the main surface of the semiconductor substrate is heat-treated.
  • the high dielectric layer is densified by the heat treatment at the step (b), the high dielectric layer with a high relative dielectric constant can be obtained. Also, since oxygen in the oxygen supplying layer is supplied to the high dielectric layer by the heat treatment at the step (e), the high dielectric layer in which the oxygen deficiency is reduced can be obtained. In other words, it is possible to obtain the oxide in which the high dielectric constant of an oxide film, the reduction of oxygen deficiency in the oxide film, and the suppression of the interface silicon oxide growth can be achieved.
  • Patent Document 1 Japanese Patent Application Laid-Open Publication No. 2006-080133 (Patent Document 1) and Japanese Patent Application Laid-Open Publication No. 2006-310801 (Patent Document 2) do not describe the formation of the oxygen supplying layer for supplying oxygen to the high dielectric layer.
  • the cap layer is not used as an intermediate layer (so-called buffer layer) for preventing the trapping which occurs at an interface between a gate insulating film and a gate electrode, but it is used for preventing oxygen in the oxygen supplying layer from diffusing into the atmosphere opposite to the high dielectric layer. Since oxygen does not diffuse into the atmosphere owing to the cap layer, oxygen in the oxygen supplying layer is supplied to the high dielectric layer.
  • the embodiment it is possible to improve the transistor characteristics of a MIS transistor provided with a gate insulating film formed to contain oxide whose relative dielectric constant is higher than that of silicon oxide.
  • FIG. 1 is a cross-sectional view showing a semiconductor device in a manufacturing process according to a first embodiment of the present invention
  • FIG. 2 is an enlarged cross-sectional view showing the semiconductor device in the manufacturing process continued from FIG. 1 ;
  • FIG. 3 is an enlarged cross-sectional view showing the semiconductor device in the manufacturing process continued from FIG. 2 ;
  • FIG. 4 is an enlarged cross-sectional view showing the semiconductor device in the manufacturing process continued from FIG. 3 ;
  • FIG. 5 is an enlarged cross-sectional view showing the semiconductor device in the manufacturing process continued from FIG. 4 ;
  • FIG. 6 is an enlarged cross-sectional view showing the semiconductor device in the manufacturing process continued from FIG. 5 ;
  • FIG. 7 is a cross-sectional view showing the semiconductor device in the manufacturing process continued from FIG. 6 ;
  • FIG. 8 is a cross-sectional view showing the semiconductor device in the manufacturing process continued from FIG. 7 ;
  • FIG. 9 is a cross-sectional view showing the semiconductor device in the manufacturing process continued from FIG. 8 ;
  • FIG. 10 is a graph showing the content of residual OH group relative to a thickness of a hafnium oxide film deposited by ALD;
  • FIG. 11 is a table showing the comparison between the transistor characteristics of an n channel MIS transistor (Qn) according to the first embodiment and the transistor characteristics of an n channel MIS transistor (Q′n) studied by the inventor of the present invention.
  • FIG. 12 is a graph showing the content of OH group contained in various oxides deposited by ALD in a second embodiment of the present invention.
  • FIG. 1 to FIG. 9 are cross-sectional views schematically showing a semiconductor device in a manufacturing process, in which FIG. 2 to FIG. 6 show a principal part of the semiconductor device in an enlarged manner.
  • a p channel MIS transistor has an opposite polarity to that of an n channel MIS transistor, and the present invention can also be applied to a manufacturing method of a p channel MIS transistor.
  • element isolation trenches ID are first formed in a main surface (element formation surface) of a semiconductor substrate (hereinafter, referred to as substrate) SUB made of, for example, p type single crystal silicon by the well-known STI (Shallow Trench Isolation) technique.
  • substrate semiconductor substrate
  • STI Shallow Trench Isolation
  • boron is ion-implanted in an n channel MIS transistor formation region of the substrate SUB
  • an impurity for adjusting a threshold voltage of the MIS transistor is ion-implanted.
  • the impurity is diffused in the substrate SUB, thereby forming a p well PW in the main surface of the substrate SUB.
  • wet etching solution such as hydrofluoric acid
  • a high dielectric layer HK 1 made of oxide whose relative dielectric constant is higher than that of silicon oxide is formed on the interface layer IL.
  • the high dielectric layer HK 1 forms a gate insulating film of an n channel MIS transistor, and it is made of, for example, hafnium oxide (HfO 2 ).
  • the interface layer IL is provided for reducing the defect generated when the high dielectric layer HK 1 (hafnium oxide) is directly formed on the substrate SUB (single crystal silicon). Also, since the interface layer IL is included in the gate insulating film, it is preferable to reduce the film thickness of the interface layer IL as far as possible in order to obtain a gate insulating film with a high relative dielectric constant.
  • the silicon oxide (SiO 2 ) forming the interface layer IL is formed by performing the high temperature thermal oxidation to the main surface of the substrate SUB at 950° C. or higher, and a film thickness of the silicon oxide is, for example, 0.3 nm.
  • hafnium oxide (HfO 2 ) forming the high dielectric film HK 1 is deposited by Atomic Layer Deposition (ALD) using, for example, an O (oxygen) material of H 2 O (water) and an Hf (hafnium) material of TDMAH (Tetrakis-Dimethylamido-Hafnium: Hf(NMe 2 ) 4 ), and a film thickness thereof is, for example, 2.4 nm.
  • ALD Atomic Layer Deposition
  • oxides such as Hf—Si—O, Hf—Si—O—N, Hf—Al—O, Hf—Al—O—N, Hf—Ta—O, Hf—Ti—O, Hf—La—O, Hf—Y—O, Hf—Ta—Si—O, Hf—Ti—Si—O, Hf—La—Si—O and Hf—Y—Si—O can be applied as the high dielectric layer HK 1 other than hafnium oxide (Hf—O).
  • a material containing oxygen (O) and hafnium (Hf) and having relative dielectric constant higher than that of silicon oxide (SiO 2 ) is referred to as “hafnium-based oxide”.
  • TDMAS Trisdimethlaminosilane: HSi(NMe 2 ) 3
  • Si silicon
  • TMA Trimethylaluminum: AlMe 3
  • TAIDEAT tertiaryamylimidotris (dimethlamido) tantalum: EtMe 2 CNTa(NMe 2 ) 3
  • Ta tantalum
  • TDMAT Tetrakisdimethylaminotitanium: Ti(NMe 2 ) 3
  • Ti(NMe 2 ) 3 Ti (titanium) material.
  • Trisethylcyclopentadienylyttrium Y(EtCp) 3 is used as a Y (yttrium) material.
  • Trisethylcyclopentadienyllanthanum La(EtCp) 3 is used as an La (lanthanum) material.
  • the nitridation of Hf—Si—O—N and Hf—Al—O—N is fabricated by the nitridation by the plasma nitrogen and the nitridation by the heat treatment using ammonia gas after depositing an Hf—Si—O film or an Hf—Al—O film by the ALD.
  • the ALD is used for the formation of the high dielectric layer HK 1 , but the formation method of the high dielectric layer HK 1 is not limited to this and the high dielectric layer HK 1 can be formed by sputtering and CVD. Note that the oxygen supplying layer is formed at a later step by depositing the hafnium-based oxide, and the hafnium-based oxide is deposited by the ALD, not by the sputtering or CVD.
  • the main surface of the substrate SUB is heat-treated in a non-oxidation atmosphere (for example, nitrogen, hydrogen, argon or the like) where an oxygen concentration is ppm (parts per million) or less in a temperature range of 600° C. to 1000° C.
  • a non-oxidation atmosphere for example, nitrogen, hydrogen, argon or the like
  • an oxygen concentration is ppm (parts per million) or less in a temperature range of 600° C. to 1000° C.
  • the high dielectric layer HK 1 is densified at this step.
  • the heat treatment for densifying the high dielectric layer HK 1 is referred to as “densification annealing” in the present invention.
  • the formation of Si—O bonding at the interface of a substrate SUB can be prevented.
  • the densification annealing is performed in an atmosphere containing oxygen (O)
  • external oxygen diffuses in the high dielectric layer HK 1 made of hafnium oxide and reaches the substrate SUB made of single crystal silicon, thereby forming Si—O bonding at an interface between the high dielectric layer HK 1 and the substrate SUB made of single crystal silicon.
  • a part of the gate insulating film changes to a silicon oxide film.
  • the interface layer IL made of silicon oxide becomes thick, so that the dielectric constant of the gate insulating film lowers. Therefore, by performing the densification annealing in the non-oxidation atmosphere, the formation of Si—O bonding at an interface can be prevented.
  • the high dielectric layer HK 1 can be densified without increasing the film thickness of the interface layer IL made of silicon oxide.
  • FIG. 3 shows the case where the lost oxygen is discharged in the atmosphere, and oxygen deficient portions DP are generated in the high dielectric layer HK 1 . Note that the process for reducing the oxygen deficient portions DP is performed at a step (oxygen supplying annealing step) described later.
  • an oxygen supplying layer HK 2 made of oxide having an oxygen proportion higher than that in the high dielectric layer HK 1 just after the densification annealing is formed.
  • a hafnium-based oxide film deposited by the ALD using an O (oxygen) material of H 2 O and an Hf (hafnium) material of TDMAH (Hf(NMe 2 ) 4 ) may be applied.
  • an atomic layer is deposited one by one on the substrate SUB placed in a chamber by repeating a cycle comprising the absorption of molecules of raw material compound by each monolayer, the film formation by the reaction thereof, the removal of excessive molecules by purge, the film formation by the reaction with H 2 O oxidant, and the removal of excessive molecules by purge. Therefore, a film thickness of the oxygen supplying layer HK 2 made of a hafnium-based oxide film can be controlled by the number of cycles.
  • the hafnium-based oxide film deposited by the ALD quantitatively contains residual OH group. Therefore, a proportion of oxygen in the hafnium-based oxide film (oxygen supplying layer HK 2 ) is higher than that in the hafnium-based oxide film (high dielectric layer HK 1 ) just after the densification annealing in which oxygen deficiency has occurred.
  • the residual oxygen functions to supplement (supply) the oxygen lost in the high dielectric layer HK 1 at a step described later.
  • the oxygen supplying layer HK 2 functions as an oxygen supplying source, and an absolute supplying amount of oxygen can be adjusted by the film thickness of the oxygen supplying layer HK 2 . Therefore, the ALD which can control the film thickness in an atomic level is effective for the formation of the oxygen supplying layer HK 2 .
  • the hafnium oxide film deposited by the ALD contains residual OH group of about 0.5%.
  • FIG. 10 shows the content of residual OH group relative to a thickness of a hafnium oxide film deposited by the ALD.
  • the absolute supplying amount is adjusted by the film thickness of the oxygen supplying layer HK 2 made of hafnium oxide deposited by the ALD so that oxygen can be sufficiently supplied to the high dielectric layer HK 1 in which the oxygen deficiency has occurred due to the densification annealing.
  • the film thickness of the oxygen supplying layer HK 2 made of a hafnium oxide film deposited by the ALD is adjusted to, for example, 4 ⁇ .
  • the sputtering and the CVD are known in addition to the ALD.
  • oxygen in the deposited film does not become excessive, so that the oxygen supplying layer HK 2 having an oxygen proportion higher than that in the high dielectric layer HK 1 just after the densification annealing in which oxygen deficiency has occurred cannot be formed. Therefore, the ALD using H 2 O as a material is used.
  • a cap layer CL made of metal for preventing oxygen from diffusing is formed on the oxygen supplying layer HK 2 .
  • the oxygen supplying layer HK 2 is capped by the cap layer CL.
  • the cap layer CL is made of a metal film (barrier metal film) provided for preventing oxygen from being discharged into atmosphere (forming a barrier) during heat treatment when the main surface of the substrate SUB is heat-treated at a later step (oxygen supplying annealing step).
  • the cap layer CL is made of, for example, tantalum nitride (TaN) formed by sputtering, and a film thickness thereof is, for example, 20 nm.
  • the main surface of the substrate SUB is heat-treated in a temperature range of 950° C. to 1150° C., for example, in nitrogen (N 2 ) atmosphere.
  • nitrogen (N 2 ) atmosphere oxygen remaining in the oxygen supplying layer HK 2 is supplied to the high dielectric layer HK 1 to supplement the oxygen lost from the high dielectric HK 1 .
  • the oxygen deficient portions DP which have occurred due to the densification annealing described with reference to FIG. 3 are reduced.
  • the heat treatment for supplying oxygen to the high dielectric layer HK 1 is referred to as “oxygen supplying annealing”.
  • the high dielectric layer HK 1 supplemented with oxygen in this manner forms the gate insulating film GI together with the interface layer IL and the oxygen supplying layer HK 2 .
  • the hafnium-based oxide is used as a material of the oxygen supplying layer HK 2 , but any oxide can be used as long as it has an oxygen proportion higher than that in the high dielectric layer HK 1 just after the densification annealing.
  • the high dielectric layer HK 1 can be densified by the densification annealing, since oxygen is lost from the high dielectric layer HK 1 , the oxygen density of the film is lowered.
  • the higher gate-leakage current flows as compared with the case where a film having a high oxygen density is applied. Therefore, by performing the oxygen supplying annealing to supplement the oxygen lost from the high dielectric layer HK 1 , a film with a high oxygen density can be formed, so that it is possible to suppress the flow of the gate-leakage current.
  • a film thickness of the oxygen supplying layer HK 2 that is, an oxygen supplying amount can be adjusted in the oxygen supplying annealing, oxygen does not reach the interface of the substrate SUB (single crystal silicon), and it is also possible not to increase the thickness of the interface layer IL.
  • both the high dielectric constant and the reduction of the oxygen deficiency of the high dielectric layer HK 1 forming the gate insulating film GI can be achieved.
  • a barrier metal film forming the cap layer CL is patterned to form a gate electrode GE made of the burrier metal film, and the gate insulating film GI other than that under the gate electrode GE is removed. Note that, in the first embodiment, the patterning for forming the gate electrode GE is performed after the oxygen supplying annealing, but it does not matter if the order is reversed.
  • the gate electrode GE is formed by patterning the barrier metal film forming the cap layer CL. Therefore, any barrier metal can be used for the cap layer CL as long as it functions to suppress the diffusion of oxygen and is suitable for the work function of the gate electrode GE.
  • the material of the cap layer CL of the n channel MIS transistor aluminum (Al), titanium (Ti), tantalum (Ta), and the like can be used other than the tantalum nitride.
  • ruthenium (Ru), platinum (Pt), nickel (Ni), and the like can be used as the material of the cap layer CL of the p channel MIS transistor.
  • both the cap layer CL and the gate electrode GE are made of tantalum nitride, but the process is also available in which, after the oxygen supplying annealing is performed using tantalum nitride as the material of the cap layer CL, the tantalum nitride is removed and then the gate electrode GE is formed from a metal material having an optimal work function.
  • n ⁇ semiconductor regions SA 1 are formed to form an LDD (Lightly Doped Drain) structure of the n channel MIS transistor.
  • sidewall spacers SS are formed on the sidewalls of the gate electrode GE.
  • the sidewall spacers SS are formed by depositing a silicon oxide film on the substrate SUB by CVD and then anisotropically etching the silicon oxide film.
  • the heat treatment is performed to the main surface of the substrate SUB to diffuse the impurity, thereby forming n + semiconductor regions (source, drain) SA 2 in the p well PW.
  • the heat treatment FGA: Forming Gas Annealing
  • FGA Forming Gas Annealing
  • FIG. 11 is a table showing the comparison between the transistor characteristics of the n channel MIS transistor according to the first embodiment (Qn in the description in FIG. 11 ) and the transistor characteristics of the n channel MIS transistor which has been studied by the inventor of the present invention (Q′n). Note that the transistor Q′n is manufactured in the same manufacturing process as that of the transistor Qn except that the step of forming the oxygen supplying layer HK 2 (hafnium oxide film with a film thickness of 4 ⁇ deposited by the ALD) is omitted.
  • the oxygen supplying layer HK 2 hafnium oxide film with a film thickness of 4 ⁇ deposited by the ALD
  • the equivalent oxide thicknesses (EOT) of the gate insulating films GI of the transistor Qn and the transistor Q′n are about 1.1 nm and about 1.0 nm, respectively. Therefore, the transistor characteristics of the transistor Qn and the transistor Q′n can be compared.
  • the gate-leakage current (Jg) and the electron mobility ( ⁇ ) between the transistor Qn and the transistor Q′n as the transistor characteristics the gate-leakage current of the transistor Qn is lower by about three orders of magnitude than that of the transistor Q′n, and the electron mobility of the transistor Qn is about two times higher than that of the transistor Q′n.
  • the MIS transistor according to the first embodiment can achieve both the high dielectric constant and the reduction of the oxygen deficiency of the high dielectric layer HK 1 forming the gate insulating film GI by the process including the densification annealing and the oxygen supplying annealing. Also, by forming the MIS transistor having the gate insulating film GI in which the oxygen deficiency has been suppressed, the transistor characteristics can be improved. Further, since the growth of the interface layer IL can be suppressed in the oxygen supplying annealing, a MIS transistor having a gate insulating film GI with the EOT of 1 nm or less can be formed.
  • hafnium-based oxide deposited by the ALD is used in the step of forming the oxygen supplying layer
  • aluminum oxide (Al 2 O 3 ) deposited by the ALD or tantalum oxide (Ta 2 O 5 ) deposited by the ALD is applied to form the oxygen supplying layer
  • the other steps in the second embodiment are similar to those in the first embodiment.
  • the oxygen supplying layer HK 2 functions to supply oxygen to the high dielectric layer HK 1 in the oxygen supplying annealing in order to supplement oxygen lost in the high dielectric layer HK 1 . Therefore, an oxygen supplying layer which has an oxygen concentration (oxygen proportion) higher than that in the high dielectric layer HK 1 just after the densification annealing in which the oxygen deficiency has occurred can be used as the oxygen supplying layer HK 2 . Accordingly, the oxygen supplying layer HK 2 is formed by depositing aluminum oxide (Al 2 O 3 ) or tantalum oxide (Ta 2 O 5 ) by the ALD using an H 2 O as a material.
  • Al 2 O 3 aluminum oxide
  • Ta 2 O 5 tantalum oxide
  • aluminum oxide (Al 2 O 3 ) is deposited by the ALD using, for example, an O (oxygen) material of H 2 O and TMA (Trimethylaluminum: AlMe 3 ) as an Al (aluminum) material.
  • tantalum oxide (Ta 2 O 5 ) is deposited by the ALD using, for example, an O (oxygen) material of H 2 O and TAIDEAT (Tertiaryamylimidotris (dimethlamido) tantalum: EtMe 2 CNTa(NMe 2 ) 3 ) as a Ta (tantalum) material.
  • FIG. 12 is a graph showing the content of OH group contained in aluminum oxide (Al 2 O 3 ) and tantalum oxide (Ta 2 O 5 ) deposited by the ALD.
  • FIG. 12 also shows the content of OH group contained in hafnium oxide (HfO 2 ) used as the oxygen supplying layer HK 2 in the first embodiment.
  • OH group acts as an oxygen supplying source, so that an absolute supplying amount relative to a certain amount of oxygen deficiency in the high dielectric layer HK 1 just after the densification annealing can be adjusted by the film thickness.
  • the film thickness of Ta 2 O 5 containing about 1% of OH group may be about half the thickness of HfO 2 containing about 0.5% of OH group.
  • the high dielectric layer HK 1 can be densified by the densification annealing, since oxygen is lost from the high dielectric layer HK 1 , the oxygen density of the film is lowered. Therefore, by performing the oxygen supplying annealing to supplement the oxygen lost from the high dielectric layer HK 1 , a film with a high oxygen density can be formed, so that it is possible to suppress the flow of the gate-leakage current. In other words, by forming the gate insulating film GI in which the oxygen deficiency has been suppressed, the transistor characteristics can be improved.
  • the hafnium-based oxide has been shown as the material of the high dielectric layer.
  • the high dielectric layer made of aluminum oxide (Al 2 O 3 ), tantalum oxide (Ta 2 OS), titanium oxide (TiO 2 ), lanthanum oxide (La 2 O 3 ), or zirconium oxide (ZrO 2 ) is also available.
  • the oxygen deficiency occurs due to the heat treatment in the high dielectric layer made of aluminum oxide, tantalum oxide, titanium oxide, lanthanum oxide, or zirconium oxide.
  • oxygen in the oxygen supplying layer is supplied to aluminum oxide, tantalum oxide, titanium oxide, lanthanum oxide, and zirconium oxide forming the high dielectric layer, so that both the high dielectric constant of the high dielectric layer and the reduction of the oxygen deficiency in the high dielectric layer can be achieved.
  • the present invention is widely utilized in a manufacture of semiconductor devices. In particular, it is utilized for manufacturing semiconductor devices having excellent transistor characteristics in the 32-nm technology and beyond.

Abstract

The transistor characteristics of a MIS transistor provided with a gate insulating film formed to contain oxide with a relative dielectric constant higher than that of silicon oxide are improved. After a high dielectric layer made of hafnium oxide is formed on a main surface of a semiconductor substrate, the main surface of the semiconductor substrate is heat-treated in a non-oxidation atmosphere. Next, an oxygen supplying layer made of hafnium oxide deposited by ALD and having a thickness smaller than that of the high dielectric layer is formed on the high dielectric layer, and a cap layer made of tantalum nitride is formed. Thereafter, the main surface of the semiconductor substrate is heat-treated.

Description

    CROSS-REFERENCE TO RELATED APPLICATION
  • The present application claims priority from Japanese Patent Application No. JP2007-128692 filed on May 15, 2007, the content of which is hereby incorporated by reference into this application.
    • TECHNICAL FIELD OF THE INVENTION
  • The present invention relates to a technology for manufacturing a semiconductor device. More particularly, it relates to a technology effectively applied to the manufacture of a semiconductor device provided with a MIS (Metal Insulator Semiconductor) transistor having a gate insulating film formed to contain oxide whose relative dielectric constant is higher than that of silicon oxide (SiO2).
    • BACKGROUND OF THE INVENTION
  • In recent years, with the trend of scaling down the size of MIS transistors constituting a semiconductor integrated circuit, the thickness of a gate insulating film made of silicon oxide has been rapidly reduced. However, when the thickness of the gate insulating film is reduced to about 2 nm, a gate-leakage phenomenon in which electrons in a silicon substrate pass through a gate insulating film to escape to a gate electrode becomes conspicuous due to the quantum effect called direct tunneling.
  • Therefore, studies on the replacement of a gate insulating film material to a high dielectric material whose relative dielectric constant is higher than that of silicon oxide (SiO2) have been proceeding. This is because, when a high dielectric film is used to form a gate insulating film, even if the capacitance of an equivalent silicon oxide thickness is the same, the actual physical thickness can be increased by a factor of “dielectric constant of high dielectric film/dielectric constant of silicon oxide film”, and as a result, the gate-leakage current can be reduced. As a high dielectric material, oxides typified by hafnium-based oxides such as Hf—O, Hf—Si—O, Hf—Si—O—N, Hf—Al—O, and Hf—Al—O—N have been studied.
  • Incidentally, the inventor of the present invention has made a prior-art search based on the invented results, in the light of a first aspect of forming a gate insulating film made of a high dielectric material and a gate electrode made of a metal material and a second aspect of capping a high dielectric material forming a gate insulating film. As a result, Japanese Patent Application Laid-Open Publication No. 2006-080133 (Patent Document 1) has been extracted regarding the first aspect, and Japanese Patent Application Laid-Open Publication No. 2006-310801 (Patent Document 2) has been extracted regarding the second aspect.
  • The main subject of Japanese Patent Application Laid-Open Publication No. 2006-080133 (Patent Document 1) is to form a gate insulating film by using hafnium oxide which is a high dielectric material and form gate electrodes of an n channel MIS transistor and a p channel MIS transistor by using gate electrode materials suitable for the respective work functions as a whole, and metal materials are used therein for achieving the main subject. However, the Patent Document 1 does not describe the aspect of capping the high dielectric film forming the gate insulating film.
  • The main subject of Japanese Patent Application Laid-Open Publication No. 2006-310801 (Patent Document 2) is to solve a problem of trapping which occurs at an interface between a high dielectric film and a polysilicon film forming a gate electrode as a whole, and the gate insulating film is capped by an intermediate layer (so-called buffer layer) before forming the gate electrode for achieving the main subject.
    • SUMMARY OF THE INVENTION
  • A gate insulating film made of oxide such as hafnium-based oxide as a high dielectric material is deposited on a semiconductor substrate by Atomic Layer Deposition (ALD), Chemical Vapor Deposition (CVD), or sputtering. However, since impurities such as carbon generated from a raw material and impurities such as OH generated from H2O oxidant remain in a film deposited in this manner, a density of the film becomes relatively low, so that a dielectric constant thereof is lowered. Therefore, in the manufacture of a gate insulating film made of oxide, for example, it is necessary to perform the rapid heat treatment in a non-oxidation atmosphere after an oxide film is formed, or it is necessary to perform the heat treatment at a low temperature in an oxygen atmosphere after an oxide film is formed.
  • However, although an oxide film formed by the rapid heat treatment in the non-oxidation atmosphere has sufficient densification, such an oxide film has oxygen deficiency which can be one of the defect sites to cause the deterioration of transistor characteristics such as mobility. On the other hand, although an oxide film formed by the heat treatment in the oxygen atmosphere can suppress the oxygen deficiency in the heat treatment, oxygen diffuses in the oxide to reach a silicon substrate and form an interface silicon oxide layer, and as a result, the capacitance of an equivalent silicon oxide thickness is increased.
  • As described above, according to the studies made by the inventor of the present invention, it has been found that it is difficult to achieve both the high dielectric constant and the reduction of the oxygen deficiency in the gate insulating film formed to contain oxide deposited on a semiconductor substrate.
  • An object of the present invention is to provide a technology capable of improving the transistor characteristics of a MIS transistor provided with a gate insulating film formed to contain oxide whose relative dielectric constant is higher than that of silicon oxide.
  • Another object of the present invention is to provide a technology capable of achieving the high dielectric constant of an oxide film, the reduction of oxygen deficiency in the oxide film, and the suppression of the interface silicon oxide growth.
  • The above and other objects and novel characteristics of the present invention will be apparent from the description of this specification and the accompanying drawings.
  • The typical ones of the inventions disclosed in this application will be briefly described as follows.
  • According to an embodiment of the present invention, first, (a) a high dielectric layer made of oxide whose relative dielectric constant is higher than that of silicon oxide is formed on a main surface of a semiconductor substrate. Next, (b) the main surface of the semiconductor substrate is heat-treated in a non-oxidation atmosphere. Next, (c) an oxygen supplying layer made of oxide having an oxygen proportion higher than that in the high dielectric layer just after the step (b) is formed on the high dielectric layer. Then, (d) a cap layer made of metal which suppresses diffusion of oxygen is formed on the oxygen supplying layer. Next, (e) the main surface of the semiconductor substrate is heat-treated.
  • By this means, since the high dielectric layer is densified by the heat treatment at the step (b), the high dielectric layer with a high relative dielectric constant can be obtained. Also, since oxygen in the oxygen supplying layer is supplied to the high dielectric layer by the heat treatment at the step (e), the high dielectric layer in which the oxygen deficiency is reduced can be obtained. In other words, it is possible to obtain the oxide in which the high dielectric constant of an oxide film, the reduction of oxygen deficiency in the oxide film, and the suppression of the interface silicon oxide growth can be achieved.
  • Note that Japanese Patent Application Laid-Open Publication No. 2006-080133 (Patent Document 1) and Japanese Patent Application Laid-Open Publication No. 2006-310801 (Patent Document 2) do not describe the formation of the oxygen supplying layer for supplying oxygen to the high dielectric layer. Also, different from Japanese Patent Application Laid-Open Publication No. 2006-310801 (Patent Document 2), the cap layer is not used as an intermediate layer (so-called buffer layer) for preventing the trapping which occurs at an interface between a gate insulating film and a gate electrode, but it is used for preventing oxygen in the oxygen supplying layer from diffusing into the atmosphere opposite to the high dielectric layer. Since oxygen does not diffuse into the atmosphere owing to the cap layer, oxygen in the oxygen supplying layer is supplied to the high dielectric layer.
  • The effects obtained by typical aspects of the present invention will be briefly described below.
  • According to the embodiment, it is possible to improve the transistor characteristics of a MIS transistor provided with a gate insulating film formed to contain oxide whose relative dielectric constant is higher than that of silicon oxide.
    • BRIEF DESCRIPTIONS OF THE DRAWINGS
  • FIG. 1 is a cross-sectional view showing a semiconductor device in a manufacturing process according to a first embodiment of the present invention;
  • FIG. 2 is an enlarged cross-sectional view showing the semiconductor device in the manufacturing process continued from FIG. 1;
  • FIG. 3 is an enlarged cross-sectional view showing the semiconductor device in the manufacturing process continued from FIG. 2;
  • FIG. 4 is an enlarged cross-sectional view showing the semiconductor device in the manufacturing process continued from FIG. 3;
  • FIG. 5 is an enlarged cross-sectional view showing the semiconductor device in the manufacturing process continued from FIG. 4;
  • FIG. 6 is an enlarged cross-sectional view showing the semiconductor device in the manufacturing process continued from FIG. 5;
  • FIG. 7 is a cross-sectional view showing the semiconductor device in the manufacturing process continued from FIG. 6;
  • FIG. 8 is a cross-sectional view showing the semiconductor device in the manufacturing process continued from FIG. 7;
  • FIG. 9 is a cross-sectional view showing the semiconductor device in the manufacturing process continued from FIG. 8;
  • FIG. 10 is a graph showing the content of residual OH group relative to a thickness of a hafnium oxide film deposited by ALD;
  • FIG. 11 is a table showing the comparison between the transistor characteristics of an n channel MIS transistor (Qn) according to the first embodiment and the transistor characteristics of an n channel MIS transistor (Q′n) studied by the inventor of the present invention; and
  • FIG. 12 is a graph showing the content of OH group contained in various oxides deposited by ALD in a second embodiment of the present invention.
    •  DESCRIPTIONS OF THE PREFERRED EMBODIMENTS
  • Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. Note that components having the same function are denoted by the same reference numbers throughout the drawings for describing the embodiment, and the repetitive description thereof will be omitted.
    • First Embodiment
  • In the first embodiment, the present invention is applied to a manufacturing method of an n channel MIS transistor, which will be described with reference to FIG. 1 to FIG. 9. FIG. 1 to FIG. 9 are cross-sectional views schematically showing a semiconductor device in a manufacturing process, in which FIG. 2 to FIG. 6 show a principal part of the semiconductor device in an enlarged manner. Note that a p channel MIS transistor has an opposite polarity to that of an n channel MIS transistor, and the present invention can also be applied to a manufacturing method of a p channel MIS transistor.
  • As shown in FIG. 1, element isolation trenches ID are first formed in a main surface (element formation surface) of a semiconductor substrate (hereinafter, referred to as substrate) SUB made of, for example, p type single crystal silicon by the well-known STI (Shallow Trench Isolation) technique. Next, after boron is ion-implanted in an n channel MIS transistor formation region of the substrate SUB, an impurity for adjusting a threshold voltage of the MIS transistor is ion-implanted. Then, by heat-treating the main surface of the substrate SUB, the impurity is diffused in the substrate SUB, thereby forming a p well PW in the main surface of the substrate SUB. Next, by removing a natural oxide film on the surface of the substrate SUB (p well PW) using wet etching solution such as hydrofluoric acid, the surface (silicon surface) of the substrate SUB is exposed.
  • Subsequently, as shown in FIG. 2, after an interface layer IL made of silicon oxide (SiO2) is formed on the main surface (surface of the p well PW) of the substrate SUB, a high dielectric layer HK1 made of oxide whose relative dielectric constant is higher than that of silicon oxide is formed on the interface layer IL. The high dielectric layer HK1 forms a gate insulating film of an n channel MIS transistor, and it is made of, for example, hafnium oxide (HfO2). In the first embodiment, the interface layer IL is provided for reducing the defect generated when the high dielectric layer HK1 (hafnium oxide) is directly formed on the substrate SUB (single crystal silicon). Also, since the interface layer IL is included in the gate insulating film, it is preferable to reduce the film thickness of the interface layer IL as far as possible in order to obtain a gate insulating film with a high relative dielectric constant.
  • In the first embodiment, after a natural oxide film is removed using diluted hydrofluoric acid solution, the silicon oxide (SiO2) forming the interface layer IL is formed by performing the high temperature thermal oxidation to the main surface of the substrate SUB at 950° C. or higher, and a film thickness of the silicon oxide is, for example, 0.3 nm.
  • Further, the hafnium oxide (HfO2) forming the high dielectric film HK1 is deposited by Atomic Layer Deposition (ALD) using, for example, an O (oxygen) material of H2O (water) and an Hf (hafnium) material of TDMAH (Tetrakis-Dimethylamido-Hafnium: Hf(NMe2)4), and a film thickness thereof is, for example, 2.4 nm.
  • Here, oxides such as Hf—Si—O, Hf—Si—O—N, Hf—Al—O, Hf—Al—O—N, Hf—Ta—O, Hf—Ti—O, Hf—La—O, Hf—Y—O, Hf—Ta—Si—O, Hf—Ti—Si—O, Hf—La—Si—O and Hf—Y—Si—O can be applied as the high dielectric layer HK1 other than hafnium oxide (Hf—O). In the present invention, a material containing oxygen (O) and hafnium (Hf) and having relative dielectric constant higher than that of silicon oxide (SiO2) is referred to as “hafnium-based oxide”.
  • When the ALD is used for forming hafnium-based oxide, materials for the respective oxides are used in addition to the O material of H2O gas and the Hf material of TDMAH (Hf(NMe2)4). For example, TDMAS (Trisdimethlaminosilane: HSi(NMe2)3) is used as an Si (silicon) material. Also, TMA (Trimethylaluminum: AlMe3) is used as an Al (aluminum) material. Also, TAIDEAT (tertiaryamylimidotris (dimethlamido) tantalum: EtMe2CNTa(NMe2)3) is used as a Ta (tantalum) material. Also, TDMAT (Tetrakisdimethylaminotitanium: Ti(NMe2)3) is used as a Ti (titanium) material. Also, Trisethylcyclopentadienylyttrium: Y(EtCp)3 is used as a Y (yttrium) material. Also, Trisethylcyclopentadienyllanthanum: La(EtCp)3 is used as an La (lanthanum) material. Further, the nitridation of Hf—Si—O—N and Hf—Al—O—N is fabricated by the nitridation by the plasma nitrogen and the nitridation by the heat treatment using ammonia gas after depositing an Hf—Si—O film or an Hf—Al—O film by the ALD.
  • Also, in the first embodiment, the ALD is used for the formation of the high dielectric layer HK1, but the formation method of the high dielectric layer HK1 is not limited to this and the high dielectric layer HK1 can be formed by sputtering and CVD. Note that the oxygen supplying layer is formed at a later step by depositing the hafnium-based oxide, and the hafnium-based oxide is deposited by the ALD, not by the sputtering or CVD.
  • Subsequently, as shown in FIG. 3, the main surface of the substrate SUB is heat-treated in a non-oxidation atmosphere (for example, nitrogen, hydrogen, argon or the like) where an oxygen concentration is ppm (parts per million) or less in a temperature range of 600° C. to 1000° C. The high dielectric layer HK1 is densified at this step. The heat treatment for densifying the high dielectric layer HK1 is referred to as “densification annealing” in the present invention.
  • Since impurities such as carbon generated from a raw material and impurities such as OH generated from H2O oxidant remain in a film of the high dielectric layer HK1 just deposited, a density of the film becomes relatively low, so that the dielectric constant of the film is lowered. Therefore, by performing the densification annealing after the film formation, the densification and the high dielectric constant of the high dielectric layer HK1 can be achieved.
  • Further, by performing the densification annealing in a non-oxidation atmosphere, the formation of Si—O bonding at the interface of a substrate SUB (single crystal silicon) can be prevented. When the densification annealing is performed in an atmosphere containing oxygen (O), external oxygen diffuses in the high dielectric layer HK1 made of hafnium oxide and reaches the substrate SUB made of single crystal silicon, thereby forming Si—O bonding at an interface between the high dielectric layer HK1 and the substrate SUB made of single crystal silicon. As a result, a part of the gate insulating film changes to a silicon oxide film. In other words, the interface layer IL made of silicon oxide becomes thick, so that the dielectric constant of the gate insulating film lowers. Therefore, by performing the densification annealing in the non-oxidation atmosphere, the formation of Si—O bonding at an interface can be prevented.
  • Further, when the rapid heat treatment of Post Deposition Annealing (PDA) in which rapid heating and rapid cooling are performed (for example, 1000° C./sec) in the non-oxidation atmosphere is utilized in the densification annealing step, the high dielectric layer HK1 can be densified without increasing the film thickness of the interface layer IL made of silicon oxide.
  • However, if the densification annealing is performed, oxygen (O) is lost while maintaining the densification. FIG. 3 shows the case where the lost oxygen is discharged in the atmosphere, and oxygen deficient portions DP are generated in the high dielectric layer HK1. Note that the process for reducing the oxygen deficient portions DP is performed at a step (oxygen supplying annealing step) described later.
  • Subsequently, as shown in FIG. 4, an oxygen supplying layer HK2 made of oxide having an oxygen proportion higher than that in the high dielectric layer HK1 just after the densification annealing is formed. In the first embodiment, as the oxygen supplying layer HK2 having an oxygen proportion higher than that in the high dielectric layer HK1 just after the densification annealing in which oxygen deficiency has occurred, a hafnium-based oxide film deposited by the ALD using an O (oxygen) material of H2O and an Hf (hafnium) material of TDMAH (Hf(NMe2)4) may be applied. In the ALD, an atomic layer is deposited one by one on the substrate SUB placed in a chamber by repeating a cycle comprising the absorption of molecules of raw material compound by each monolayer, the film formation by the reaction thereof, the removal of excessive molecules by purge, the film formation by the reaction with H2O oxidant, and the removal of excessive molecules by purge. Therefore, a film thickness of the oxygen supplying layer HK2 made of a hafnium-based oxide film can be controlled by the number of cycles.
  • The hafnium-based oxide film deposited by the ALD quantitatively contains residual OH group. Therefore, a proportion of oxygen in the hafnium-based oxide film (oxygen supplying layer HK2) is higher than that in the hafnium-based oxide film (high dielectric layer HK1) just after the densification annealing in which oxygen deficiency has occurred. The residual oxygen functions to supplement (supply) the oxygen lost in the high dielectric layer HK1 at a step described later. In other words, the oxygen supplying layer HK2 functions as an oxygen supplying source, and an absolute supplying amount of oxygen can be adjusted by the film thickness of the oxygen supplying layer HK2. Therefore, the ALD which can control the film thickness in an atomic level is effective for the formation of the oxygen supplying layer HK2.
  • For example, since H2O is used as a raw material, the hafnium oxide film deposited by the ALD contains residual OH group of about 0.5%. FIG. 10 shows the content of residual OH group relative to a thickness of a hafnium oxide film deposited by the ALD. As shown in FIG. 10, it can be understood that the OH groups contained in the hafnium oxide film increase as the number of cycles, that is, the film thickness is increased. Accordingly, the absolute supplying amount is adjusted by the film thickness of the oxygen supplying layer HK2 made of hafnium oxide deposited by the ALD so that oxygen can be sufficiently supplied to the high dielectric layer HK1 in which the oxygen deficiency has occurred due to the densification annealing. In the first embodiment, the film thickness of the oxygen supplying layer HK2 made of a hafnium oxide film deposited by the ALD is adjusted to, for example, 4 Å.
  • Incidentally, as the method for forming hafnium-based oxide, the sputtering and the CVD are known in addition to the ALD. However, in the sputtering or the CVD, oxygen in the deposited film does not become excessive, so that the oxygen supplying layer HK2 having an oxygen proportion higher than that in the high dielectric layer HK1 just after the densification annealing in which oxygen deficiency has occurred cannot be formed. Therefore, the ALD using H2O as a material is used.
  • Subsequently, as shown in FIG. 5, a cap layer CL made of metal for preventing oxygen from diffusing is formed on the oxygen supplying layer HK2. In other words, the oxygen supplying layer HK2 is capped by the cap layer CL. The cap layer CL is made of a metal film (barrier metal film) provided for preventing oxygen from being discharged into atmosphere (forming a barrier) during heat treatment when the main surface of the substrate SUB is heat-treated at a later step (oxygen supplying annealing step). In the first embodiment, the cap layer CL is made of, for example, tantalum nitride (TaN) formed by sputtering, and a film thickness thereof is, for example, 20 nm.
  • Subsequently, as shown in FIG. 6, the main surface of the substrate SUB is heat-treated in a temperature range of 950° C. to 1150° C., for example, in nitrogen (N2) atmosphere. In this step, oxygen remaining in the oxygen supplying layer HK2 is supplied to the high dielectric layer HK1 to supplement the oxygen lost from the high dielectric HK1. In other words, the oxygen deficient portions DP which have occurred due to the densification annealing described with reference to FIG. 3 are reduced. Note that, in the present invention, the heat treatment for supplying oxygen to the high dielectric layer HK1 is referred to as “oxygen supplying annealing”.
  • The high dielectric layer HK1 supplemented with oxygen in this manner forms the gate insulating film GI together with the interface layer IL and the oxygen supplying layer HK2. In the first embodiment, the hafnium-based oxide is used as a material of the oxygen supplying layer HK2, but any oxide can be used as long as it has an oxygen proportion higher than that in the high dielectric layer HK1 just after the densification annealing. However, in order to obtain the gate insulating film GI with a high dielectric constant, it is desirable that a material of the oxygen supplying layer HK2 has a relative dielectric constant higher than that of silicon oxide like hafnium-based oxide.
  • Although the high dielectric layer HK1 can be densified by the densification annealing, since oxygen is lost from the high dielectric layer HK1, the oxygen density of the film is lowered. When such a film with a low oxygen density is applied to the gate insulating film GI, the higher gate-leakage current flows as compared with the case where a film having a high oxygen density is applied. Therefore, by performing the oxygen supplying annealing to supplement the oxygen lost from the high dielectric layer HK1, a film with a high oxygen density can be formed, so that it is possible to suppress the flow of the gate-leakage current. Also, since a film thickness of the oxygen supplying layer HK2, that is, an oxygen supplying amount can be adjusted in the oxygen supplying annealing, oxygen does not reach the interface of the substrate SUB (single crystal silicon), and it is also possible not to increase the thickness of the interface layer IL.
  • Through the above-described process including the densification annealing and the oxygen supplying annealing, both the high dielectric constant and the reduction of the oxygen deficiency of the high dielectric layer HK1 forming the gate insulating film GI can be achieved.
  • Subsequently, as shown in FIG. 7, a barrier metal film forming the cap layer CL is patterned to form a gate electrode GE made of the burrier metal film, and the gate insulating film GI other than that under the gate electrode GE is removed. Note that, in the first embodiment, the patterning for forming the gate electrode GE is performed after the oxygen supplying annealing, but it does not matter if the order is reversed.
  • In the first embodiment, the gate electrode GE is formed by patterning the barrier metal film forming the cap layer CL. Therefore, any barrier metal can be used for the cap layer CL as long as it functions to suppress the diffusion of oxygen and is suitable for the work function of the gate electrode GE. As the material of the cap layer CL of the n channel MIS transistor, aluminum (Al), titanium (Ti), tantalum (Ta), and the like can be used other than the tantalum nitride. Further, as the material of the cap layer CL of the p channel MIS transistor, ruthenium (Ru), platinum (Pt), nickel (Ni), and the like can be used.
  • Further, in the first embodiment, both the cap layer CL and the gate electrode GE are made of tantalum nitride, but the process is also available in which, after the oxygen supplying annealing is performed using tantalum nitride as the material of the cap layer CL, the tantalum nitride is removed and then the gate electrode GE is formed from a metal material having an optimal work function.
  • Subsequently, as shown in FIG. 8, phosphorus or arsenic is ion-implanted into a p well PW to form n− semiconductor regions SA1. The n− semiconductor regions SA1 are formed to form an LDD (Lightly Doped Drain) structure of the n channel MIS transistor.
  • Subsequently, as shown in FIG. 9, sidewall spacers SS are formed on the sidewalls of the gate electrode GE. The sidewall spacers SS are formed by depositing a silicon oxide film on the substrate SUB by CVD and then anisotropically etching the silicon oxide film. Next, after phosphorus or arsenic is ion-implanted into the p well PW, the heat treatment is performed to the main surface of the substrate SUB to diffuse the impurity, thereby forming n+ semiconductor regions (source, drain) SA2 in the p well PW. Thereafter, after a wiring step, the heat treatment (FGA: Forming Gas Annealing) is finally performed in a hydrogen atmosphere at a temperature of 400° C., so that a semiconductor device provided with an n channel MIS transistor is completed.
  • FIG. 11 is a table showing the comparison between the transistor characteristics of the n channel MIS transistor according to the first embodiment (Qn in the description in FIG. 11) and the transistor characteristics of the n channel MIS transistor which has been studied by the inventor of the present invention (Q′n). Note that the transistor Q′n is manufactured in the same manufacturing process as that of the transistor Qn except that the step of forming the oxygen supplying layer HK2 (hafnium oxide film with a film thickness of 4 Å deposited by the ALD) is omitted.
  • As shown in FIG. 11, the equivalent oxide thicknesses (EOT) of the gate insulating films GI of the transistor Qn and the transistor Q′n are about 1.1 nm and about 1.0 nm, respectively. Therefore, the transistor characteristics of the transistor Qn and the transistor Q′n can be compared. When comparing the gate-leakage current (Jg) and the electron mobility (μ) between the transistor Qn and the transistor Q′n as the transistor characteristics, the gate-leakage current of the transistor Qn is lower by about three orders of magnitude than that of the transistor Q′n, and the electron mobility of the transistor Qn is about two times higher than that of the transistor Q′n.
  • As described above, the MIS transistor according to the first embodiment can achieve both the high dielectric constant and the reduction of the oxygen deficiency of the high dielectric layer HK1 forming the gate insulating film GI by the process including the densification annealing and the oxygen supplying annealing. Also, by forming the MIS transistor having the gate insulating film GI in which the oxygen deficiency has been suppressed, the transistor characteristics can be improved. Further, since the growth of the interface layer IL can be suppressed in the oxygen supplying annealing, a MIS transistor having a gate insulating film GI with the EOT of 1 nm or less can be formed.
    • Second Embodiment
  • Although the case where hafnium-based oxide deposited by the ALD is used in the step of forming the oxygen supplying layer has been described in the first embodiment, the case where aluminum oxide (Al2O3) deposited by the ALD or tantalum oxide (Ta2O5) deposited by the ALD is applied to form the oxygen supplying layer will be described in the second embodiment. Note that the other steps in the second embodiment are similar to those in the first embodiment.
  • As described in the first embodiment, the oxygen supplying layer HK2 functions to supply oxygen to the high dielectric layer HK1 in the oxygen supplying annealing in order to supplement oxygen lost in the high dielectric layer HK1. Therefore, an oxygen supplying layer which has an oxygen concentration (oxygen proportion) higher than that in the high dielectric layer HK1 just after the densification annealing in which the oxygen deficiency has occurred can be used as the oxygen supplying layer HK2. Accordingly, the oxygen supplying layer HK2 is formed by depositing aluminum oxide (Al2O3) or tantalum oxide (Ta2O5) by the ALD using an H2O as a material.
  • In the second embodiment, aluminum oxide (Al2O3) is deposited by the ALD using, for example, an O (oxygen) material of H2O and TMA (Trimethylaluminum: AlMe3) as an Al (aluminum) material. Alternatively, tantalum oxide (Ta2O5) is deposited by the ALD using, for example, an O (oxygen) material of H2O and TAIDEAT (Tertiaryamylimidotris (dimethlamido) tantalum: EtMe2CNTa(NMe2)3) as a Ta (tantalum) material.
  • FIG. 12 is a graph showing the content of OH group contained in aluminum oxide (Al2O3) and tantalum oxide (Ta2O5) deposited by the ALD. FIG. 12 also shows the content of OH group contained in hafnium oxide (HfO2) used as the oxygen supplying layer HK2 in the first embodiment.
  • As shown in FIG. 12, it can be understood that about 0.5% of OH group is contained in HfO2, about 0.3% of OH group is contained in A1 2O3, and about 1% of OH group is contained in Ta2O5. The OH group acts as an oxygen supplying source, so that an absolute supplying amount relative to a certain amount of oxygen deficiency in the high dielectric layer HK1 just after the densification annealing can be adjusted by the film thickness. Note that, when oxygen is supplied to the high dielectric layer HK1 including a certain amount of oxygen deficiency, the film thickness of Ta2O5 containing about 1% of OH group may be about half the thickness of HfO2 containing about 0.5% of OH group.
  • Although the high dielectric layer HK1 can be densified by the densification annealing, since oxygen is lost from the high dielectric layer HK1, the oxygen density of the film is lowered. Therefore, by performing the oxygen supplying annealing to supplement the oxygen lost from the high dielectric layer HK1, a film with a high oxygen density can be formed, so that it is possible to suppress the flow of the gate-leakage current. In other words, by forming the gate insulating film GI in which the oxygen deficiency has been suppressed, the transistor characteristics can be improved.
  • In the foregoing, the invention made by the inventor of the present invention has been concretely described based on the embodiments. However, it is needless to say that the present invention is not limited to the foregoing embodiments and various modifications and alterations can be made within the scope of the present invention.
  • For example, in the above-mentioned embodiments, the hafnium-based oxide (Hf—O) has been shown as the material of the high dielectric layer. However, the high dielectric layer made of aluminum oxide (Al2O3), tantalum oxide (Ta2OS), titanium oxide (TiO2), lanthanum oxide (La2O3), or zirconium oxide (ZrO2) is also available. Similar to the hafnium-based oxide shown in the above-mentioned embodiments, the oxygen deficiency occurs due to the heat treatment in the high dielectric layer made of aluminum oxide, tantalum oxide, titanium oxide, lanthanum oxide, or zirconium oxide. However, oxygen in the oxygen supplying layer is supplied to aluminum oxide, tantalum oxide, titanium oxide, lanthanum oxide, and zirconium oxide forming the high dielectric layer, so that both the high dielectric constant of the high dielectric layer and the reduction of the oxygen deficiency in the high dielectric layer can be achieved.
  • The present invention is widely utilized in a manufacture of semiconductor devices. In particular, it is utilized for manufacturing semiconductor devices having excellent transistor characteristics in the 32-nm technology and beyond.

Claims (7)

1. A manufacturing method of a semiconductor device comprising the steps of: forming a gate insulating film of a MIS transistor on a semiconductor substrate; and forming a gate electrode of the MIS transistor on the gate insulating film,
wherein the step of forming the gate insulating film on the semiconductor substrate comprises the steps of:
(a) forming a first layer made of oxide with a relative dielectric constant higher than that of silicon oxide on a main surface of the semiconductor substrate;
(b) after the step (a), heat-treating the main surface of the semiconductor substrate in a non-oxidation atmosphere;
(c) forming, on the first layer, a second layer made of oxide having an oxygen proportion higher than that in the first layer just after the step (b);
(d) forming, on the second layer, a cap layer made of metal suppressing diffusion of oxygen; and
(e) after the step (d), heat-treating the main surface of the semiconductor substrate.
2. The manufacturing method of a semiconductor device according to claim 1,
wherein, in the step (c), a hafnium oxide film forming the second layer is formed on the first layer by ALD using water as an oxygen material.
3. The manufacturing method of a semiconductor device according to claim 1,
wherein, in the step (c), an aluminum oxide film forming the second layer is formed on the first layer by ALD using water as an oxygen material.
4. The manufacturing method of a semiconductor device according to claim 1,
wherein, in the step (c), a tantalum oxide film forming the second layer is formed on the first layer by ALD using water as an oxygen material.
5. The manufacturing method of a semiconductor device according to claim 1, further comprising the step of:
(f) forming the gate electrode made of the cap layer by patterning the cap layer.
6. The manufacturing method of a semiconductor device according to claim 1,
wherein, in the step (b), the first layer is densified.
7. The manufacturing method of a semiconductor device according to claim 1,
wherein, in the step (e), oxygen is supplied from the second layer to the first layer.
US12/116,940 2007-05-15 2008-05-07 Manufacturing method of semiconductor device Abandoned US20090011608A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US12/752,828 US8168547B2 (en) 2007-05-15 2010-04-01 Manufacturing method of semiconductor device

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JPJP2007-128692 2007-05-15
JP2007128692A JP5103056B2 (en) 2007-05-15 2007-05-15 Manufacturing method of semiconductor device

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US12/752,828 Continuation US8168547B2 (en) 2007-05-15 2010-04-01 Manufacturing method of semiconductor device

Publications (1)

Publication Number Publication Date
US20090011608A1 true US20090011608A1 (en) 2009-01-08

Family

ID=40147704

Family Applications (2)

Application Number Title Priority Date Filing Date
US12/116,940 Abandoned US20090011608A1 (en) 2007-05-15 2008-05-07 Manufacturing method of semiconductor device
US12/752,828 Active US8168547B2 (en) 2007-05-15 2010-04-01 Manufacturing method of semiconductor device

Family Applications After (1)

Application Number Title Priority Date Filing Date
US12/752,828 Active US8168547B2 (en) 2007-05-15 2010-04-01 Manufacturing method of semiconductor device

Country Status (2)

Country Link
US (2) US20090011608A1 (en)
JP (1) JP5103056B2 (en)

Cited By (345)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090280648A1 (en) * 2008-05-09 2009-11-12 Cyprian Emeka Uzoh Method and apparatus for 3d interconnect
US20100248464A1 (en) * 2009-03-26 2010-09-30 Tokyo Electron Limited METHOD FOR FORMING A HIGH-k GATE STACK WITH REDUCED EFFECTIVE OXIDE THICKNESS
US20100270626A1 (en) * 2009-04-27 2010-10-28 Raisanen Petri I Atomic layer deposition of hafnium lanthanum oxides
US20100301429A1 (en) * 2009-05-29 2010-12-02 Renesas Technology Corp. Semiconductor device and method of manufacturing the same
US8728832B2 (en) 2012-05-07 2014-05-20 Asm Ip Holdings B.V. Semiconductor device dielectric interface layer
US8802201B2 (en) 2009-08-14 2014-08-12 Asm America, Inc. Systems and methods for thin-film deposition of metal oxides using excited nitrogen-oxygen species
US8877655B2 (en) 2010-05-07 2014-11-04 Asm America, Inc. Systems and methods for thin-film deposition of metal oxides using excited nitrogen-oxygen species
US8883270B2 (en) 2009-08-14 2014-11-11 Asm America, Inc. Systems and methods for thin-film deposition of metal oxides using excited nitrogen—oxygen species
US8894870B2 (en) 2013-02-01 2014-11-25 Asm Ip Holding B.V. Multi-step method and apparatus for etching compounds containing a metal
US8921176B2 (en) * 2012-06-11 2014-12-30 Freescale Semiconductor, Inc. Modified high-K gate dielectric stack
US8933375B2 (en) 2012-06-27 2015-01-13 Asm Ip Holding B.V. Susceptor heater and method of heating a substrate
US8946830B2 (en) 2012-04-04 2015-02-03 Asm Ip Holdings B.V. Metal oxide protective layer for a semiconductor device
US8986456B2 (en) 2006-10-10 2015-03-24 Asm America, Inc. Precursor delivery system
US8993054B2 (en) 2013-07-12 2015-03-31 Asm Ip Holding B.V. Method and system to reduce outgassing in a reaction chamber
US9005539B2 (en) 2011-11-23 2015-04-14 Asm Ip Holding B.V. Chamber sealing member
US9017481B1 (en) 2011-10-28 2015-04-28 Asm America, Inc. Process feed management for semiconductor substrate processing
US9018111B2 (en) 2013-07-22 2015-04-28 Asm Ip Holding B.V. Semiconductor reaction chamber with plasma capabilities
US9021985B2 (en) 2012-09-12 2015-05-05 Asm Ip Holdings B.V. Process gas management for an inductively-coupled plasma deposition reactor
US9029253B2 (en) 2012-05-02 2015-05-12 Asm Ip Holding B.V. Phase-stabilized thin films, structures and devices including the thin films, and methods of forming same
US9096931B2 (en) 2011-10-27 2015-08-04 Asm America, Inc Deposition valve assembly and method of heating the same
US9117866B2 (en) 2012-07-31 2015-08-25 Asm Ip Holding B.V. Apparatus and method for calculating a wafer position in a processing chamber under process conditions
US9167625B2 (en) 2011-11-23 2015-10-20 Asm Ip Holding B.V. Radiation shielding for a substrate holder
US9169975B2 (en) 2012-08-28 2015-10-27 Asm Ip Holding B.V. Systems and methods for mass flow controller verification
US9202727B2 (en) 2012-03-02 2015-12-01 ASM IP Holding Susceptor heater shim
US9240412B2 (en) 2013-09-27 2016-01-19 Asm Ip Holding B.V. Semiconductor structure and device and methods of forming same using selective epitaxial process
US9324811B2 (en) 2012-09-26 2016-04-26 Asm Ip Holding B.V. Structures and devices including a tensile-stressed silicon arsenic layer and methods of forming same
US9341296B2 (en) 2011-10-27 2016-05-17 Asm America, Inc. Heater jacket for a fluid line
US9396934B2 (en) 2013-08-14 2016-07-19 Asm Ip Holding B.V. Methods of forming films including germanium tin and structures and devices including the films
US9394608B2 (en) 2009-04-06 2016-07-19 Asm America, Inc. Semiconductor processing reactor and components thereof
US9404587B2 (en) 2014-04-24 2016-08-02 ASM IP Holding B.V Lockout tagout for semiconductor vacuum valve
US9447498B2 (en) 2014-03-18 2016-09-20 Asm Ip Holding B.V. Method for performing uniform processing in gas system-sharing multiple reaction chambers
US9455138B1 (en) 2015-11-10 2016-09-27 Asm Ip Holding B.V. Method for forming dielectric film in trenches by PEALD using H-containing gas
US20160308000A1 (en) * 2014-09-19 2016-10-20 Samsung Electronics Co., Ltd. Semiconductor device and method of fabricating the same
US9478415B2 (en) 2015-02-13 2016-10-25 Asm Ip Holding B.V. Method for forming film having low resistance and shallow junction depth
US9484191B2 (en) 2013-03-08 2016-11-01 Asm Ip Holding B.V. Pulsed remote plasma method and system
US9543180B2 (en) 2014-08-01 2017-01-10 Asm Ip Holding B.V. Apparatus and method for transporting wafers between wafer carrier and process tool under vacuum
US9556516B2 (en) 2013-10-09 2017-01-31 ASM IP Holding B.V Method for forming Ti-containing film by PEALD using TDMAT or TDEAT
US9558931B2 (en) 2012-07-27 2017-01-31 Asm Ip Holding B.V. System and method for gas-phase sulfur passivation of a semiconductor surface
US9589770B2 (en) 2013-03-08 2017-03-07 Asm Ip Holding B.V. Method and systems for in-situ formation of intermediate reactive species
US9605343B2 (en) 2013-11-13 2017-03-28 Asm Ip Holding B.V. Method for forming conformal carbon films, structures conformal carbon film, and system of forming same
US9607837B1 (en) 2015-12-21 2017-03-28 Asm Ip Holding B.V. Method for forming silicon oxide cap layer for solid state diffusion process
US9627221B1 (en) 2015-12-28 2017-04-18 Asm Ip Holding B.V. Continuous process incorporating atomic layer etching
US9640416B2 (en) 2012-12-26 2017-05-02 Asm Ip Holding B.V. Single-and dual-chamber module-attachable wafer-handling chamber
US9647114B2 (en) 2015-08-14 2017-05-09 Asm Ip Holding B.V. Methods of forming highly p-type doped germanium tin films and structures and devices including the films
US9659799B2 (en) 2012-08-28 2017-05-23 Asm Ip Holding B.V. Systems and methods for dynamic semiconductor process scheduling
US9657845B2 (en) 2014-10-07 2017-05-23 Asm Ip Holding B.V. Variable conductance gas distribution apparatus and method
US9711345B2 (en) 2015-08-25 2017-07-18 Asm Ip Holding B.V. Method for forming aluminum nitride-based film by PEALD
US9735024B2 (en) 2015-12-28 2017-08-15 Asm Ip Holding B.V. Method of atomic layer etching using functional group-containing fluorocarbon
US9754779B1 (en) 2016-02-19 2017-09-05 Asm Ip Holding B.V. Method for forming silicon nitride film selectively on sidewalls or flat surfaces of trenches
US9793148B2 (en) 2011-06-22 2017-10-17 Asm Japan K.K. Method for positioning wafers in multiple wafer transport
US9793115B2 (en) 2013-08-14 2017-10-17 Asm Ip Holding B.V. Structures and devices including germanium-tin films and methods of forming same
US9793135B1 (en) 2016-07-14 2017-10-17 ASM IP Holding B.V Method of cyclic dry etching using etchant film
US9812320B1 (en) 2016-07-28 2017-11-07 Asm Ip Holding B.V. Method and apparatus for filling a gap
US9859151B1 (en) 2016-07-08 2018-01-02 Asm Ip Holding B.V. Selective film deposition method to form air gaps
US9887082B1 (en) 2016-07-28 2018-02-06 Asm Ip Holding B.V. Method and apparatus for filling a gap
US9890456B2 (en) 2014-08-21 2018-02-13 Asm Ip Holding B.V. Method and system for in situ formation of gas-phase compounds
US9891521B2 (en) 2014-11-19 2018-02-13 Asm Ip Holding B.V. Method for depositing thin film
US9899291B2 (en) 2015-07-13 2018-02-20 Asm Ip Holding B.V. Method for protecting layer by forming hydrocarbon-based extremely thin film
US9899405B2 (en) 2014-12-22 2018-02-20 Asm Ip Holding B.V. Semiconductor device and manufacturing method thereof
US9905420B2 (en) 2015-12-01 2018-02-27 Asm Ip Holding B.V. Methods of forming silicon germanium tin films and structures and devices including the films
US9909214B2 (en) 2015-10-15 2018-03-06 Asm Ip Holding B.V. Method for depositing dielectric film in trenches by PEALD
US9916980B1 (en) 2016-12-15 2018-03-13 Asm Ip Holding B.V. Method of forming a structure on a substrate
US9960072B2 (en) 2015-09-29 2018-05-01 Asm Ip Holding B.V. Variable adjustment for precise matching of multiple chamber cavity housings
US10032628B2 (en) 2016-05-02 2018-07-24 Asm Ip Holding B.V. Source/drain performance through conformal solid state doping
US10043661B2 (en) 2015-07-13 2018-08-07 Asm Ip Holding B.V. Method for protecting layer by forming hydrocarbon-based extremely thin film
US10083836B2 (en) 2015-07-24 2018-09-25 Asm Ip Holding B.V. Formation of boron-doped titanium metal films with high work function
US10087525B2 (en) 2015-08-04 2018-10-02 Asm Ip Holding B.V. Variable gap hard stop design
US10090316B2 (en) 2016-09-01 2018-10-02 Asm Ip Holding B.V. 3D stacked multilayer semiconductor memory using doped select transistor channel
US10087522B2 (en) 2016-04-21 2018-10-02 Asm Ip Holding B.V. Deposition of metal borides
EP2695966B1 (en) * 2012-08-06 2018-10-03 IMEC vzw ALD method
USD830981S1 (en) 2017-04-07 2018-10-16 Asm Ip Holding B.V. Susceptor for semiconductor substrate processing apparatus
US10103040B1 (en) 2017-03-31 2018-10-16 Asm Ip Holding B.V. Apparatus and method for manufacturing a semiconductor device
US10134757B2 (en) 2016-11-07 2018-11-20 Asm Ip Holding B.V. Method of processing a substrate and a device manufactured by using the method
US10167557B2 (en) 2014-03-18 2019-01-01 Asm Ip Holding B.V. Gas distribution system, reactor including the system, and methods of using the same
US10177025B2 (en) 2016-07-28 2019-01-08 Asm Ip Holding B.V. Method and apparatus for filling a gap
US10179947B2 (en) 2013-11-26 2019-01-15 Asm Ip Holding B.V. Method for forming conformal nitrided, oxidized, or carbonized dielectric film by atomic layer deposition
US10190213B2 (en) 2016-04-21 2019-01-29 Asm Ip Holding B.V. Deposition of metal borides
US10211308B2 (en) 2015-10-21 2019-02-19 Asm Ip Holding B.V. NbMC layers
US10229833B2 (en) 2016-11-01 2019-03-12 Asm Ip Holding B.V. Methods for forming a transition metal nitride film on a substrate by atomic layer deposition and related semiconductor device structures
US10236177B1 (en) 2017-08-22 2019-03-19 ASM IP Holding B.V.. Methods for depositing a doped germanium tin semiconductor and related semiconductor device structures
US10249524B2 (en) 2017-08-09 2019-04-02 Asm Ip Holding B.V. Cassette holder assembly for a substrate cassette and holding member for use in such assembly
US10249577B2 (en) 2016-05-17 2019-04-02 Asm Ip Holding B.V. Method of forming metal interconnection and method of fabricating semiconductor apparatus using the method
US10262859B2 (en) 2016-03-24 2019-04-16 Asm Ip Holding B.V. Process for forming a film on a substrate using multi-port injection assemblies
US10269558B2 (en) 2016-12-22 2019-04-23 Asm Ip Holding B.V. Method of forming a structure on a substrate
US10276355B2 (en) 2015-03-12 2019-04-30 Asm Ip Holding B.V. Multi-zone reactor, system including the reactor, and method of using the same
US10283353B2 (en) 2017-03-29 2019-05-07 Asm Ip Holding B.V. Method of reforming insulating film deposited on substrate with recess pattern
US10290508B1 (en) 2017-12-05 2019-05-14 Asm Ip Holding B.V. Method for forming vertical spacers for spacer-defined patterning
US10312055B2 (en) 2017-07-26 2019-06-04 Asm Ip Holding B.V. Method of depositing film by PEALD using negative bias
US10319588B2 (en) 2017-10-10 2019-06-11 Asm Ip Holding B.V. Method for depositing a metal chalcogenide on a substrate by cyclical deposition
US10322384B2 (en) 2015-11-09 2019-06-18 Asm Ip Holding B.V. Counter flow mixer for process chamber
US10340135B2 (en) 2016-11-28 2019-07-02 Asm Ip Holding B.V. Method of topologically restricted plasma-enhanced cyclic deposition of silicon or metal nitride
US10343920B2 (en) 2016-03-18 2019-07-09 Asm Ip Holding B.V. Aligned carbon nanotubes
US10367080B2 (en) 2016-05-02 2019-07-30 Asm Ip Holding B.V. Method of forming a germanium oxynitride film
US10364496B2 (en) 2011-06-27 2019-07-30 Asm Ip Holding B.V. Dual section module having shared and unshared mass flow controllers
US10381226B2 (en) 2016-07-27 2019-08-13 Asm Ip Holding B.V. Method of processing substrate
US10381219B1 (en) 2018-10-25 2019-08-13 Asm Ip Holding B.V. Methods for forming a silicon nitride film
US10378106B2 (en) 2008-11-14 2019-08-13 Asm Ip Holding B.V. Method of forming insulation film by modified PEALD
US10388513B1 (en) 2018-07-03 2019-08-20 Asm Ip Holding B.V. Method for depositing silicon-free carbon-containing film as gap-fill layer by pulse plasma-assisted deposition
US10388509B2 (en) 2016-06-28 2019-08-20 Asm Ip Holding B.V. Formation of epitaxial layers via dislocation filtering
US10395919B2 (en) 2016-07-28 2019-08-27 Asm Ip Holding B.V. Method and apparatus for filling a gap
US10403504B2 (en) 2017-10-05 2019-09-03 Asm Ip Holding B.V. Method for selectively depositing a metallic film on a substrate
US10410943B2 (en) 2016-10-13 2019-09-10 Asm Ip Holding B.V. Method for passivating a surface of a semiconductor and related systems
US10435790B2 (en) 2016-11-01 2019-10-08 Asm Ip Holding B.V. Method of subatmospheric plasma-enhanced ALD using capacitively coupled electrodes with narrow gap
US10446393B2 (en) 2017-05-08 2019-10-15 Asm Ip Holding B.V. Methods for forming silicon-containing epitaxial layers and related semiconductor device structures
US10458018B2 (en) 2015-06-26 2019-10-29 Asm Ip Holding B.V. Structures including metal carbide material, devices including the structures, and methods of forming same
US10468261B2 (en) 2017-02-15 2019-11-05 Asm Ip Holding B.V. Methods for forming a metallic film on a substrate by cyclical deposition and related semiconductor device structures
US10468251B2 (en) 2016-02-19 2019-11-05 Asm Ip Holding B.V. Method for forming spacers using silicon nitride film for spacer-defined multiple patterning
US10483099B1 (en) 2018-07-26 2019-11-19 Asm Ip Holding B.V. Method for forming thermally stable organosilicon polymer film
US10504742B2 (en) 2017-05-31 2019-12-10 Asm Ip Holding B.V. Method of atomic layer etching using hydrogen plasma
US10501866B2 (en) 2016-03-09 2019-12-10 Asm Ip Holding B.V. Gas distribution apparatus for improved film uniformity in an epitaxial system
US10510536B2 (en) 2018-03-29 2019-12-17 Asm Ip Holding B.V. Method of depositing a co-doped polysilicon film on a surface of a substrate within a reaction chamber
US10529563B2 (en) 2017-03-29 2020-01-07 Asm Ip Holdings B.V. Method for forming doped metal oxide films on a substrate by cyclical deposition and related semiconductor device structures
US10529554B2 (en) 2016-02-19 2020-01-07 Asm Ip Holding B.V. Method for forming silicon nitride film selectively on sidewalls or flat surfaces of trenches
US10529542B2 (en) 2015-03-11 2020-01-07 Asm Ip Holdings B.V. Cross-flow reactor and method
US10535516B2 (en) 2018-02-01 2020-01-14 Asm Ip Holdings B.V. Method for depositing a semiconductor structure on a surface of a substrate and related semiconductor structures
US10541333B2 (en) 2017-07-19 2020-01-21 Asm Ip Holding B.V. Method for depositing a group IV semiconductor and related semiconductor device structures
US10559458B1 (en) 2018-11-26 2020-02-11 Asm Ip Holding B.V. Method of forming oxynitride film
US10590535B2 (en) 2017-07-26 2020-03-17 Asm Ip Holdings B.V. Chemical treatment, deposition and/or infiltration apparatus and method for using the same
US10600673B2 (en) 2015-07-07 2020-03-24 Asm Ip Holding B.V. Magnetic susceptor to baseplate seal
US10605530B2 (en) 2017-07-26 2020-03-31 Asm Ip Holding B.V. Assembly of a liner and a flange for a vertical furnace as well as the liner and the vertical furnace
US10607895B2 (en) 2017-09-18 2020-03-31 Asm Ip Holdings B.V. Method for forming a semiconductor device structure comprising a gate fill metal
US10612136B2 (en) 2018-06-29 2020-04-07 ASM IP Holding, B.V. Temperature-controlled flange and reactor system including same
US10612137B2 (en) 2016-07-08 2020-04-07 Asm Ip Holdings B.V. Organic reactants for atomic layer deposition
USD880437S1 (en) 2018-02-01 2020-04-07 Asm Ip Holding B.V. Gas supply plate for semiconductor manufacturing apparatus
US10643826B2 (en) 2016-10-26 2020-05-05 Asm Ip Holdings B.V. Methods for thermally calibrating reaction chambers
US10643904B2 (en) 2016-11-01 2020-05-05 Asm Ip Holdings B.V. Methods for forming a semiconductor device and related semiconductor device structures
US10658205B2 (en) 2017-09-28 2020-05-19 Asm Ip Holdings B.V. Chemical dispensing apparatus and methods for dispensing a chemical to a reaction chamber
US10658181B2 (en) 2018-02-20 2020-05-19 Asm Ip Holding B.V. Method of spacer-defined direct patterning in semiconductor fabrication
US10655221B2 (en) 2017-02-09 2020-05-19 Asm Ip Holding B.V. Method for depositing oxide film by thermal ALD and PEALD
US10685834B2 (en) 2017-07-05 2020-06-16 Asm Ip Holdings B.V. Methods for forming a silicon germanium tin layer and related semiconductor device structures
US10683571B2 (en) 2014-02-25 2020-06-16 Asm Ip Holding B.V. Gas supply manifold and method of supplying gases to chamber using same
US10692741B2 (en) 2017-08-08 2020-06-23 Asm Ip Holdings B.V. Radiation shield
US10707106B2 (en) 2011-06-06 2020-07-07 Asm Ip Holding B.V. High-throughput semiconductor-processing apparatus equipped with multiple dual-chamber modules
US10714315B2 (en) 2012-10-12 2020-07-14 Asm Ip Holdings B.V. Semiconductor reaction chamber showerhead
US10714350B2 (en) 2016-11-01 2020-07-14 ASM IP Holdings, B.V. Methods for forming a transition metal niobium nitride film on a substrate by atomic layer deposition and related semiconductor device structures
US10714335B2 (en) 2017-04-25 2020-07-14 Asm Ip Holding B.V. Method of depositing thin film and method of manufacturing semiconductor device
US10714385B2 (en) 2016-07-19 2020-07-14 Asm Ip Holding B.V. Selective deposition of tungsten
US10734244B2 (en) 2017-11-16 2020-08-04 Asm Ip Holding B.V. Method of processing a substrate and a device manufactured by the same
US10734497B2 (en) 2017-07-18 2020-08-04 Asm Ip Holding B.V. Methods for forming a semiconductor device structure and related semiconductor device structures
US10731249B2 (en) 2018-02-15 2020-08-04 Asm Ip Holding B.V. Method of forming a transition metal containing film on a substrate by a cyclical deposition process, a method for supplying a transition metal halide compound to a reaction chamber, and related vapor deposition apparatus
US10755922B2 (en) 2018-07-03 2020-08-25 Asm Ip Holding B.V. Method for depositing silicon-free carbon-containing film as gap-fill layer by pulse plasma-assisted deposition
US10767789B2 (en) 2018-07-16 2020-09-08 Asm Ip Holding B.V. Diaphragm valves, valve components, and methods for forming valve components
US10770286B2 (en) 2017-05-08 2020-09-08 Asm Ip Holdings B.V. Methods for selectively forming a silicon nitride film on a substrate and related semiconductor device structures
US10770336B2 (en) 2017-08-08 2020-09-08 Asm Ip Holding B.V. Substrate lift mechanism and reactor including same
US10797133B2 (en) 2018-06-21 2020-10-06 Asm Ip Holding B.V. Method for depositing a phosphorus doped silicon arsenide film and related semiconductor device structures
US10811256B2 (en) 2018-10-16 2020-10-20 Asm Ip Holding B.V. Method for etching a carbon-containing feature
US10818758B2 (en) 2018-11-16 2020-10-27 Asm Ip Holding B.V. Methods for forming a metal silicate film on a substrate in a reaction chamber and related semiconductor device structures
USD900036S1 (en) 2017-08-24 2020-10-27 Asm Ip Holding B.V. Heater electrical connector and adapter
US10829852B2 (en) 2018-08-16 2020-11-10 Asm Ip Holding B.V. Gas distribution device for a wafer processing apparatus
US10847366B2 (en) 2018-11-16 2020-11-24 Asm Ip Holding B.V. Methods for depositing a transition metal chalcogenide film on a substrate by a cyclical deposition process
US10844484B2 (en) 2017-09-22 2020-11-24 Asm Ip Holding B.V. Apparatus for dispensing a vapor phase reactant to a reaction chamber and related methods
US10847365B2 (en) 2018-10-11 2020-11-24 Asm Ip Holding B.V. Method of forming conformal silicon carbide film by cyclic CVD
US10847371B2 (en) 2018-03-27 2020-11-24 Asm Ip Holding B.V. Method of forming an electrode on a substrate and a semiconductor device structure including an electrode
US10854498B2 (en) 2011-07-15 2020-12-01 Asm Ip Holding B.V. Wafer-supporting device and method for producing same
USD903477S1 (en) 2018-01-24 2020-12-01 Asm Ip Holdings B.V. Metal clamp
US10858737B2 (en) 2014-07-28 2020-12-08 Asm Ip Holding B.V. Showerhead assembly and components thereof
US10867788B2 (en) 2016-12-28 2020-12-15 Asm Ip Holding B.V. Method of forming a structure on a substrate
US10867786B2 (en) 2018-03-30 2020-12-15 Asm Ip Holding B.V. Substrate processing method
US10865475B2 (en) 2016-04-21 2020-12-15 Asm Ip Holding B.V. Deposition of metal borides and silicides
US10872771B2 (en) 2018-01-16 2020-12-22 Asm Ip Holding B. V. Method for depositing a material film on a substrate within a reaction chamber by a cyclical deposition process and related device structures
US10883175B2 (en) 2018-08-09 2021-01-05 Asm Ip Holding B.V. Vertical furnace for processing substrates and a liner for use therein
US10886123B2 (en) 2017-06-02 2021-01-05 Asm Ip Holding B.V. Methods for forming low temperature semiconductor layers and related semiconductor device structures
US10892156B2 (en) 2017-05-08 2021-01-12 Asm Ip Holding B.V. Methods for forming a silicon nitride film on a substrate and related semiconductor device structures
US10896820B2 (en) 2018-02-14 2021-01-19 Asm Ip Holding B.V. Method for depositing a ruthenium-containing film on a substrate by a cyclical deposition process
US10910262B2 (en) 2017-11-16 2021-02-02 Asm Ip Holding B.V. Method of selectively depositing a capping layer structure on a semiconductor device structure
US10914004B2 (en) 2018-06-29 2021-02-09 Asm Ip Holding B.V. Thin-film deposition method and manufacturing method of semiconductor device
US10923344B2 (en) 2017-10-30 2021-02-16 Asm Ip Holding B.V. Methods for forming a semiconductor structure and related semiconductor structures
US10928731B2 (en) 2017-09-21 2021-02-23 Asm Ip Holding B.V. Method of sequential infiltration synthesis treatment of infiltrateable material and structures and devices formed using same
US10934619B2 (en) 2016-11-15 2021-03-02 Asm Ip Holding B.V. Gas supply unit and substrate processing apparatus including the gas supply unit
US10941490B2 (en) 2014-10-07 2021-03-09 Asm Ip Holding B.V. Multiple temperature range susceptor, assembly, reactor and system including the susceptor, and methods of using the same
US10975470B2 (en) 2018-02-23 2021-04-13 Asm Ip Holding B.V. Apparatus for detecting or monitoring for a chemical precursor in a high temperature environment
US11001925B2 (en) 2016-12-19 2021-05-11 Asm Ip Holding B.V. Substrate processing apparatus
US11018002B2 (en) 2017-07-19 2021-05-25 Asm Ip Holding B.V. Method for selectively depositing a Group IV semiconductor and related semiconductor device structures
US11018047B2 (en) 2018-01-25 2021-05-25 Asm Ip Holding B.V. Hybrid lift pin
US11015245B2 (en) 2014-03-19 2021-05-25 Asm Ip Holding B.V. Gas-phase reactor and system having exhaust plenum and components thereof
US11022879B2 (en) 2017-11-24 2021-06-01 Asm Ip Holding B.V. Method of forming an enhanced unexposed photoresist layer
US11024523B2 (en) 2018-09-11 2021-06-01 Asm Ip Holding B.V. Substrate processing apparatus and method
US11031242B2 (en) 2018-11-07 2021-06-08 Asm Ip Holding B.V. Methods for depositing a boron doped silicon germanium film
USD922229S1 (en) 2019-06-05 2021-06-15 Asm Ip Holding B.V. Device for controlling a temperature of a gas supply unit
US11049751B2 (en) 2018-09-14 2021-06-29 Asm Ip Holding B.V. Cassette supply system to store and handle cassettes and processing apparatus equipped therewith
US11056567B2 (en) 2018-05-11 2021-07-06 Asm Ip Holding B.V. Method of forming a doped metal carbide film on a substrate and related semiconductor device structures
US11056344B2 (en) 2017-08-30 2021-07-06 Asm Ip Holding B.V. Layer forming method
US11053591B2 (en) 2018-08-06 2021-07-06 Asm Ip Holding B.V. Multi-port gas injection system and reactor system including same
US11069510B2 (en) 2017-08-30 2021-07-20 Asm Ip Holding B.V. Substrate processing apparatus
US11081345B2 (en) 2018-02-06 2021-08-03 Asm Ip Holding B.V. Method of post-deposition treatment for silicon oxide film
US11087997B2 (en) 2018-10-31 2021-08-10 Asm Ip Holding B.V. Substrate processing apparatus for processing substrates
US11088002B2 (en) 2018-03-29 2021-08-10 Asm Ip Holding B.V. Substrate rack and a substrate processing system and method
US11114294B2 (en) 2019-03-08 2021-09-07 Asm Ip Holding B.V. Structure including SiOC layer and method of forming same
US11114283B2 (en) 2018-03-16 2021-09-07 Asm Ip Holding B.V. Reactor, system including the reactor, and methods of manufacturing and using same
USD930782S1 (en) 2019-08-22 2021-09-14 Asm Ip Holding B.V. Gas distributor
US11127589B2 (en) 2019-02-01 2021-09-21 Asm Ip Holding B.V. Method of topology-selective film formation of silicon oxide
US11127617B2 (en) 2017-11-27 2021-09-21 Asm Ip Holding B.V. Storage device for storing wafer cassettes for use with a batch furnace
USD931978S1 (en) 2019-06-27 2021-09-28 Asm Ip Holding B.V. Showerhead vacuum transport
US11139191B2 (en) 2017-08-09 2021-10-05 Asm Ip Holding B.V. Storage apparatus for storing cassettes for substrates and processing apparatus equipped therewith
US11139308B2 (en) 2015-12-29 2021-10-05 Asm Ip Holding B.V. Atomic layer deposition of III-V compounds to form V-NAND devices
US11158513B2 (en) 2018-12-13 2021-10-26 Asm Ip Holding B.V. Methods for forming a rhenium-containing film on a substrate by a cyclical deposition process and related semiconductor device structures
US11171025B2 (en) 2019-01-22 2021-11-09 Asm Ip Holding B.V. Substrate processing device
USD935572S1 (en) 2019-05-24 2021-11-09 Asm Ip Holding B.V. Gas channel plate
US11205585B2 (en) 2016-07-28 2021-12-21 Asm Ip Holding B.V. Substrate processing apparatus and method of operating the same
US11217444B2 (en) 2018-11-30 2022-01-04 Asm Ip Holding B.V. Method for forming an ultraviolet radiation responsive metal oxide-containing film
US11222772B2 (en) 2016-12-14 2022-01-11 Asm Ip Holding B.V. Substrate processing apparatus
USD940837S1 (en) 2019-08-22 2022-01-11 Asm Ip Holding B.V. Electrode
US11227789B2 (en) 2019-02-20 2022-01-18 Asm Ip Holding B.V. Method and apparatus for filling a recess formed within a substrate surface
US11227782B2 (en) 2019-07-31 2022-01-18 Asm Ip Holding B.V. Vertical batch furnace assembly
US11230766B2 (en) 2018-03-29 2022-01-25 Asm Ip Holding B.V. Substrate processing apparatus and method
US11232963B2 (en) 2018-10-03 2022-01-25 Asm Ip Holding B.V. Substrate processing apparatus and method
US11251040B2 (en) 2019-02-20 2022-02-15 Asm Ip Holding B.V. Cyclical deposition method including treatment step and apparatus for same
US11251068B2 (en) 2018-10-19 2022-02-15 Asm Ip Holding B.V. Substrate processing apparatus and substrate processing method
USD944946S1 (en) 2019-06-14 2022-03-01 Asm Ip Holding B.V. Shower plate
US11270899B2 (en) 2018-06-04 2022-03-08 Asm Ip Holding B.V. Wafer handling chamber with moisture reduction
US11274369B2 (en) 2018-09-11 2022-03-15 Asm Ip Holding B.V. Thin film deposition method
US11282698B2 (en) 2019-07-19 2022-03-22 Asm Ip Holding B.V. Method of forming topology-controlled amorphous carbon polymer film
US11286562B2 (en) 2018-06-08 2022-03-29 Asm Ip Holding B.V. Gas-phase chemical reactor and method of using same
US11286558B2 (en) 2019-08-23 2022-03-29 Asm Ip Holding B.V. Methods for depositing a molybdenum nitride film on a surface of a substrate by a cyclical deposition process and related semiconductor device structures including a molybdenum nitride film
US11289326B2 (en) 2019-05-07 2022-03-29 Asm Ip Holding B.V. Method for reforming amorphous carbon polymer film
USD947913S1 (en) 2019-05-17 2022-04-05 Asm Ip Holding B.V. Susceptor shaft
US11295980B2 (en) 2017-08-30 2022-04-05 Asm Ip Holding B.V. Methods for depositing a molybdenum metal film over a dielectric surface of a substrate by a cyclical deposition process and related semiconductor device structures
USD948463S1 (en) 2018-10-24 2022-04-12 Asm Ip Holding B.V. Susceptor for semiconductor substrate supporting apparatus
USD949319S1 (en) 2019-08-22 2022-04-19 Asm Ip Holding B.V. Exhaust duct
US11306395B2 (en) 2017-06-28 2022-04-19 Asm Ip Holding B.V. Methods for depositing a transition metal nitride film on a substrate by atomic layer deposition and related deposition apparatus
US11315794B2 (en) 2019-10-21 2022-04-26 Asm Ip Holding B.V. Apparatus and methods for selectively etching films
US11342216B2 (en) 2019-02-20 2022-05-24 Asm Ip Holding B.V. Cyclical deposition method and apparatus for filling a recess formed within a substrate surface
US11339476B2 (en) 2019-10-08 2022-05-24 Asm Ip Holding B.V. Substrate processing device having connection plates, substrate processing method
US11345999B2 (en) 2019-06-06 2022-05-31 Asm Ip Holding B.V. Method of using a gas-phase reactor system including analyzing exhausted gas
US11355338B2 (en) 2019-05-10 2022-06-07 Asm Ip Holding B.V. Method of depositing material onto a surface and structure formed according to the method
US11361990B2 (en) 2018-05-28 2022-06-14 Asm Ip Holding B.V. Substrate processing method and device manufactured by using the same
US11374112B2 (en) 2017-07-19 2022-06-28 Asm Ip Holding B.V. Method for depositing a group IV semiconductor and related semiconductor device structures
US11378337B2 (en) 2019-03-28 2022-07-05 Asm Ip Holding B.V. Door opener and substrate processing apparatus provided therewith
US11393690B2 (en) 2018-01-19 2022-07-19 Asm Ip Holding B.V. Deposition method
US11390946B2 (en) 2019-01-17 2022-07-19 Asm Ip Holding B.V. Methods of forming a transition metal containing film on a substrate by a cyclical deposition process
US11390945B2 (en) 2019-07-03 2022-07-19 Asm Ip Holding B.V. Temperature control assembly for substrate processing apparatus and method of using same
US11390950B2 (en) 2017-01-10 2022-07-19 Asm Ip Holding B.V. Reactor system and method to reduce residue buildup during a film deposition process
US11401605B2 (en) 2019-11-26 2022-08-02 Asm Ip Holding B.V. Substrate processing apparatus
US11414760B2 (en) 2018-10-08 2022-08-16 Asm Ip Holding B.V. Substrate support unit, thin film deposition apparatus including the same, and substrate processing apparatus including the same
US11424119B2 (en) 2019-03-08 2022-08-23 Asm Ip Holding B.V. Method for selective deposition of silicon nitride layer and structure including selectively-deposited silicon nitride layer
US11430674B2 (en) 2018-08-22 2022-08-30 Asm Ip Holding B.V. Sensor array, apparatus for dispensing a vapor phase reactant to a reaction chamber and related methods
US11430640B2 (en) 2019-07-30 2022-08-30 Asm Ip Holding B.V. Substrate processing apparatus
US11437241B2 (en) 2020-04-08 2022-09-06 Asm Ip Holding B.V. Apparatus and methods for selectively etching silicon oxide films
US11443926B2 (en) 2019-07-30 2022-09-13 Asm Ip Holding B.V. Substrate processing apparatus
US11447864B2 (en) 2019-04-19 2022-09-20 Asm Ip Holding B.V. Layer forming method and apparatus
US11447861B2 (en) 2016-12-15 2022-09-20 Asm Ip Holding B.V. Sequential infiltration synthesis apparatus and a method of forming a patterned structure
US11453943B2 (en) 2016-05-25 2022-09-27 Asm Ip Holding B.V. Method for forming carbon-containing silicon/metal oxide or nitride film by ALD using silicon precursor and hydrocarbon precursor
USD965044S1 (en) 2019-08-19 2022-09-27 Asm Ip Holding B.V. Susceptor shaft
USD965524S1 (en) 2019-08-19 2022-10-04 Asm Ip Holding B.V. Susceptor support
US11469098B2 (en) 2018-05-08 2022-10-11 Asm Ip Holding B.V. Methods for depositing an oxide film on a substrate by a cyclical deposition process and related device structures
US11473195B2 (en) 2018-03-01 2022-10-18 Asm Ip Holding B.V. Semiconductor processing apparatus and a method for processing a substrate
US11476109B2 (en) 2019-06-11 2022-10-18 Asm Ip Holding B.V. Method of forming an electronic structure using reforming gas, system for performing the method, and structure formed using the method
US11482412B2 (en) 2018-01-19 2022-10-25 Asm Ip Holding B.V. Method for depositing a gap-fill layer by plasma-assisted deposition
US11482533B2 (en) 2019-02-20 2022-10-25 Asm Ip Holding B.V. Apparatus and methods for plug fill deposition in 3-D NAND applications
US11482418B2 (en) 2018-02-20 2022-10-25 Asm Ip Holding B.V. Substrate processing method and apparatus
US11488854B2 (en) 2020-03-11 2022-11-01 Asm Ip Holding B.V. Substrate handling device with adjustable joints
US11488819B2 (en) 2018-12-04 2022-11-01 Asm Ip Holding B.V. Method of cleaning substrate processing apparatus
US11492703B2 (en) 2018-06-27 2022-11-08 Asm Ip Holding B.V. Cyclic deposition methods for forming metal-containing material and films and structures including the metal-containing material
US11495459B2 (en) 2019-09-04 2022-11-08 Asm Ip Holding B.V. Methods for selective deposition using a sacrificial capping layer
US11501968B2 (en) 2019-11-15 2022-11-15 Asm Ip Holding B.V. Method for providing a semiconductor device with silicon filled gaps
US11499226B2 (en) 2018-11-02 2022-11-15 Asm Ip Holding B.V. Substrate supporting unit and a substrate processing device including the same
US11499222B2 (en) 2018-06-27 2022-11-15 Asm Ip Holding B.V. Cyclic deposition methods for forming metal-containing material and films and structures including the metal-containing material
US11515188B2 (en) 2019-05-16 2022-11-29 Asm Ip Holding B.V. Wafer boat handling device, vertical batch furnace and method
US11515187B2 (en) 2020-05-01 2022-11-29 Asm Ip Holding B.V. Fast FOUP swapping with a FOUP handler
US11521851B2 (en) 2020-02-03 2022-12-06 Asm Ip Holding B.V. Method of forming structures including a vanadium or indium layer
US11527400B2 (en) 2019-08-23 2022-12-13 Asm Ip Holding B.V. Method for depositing silicon oxide film having improved quality by peald using bis(diethylamino)silane
US11527403B2 (en) 2019-12-19 2022-12-13 Asm Ip Holding B.V. Methods for filling a gap feature on a substrate surface and related semiconductor structures
US11530876B2 (en) 2020-04-24 2022-12-20 Asm Ip Holding B.V. Vertical batch furnace assembly comprising a cooling gas supply
US11532757B2 (en) 2016-10-27 2022-12-20 Asm Ip Holding B.V. Deposition of charge trapping layers
US11530483B2 (en) 2018-06-21 2022-12-20 Asm Ip Holding B.V. Substrate processing system
US11551925B2 (en) 2019-04-01 2023-01-10 Asm Ip Holding B.V. Method for manufacturing a semiconductor device
US11551912B2 (en) 2020-01-20 2023-01-10 Asm Ip Holding B.V. Method of forming thin film and method of modifying surface of thin film
USD975665S1 (en) 2019-05-17 2023-01-17 Asm Ip Holding B.V. Susceptor shaft
US11557474B2 (en) 2019-07-29 2023-01-17 Asm Ip Holding B.V. Methods for selective deposition utilizing n-type dopants and/or alternative dopants to achieve high dopant incorporation
US11562901B2 (en) 2019-09-25 2023-01-24 Asm Ip Holding B.V. Substrate processing method
US11572620B2 (en) 2018-11-06 2023-02-07 Asm Ip Holding B.V. Methods for selectively depositing an amorphous silicon film on a substrate
US11581186B2 (en) 2016-12-15 2023-02-14 Asm Ip Holding B.V. Sequential infiltration synthesis apparatus
US11587815B2 (en) 2019-07-31 2023-02-21 Asm Ip Holding B.V. Vertical batch furnace assembly
US11587814B2 (en) 2019-07-31 2023-02-21 Asm Ip Holding B.V. Vertical batch furnace assembly
US11594450B2 (en) 2019-08-22 2023-02-28 Asm Ip Holding B.V. Method for forming a structure with a hole
US11594600B2 (en) 2019-11-05 2023-02-28 Asm Ip Holding B.V. Structures with doped semiconductor layers and methods and systems for forming same
USD979506S1 (en) 2019-08-22 2023-02-28 Asm Ip Holding B.V. Insulator
USD980813S1 (en) 2021-05-11 2023-03-14 Asm Ip Holding B.V. Gas flow control plate for substrate processing apparatus
US11605528B2 (en) 2019-07-09 2023-03-14 Asm Ip Holding B.V. Plasma device using coaxial waveguide, and substrate treatment method
USD980814S1 (en) 2021-05-11 2023-03-14 Asm Ip Holding B.V. Gas distributor for substrate processing apparatus
US11610774B2 (en) 2019-10-02 2023-03-21 Asm Ip Holding B.V. Methods for forming a topographically selective silicon oxide film by a cyclical plasma-enhanced deposition process
USD981973S1 (en) 2021-05-11 2023-03-28 Asm Ip Holding B.V. Reactor wall for substrate processing apparatus
US11615970B2 (en) 2019-07-17 2023-03-28 Asm Ip Holding B.V. Radical assist ignition plasma system and method
US11626308B2 (en) 2020-05-13 2023-04-11 Asm Ip Holding B.V. Laser alignment fixture for a reactor system
US11626316B2 (en) 2019-11-20 2023-04-11 Asm Ip Holding B.V. Method of depositing carbon-containing material on a surface of a substrate, structure formed using the method, and system for forming the structure
US11629407B2 (en) 2019-02-22 2023-04-18 Asm Ip Holding B.V. Substrate processing apparatus and method for processing substrates
US11629406B2 (en) 2018-03-09 2023-04-18 Asm Ip Holding B.V. Semiconductor processing apparatus comprising one or more pyrometers for measuring a temperature of a substrate during transfer of the substrate
US11637011B2 (en) 2019-10-16 2023-04-25 Asm Ip Holding B.V. Method of topology-selective film formation of silicon oxide
US11637014B2 (en) 2019-10-17 2023-04-25 Asm Ip Holding B.V. Methods for selective deposition of doped semiconductor material
US11639548B2 (en) 2019-08-21 2023-05-02 Asm Ip Holding B.V. Film-forming material mixed-gas forming device and film forming device
US11639811B2 (en) 2017-11-27 2023-05-02 Asm Ip Holding B.V. Apparatus including a clean mini environment
US11643724B2 (en) 2019-07-18 2023-05-09 Asm Ip Holding B.V. Method of forming structures using a neutral beam
US11644758B2 (en) 2020-07-17 2023-05-09 Asm Ip Holding B.V. Structures and methods for use in photolithography
US11646205B2 (en) 2019-10-29 2023-05-09 Asm Ip Holding B.V. Methods of selectively forming n-type doped material on a surface, systems for selectively forming n-type doped material, and structures formed using same
US11646204B2 (en) 2020-06-24 2023-05-09 Asm Ip Holding B.V. Method for forming a layer provided with silicon
US11646184B2 (en) 2019-11-29 2023-05-09 Asm Ip Holding B.V. Substrate processing apparatus
US11658035B2 (en) 2020-06-30 2023-05-23 Asm Ip Holding B.V. Substrate processing method
US11658029B2 (en) 2018-12-14 2023-05-23 Asm Ip Holding B.V. Method of forming a device structure using selective deposition of gallium nitride and system for same
US11664199B2 (en) 2018-10-19 2023-05-30 Asm Ip Holding B.V. Substrate processing apparatus and substrate processing method
US11664267B2 (en) 2019-07-10 2023-05-30 Asm Ip Holding B.V. Substrate support assembly and substrate processing device including the same
US11664245B2 (en) 2019-07-16 2023-05-30 Asm Ip Holding B.V. Substrate processing device
US11674220B2 (en) 2020-07-20 2023-06-13 Asm Ip Holding B.V. Method for depositing molybdenum layers using an underlayer
US11680839B2 (en) 2019-08-05 2023-06-20 Asm Ip Holding B.V. Liquid level sensor for a chemical source vessel
US11688603B2 (en) 2019-07-17 2023-06-27 Asm Ip Holding B.V. Methods of forming silicon germanium structures
USD990441S1 (en) 2021-09-07 2023-06-27 Asm Ip Holding B.V. Gas flow control plate
US11685991B2 (en) 2018-02-14 2023-06-27 Asm Ip Holding B.V. Method for depositing a ruthenium-containing film on a substrate by a cyclical deposition process
USD990534S1 (en) 2020-09-11 2023-06-27 Asm Ip Holding B.V. Weighted lift pin
US11705333B2 (en) 2020-05-21 2023-07-18 Asm Ip Holding B.V. Structures including multiple carbon layers and methods of forming and using same
US11718913B2 (en) 2018-06-04 2023-08-08 Asm Ip Holding B.V. Gas distribution system and reactor system including same
US11725280B2 (en) 2020-08-26 2023-08-15 Asm Ip Holding B.V. Method for forming metal silicon oxide and metal silicon oxynitride layers
US11725277B2 (en) 2011-07-20 2023-08-15 Asm Ip Holding B.V. Pressure transmitter for a semiconductor processing environment
US11735422B2 (en) 2019-10-10 2023-08-22 Asm Ip Holding B.V. Method of forming a photoresist underlayer and structure including same
US11742198B2 (en) 2019-03-08 2023-08-29 Asm Ip Holding B.V. Structure including SiOCN layer and method of forming same
US11767589B2 (en) 2020-05-29 2023-09-26 Asm Ip Holding B.V. Substrate processing device
US11769682B2 (en) 2017-08-09 2023-09-26 Asm Ip Holding B.V. Storage apparatus for storing cassettes for substrates and processing apparatus equipped therewith
US11776846B2 (en) 2020-02-07 2023-10-03 Asm Ip Holding B.V. Methods for depositing gap filling fluids and related systems and devices
US11781221B2 (en) 2019-05-07 2023-10-10 Asm Ip Holding B.V. Chemical source vessel with dip tube
US11781243B2 (en) 2020-02-17 2023-10-10 Asm Ip Holding B.V. Method for depositing low temperature phosphorous-doped silicon
US11804364B2 (en) 2020-05-19 2023-10-31 Asm Ip Holding B.V. Substrate processing apparatus
US11814747B2 (en) 2019-04-24 2023-11-14 Asm Ip Holding B.V. Gas-phase reactor system-with a reaction chamber, a solid precursor source vessel, a gas distribution system, and a flange assembly
US11821078B2 (en) 2020-04-15 2023-11-21 Asm Ip Holding B.V. Method for forming precoat film and method for forming silicon-containing film
US11823876B2 (en) 2019-09-05 2023-11-21 Asm Ip Holding B.V. Substrate processing apparatus
US11823866B2 (en) 2020-04-02 2023-11-21 Asm Ip Holding B.V. Thin film forming method
US11828707B2 (en) 2020-02-04 2023-11-28 Asm Ip Holding B.V. Method and apparatus for transmittance measurements of large articles
US11830738B2 (en) 2020-04-03 2023-11-28 Asm Ip Holding B.V. Method for forming barrier layer and method for manufacturing semiconductor device
US11830730B2 (en) 2017-08-29 2023-11-28 Asm Ip Holding B.V. Layer forming method and apparatus
US11827981B2 (en) 2020-10-14 2023-11-28 Asm Ip Holding B.V. Method of depositing material on stepped structure
US11840761B2 (en) 2019-12-04 2023-12-12 Asm Ip Holding B.V. Substrate processing apparatus
US11873557B2 (en) 2020-10-22 2024-01-16 Asm Ip Holding B.V. Method of depositing vanadium metal
US11876356B2 (en) 2020-03-11 2024-01-16 Asm Ip Holding B.V. Lockout tagout assembly and system and method of using same
USD1012873S1 (en) 2020-09-24 2024-01-30 Asm Ip Holding B.V. Electrode for semiconductor processing apparatus
US11885020B2 (en) 2020-12-22 2024-01-30 Asm Ip Holding B.V. Transition metal deposition method
US11885013B2 (en) 2019-12-17 2024-01-30 Asm Ip Holding B.V. Method of forming vanadium nitride layer and structure including the vanadium nitride layer
US11887857B2 (en) 2020-04-24 2024-01-30 Asm Ip Holding B.V. Methods and systems for depositing a layer comprising vanadium, nitrogen, and a further element
US11885023B2 (en) 2018-10-01 2024-01-30 Asm Ip Holding B.V. Substrate retaining apparatus, system including the apparatus, and method of using same
US11891696B2 (en) 2020-11-30 2024-02-06 Asm Ip Holding B.V. Injector configured for arrangement within a reaction chamber of a substrate processing apparatus
US11901179B2 (en) 2020-10-28 2024-02-13 Asm Ip Holding B.V. Method and device for depositing silicon onto substrates
US11898243B2 (en) 2020-04-24 2024-02-13 Asm Ip Holding B.V. Method of forming vanadium nitride-containing layer
US11915929B2 (en) 2019-11-26 2024-02-27 Asm Ip Holding B.V. Methods for selectively forming a target film on a substrate comprising a first dielectric surface and a second metallic surface
US11923181B2 (en) 2019-11-29 2024-03-05 Asm Ip Holding B.V. Substrate processing apparatus for minimizing the effect of a filling gas during substrate processing
US11929251B2 (en) 2019-12-02 2024-03-12 Asm Ip Holding B.V. Substrate processing apparatus having electrostatic chuck and substrate processing method
US11946137B2 (en) 2020-12-16 2024-04-02 Asm Ip Holding B.V. Runout and wobble measurement fixtures
US11961741B2 (en) 2020-03-12 2024-04-16 Asm Ip Holding B.V. Method for fabricating layer structure having target topological profile
US11959168B2 (en) 2020-04-29 2024-04-16 Asm Ip Holding B.V. Solid source precursor vessel
USD1023959S1 (en) 2021-05-11 2024-04-23 Asm Ip Holding B.V. Electrode for substrate processing apparatus

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5569253B2 (en) * 2010-08-24 2014-08-13 富士通セミコンダクター株式会社 Manufacturing method of semiconductor device
CN103262250B (en) * 2010-12-08 2014-12-17 夏普株式会社 Semiconductor device and display apparatus
US8633118B2 (en) * 2012-02-01 2014-01-21 Tokyo Electron Limited Method of forming thin metal and semi-metal layers by thermal remote oxygen scavenging
US8865538B2 (en) 2012-03-30 2014-10-21 Tokyo Electron Limited Method of integrating buried threshold voltage adjustment layers for CMOS processing
KR20140032716A (en) 2012-09-07 2014-03-17 삼성전자주식회사 Semiconductor device and method for fabricating thereof
US8865581B2 (en) 2012-10-19 2014-10-21 Tokyo Electron Limited Hybrid gate last integration scheme for multi-layer high-k gate stacks
US11245022B2 (en) 2019-05-24 2022-02-08 Applied Materials, Inc. Integrated dipole flow for transistor
KR102634254B1 (en) * 2020-11-18 2024-02-05 어플라이드 머티어리얼스, 인코포레이티드 Method of forming semiconductor structure and processing system thereof

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020113261A1 (en) * 2001-02-19 2002-08-22 Tomio Iwasaki Semiconductor device
US20060051880A1 (en) * 2004-09-07 2006-03-09 Doczy Mark L Method for making a semiconductor device having a high-k gate dielectric
US20060211259A1 (en) * 2005-03-21 2006-09-21 Maes Jan W Silicon oxide cap over high dielectric constant films
US20070048989A1 (en) * 2005-08-30 2007-03-01 Micron Technology, Inc. Atomic layer deposition of GdScO3 films as gate dielectrics
US7323381B2 (en) * 2004-09-07 2008-01-29 Renesas Technology Corp. Semiconductor device and manufacturing method thereof
US7396777B2 (en) * 2004-04-19 2008-07-08 Samsung Electronics Co., Ltd. Method of fabricating high-k dielectric layer having reduced impurity
US20080251836A1 (en) * 2007-04-16 2008-10-16 Hynix Semiconductor Inc. Non-volatile memory device and method for fabricating the same

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0466376A (en) * 1990-07-05 1992-03-02 Nissan Motor Co Ltd Automobile hood structure
JPH0574037A (en) * 1991-09-10 1993-03-26 Sony Corp Disk reproducing device
JP2001185548A (en) * 1999-12-22 2001-07-06 Fujitsu Ltd Semiconductor device and manufacturing method thereof
JP2001284345A (en) * 2000-03-29 2001-10-12 Fujitsu Ltd Method of forming tantalum pentoxide film
JP2002043565A (en) * 2000-07-26 2002-02-08 Toshiba Corp Manufacturing method of semiconductor device
JP3647785B2 (en) * 2001-09-28 2005-05-18 株式会社東芝 Manufacturing method of semiconductor device
JP2003273350A (en) * 2002-03-15 2003-09-26 Nec Corp Semiconductor device and method for manufacturing the same
US6717226B2 (en) * 2002-03-15 2004-04-06 Motorola, Inc. Transistor with layered high-K gate dielectric and method therefor
JP3647850B2 (en) * 2002-07-02 2005-05-18 松下電器産業株式会社 Semiconductor device and manufacturing method thereof
JP4261276B2 (en) * 2003-08-15 2009-04-30 パナソニック株式会社 Manufacturing method of semiconductor device
US20070023842A1 (en) * 2003-11-12 2007-02-01 Hyung-Suk Jung Semiconductor devices having different gate dielectric layers and methods of manufacturing the same
US8323754B2 (en) * 2004-05-21 2012-12-04 Applied Materials, Inc. Stabilization of high-k dielectric materials
JP2006086511A (en) * 2004-08-17 2006-03-30 Nec Electronics Corp Semiconductor device
KR100889362B1 (en) * 2004-10-19 2009-03-18 삼성전자주식회사 Transistor having multi-dielectric layer and fabrication method thereof
JP4128574B2 (en) * 2005-03-28 2008-07-30 富士通株式会社 Manufacturing method of semiconductor device

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020113261A1 (en) * 2001-02-19 2002-08-22 Tomio Iwasaki Semiconductor device
US20030067046A1 (en) * 2001-02-19 2003-04-10 Hitachi, Ltd. Semiconductor device
US7396777B2 (en) * 2004-04-19 2008-07-08 Samsung Electronics Co., Ltd. Method of fabricating high-k dielectric layer having reduced impurity
US20060051880A1 (en) * 2004-09-07 2006-03-09 Doczy Mark L Method for making a semiconductor device having a high-k gate dielectric
US7323381B2 (en) * 2004-09-07 2008-01-29 Renesas Technology Corp. Semiconductor device and manufacturing method thereof
US20060211259A1 (en) * 2005-03-21 2006-09-21 Maes Jan W Silicon oxide cap over high dielectric constant films
US20070048989A1 (en) * 2005-08-30 2007-03-01 Micron Technology, Inc. Atomic layer deposition of GdScO3 films as gate dielectrics
US20080251836A1 (en) * 2007-04-16 2008-10-16 Hynix Semiconductor Inc. Non-volatile memory device and method for fabricating the same

Cited By (457)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8986456B2 (en) 2006-10-10 2015-03-24 Asm America, Inc. Precursor delivery system
US8076237B2 (en) 2008-05-09 2011-12-13 Asm America, Inc. Method and apparatus for 3D interconnect
US20090280648A1 (en) * 2008-05-09 2009-11-12 Cyprian Emeka Uzoh Method and apparatus for 3d interconnect
US10378106B2 (en) 2008-11-14 2019-08-13 Asm Ip Holding B.V. Method of forming insulation film by modified PEALD
US20100248464A1 (en) * 2009-03-26 2010-09-30 Tokyo Electron Limited METHOD FOR FORMING A HIGH-k GATE STACK WITH REDUCED EFFECTIVE OXIDE THICKNESS
KR20110123809A (en) * 2009-03-26 2011-11-15 도쿄엘렉트론가부시키가이샤 Method for forming a high-k gate stack with reduced effective oxide thickness
CN102365721A (en) * 2009-03-26 2012-02-29 东京毅力科创株式会社 Method for forming a high-k gate stack with reduced effective oxide thickness
US8313994B2 (en) * 2009-03-26 2012-11-20 Tokyo Electron Limited Method for forming a high-K gate stack with reduced effective oxide thickness
KR101639464B1 (en) 2009-03-26 2016-07-13 도쿄엘렉트론가부시키가이샤 Method for forming a high-k gate stack with reduced effective oxide thickness
US10480072B2 (en) 2009-04-06 2019-11-19 Asm Ip Holding B.V. Semiconductor processing reactor and components thereof
US10844486B2 (en) 2009-04-06 2020-11-24 Asm Ip Holding B.V. Semiconductor processing reactor and components thereof
US9394608B2 (en) 2009-04-06 2016-07-19 Asm America, Inc. Semiconductor processing reactor and components thereof
US8071452B2 (en) 2009-04-27 2011-12-06 Asm America, Inc. Atomic layer deposition of hafnium lanthanum oxides
US20100270626A1 (en) * 2009-04-27 2010-10-28 Raisanen Petri I Atomic layer deposition of hafnium lanthanum oxides
US20100301429A1 (en) * 2009-05-29 2010-12-02 Renesas Technology Corp. Semiconductor device and method of manufacturing the same
US8883270B2 (en) 2009-08-14 2014-11-11 Asm America, Inc. Systems and methods for thin-film deposition of metal oxides using excited nitrogen—oxygen species
US8802201B2 (en) 2009-08-14 2014-08-12 Asm America, Inc. Systems and methods for thin-film deposition of metal oxides using excited nitrogen-oxygen species
US10804098B2 (en) 2009-08-14 2020-10-13 Asm Ip Holding B.V. Systems and methods for thin-film deposition of metal oxides using excited nitrogen-oxygen species
US8877655B2 (en) 2010-05-07 2014-11-04 Asm America, Inc. Systems and methods for thin-film deposition of metal oxides using excited nitrogen-oxygen species
US10707106B2 (en) 2011-06-06 2020-07-07 Asm Ip Holding B.V. High-throughput semiconductor-processing apparatus equipped with multiple dual-chamber modules
US9793148B2 (en) 2011-06-22 2017-10-17 Asm Japan K.K. Method for positioning wafers in multiple wafer transport
US10364496B2 (en) 2011-06-27 2019-07-30 Asm Ip Holding B.V. Dual section module having shared and unshared mass flow controllers
US10854498B2 (en) 2011-07-15 2020-12-01 Asm Ip Holding B.V. Wafer-supporting device and method for producing same
US11725277B2 (en) 2011-07-20 2023-08-15 Asm Ip Holding B.V. Pressure transmitter for a semiconductor processing environment
US9096931B2 (en) 2011-10-27 2015-08-04 Asm America, Inc Deposition valve assembly and method of heating the same
US9341296B2 (en) 2011-10-27 2016-05-17 Asm America, Inc. Heater jacket for a fluid line
US9017481B1 (en) 2011-10-28 2015-04-28 Asm America, Inc. Process feed management for semiconductor substrate processing
US10832903B2 (en) 2011-10-28 2020-11-10 Asm Ip Holding B.V. Process feed management for semiconductor substrate processing
US9892908B2 (en) 2011-10-28 2018-02-13 Asm America, Inc. Process feed management for semiconductor substrate processing
US9005539B2 (en) 2011-11-23 2015-04-14 Asm Ip Holding B.V. Chamber sealing member
US9167625B2 (en) 2011-11-23 2015-10-20 Asm Ip Holding B.V. Radiation shielding for a substrate holder
US9340874B2 (en) 2011-11-23 2016-05-17 Asm Ip Holding B.V. Chamber sealing member
US9202727B2 (en) 2012-03-02 2015-12-01 ASM IP Holding Susceptor heater shim
US8946830B2 (en) 2012-04-04 2015-02-03 Asm Ip Holdings B.V. Metal oxide protective layer for a semiconductor device
US9384987B2 (en) 2012-04-04 2016-07-05 Asm Ip Holding B.V. Metal oxide protective layer for a semiconductor device
US9029253B2 (en) 2012-05-02 2015-05-12 Asm Ip Holding B.V. Phase-stabilized thin films, structures and devices including the thin films, and methods of forming same
US9177784B2 (en) 2012-05-07 2015-11-03 Asm Ip Holdings B.V. Semiconductor device dielectric interface layer
US8728832B2 (en) 2012-05-07 2014-05-20 Asm Ip Holdings B.V. Semiconductor device dielectric interface layer
US8921176B2 (en) * 2012-06-11 2014-12-30 Freescale Semiconductor, Inc. Modified high-K gate dielectric stack
US8933375B2 (en) 2012-06-27 2015-01-13 Asm Ip Holding B.V. Susceptor heater and method of heating a substrate
US9299595B2 (en) 2012-06-27 2016-03-29 Asm Ip Holding B.V. Susceptor heater and method of heating a substrate
US9558931B2 (en) 2012-07-27 2017-01-31 Asm Ip Holding B.V. System and method for gas-phase sulfur passivation of a semiconductor surface
US9117866B2 (en) 2012-07-31 2015-08-25 Asm Ip Holding B.V. Apparatus and method for calculating a wafer position in a processing chamber under process conditions
EP2695966B1 (en) * 2012-08-06 2018-10-03 IMEC vzw ALD method
US9659799B2 (en) 2012-08-28 2017-05-23 Asm Ip Holding B.V. Systems and methods for dynamic semiconductor process scheduling
US10566223B2 (en) 2012-08-28 2020-02-18 Asm Ip Holdings B.V. Systems and methods for dynamic semiconductor process scheduling
US9169975B2 (en) 2012-08-28 2015-10-27 Asm Ip Holding B.V. Systems and methods for mass flow controller verification
US9021985B2 (en) 2012-09-12 2015-05-05 Asm Ip Holdings B.V. Process gas management for an inductively-coupled plasma deposition reactor
US10023960B2 (en) 2012-09-12 2018-07-17 Asm Ip Holdings B.V. Process gas management for an inductively-coupled plasma deposition reactor
US9605342B2 (en) 2012-09-12 2017-03-28 Asm Ip Holding B.V. Process gas management for an inductively-coupled plasma deposition reactor
US9324811B2 (en) 2012-09-26 2016-04-26 Asm Ip Holding B.V. Structures and devices including a tensile-stressed silicon arsenic layer and methods of forming same
US11501956B2 (en) 2012-10-12 2022-11-15 Asm Ip Holding B.V. Semiconductor reaction chamber showerhead
US10714315B2 (en) 2012-10-12 2020-07-14 Asm Ip Holdings B.V. Semiconductor reaction chamber showerhead
US9640416B2 (en) 2012-12-26 2017-05-02 Asm Ip Holding B.V. Single-and dual-chamber module-attachable wafer-handling chamber
US9228259B2 (en) 2013-02-01 2016-01-05 Asm Ip Holding B.V. Method for treatment of deposition reactor
US8894870B2 (en) 2013-02-01 2014-11-25 Asm Ip Holding B.V. Multi-step method and apparatus for etching compounds containing a metal
US10340125B2 (en) 2013-03-08 2019-07-02 Asm Ip Holding B.V. Pulsed remote plasma method and system
US9484191B2 (en) 2013-03-08 2016-11-01 Asm Ip Holding B.V. Pulsed remote plasma method and system
US9589770B2 (en) 2013-03-08 2017-03-07 Asm Ip Holding B.V. Method and systems for in-situ formation of intermediate reactive species
US10366864B2 (en) 2013-03-08 2019-07-30 Asm Ip Holding B.V. Method and system for in-situ formation of intermediate reactive species
US8993054B2 (en) 2013-07-12 2015-03-31 Asm Ip Holding B.V. Method and system to reduce outgassing in a reaction chamber
US9790595B2 (en) 2013-07-12 2017-10-17 Asm Ip Holding B.V. Method and system to reduce outgassing in a reaction chamber
US9412564B2 (en) 2013-07-22 2016-08-09 Asm Ip Holding B.V. Semiconductor reaction chamber with plasma capabilities
US9018111B2 (en) 2013-07-22 2015-04-28 Asm Ip Holding B.V. Semiconductor reaction chamber with plasma capabilities
US9793115B2 (en) 2013-08-14 2017-10-17 Asm Ip Holding B.V. Structures and devices including germanium-tin films and methods of forming same
US9396934B2 (en) 2013-08-14 2016-07-19 Asm Ip Holding B.V. Methods of forming films including germanium tin and structures and devices including the films
US9240412B2 (en) 2013-09-27 2016-01-19 Asm Ip Holding B.V. Semiconductor structure and device and methods of forming same using selective epitaxial process
US10361201B2 (en) 2013-09-27 2019-07-23 Asm Ip Holding B.V. Semiconductor structure and device formed using selective epitaxial process
US9556516B2 (en) 2013-10-09 2017-01-31 ASM IP Holding B.V Method for forming Ti-containing film by PEALD using TDMAT or TDEAT
US9605343B2 (en) 2013-11-13 2017-03-28 Asm Ip Holding B.V. Method for forming conformal carbon films, structures conformal carbon film, and system of forming same
US10179947B2 (en) 2013-11-26 2019-01-15 Asm Ip Holding B.V. Method for forming conformal nitrided, oxidized, or carbonized dielectric film by atomic layer deposition
US10683571B2 (en) 2014-02-25 2020-06-16 Asm Ip Holding B.V. Gas supply manifold and method of supplying gases to chamber using same
US9447498B2 (en) 2014-03-18 2016-09-20 Asm Ip Holding B.V. Method for performing uniform processing in gas system-sharing multiple reaction chambers
US10167557B2 (en) 2014-03-18 2019-01-01 Asm Ip Holding B.V. Gas distribution system, reactor including the system, and methods of using the same
US10604847B2 (en) 2014-03-18 2020-03-31 Asm Ip Holding B.V. Gas distribution system, reactor including the system, and methods of using the same
US11015245B2 (en) 2014-03-19 2021-05-25 Asm Ip Holding B.V. Gas-phase reactor and system having exhaust plenum and components thereof
US9404587B2 (en) 2014-04-24 2016-08-02 ASM IP Holding B.V Lockout tagout for semiconductor vacuum valve
US10858737B2 (en) 2014-07-28 2020-12-08 Asm Ip Holding B.V. Showerhead assembly and components thereof
US9543180B2 (en) 2014-08-01 2017-01-10 Asm Ip Holding B.V. Apparatus and method for transporting wafers between wafer carrier and process tool under vacuum
US9890456B2 (en) 2014-08-21 2018-02-13 Asm Ip Holding B.V. Method and system for in situ formation of gas-phase compounds
US10787741B2 (en) 2014-08-21 2020-09-29 Asm Ip Holding B.V. Method and system for in situ formation of gas-phase compounds
US9673276B2 (en) * 2014-09-19 2017-06-06 Samsung Electronics Co., Ltd. Semiconductor device and method of fabricating the same
US20160308000A1 (en) * 2014-09-19 2016-10-20 Samsung Electronics Co., Ltd. Semiconductor device and method of fabricating the same
US9657845B2 (en) 2014-10-07 2017-05-23 Asm Ip Holding B.V. Variable conductance gas distribution apparatus and method
US10941490B2 (en) 2014-10-07 2021-03-09 Asm Ip Holding B.V. Multiple temperature range susceptor, assembly, reactor and system including the susceptor, and methods of using the same
US11795545B2 (en) 2014-10-07 2023-10-24 Asm Ip Holding B.V. Multiple temperature range susceptor, assembly, reactor and system including the susceptor, and methods of using the same
US10561975B2 (en) 2014-10-07 2020-02-18 Asm Ip Holdings B.V. Variable conductance gas distribution apparatus and method
US9891521B2 (en) 2014-11-19 2018-02-13 Asm Ip Holding B.V. Method for depositing thin film
US10438965B2 (en) 2014-12-22 2019-10-08 Asm Ip Holding B.V. Semiconductor device and manufacturing method thereof
US9899405B2 (en) 2014-12-22 2018-02-20 Asm Ip Holding B.V. Semiconductor device and manufacturing method thereof
US9478415B2 (en) 2015-02-13 2016-10-25 Asm Ip Holding B.V. Method for forming film having low resistance and shallow junction depth
US10529542B2 (en) 2015-03-11 2020-01-07 Asm Ip Holdings B.V. Cross-flow reactor and method
US10276355B2 (en) 2015-03-12 2019-04-30 Asm Ip Holding B.V. Multi-zone reactor, system including the reactor, and method of using the same
US11742189B2 (en) 2015-03-12 2023-08-29 Asm Ip Holding B.V. Multi-zone reactor, system including the reactor, and method of using the same
US10458018B2 (en) 2015-06-26 2019-10-29 Asm Ip Holding B.V. Structures including metal carbide material, devices including the structures, and methods of forming same
US11242598B2 (en) 2015-06-26 2022-02-08 Asm Ip Holding B.V. Structures including metal carbide material, devices including the structures, and methods of forming same
US10600673B2 (en) 2015-07-07 2020-03-24 Asm Ip Holding B.V. Magnetic susceptor to baseplate seal
US9899291B2 (en) 2015-07-13 2018-02-20 Asm Ip Holding B.V. Method for protecting layer by forming hydrocarbon-based extremely thin film
US10043661B2 (en) 2015-07-13 2018-08-07 Asm Ip Holding B.V. Method for protecting layer by forming hydrocarbon-based extremely thin film
US10083836B2 (en) 2015-07-24 2018-09-25 Asm Ip Holding B.V. Formation of boron-doped titanium metal films with high work function
US10087525B2 (en) 2015-08-04 2018-10-02 Asm Ip Holding B.V. Variable gap hard stop design
US9647114B2 (en) 2015-08-14 2017-05-09 Asm Ip Holding B.V. Methods of forming highly p-type doped germanium tin films and structures and devices including the films
US9711345B2 (en) 2015-08-25 2017-07-18 Asm Ip Holding B.V. Method for forming aluminum nitride-based film by PEALD
US9960072B2 (en) 2015-09-29 2018-05-01 Asm Ip Holding B.V. Variable adjustment for precise matching of multiple chamber cavity housings
US10312129B2 (en) 2015-09-29 2019-06-04 Asm Ip Holding B.V. Variable adjustment for precise matching of multiple chamber cavity housings
US9909214B2 (en) 2015-10-15 2018-03-06 Asm Ip Holding B.V. Method for depositing dielectric film in trenches by PEALD
US11233133B2 (en) 2015-10-21 2022-01-25 Asm Ip Holding B.V. NbMC layers
US10211308B2 (en) 2015-10-21 2019-02-19 Asm Ip Holding B.V. NbMC layers
US10322384B2 (en) 2015-11-09 2019-06-18 Asm Ip Holding B.V. Counter flow mixer for process chamber
US9455138B1 (en) 2015-11-10 2016-09-27 Asm Ip Holding B.V. Method for forming dielectric film in trenches by PEALD using H-containing gas
US9905420B2 (en) 2015-12-01 2018-02-27 Asm Ip Holding B.V. Methods of forming silicon germanium tin films and structures and devices including the films
US9607837B1 (en) 2015-12-21 2017-03-28 Asm Ip Holding B.V. Method for forming silicon oxide cap layer for solid state diffusion process
US9735024B2 (en) 2015-12-28 2017-08-15 Asm Ip Holding B.V. Method of atomic layer etching using functional group-containing fluorocarbon
US9627221B1 (en) 2015-12-28 2017-04-18 Asm Ip Holding B.V. Continuous process incorporating atomic layer etching
US11956977B2 (en) 2015-12-29 2024-04-09 Asm Ip Holding B.V. Atomic layer deposition of III-V compounds to form V-NAND devices
US11139308B2 (en) 2015-12-29 2021-10-05 Asm Ip Holding B.V. Atomic layer deposition of III-V compounds to form V-NAND devices
US9754779B1 (en) 2016-02-19 2017-09-05 Asm Ip Holding B.V. Method for forming silicon nitride film selectively on sidewalls or flat surfaces of trenches
US10720322B2 (en) 2016-02-19 2020-07-21 Asm Ip Holding B.V. Method for forming silicon nitride film selectively on top surface
US10529554B2 (en) 2016-02-19 2020-01-07 Asm Ip Holding B.V. Method for forming silicon nitride film selectively on sidewalls or flat surfaces of trenches
US11676812B2 (en) 2016-02-19 2023-06-13 Asm Ip Holding B.V. Method for forming silicon nitride film selectively on top/bottom portions
US10468251B2 (en) 2016-02-19 2019-11-05 Asm Ip Holding B.V. Method for forming spacers using silicon nitride film for spacer-defined multiple patterning
US10501866B2 (en) 2016-03-09 2019-12-10 Asm Ip Holding B.V. Gas distribution apparatus for improved film uniformity in an epitaxial system
US10343920B2 (en) 2016-03-18 2019-07-09 Asm Ip Holding B.V. Aligned carbon nanotubes
US10262859B2 (en) 2016-03-24 2019-04-16 Asm Ip Holding B.V. Process for forming a film on a substrate using multi-port injection assemblies
US10087522B2 (en) 2016-04-21 2018-10-02 Asm Ip Holding B.V. Deposition of metal borides
US10851456B2 (en) 2016-04-21 2020-12-01 Asm Ip Holding B.V. Deposition of metal borides
US10190213B2 (en) 2016-04-21 2019-01-29 Asm Ip Holding B.V. Deposition of metal borides
US10865475B2 (en) 2016-04-21 2020-12-15 Asm Ip Holding B.V. Deposition of metal borides and silicides
US10367080B2 (en) 2016-05-02 2019-07-30 Asm Ip Holding B.V. Method of forming a germanium oxynitride film
US10032628B2 (en) 2016-05-02 2018-07-24 Asm Ip Holding B.V. Source/drain performance through conformal solid state doping
US11101370B2 (en) 2016-05-02 2021-08-24 Asm Ip Holding B.V. Method of forming a germanium oxynitride film
US10665452B2 (en) 2016-05-02 2020-05-26 Asm Ip Holdings B.V. Source/drain performance through conformal solid state doping
US10249577B2 (en) 2016-05-17 2019-04-02 Asm Ip Holding B.V. Method of forming metal interconnection and method of fabricating semiconductor apparatus using the method
US11453943B2 (en) 2016-05-25 2022-09-27 Asm Ip Holding B.V. Method for forming carbon-containing silicon/metal oxide or nitride film by ALD using silicon precursor and hydrocarbon precursor
US10388509B2 (en) 2016-06-28 2019-08-20 Asm Ip Holding B.V. Formation of epitaxial layers via dislocation filtering
US11749562B2 (en) 2016-07-08 2023-09-05 Asm Ip Holding B.V. Selective deposition method to form air gaps
US11094582B2 (en) 2016-07-08 2021-08-17 Asm Ip Holding B.V. Selective deposition method to form air gaps
US11649546B2 (en) 2016-07-08 2023-05-16 Asm Ip Holding B.V. Organic reactants for atomic layer deposition
US9859151B1 (en) 2016-07-08 2018-01-02 Asm Ip Holding B.V. Selective film deposition method to form air gaps
US10541173B2 (en) 2016-07-08 2020-01-21 Asm Ip Holding B.V. Selective deposition method to form air gaps
US10612137B2 (en) 2016-07-08 2020-04-07 Asm Ip Holdings B.V. Organic reactants for atomic layer deposition
US9793135B1 (en) 2016-07-14 2017-10-17 ASM IP Holding B.V Method of cyclic dry etching using etchant film
US10714385B2 (en) 2016-07-19 2020-07-14 Asm Ip Holding B.V. Selective deposition of tungsten
US10381226B2 (en) 2016-07-27 2019-08-13 Asm Ip Holding B.V. Method of processing substrate
US9812320B1 (en) 2016-07-28 2017-11-07 Asm Ip Holding B.V. Method and apparatus for filling a gap
US11694892B2 (en) 2016-07-28 2023-07-04 Asm Ip Holding B.V. Method and apparatus for filling a gap
US9887082B1 (en) 2016-07-28 2018-02-06 Asm Ip Holding B.V. Method and apparatus for filling a gap
US11205585B2 (en) 2016-07-28 2021-12-21 Asm Ip Holding B.V. Substrate processing apparatus and method of operating the same
US10741385B2 (en) 2016-07-28 2020-08-11 Asm Ip Holding B.V. Method and apparatus for filling a gap
US10395919B2 (en) 2016-07-28 2019-08-27 Asm Ip Holding B.V. Method and apparatus for filling a gap
US11610775B2 (en) 2016-07-28 2023-03-21 Asm Ip Holding B.V. Method and apparatus for filling a gap
US11107676B2 (en) 2016-07-28 2021-08-31 Asm Ip Holding B.V. Method and apparatus for filling a gap
US10177025B2 (en) 2016-07-28 2019-01-08 Asm Ip Holding B.V. Method and apparatus for filling a gap
US10090316B2 (en) 2016-09-01 2018-10-02 Asm Ip Holding B.V. 3D stacked multilayer semiconductor memory using doped select transistor channel
US10410943B2 (en) 2016-10-13 2019-09-10 Asm Ip Holding B.V. Method for passivating a surface of a semiconductor and related systems
US10943771B2 (en) 2016-10-26 2021-03-09 Asm Ip Holding B.V. Methods for thermally calibrating reaction chambers
US10643826B2 (en) 2016-10-26 2020-05-05 Asm Ip Holdings B.V. Methods for thermally calibrating reaction chambers
US11532757B2 (en) 2016-10-27 2022-12-20 Asm Ip Holding B.V. Deposition of charge trapping layers
US11810788B2 (en) 2016-11-01 2023-11-07 Asm Ip Holding B.V. Methods for forming a transition metal niobium nitride film on a substrate by atomic layer deposition and related semiconductor device structures
US10643904B2 (en) 2016-11-01 2020-05-05 Asm Ip Holdings B.V. Methods for forming a semiconductor device and related semiconductor device structures
US10229833B2 (en) 2016-11-01 2019-03-12 Asm Ip Holding B.V. Methods for forming a transition metal nitride film on a substrate by atomic layer deposition and related semiconductor device structures
US10714350B2 (en) 2016-11-01 2020-07-14 ASM IP Holdings, B.V. Methods for forming a transition metal niobium nitride film on a substrate by atomic layer deposition and related semiconductor device structures
US10435790B2 (en) 2016-11-01 2019-10-08 Asm Ip Holding B.V. Method of subatmospheric plasma-enhanced ALD using capacitively coupled electrodes with narrow gap
US10720331B2 (en) 2016-11-01 2020-07-21 ASM IP Holdings, B.V. Methods for forming a transition metal nitride film on a substrate by atomic layer deposition and related semiconductor device structures
US10644025B2 (en) 2016-11-07 2020-05-05 Asm Ip Holding B.V. Method of processing a substrate and a device manufactured by using the method
US10622375B2 (en) 2016-11-07 2020-04-14 Asm Ip Holding B.V. Method of processing a substrate and a device manufactured by using the method
US10134757B2 (en) 2016-11-07 2018-11-20 Asm Ip Holding B.V. Method of processing a substrate and a device manufactured by using the method
US11396702B2 (en) 2016-11-15 2022-07-26 Asm Ip Holding B.V. Gas supply unit and substrate processing apparatus including the gas supply unit
US10934619B2 (en) 2016-11-15 2021-03-02 Asm Ip Holding B.V. Gas supply unit and substrate processing apparatus including the gas supply unit
US10340135B2 (en) 2016-11-28 2019-07-02 Asm Ip Holding B.V. Method of topologically restricted plasma-enhanced cyclic deposition of silicon or metal nitride
US11222772B2 (en) 2016-12-14 2022-01-11 Asm Ip Holding B.V. Substrate processing apparatus
US9916980B1 (en) 2016-12-15 2018-03-13 Asm Ip Holding B.V. Method of forming a structure on a substrate
US11581186B2 (en) 2016-12-15 2023-02-14 Asm Ip Holding B.V. Sequential infiltration synthesis apparatus
US11851755B2 (en) 2016-12-15 2023-12-26 Asm Ip Holding B.V. Sequential infiltration synthesis apparatus and a method of forming a patterned structure
US11447861B2 (en) 2016-12-15 2022-09-20 Asm Ip Holding B.V. Sequential infiltration synthesis apparatus and a method of forming a patterned structure
US11001925B2 (en) 2016-12-19 2021-05-11 Asm Ip Holding B.V. Substrate processing apparatus
US11251035B2 (en) 2016-12-22 2022-02-15 Asm Ip Holding B.V. Method of forming a structure on a substrate
US10269558B2 (en) 2016-12-22 2019-04-23 Asm Ip Holding B.V. Method of forming a structure on a substrate
US10784102B2 (en) 2016-12-22 2020-09-22 Asm Ip Holding B.V. Method of forming a structure on a substrate
US10867788B2 (en) 2016-12-28 2020-12-15 Asm Ip Holding B.V. Method of forming a structure on a substrate
US11390950B2 (en) 2017-01-10 2022-07-19 Asm Ip Holding B.V. Reactor system and method to reduce residue buildup during a film deposition process
US10655221B2 (en) 2017-02-09 2020-05-19 Asm Ip Holding B.V. Method for depositing oxide film by thermal ALD and PEALD
US10468261B2 (en) 2017-02-15 2019-11-05 Asm Ip Holding B.V. Methods for forming a metallic film on a substrate by cyclical deposition and related semiconductor device structures
US11410851B2 (en) 2017-02-15 2022-08-09 Asm Ip Holding B.V. Methods for forming a metallic film on a substrate by cyclical deposition and related semiconductor device structures
US10468262B2 (en) 2017-02-15 2019-11-05 Asm Ip Holding B.V. Methods for forming a metallic film on a substrate by a cyclical deposition and related semiconductor device structures
US10529563B2 (en) 2017-03-29 2020-01-07 Asm Ip Holdings B.V. Method for forming doped metal oxide films on a substrate by cyclical deposition and related semiconductor device structures
US10283353B2 (en) 2017-03-29 2019-05-07 Asm Ip Holding B.V. Method of reforming insulating film deposited on substrate with recess pattern
US11658030B2 (en) 2017-03-29 2023-05-23 Asm Ip Holding B.V. Method for forming doped metal oxide films on a substrate by cyclical deposition and related semiconductor device structures
US10103040B1 (en) 2017-03-31 2018-10-16 Asm Ip Holding B.V. Apparatus and method for manufacturing a semiconductor device
USD830981S1 (en) 2017-04-07 2018-10-16 Asm Ip Holding B.V. Susceptor for semiconductor substrate processing apparatus
US10714335B2 (en) 2017-04-25 2020-07-14 Asm Ip Holding B.V. Method of depositing thin film and method of manufacturing semiconductor device
US10950432B2 (en) 2017-04-25 2021-03-16 Asm Ip Holding B.V. Method of depositing thin film and method of manufacturing semiconductor device
US10446393B2 (en) 2017-05-08 2019-10-15 Asm Ip Holding B.V. Methods for forming silicon-containing epitaxial layers and related semiconductor device structures
US11848200B2 (en) 2017-05-08 2023-12-19 Asm Ip Holding B.V. Methods for selectively forming a silicon nitride film on a substrate and related semiconductor device structures
US10770286B2 (en) 2017-05-08 2020-09-08 Asm Ip Holdings B.V. Methods for selectively forming a silicon nitride film on a substrate and related semiconductor device structures
US10892156B2 (en) 2017-05-08 2021-01-12 Asm Ip Holding B.V. Methods for forming a silicon nitride film on a substrate and related semiconductor device structures
US10504742B2 (en) 2017-05-31 2019-12-10 Asm Ip Holding B.V. Method of atomic layer etching using hydrogen plasma
US10886123B2 (en) 2017-06-02 2021-01-05 Asm Ip Holding B.V. Methods for forming low temperature semiconductor layers and related semiconductor device structures
US11306395B2 (en) 2017-06-28 2022-04-19 Asm Ip Holding B.V. Methods for depositing a transition metal nitride film on a substrate by atomic layer deposition and related deposition apparatus
US10685834B2 (en) 2017-07-05 2020-06-16 Asm Ip Holdings B.V. Methods for forming a silicon germanium tin layer and related semiconductor device structures
US11164955B2 (en) 2017-07-18 2021-11-02 Asm Ip Holding B.V. Methods for forming a semiconductor device structure and related semiconductor device structures
US10734497B2 (en) 2017-07-18 2020-08-04 Asm Ip Holding B.V. Methods for forming a semiconductor device structure and related semiconductor device structures
US11695054B2 (en) 2017-07-18 2023-07-04 Asm Ip Holding B.V. Methods for forming a semiconductor device structure and related semiconductor device structures
US11018002B2 (en) 2017-07-19 2021-05-25 Asm Ip Holding B.V. Method for selectively depositing a Group IV semiconductor and related semiconductor device structures
US11374112B2 (en) 2017-07-19 2022-06-28 Asm Ip Holding B.V. Method for depositing a group IV semiconductor and related semiconductor device structures
US11004977B2 (en) 2017-07-19 2021-05-11 Asm Ip Holding B.V. Method for depositing a group IV semiconductor and related semiconductor device structures
US10541333B2 (en) 2017-07-19 2020-01-21 Asm Ip Holding B.V. Method for depositing a group IV semiconductor and related semiconductor device structures
US10605530B2 (en) 2017-07-26 2020-03-31 Asm Ip Holding B.V. Assembly of a liner and a flange for a vertical furnace as well as the liner and the vertical furnace
US11802338B2 (en) 2017-07-26 2023-10-31 Asm Ip Holding B.V. Chemical treatment, deposition and/or infiltration apparatus and method for using the same
US10312055B2 (en) 2017-07-26 2019-06-04 Asm Ip Holding B.V. Method of depositing film by PEALD using negative bias
US10590535B2 (en) 2017-07-26 2020-03-17 Asm Ip Holdings B.V. Chemical treatment, deposition and/or infiltration apparatus and method for using the same
US10692741B2 (en) 2017-08-08 2020-06-23 Asm Ip Holdings B.V. Radiation shield
US10770336B2 (en) 2017-08-08 2020-09-08 Asm Ip Holding B.V. Substrate lift mechanism and reactor including same
US11417545B2 (en) 2017-08-08 2022-08-16 Asm Ip Holding B.V. Radiation shield
US11587821B2 (en) 2017-08-08 2023-02-21 Asm Ip Holding B.V. Substrate lift mechanism and reactor including same
US11139191B2 (en) 2017-08-09 2021-10-05 Asm Ip Holding B.V. Storage apparatus for storing cassettes for substrates and processing apparatus equipped therewith
US11769682B2 (en) 2017-08-09 2023-09-26 Asm Ip Holding B.V. Storage apparatus for storing cassettes for substrates and processing apparatus equipped therewith
US10672636B2 (en) 2017-08-09 2020-06-02 Asm Ip Holding B.V. Cassette holder assembly for a substrate cassette and holding member for use in such assembly
US10249524B2 (en) 2017-08-09 2019-04-02 Asm Ip Holding B.V. Cassette holder assembly for a substrate cassette and holding member for use in such assembly
US10236177B1 (en) 2017-08-22 2019-03-19 ASM IP Holding B.V.. Methods for depositing a doped germanium tin semiconductor and related semiconductor device structures
USD900036S1 (en) 2017-08-24 2020-10-27 Asm Ip Holding B.V. Heater electrical connector and adapter
US11830730B2 (en) 2017-08-29 2023-11-28 Asm Ip Holding B.V. Layer forming method and apparatus
US11056344B2 (en) 2017-08-30 2021-07-06 Asm Ip Holding B.V. Layer forming method
US11581220B2 (en) 2017-08-30 2023-02-14 Asm Ip Holding B.V. Methods for depositing a molybdenum metal film over a dielectric surface of a substrate by a cyclical deposition process and related semiconductor device structures
US11069510B2 (en) 2017-08-30 2021-07-20 Asm Ip Holding B.V. Substrate processing apparatus
US11295980B2 (en) 2017-08-30 2022-04-05 Asm Ip Holding B.V. Methods for depositing a molybdenum metal film over a dielectric surface of a substrate by a cyclical deposition process and related semiconductor device structures
US10607895B2 (en) 2017-09-18 2020-03-31 Asm Ip Holdings B.V. Method for forming a semiconductor device structure comprising a gate fill metal
US10928731B2 (en) 2017-09-21 2021-02-23 Asm Ip Holding B.V. Method of sequential infiltration synthesis treatment of infiltrateable material and structures and devices formed using same
US10844484B2 (en) 2017-09-22 2020-11-24 Asm Ip Holding B.V. Apparatus for dispensing a vapor phase reactant to a reaction chamber and related methods
US10658205B2 (en) 2017-09-28 2020-05-19 Asm Ip Holdings B.V. Chemical dispensing apparatus and methods for dispensing a chemical to a reaction chamber
US11387120B2 (en) 2017-09-28 2022-07-12 Asm Ip Holding B.V. Chemical dispensing apparatus and methods for dispensing a chemical to a reaction chamber
US11094546B2 (en) 2017-10-05 2021-08-17 Asm Ip Holding B.V. Method for selectively depositing a metallic film on a substrate
US10403504B2 (en) 2017-10-05 2019-09-03 Asm Ip Holding B.V. Method for selectively depositing a metallic film on a substrate
US10319588B2 (en) 2017-10-10 2019-06-11 Asm Ip Holding B.V. Method for depositing a metal chalcogenide on a substrate by cyclical deposition
US10734223B2 (en) 2017-10-10 2020-08-04 Asm Ip Holding B.V. Method for depositing a metal chalcogenide on a substrate by cyclical deposition
US10923344B2 (en) 2017-10-30 2021-02-16 Asm Ip Holding B.V. Methods for forming a semiconductor structure and related semiconductor structures
US10734244B2 (en) 2017-11-16 2020-08-04 Asm Ip Holding B.V. Method of processing a substrate and a device manufactured by the same
US10910262B2 (en) 2017-11-16 2021-02-02 Asm Ip Holding B.V. Method of selectively depositing a capping layer structure on a semiconductor device structure
US11022879B2 (en) 2017-11-24 2021-06-01 Asm Ip Holding B.V. Method of forming an enhanced unexposed photoresist layer
US11682572B2 (en) 2017-11-27 2023-06-20 Asm Ip Holdings B.V. Storage device for storing wafer cassettes for use with a batch furnace
US11639811B2 (en) 2017-11-27 2023-05-02 Asm Ip Holding B.V. Apparatus including a clean mini environment
US11127617B2 (en) 2017-11-27 2021-09-21 Asm Ip Holding B.V. Storage device for storing wafer cassettes for use with a batch furnace
US10290508B1 (en) 2017-12-05 2019-05-14 Asm Ip Holding B.V. Method for forming vertical spacers for spacer-defined patterning
US10872771B2 (en) 2018-01-16 2020-12-22 Asm Ip Holding B. V. Method for depositing a material film on a substrate within a reaction chamber by a cyclical deposition process and related device structures
US11501973B2 (en) 2018-01-16 2022-11-15 Asm Ip Holding B.V. Method for depositing a material film on a substrate within a reaction chamber by a cyclical deposition process and related device structures
US11393690B2 (en) 2018-01-19 2022-07-19 Asm Ip Holding B.V. Deposition method
US11482412B2 (en) 2018-01-19 2022-10-25 Asm Ip Holding B.V. Method for depositing a gap-fill layer by plasma-assisted deposition
USD903477S1 (en) 2018-01-24 2020-12-01 Asm Ip Holdings B.V. Metal clamp
US11018047B2 (en) 2018-01-25 2021-05-25 Asm Ip Holding B.V. Hybrid lift pin
US10535516B2 (en) 2018-02-01 2020-01-14 Asm Ip Holdings B.V. Method for depositing a semiconductor structure on a surface of a substrate and related semiconductor structures
USD913980S1 (en) 2018-02-01 2021-03-23 Asm Ip Holding B.V. Gas supply plate for semiconductor manufacturing apparatus
USD880437S1 (en) 2018-02-01 2020-04-07 Asm Ip Holding B.V. Gas supply plate for semiconductor manufacturing apparatus
US11735414B2 (en) 2018-02-06 2023-08-22 Asm Ip Holding B.V. Method of post-deposition treatment for silicon oxide film
US11081345B2 (en) 2018-02-06 2021-08-03 Asm Ip Holding B.V. Method of post-deposition treatment for silicon oxide film
US11685991B2 (en) 2018-02-14 2023-06-27 Asm Ip Holding B.V. Method for depositing a ruthenium-containing film on a substrate by a cyclical deposition process
US11387106B2 (en) 2018-02-14 2022-07-12 Asm Ip Holding B.V. Method for depositing a ruthenium-containing film on a substrate by a cyclical deposition process
US10896820B2 (en) 2018-02-14 2021-01-19 Asm Ip Holding B.V. Method for depositing a ruthenium-containing film on a substrate by a cyclical deposition process
US10731249B2 (en) 2018-02-15 2020-08-04 Asm Ip Holding B.V. Method of forming a transition metal containing film on a substrate by a cyclical deposition process, a method for supplying a transition metal halide compound to a reaction chamber, and related vapor deposition apparatus
US11482418B2 (en) 2018-02-20 2022-10-25 Asm Ip Holding B.V. Substrate processing method and apparatus
US10658181B2 (en) 2018-02-20 2020-05-19 Asm Ip Holding B.V. Method of spacer-defined direct patterning in semiconductor fabrication
US10975470B2 (en) 2018-02-23 2021-04-13 Asm Ip Holding B.V. Apparatus for detecting or monitoring for a chemical precursor in a high temperature environment
US11939673B2 (en) 2018-02-23 2024-03-26 Asm Ip Holding B.V. Apparatus for detecting or monitoring for a chemical precursor in a high temperature environment
US11473195B2 (en) 2018-03-01 2022-10-18 Asm Ip Holding B.V. Semiconductor processing apparatus and a method for processing a substrate
US11629406B2 (en) 2018-03-09 2023-04-18 Asm Ip Holding B.V. Semiconductor processing apparatus comprising one or more pyrometers for measuring a temperature of a substrate during transfer of the substrate
US11114283B2 (en) 2018-03-16 2021-09-07 Asm Ip Holding B.V. Reactor, system including the reactor, and methods of manufacturing and using same
US11398382B2 (en) 2018-03-27 2022-07-26 Asm Ip Holding B.V. Method of forming an electrode on a substrate and a semiconductor device structure including an electrode
US10847371B2 (en) 2018-03-27 2020-11-24 Asm Ip Holding B.V. Method of forming an electrode on a substrate and a semiconductor device structure including an electrode
US11088002B2 (en) 2018-03-29 2021-08-10 Asm Ip Holding B.V. Substrate rack and a substrate processing system and method
US11230766B2 (en) 2018-03-29 2022-01-25 Asm Ip Holding B.V. Substrate processing apparatus and method
US10510536B2 (en) 2018-03-29 2019-12-17 Asm Ip Holding B.V. Method of depositing a co-doped polysilicon film on a surface of a substrate within a reaction chamber
US10867786B2 (en) 2018-03-30 2020-12-15 Asm Ip Holding B.V. Substrate processing method
US11469098B2 (en) 2018-05-08 2022-10-11 Asm Ip Holding B.V. Methods for depositing an oxide film on a substrate by a cyclical deposition process and related device structures
US11056567B2 (en) 2018-05-11 2021-07-06 Asm Ip Holding B.V. Method of forming a doped metal carbide film on a substrate and related semiconductor device structures
US11361990B2 (en) 2018-05-28 2022-06-14 Asm Ip Holding B.V. Substrate processing method and device manufactured by using the same
US11908733B2 (en) 2018-05-28 2024-02-20 Asm Ip Holding B.V. Substrate processing method and device manufactured by using the same
US11718913B2 (en) 2018-06-04 2023-08-08 Asm Ip Holding B.V. Gas distribution system and reactor system including same
US11837483B2 (en) 2018-06-04 2023-12-05 Asm Ip Holding B.V. Wafer handling chamber with moisture reduction
US11270899B2 (en) 2018-06-04 2022-03-08 Asm Ip Holding B.V. Wafer handling chamber with moisture reduction
US11286562B2 (en) 2018-06-08 2022-03-29 Asm Ip Holding B.V. Gas-phase chemical reactor and method of using same
US11530483B2 (en) 2018-06-21 2022-12-20 Asm Ip Holding B.V. Substrate processing system
US10797133B2 (en) 2018-06-21 2020-10-06 Asm Ip Holding B.V. Method for depositing a phosphorus doped silicon arsenide film and related semiconductor device structures
US11296189B2 (en) 2018-06-21 2022-04-05 Asm Ip Holding B.V. Method for depositing a phosphorus doped silicon arsenide film and related semiconductor device structures
US11492703B2 (en) 2018-06-27 2022-11-08 Asm Ip Holding B.V. Cyclic deposition methods for forming metal-containing material and films and structures including the metal-containing material
US11814715B2 (en) 2018-06-27 2023-11-14 Asm Ip Holding B.V. Cyclic deposition methods for forming metal-containing material and films and structures including the metal-containing material
US11499222B2 (en) 2018-06-27 2022-11-15 Asm Ip Holding B.V. Cyclic deposition methods for forming metal-containing material and films and structures including the metal-containing material
US11952658B2 (en) 2018-06-27 2024-04-09 Asm Ip Holding B.V. Cyclic deposition methods for forming metal-containing material and films and structures including the metal-containing material
US11168395B2 (en) 2018-06-29 2021-11-09 Asm Ip Holding B.V. Temperature-controlled flange and reactor system including same
US10612136B2 (en) 2018-06-29 2020-04-07 ASM IP Holding, B.V. Temperature-controlled flange and reactor system including same
US10914004B2 (en) 2018-06-29 2021-02-09 Asm Ip Holding B.V. Thin-film deposition method and manufacturing method of semiconductor device
US10755922B2 (en) 2018-07-03 2020-08-25 Asm Ip Holding B.V. Method for depositing silicon-free carbon-containing film as gap-fill layer by pulse plasma-assisted deposition
US11646197B2 (en) 2018-07-03 2023-05-09 Asm Ip Holding B.V. Method for depositing silicon-free carbon-containing film as gap-fill layer by pulse plasma-assisted deposition
US11923190B2 (en) 2018-07-03 2024-03-05 Asm Ip Holding B.V. Method for depositing silicon-free carbon-containing film as gap-fill layer by pulse plasma-assisted deposition
US10388513B1 (en) 2018-07-03 2019-08-20 Asm Ip Holding B.V. Method for depositing silicon-free carbon-containing film as gap-fill layer by pulse plasma-assisted deposition
US10755923B2 (en) 2018-07-03 2020-08-25 Asm Ip Holding B.V. Method for depositing silicon-free carbon-containing film as gap-fill layer by pulse plasma-assisted deposition
US10767789B2 (en) 2018-07-16 2020-09-08 Asm Ip Holding B.V. Diaphragm valves, valve components, and methods for forming valve components
US10483099B1 (en) 2018-07-26 2019-11-19 Asm Ip Holding B.V. Method for forming thermally stable organosilicon polymer film
US11053591B2 (en) 2018-08-06 2021-07-06 Asm Ip Holding B.V. Multi-port gas injection system and reactor system including same
US10883175B2 (en) 2018-08-09 2021-01-05 Asm Ip Holding B.V. Vertical furnace for processing substrates and a liner for use therein
US10829852B2 (en) 2018-08-16 2020-11-10 Asm Ip Holding B.V. Gas distribution device for a wafer processing apparatus
US11430674B2 (en) 2018-08-22 2022-08-30 Asm Ip Holding B.V. Sensor array, apparatus for dispensing a vapor phase reactant to a reaction chamber and related methods
US11804388B2 (en) 2018-09-11 2023-10-31 Asm Ip Holding B.V. Substrate processing apparatus and method
US11274369B2 (en) 2018-09-11 2022-03-15 Asm Ip Holding B.V. Thin film deposition method
US11024523B2 (en) 2018-09-11 2021-06-01 Asm Ip Holding B.V. Substrate processing apparatus and method
US11049751B2 (en) 2018-09-14 2021-06-29 Asm Ip Holding B.V. Cassette supply system to store and handle cassettes and processing apparatus equipped therewith
US11885023B2 (en) 2018-10-01 2024-01-30 Asm Ip Holding B.V. Substrate retaining apparatus, system including the apparatus, and method of using same
US11232963B2 (en) 2018-10-03 2022-01-25 Asm Ip Holding B.V. Substrate processing apparatus and method
US11414760B2 (en) 2018-10-08 2022-08-16 Asm Ip Holding B.V. Substrate support unit, thin film deposition apparatus including the same, and substrate processing apparatus including the same
US10847365B2 (en) 2018-10-11 2020-11-24 Asm Ip Holding B.V. Method of forming conformal silicon carbide film by cyclic CVD
US10811256B2 (en) 2018-10-16 2020-10-20 Asm Ip Holding B.V. Method for etching a carbon-containing feature
US11251068B2 (en) 2018-10-19 2022-02-15 Asm Ip Holding B.V. Substrate processing apparatus and substrate processing method
US11664199B2 (en) 2018-10-19 2023-05-30 Asm Ip Holding B.V. Substrate processing apparatus and substrate processing method
USD948463S1 (en) 2018-10-24 2022-04-12 Asm Ip Holding B.V. Susceptor for semiconductor substrate supporting apparatus
US10381219B1 (en) 2018-10-25 2019-08-13 Asm Ip Holding B.V. Methods for forming a silicon nitride film
US11735445B2 (en) 2018-10-31 2023-08-22 Asm Ip Holding B.V. Substrate processing apparatus for processing substrates
US11087997B2 (en) 2018-10-31 2021-08-10 Asm Ip Holding B.V. Substrate processing apparatus for processing substrates
US11866823B2 (en) 2018-11-02 2024-01-09 Asm Ip Holding B.V. Substrate supporting unit and a substrate processing device including the same
US11499226B2 (en) 2018-11-02 2022-11-15 Asm Ip Holding B.V. Substrate supporting unit and a substrate processing device including the same
US11572620B2 (en) 2018-11-06 2023-02-07 Asm Ip Holding B.V. Methods for selectively depositing an amorphous silicon film on a substrate
US11031242B2 (en) 2018-11-07 2021-06-08 Asm Ip Holding B.V. Methods for depositing a boron doped silicon germanium film
US11411088B2 (en) 2018-11-16 2022-08-09 Asm Ip Holding B.V. Methods for forming a metal silicate film on a substrate in a reaction chamber and related semiconductor device structures
US10818758B2 (en) 2018-11-16 2020-10-27 Asm Ip Holding B.V. Methods for forming a metal silicate film on a substrate in a reaction chamber and related semiconductor device structures
US11244825B2 (en) 2018-11-16 2022-02-08 Asm Ip Holding B.V. Methods for depositing a transition metal chalcogenide film on a substrate by a cyclical deposition process
US11798999B2 (en) 2018-11-16 2023-10-24 Asm Ip Holding B.V. Methods for forming a metal silicate film on a substrate in a reaction chamber and related semiconductor device structures
US10847366B2 (en) 2018-11-16 2020-11-24 Asm Ip Holding B.V. Methods for depositing a transition metal chalcogenide film on a substrate by a cyclical deposition process
US10559458B1 (en) 2018-11-26 2020-02-11 Asm Ip Holding B.V. Method of forming oxynitride film
US11217444B2 (en) 2018-11-30 2022-01-04 Asm Ip Holding B.V. Method for forming an ultraviolet radiation responsive metal oxide-containing film
US11488819B2 (en) 2018-12-04 2022-11-01 Asm Ip Holding B.V. Method of cleaning substrate processing apparatus
US11769670B2 (en) 2018-12-13 2023-09-26 Asm Ip Holding B.V. Methods for forming a rhenium-containing film on a substrate by a cyclical deposition process and related semiconductor device structures
US11158513B2 (en) 2018-12-13 2021-10-26 Asm Ip Holding B.V. Methods for forming a rhenium-containing film on a substrate by a cyclical deposition process and related semiconductor device structures
US11658029B2 (en) 2018-12-14 2023-05-23 Asm Ip Holding B.V. Method of forming a device structure using selective deposition of gallium nitride and system for same
US11959171B2 (en) 2019-01-17 2024-04-16 Asm Ip Holding B.V. Methods of forming a transition metal containing film on a substrate by a cyclical deposition process
US11390946B2 (en) 2019-01-17 2022-07-19 Asm Ip Holding B.V. Methods of forming a transition metal containing film on a substrate by a cyclical deposition process
US11171025B2 (en) 2019-01-22 2021-11-09 Asm Ip Holding B.V. Substrate processing device
US11127589B2 (en) 2019-02-01 2021-09-21 Asm Ip Holding B.V. Method of topology-selective film formation of silicon oxide
US11227789B2 (en) 2019-02-20 2022-01-18 Asm Ip Holding B.V. Method and apparatus for filling a recess formed within a substrate surface
US11342216B2 (en) 2019-02-20 2022-05-24 Asm Ip Holding B.V. Cyclical deposition method and apparatus for filling a recess formed within a substrate surface
US11615980B2 (en) 2019-02-20 2023-03-28 Asm Ip Holding B.V. Method and apparatus for filling a recess formed within a substrate surface
US11798834B2 (en) 2019-02-20 2023-10-24 Asm Ip Holding B.V. Cyclical deposition method and apparatus for filling a recess formed within a substrate surface
US11482533B2 (en) 2019-02-20 2022-10-25 Asm Ip Holding B.V. Apparatus and methods for plug fill deposition in 3-D NAND applications
US11251040B2 (en) 2019-02-20 2022-02-15 Asm Ip Holding B.V. Cyclical deposition method including treatment step and apparatus for same
US11629407B2 (en) 2019-02-22 2023-04-18 Asm Ip Holding B.V. Substrate processing apparatus and method for processing substrates
US11742198B2 (en) 2019-03-08 2023-08-29 Asm Ip Holding B.V. Structure including SiOCN layer and method of forming same
US11114294B2 (en) 2019-03-08 2021-09-07 Asm Ip Holding B.V. Structure including SiOC layer and method of forming same
US11901175B2 (en) 2019-03-08 2024-02-13 Asm Ip Holding B.V. Method for selective deposition of silicon nitride layer and structure including selectively-deposited silicon nitride layer
US11424119B2 (en) 2019-03-08 2022-08-23 Asm Ip Holding B.V. Method for selective deposition of silicon nitride layer and structure including selectively-deposited silicon nitride layer
US11378337B2 (en) 2019-03-28 2022-07-05 Asm Ip Holding B.V. Door opener and substrate processing apparatus provided therewith
US11551925B2 (en) 2019-04-01 2023-01-10 Asm Ip Holding B.V. Method for manufacturing a semiconductor device
US11447864B2 (en) 2019-04-19 2022-09-20 Asm Ip Holding B.V. Layer forming method and apparatus
US11814747B2 (en) 2019-04-24 2023-11-14 Asm Ip Holding B.V. Gas-phase reactor system-with a reaction chamber, a solid precursor source vessel, a gas distribution system, and a flange assembly
US11289326B2 (en) 2019-05-07 2022-03-29 Asm Ip Holding B.V. Method for reforming amorphous carbon polymer film
US11781221B2 (en) 2019-05-07 2023-10-10 Asm Ip Holding B.V. Chemical source vessel with dip tube
US11355338B2 (en) 2019-05-10 2022-06-07 Asm Ip Holding B.V. Method of depositing material onto a surface and structure formed according to the method
US11515188B2 (en) 2019-05-16 2022-11-29 Asm Ip Holding B.V. Wafer boat handling device, vertical batch furnace and method
USD947913S1 (en) 2019-05-17 2022-04-05 Asm Ip Holding B.V. Susceptor shaft
USD975665S1 (en) 2019-05-17 2023-01-17 Asm Ip Holding B.V. Susceptor shaft
USD935572S1 (en) 2019-05-24 2021-11-09 Asm Ip Holding B.V. Gas channel plate
USD922229S1 (en) 2019-06-05 2021-06-15 Asm Ip Holding B.V. Device for controlling a temperature of a gas supply unit
US11453946B2 (en) 2019-06-06 2022-09-27 Asm Ip Holding B.V. Gas-phase reactor system including a gas detector
US11345999B2 (en) 2019-06-06 2022-05-31 Asm Ip Holding B.V. Method of using a gas-phase reactor system including analyzing exhausted gas
US11908684B2 (en) 2019-06-11 2024-02-20 Asm Ip Holding B.V. Method of forming an electronic structure using reforming gas, system for performing the method, and structure formed using the method
US11476109B2 (en) 2019-06-11 2022-10-18 Asm Ip Holding B.V. Method of forming an electronic structure using reforming gas, system for performing the method, and structure formed using the method
USD944946S1 (en) 2019-06-14 2022-03-01 Asm Ip Holding B.V. Shower plate
USD931978S1 (en) 2019-06-27 2021-09-28 Asm Ip Holding B.V. Showerhead vacuum transport
US11390945B2 (en) 2019-07-03 2022-07-19 Asm Ip Holding B.V. Temperature control assembly for substrate processing apparatus and method of using same
US11746414B2 (en) 2019-07-03 2023-09-05 Asm Ip Holding B.V. Temperature control assembly for substrate processing apparatus and method of using same
US11605528B2 (en) 2019-07-09 2023-03-14 Asm Ip Holding B.V. Plasma device using coaxial waveguide, and substrate treatment method
US11664267B2 (en) 2019-07-10 2023-05-30 Asm Ip Holding B.V. Substrate support assembly and substrate processing device including the same
US11664245B2 (en) 2019-07-16 2023-05-30 Asm Ip Holding B.V. Substrate processing device
US11615970B2 (en) 2019-07-17 2023-03-28 Asm Ip Holding B.V. Radical assist ignition plasma system and method
US11688603B2 (en) 2019-07-17 2023-06-27 Asm Ip Holding B.V. Methods of forming silicon germanium structures
US11643724B2 (en) 2019-07-18 2023-05-09 Asm Ip Holding B.V. Method of forming structures using a neutral beam
US11282698B2 (en) 2019-07-19 2022-03-22 Asm Ip Holding B.V. Method of forming topology-controlled amorphous carbon polymer film
US11557474B2 (en) 2019-07-29 2023-01-17 Asm Ip Holding B.V. Methods for selective deposition utilizing n-type dopants and/or alternative dopants to achieve high dopant incorporation
US11443926B2 (en) 2019-07-30 2022-09-13 Asm Ip Holding B.V. Substrate processing apparatus
US11430640B2 (en) 2019-07-30 2022-08-30 Asm Ip Holding B.V. Substrate processing apparatus
US11227782B2 (en) 2019-07-31 2022-01-18 Asm Ip Holding B.V. Vertical batch furnace assembly
US11587815B2 (en) 2019-07-31 2023-02-21 Asm Ip Holding B.V. Vertical batch furnace assembly
US11587814B2 (en) 2019-07-31 2023-02-21 Asm Ip Holding B.V. Vertical batch furnace assembly
US11876008B2 (en) 2019-07-31 2024-01-16 Asm Ip Holding B.V. Vertical batch furnace assembly
US11680839B2 (en) 2019-08-05 2023-06-20 Asm Ip Holding B.V. Liquid level sensor for a chemical source vessel
USD965524S1 (en) 2019-08-19 2022-10-04 Asm Ip Holding B.V. Susceptor support
USD965044S1 (en) 2019-08-19 2022-09-27 Asm Ip Holding B.V. Susceptor shaft
US11639548B2 (en) 2019-08-21 2023-05-02 Asm Ip Holding B.V. Film-forming material mixed-gas forming device and film forming device
USD949319S1 (en) 2019-08-22 2022-04-19 Asm Ip Holding B.V. Exhaust duct
USD930782S1 (en) 2019-08-22 2021-09-14 Asm Ip Holding B.V. Gas distributor
US11594450B2 (en) 2019-08-22 2023-02-28 Asm Ip Holding B.V. Method for forming a structure with a hole
USD940837S1 (en) 2019-08-22 2022-01-11 Asm Ip Holding B.V. Electrode
USD979506S1 (en) 2019-08-22 2023-02-28 Asm Ip Holding B.V. Insulator
US11827978B2 (en) 2019-08-23 2023-11-28 Asm Ip Holding B.V. Methods for depositing a molybdenum nitride film on a surface of a substrate by a cyclical deposition process and related semiconductor device structures including a molybdenum nitride film
US11527400B2 (en) 2019-08-23 2022-12-13 Asm Ip Holding B.V. Method for depositing silicon oxide film having improved quality by peald using bis(diethylamino)silane
US11898242B2 (en) 2019-08-23 2024-02-13 Asm Ip Holding B.V. Methods for forming a polycrystalline molybdenum film over a surface of a substrate and related structures including a polycrystalline molybdenum film
US11286558B2 (en) 2019-08-23 2022-03-29 Asm Ip Holding B.V. Methods for depositing a molybdenum nitride film on a surface of a substrate by a cyclical deposition process and related semiconductor device structures including a molybdenum nitride film
US11495459B2 (en) 2019-09-04 2022-11-08 Asm Ip Holding B.V. Methods for selective deposition using a sacrificial capping layer
US11823876B2 (en) 2019-09-05 2023-11-21 Asm Ip Holding B.V. Substrate processing apparatus
US11562901B2 (en) 2019-09-25 2023-01-24 Asm Ip Holding B.V. Substrate processing method
US11610774B2 (en) 2019-10-02 2023-03-21 Asm Ip Holding B.V. Methods for forming a topographically selective silicon oxide film by a cyclical plasma-enhanced deposition process
US11339476B2 (en) 2019-10-08 2022-05-24 Asm Ip Holding B.V. Substrate processing device having connection plates, substrate processing method
US11735422B2 (en) 2019-10-10 2023-08-22 Asm Ip Holding B.V. Method of forming a photoresist underlayer and structure including same
US11637011B2 (en) 2019-10-16 2023-04-25 Asm Ip Holding B.V. Method of topology-selective film formation of silicon oxide
US11637014B2 (en) 2019-10-17 2023-04-25 Asm Ip Holding B.V. Methods for selective deposition of doped semiconductor material
US11315794B2 (en) 2019-10-21 2022-04-26 Asm Ip Holding B.V. Apparatus and methods for selectively etching films
US11646205B2 (en) 2019-10-29 2023-05-09 Asm Ip Holding B.V. Methods of selectively forming n-type doped material on a surface, systems for selectively forming n-type doped material, and structures formed using same
US11594600B2 (en) 2019-11-05 2023-02-28 Asm Ip Holding B.V. Structures with doped semiconductor layers and methods and systems for forming same
US11501968B2 (en) 2019-11-15 2022-11-15 Asm Ip Holding B.V. Method for providing a semiconductor device with silicon filled gaps
US11626316B2 (en) 2019-11-20 2023-04-11 Asm Ip Holding B.V. Method of depositing carbon-containing material on a surface of a substrate, structure formed using the method, and system for forming the structure
US11401605B2 (en) 2019-11-26 2022-08-02 Asm Ip Holding B.V. Substrate processing apparatus
US11915929B2 (en) 2019-11-26 2024-02-27 Asm Ip Holding B.V. Methods for selectively forming a target film on a substrate comprising a first dielectric surface and a second metallic surface
US11646184B2 (en) 2019-11-29 2023-05-09 Asm Ip Holding B.V. Substrate processing apparatus
US11923181B2 (en) 2019-11-29 2024-03-05 Asm Ip Holding B.V. Substrate processing apparatus for minimizing the effect of a filling gas during substrate processing
US11929251B2 (en) 2019-12-02 2024-03-12 Asm Ip Holding B.V. Substrate processing apparatus having electrostatic chuck and substrate processing method
US11840761B2 (en) 2019-12-04 2023-12-12 Asm Ip Holding B.V. Substrate processing apparatus
US11885013B2 (en) 2019-12-17 2024-01-30 Asm Ip Holding B.V. Method of forming vanadium nitride layer and structure including the vanadium nitride layer
US11527403B2 (en) 2019-12-19 2022-12-13 Asm Ip Holding B.V. Methods for filling a gap feature on a substrate surface and related semiconductor structures
US11551912B2 (en) 2020-01-20 2023-01-10 Asm Ip Holding B.V. Method of forming thin film and method of modifying surface of thin film
US11521851B2 (en) 2020-02-03 2022-12-06 Asm Ip Holding B.V. Method of forming structures including a vanadium or indium layer
US11828707B2 (en) 2020-02-04 2023-11-28 Asm Ip Holding B.V. Method and apparatus for transmittance measurements of large articles
US11776846B2 (en) 2020-02-07 2023-10-03 Asm Ip Holding B.V. Methods for depositing gap filling fluids and related systems and devices
US11781243B2 (en) 2020-02-17 2023-10-10 Asm Ip Holding B.V. Method for depositing low temperature phosphorous-doped silicon
US11876356B2 (en) 2020-03-11 2024-01-16 Asm Ip Holding B.V. Lockout tagout assembly and system and method of using same
US11488854B2 (en) 2020-03-11 2022-11-01 Asm Ip Holding B.V. Substrate handling device with adjustable joints
US11837494B2 (en) 2020-03-11 2023-12-05 Asm Ip Holding B.V. Substrate handling device with adjustable joints
US11961741B2 (en) 2020-03-12 2024-04-16 Asm Ip Holding B.V. Method for fabricating layer structure having target topological profile
US11823866B2 (en) 2020-04-02 2023-11-21 Asm Ip Holding B.V. Thin film forming method
US11830738B2 (en) 2020-04-03 2023-11-28 Asm Ip Holding B.V. Method for forming barrier layer and method for manufacturing semiconductor device
US11437241B2 (en) 2020-04-08 2022-09-06 Asm Ip Holding B.V. Apparatus and methods for selectively etching silicon oxide films
US11821078B2 (en) 2020-04-15 2023-11-21 Asm Ip Holding B.V. Method for forming precoat film and method for forming silicon-containing film
US11530876B2 (en) 2020-04-24 2022-12-20 Asm Ip Holding B.V. Vertical batch furnace assembly comprising a cooling gas supply
US11898243B2 (en) 2020-04-24 2024-02-13 Asm Ip Holding B.V. Method of forming vanadium nitride-containing layer
US11887857B2 (en) 2020-04-24 2024-01-30 Asm Ip Holding B.V. Methods and systems for depositing a layer comprising vanadium, nitrogen, and a further element
US11959168B2 (en) 2020-04-29 2024-04-16 Asm Ip Holding B.V. Solid source precursor vessel
US11798830B2 (en) 2020-05-01 2023-10-24 Asm Ip Holding B.V. Fast FOUP swapping with a FOUP handler
US11515187B2 (en) 2020-05-01 2022-11-29 Asm Ip Holding B.V. Fast FOUP swapping with a FOUP handler
US11626308B2 (en) 2020-05-13 2023-04-11 Asm Ip Holding B.V. Laser alignment fixture for a reactor system
US11804364B2 (en) 2020-05-19 2023-10-31 Asm Ip Holding B.V. Substrate processing apparatus
US11705333B2 (en) 2020-05-21 2023-07-18 Asm Ip Holding B.V. Structures including multiple carbon layers and methods of forming and using same
US11767589B2 (en) 2020-05-29 2023-09-26 Asm Ip Holding B.V. Substrate processing device
US11646204B2 (en) 2020-06-24 2023-05-09 Asm Ip Holding B.V. Method for forming a layer provided with silicon
US11658035B2 (en) 2020-06-30 2023-05-23 Asm Ip Holding B.V. Substrate processing method
US11644758B2 (en) 2020-07-17 2023-05-09 Asm Ip Holding B.V. Structures and methods for use in photolithography
US11674220B2 (en) 2020-07-20 2023-06-13 Asm Ip Holding B.V. Method for depositing molybdenum layers using an underlayer
US11725280B2 (en) 2020-08-26 2023-08-15 Asm Ip Holding B.V. Method for forming metal silicon oxide and metal silicon oxynitride layers
USD990534S1 (en) 2020-09-11 2023-06-27 Asm Ip Holding B.V. Weighted lift pin
USD1012873S1 (en) 2020-09-24 2024-01-30 Asm Ip Holding B.V. Electrode for semiconductor processing apparatus
US11827981B2 (en) 2020-10-14 2023-11-28 Asm Ip Holding B.V. Method of depositing material on stepped structure
US11873557B2 (en) 2020-10-22 2024-01-16 Asm Ip Holding B.V. Method of depositing vanadium metal
US11901179B2 (en) 2020-10-28 2024-02-13 Asm Ip Holding B.V. Method and device for depositing silicon onto substrates
US11891696B2 (en) 2020-11-30 2024-02-06 Asm Ip Holding B.V. Injector configured for arrangement within a reaction chamber of a substrate processing apparatus
US11946137B2 (en) 2020-12-16 2024-04-02 Asm Ip Holding B.V. Runout and wobble measurement fixtures
US11885020B2 (en) 2020-12-22 2024-01-30 Asm Ip Holding B.V. Transition metal deposition method
USD980814S1 (en) 2021-05-11 2023-03-14 Asm Ip Holding B.V. Gas distributor for substrate processing apparatus
USD980813S1 (en) 2021-05-11 2023-03-14 Asm Ip Holding B.V. Gas flow control plate for substrate processing apparatus
USD981973S1 (en) 2021-05-11 2023-03-28 Asm Ip Holding B.V. Reactor wall for substrate processing apparatus
USD1023959S1 (en) 2021-05-11 2024-04-23 Asm Ip Holding B.V. Electrode for substrate processing apparatus
USD990441S1 (en) 2021-09-07 2023-06-27 Asm Ip Holding B.V. Gas flow control plate
US11967488B2 (en) 2022-05-16 2024-04-23 Asm Ip Holding B.V. Method for treatment of deposition reactor
US11972944B2 (en) 2022-10-21 2024-04-30 Asm Ip Holding B.V. Method for depositing a gap-fill layer by plasma-assisted deposition
US11970766B2 (en) 2023-01-17 2024-04-30 Asm Ip Holding B.V. Sequential infiltration synthesis apparatus

Also Published As

Publication number Publication date
JP5103056B2 (en) 2012-12-19
JP2008288227A (en) 2008-11-27
US20100187644A1 (en) 2010-07-29
US8168547B2 (en) 2012-05-01

Similar Documents

Publication Publication Date Title
US8168547B2 (en) Manufacturing method of semiconductor device
KR100640638B1 (en) Method for forming high dielectric film by atomic layer deposition and method of fabricating semiconductor device having high dielectric film
US7772678B2 (en) Metallic compound thin film that contains high-k dielectric metal, nitrogen, and oxygen
KR101286309B1 (en) Replacement metal gate transistors with reduced gate oxide leakage
JP4165076B2 (en) Semiconductor device having high dielectric constant insulating film
US7405482B2 (en) High-k dielectric film, method of forming the same and related semiconductor device
JP2005217409A (en) Multilayer dielectric structure of semiconductor device, semiconductor, and method of manufacturing the same
JP2009059882A (en) Semiconductor device
US8288833B2 (en) Semiconductor device and manufacturing method thereof
JP5456150B2 (en) Semiconductor device and manufacturing method thereof
KR100687153B1 (en) Semiconductor device and manufacturing method thereof
JP2006344837A (en) Semiconductor apparatus and manufacturing method thereof
US20080283929A1 (en) Semiconductor device and manufacturing method of the same
JP5050351B2 (en) Manufacturing method of semiconductor device
WO2004107451A1 (en) Semiconductor device fitted with mis type field-effect transistor, process for producing the same and method of forming metal oxide film
JP2011103330A (en) Method of manufacturing semiconductor device
JP2004247474A (en) Semiconductor device and its manufacturing method, and deposition method
US20080242114A1 (en) Thermal anneal method for a high-k dielectric
JP4220991B2 (en) Manufacturing method of semiconductor device
JP2004289082A (en) Method of forming high-dielectric-constant gate insulating film
KR20050061077A (en) Method for forming dielectric layer in semiconductor device
CN114400253A (en) Semiconductor structure and preparation method
KR20070037124A (en) Semiconductor device having high-k composite gate insulating layer and method of fabricating the same

Legal Events

Date Code Title Description
AS Assignment

Owner name: RENESAS TECHNOLOGY CORP., JAPAN

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:NABATAME, TOSHIHIDE;REEL/FRAME:020918/0533

Effective date: 20080423

STCB Information on status: application discontinuation

Free format text: ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION