US20060237846A1 - Doped nitride film, doped oxide film and other doped films and deposition rate improvement for rtcvd processes - Google Patents

Doped nitride film, doped oxide film and other doped films and deposition rate improvement for rtcvd processes Download PDF

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US20060237846A1
US20060237846A1 US11/428,648 US42864806A US2006237846A1 US 20060237846 A1 US20060237846 A1 US 20060237846A1 US 42864806 A US42864806 A US 42864806A US 2006237846 A1 US2006237846 A1 US 2006237846A1
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film
precursor
silicon
doped
deposition
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Ashima Chakravarti
Shawn Smith
Dominic Schepis
Rangarajan Jagannathan
Anita Madan
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GlobalFoundries Inc
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International Business Machines Corp
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Publication of US20060237846A1 publication Critical patent/US20060237846A1/en
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    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02205—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
    • H01L21/02208—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
    • H01L21/02211—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound being a silane, e.g. disilane, methylsilane or chlorosilane
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/02274—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7833—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's

Definitions

  • the present invention generally relates to films used in manufacture of semiconductor devices, especially to nitride films and oxide films.
  • CMOS complementary metal oxide semiconductor
  • MOL middle-of-the-line
  • PMD pre-metal dielectric
  • Deposition regimes that result in either highly tensile or highly compressive nitride films are well known (e.g., rapid thermal chemical vapor deposition (RTCVD), plasma enhanced chemical vapor deposition (PECVD), high density plasma (HDP) using silicon (Si) precursor such as silane (SiH 4 ), di chloro silane (DCS), Disilane, Hexachlorodisilane, bis-tertiary butyl amino silane (BTBAS), and ammonia (NH 3 )).
  • RTCVD rapid thermal chemical vapor deposition
  • PECVD plasma enhanced chemical vapor deposition
  • HDP high density plasma
  • Si precursor such as silane (SiH 4 ), di chloro silane (DCS), Disilane, Hexachlorodisilane, bis-tertiary butyl amino silane (BTBAS), and ammonia (NH
  • DCS and NH 3 are used for depositing silicon nitride film at temperatures of 700 C and higher.
  • Another object of the present invention is to provide the ability to produce good quality nitride films of varying stress levels, thus enhancing device performance as a “plug-in” solution, i.e., with no integration changes needed.
  • Another object of the present invention is to lower the temperature for deposition of a silicon nitride film, a silicon oxide film, a silicon oxynitride film or a silicon carbide film.
  • a further object of the present invention is to manipulate germanium addition during production of a silicon nitride film, silicon oxide film, silicon oxynitride film or silicon carbide film, to control stress in the produced film.
  • Yet another object of the present invention is to increase the deposition rate when depositing a film.
  • the present invention in one preferred embodiment which is a process in which at least one Si precursor is deposited, at least one Ge precursor and/or at least one C precursor is added, to produce a Ge- and/or C-doped silicon nitride or silicon oxide film with a tunable stress.
  • At least one chemical or physical property (such as a stress property) of a silicon nitride or a silicon oxide film being produced may be tuned by at least one precursor modification during deposition of the film.
  • lower-than-conventional temperature deposition can be obtained in depositing a silicon nitride, silicon oxide, silicon oxynitride or silicon carbide film according to the present invention.
  • the invention in one preferred embodiment provides a method of producing a doped nitride film, a doped oxide film, a doped oxynitride film or a doped carbide film, the method comprising at least: providing at least one silicon precursor (such as, e.g., SiH 4 , DCS, BTBAS, HCD, disilane, trisilane, etc.); providing at least one of: a nitrogen precursor (which may be the same as or different from the silicon precursor) or an oxygen precursor; further providing at least one non-silicon precursor (which may be the same as or different from the silicon precursor, the nitrogen precursor and/or the oxygen precursor); wherein a doped silicon nitride film, doped silicon oxide film, doped silicon oxynitride film or doped silicon carbide film is formed (provided that when the film is a doped oxide, the non-silicon precursor is not boron and not phosphorous).
  • silicon precursor such as, e.g., SiH 4 , DCS,
  • a germanium (Ge) precursor such as, e.g., an organogermanium compound, etc.; GeH 4 , GeH 3 CH 3 , etc.
  • alkyl hydrides or alkyl amino hydrides of germanium, carbon, boron, aluminum, aluminum, arsenic, hafnium, gallium, indium, etc. may be used as precursors.
  • the providing of at least one silicon precursor and the providing of at least one non-silicon precursor occurs simultaneously and is in a form of providing flow of a gas.
  • the inventive methods may be used for producing a variety of doped films, such as, e.g., a germanium- and/or carbon-doped silicon nitride or silicon oxide or silicon oxynitride or silicon carbide; etc.; a silicon nitride, a silicon oxide, a silicon oxynitride or a silicon carbide film with a tunable stress; a doped silicon nitride film having a uniformly distributed dopant concentration (such as, e.g., a Ge-doped silicon nitride film having a uniformly distributed Ge concentration); etc.
  • One example of a method according to the invention is, e.g., adding germane (a germanium precursor) to a mixture of silane and ammonia, and forming a Ge-doped Si nitride film.
  • a precursor modification (such as, e.g., a mixture of at least two precursors, etc.) may be applied to tune at least one chemical or physical property of a produced film (such as, e.g., stress of a produced film, wet etch rate; dry etch rate; etch end point; deposition rate; physical, electrical and/or optical property; etc.).
  • the inventive method optionally may further comprise a step of measuring a signal for a non-silicon dopant from the non-silicon precursor, said signal measuring for controlling an etch.
  • deposition advantageously may be at a lower temperature than if the non-silicon precursor were omitted, such as, e.g., a deposition temperature below about 700° C. (including but not limited to a deposition temperature as low as room temperature), etc.
  • a deposition temperature below about 700° C. (including but not limited to a deposition temperature as low as room temperature), etc.
  • Preferred examples of depositions in which the inventive method may be used are, e.g., RTCVD, PECVD, LPCVD, remote plasma nitride, atomic layer deposition (ALD), etc.
  • the invention in other preferred embodiments provides certain films, such as, e.g., a silicon nitride, silicon oxide, silicon oxynitride or silicon carbide film (such as, e.g., a germanium-doped film, etc.), having a tunable stress in a range of about 3 G Pa (compressive) to 3 G Pa (tensile); a silicon nitride film, wherein the film is a Ge-doped silicon nitride film with uniformly distributed Ge; an aluminum-doped silicon oxide film; a germanium-doped silicon nitride film; etc.; a Ge-doped film wherein the Ge-doped film has a stress that is at least about 1.0 G Pa greater (preferably, 1.2 G Pa greater) than a film that has been made by a same process except without Ge-doping.
  • a silicon nitride, silicon oxide, silicon oxynitride or silicon carbide film such as, e.g
  • Inventive films may include one or more dopants, such as a multitude of dopants.
  • dopants for use in inventive films include, e.g., germanium (Ge), carbon (C), boron (B), aluminum (Al), gallium (Ga), indium (In), etc., which dopants may be used singly or in combination.
  • the invention in another preferred embodiment provides a method of increasing deposition rate during producing a silicon nitride film from a nitrogen precursor (such as, e.g., NH 3 ), the method comprising: reacting the nitrogen precursor with a silicon precursor combination (such as, e.g., a silicon precursor combination comprising BTBAS and silane), such as, e.g., deposition rate increasing methods comprising increasing the deposition rate by at least 10 angstroms/minute (preferably, increasing the deposition rate by at least 50 angstroms/minute) when using the silicon precursor combination compared to with a single component.
  • a nitrogen precursor such as, e.g., NH 3
  • a silicon precursor combination such as, e.g., a silicon precursor combination comprising BTBAS and silane
  • deposition rate increasing methods comprising increasing the deposition rate by at least 10 angstroms/minute (preferably, increasing the deposition rate by at least 50 angstroms/minute) when using the silicon precursor combination compared to with a single
  • FIG. 1 is a chart of ellipsometry measurements (49 points) for one silicon nitride film and two LPCVD SiGe Nitride films.
  • FIG. 2 is a chart of etch rate of one silicon nitride film and two SiGe nitride films, based on ellipsometry, 49 points, with FIG. 2 relating to the films charted in FIG. 1 .
  • FIG. 3 is a chart of deposition rate as function of Ge incorporation, with plots for with and without Ge, with FIG. 3 relating to the films charted in FIG. 1 .
  • FIG. 4 is a side view showing a stressed liner according to an embodiment of the invention, with the stressed liner in use with a spacer, a gate and a channel.
  • FIGS. 5A-5C depict an endpoint detection method according to an embodiment of the invention.
  • FIG. 6 is a table of deposition rates obtained experimentally for nitride wafers produced using BTBAS and silane according to embodiments of the invention.
  • FIG. 7 is a graph showing, respectively, deposition rate (DR) and stress for BTBAS plus silane nitride wafers, produced using BTBAS at 585 mgm with varying amounts of silane.
  • FIG. 8 is a graph showing, respectively, deposition rate (DR) and stress for BTBAS plus silane nitride wafers, produced using silane at 60 sccm with varying amounts of BTBAS.
  • FIGS. 9, 10 , 11 are graphs showing deposition rate data for inventive embodiments in which BTBAS and silane are used together during deposition.
  • FIGS. 12, 13 are FTIR spectra for films deposited according to FIGS. 9, 10 , 11 .
  • a doped nitride film a doped oxide film, a doped oxynitride film or a doped carbide film
  • at least one of the following is manipulated: the deposition rate; a chemical and/or physical property (such as, e.g., tunable stress) of the formed film.
  • This manipulation is accomplished by introducing an additional non-silicon precursor that is otherwise not a traditional reagent for producing a nitride film, an oxide film, an oxynitride film, or a carbide film, with examples of the additional non-silicon precursor being a germanium precursor and a carbon precursor.
  • the inventors accomplish such advantages by including a non-silicon precursor dopant (such as, e.g., a Ge precursor, etc.) during the deposition process, such as deposition of a silicon nitride film, deposition of a silicon oxide film, deposition of a silicon oxynitride film, deposition of a silicon carbide film, etc.
  • a non-silicon precursor dopant such as, e.g., a Ge precursor, etc.
  • the invention makes possible low-temperature deposition of a nitride film, an oxide film, an oxynitride film and/or a carbide film, by adding germanium to deposition of nitride films and oxide films and oxynitride films and carbide films, especially doped nitride or oxide films.
  • germanium silicon germanium (SiGe) epitaxy can be done at a lower temperature than silicon epitaxy, and further have discovered that the addition of a germanium (Ge) precursor to a silicon precursor lowers the temperature of the deposition of the film.
  • a germanium precursor used in the present invention may be, e.g., a known germanium precursor such as the germanium precursors mentioned, e.g., in U.S. Pat. No. 6,429,098 issued Aug. 6, 2002 and U.S. Pat. No. 6,117,750 issued Sep. 12, 2000 to Bensahel et al. (France Telecom) or in U.S. Pat. No. 6,258,664 issued Jul. 10, 2001 to Reinberg (Micron Technology, Inc.). Germanium precursors are commercially available.
  • An example of a germanium precursor used in the invention is GeH 4 .
  • the invention provides for use of at least one germanium precursor in deposition of a silicon nitride, a silicon oxide, a silicon oxynitride, a silicon carbide, etc., which deposition advantageously may, if desired, by a low-temperature deposition, such as, e.g., a deposition at 700° C. or lower, such as, e.g., room temperature and other temperatures.
  • a low-temperature deposition such as, e.g., a deposition at 700° C. or lower, such as, e.g., room temperature and other temperatures.
  • an inventive method may proceed at room temperature in a P3i plasma immersion tool, to deposit nitride.
  • the production process otherwise may proceed conventionally with regard to ingredients, for example, use of a nitrogen precursor (such as, e.g., NH 3 , etc.) and a silicon precursor (such as DCS, etc.), etc.
  • a nitrogen precursor such as, e.g., NH 3 , etc.
  • a silicon precursor such as DCS, etc.
  • a nitrogen precursor is included.
  • an oxygen precursor is included.
  • a silicon precursor is included. It will be appreciated that the silicon precursor may be different or the same as the nitride or oxide precursor.
  • BTBAS may serve as a silicon precursor and a nitrogen precursor.
  • a reagent such as, e.g., BTBAS, etc.
  • BTBAS may be used as two or more kinds of precursors.
  • An exemplary temperature for nitride or oxide or oxynitride or carbide film forming using a germanium precursor and/or a carbon precursor according to the invention is preferably at a temperature less than 700° C., more preferably at a temperature less than 650° C., even more preferably at a temperature of 500° C. or lower.
  • an advantageous temperature of 500° C. or lower may be used for the deposition of a Ge-doped silicon nitride film.
  • the non-silicon precursor mentioned for use in the present invention is not particularly limited, and as examples may be mentioned a germanium precursor, a carbon precursor, an aluminum precursor, a boron precursor, an arsenic precursor, a hafnium precursor, a gallium precursor, an indium precursor, and, without limitation, other dopant precursors, etc.
  • the present invention also may be applied to MOL barrier technology.
  • MOL barrier nitride can enhance device reliability (negative bias temperature instability (NBTI), etc.).
  • NBTI negative bias temperature instability
  • the present invention provides, through use of the germanium precursor and/or the carbon precursor, an ability to tune the chemical and/or physical properties of the barrier nitride film using different precursor combinations. Such an ability may be used to achieve a significant device reliability gain.
  • Thickness of a film produced according to the present invention is not particularly limited, and a thickness may be selected depending on the application.
  • the film thickness may range from, on the thin end (such as, e.g., a film of 500 Angstroms, or of 10 Angstroms, or thinner), to the thick end (such as, e.g., a film of 1,000 Angstroms, or a film of 5,000 Angstroms, or thicker), and thicknesses in between, such as films in a range of about 10 to 5,000 Angstroms, and thinner or thicker as called for by the application.
  • the dopant concentration of a film made according to the invention is not particularly, and may be adjusted as desired.
  • An example of a dopant (such as Ge, etc.) concentration is in a range of, e.g., about 1 to 10%, or, in another example, about 1 to 50%.
  • the present invention includes an embodiment in which multiple non-silicon precursors are used, such as a germanium precursor and a carbon precursor; a germanium precursor and a boron precursor; etc. For example, adding multiple precursors during deposition of a silicon nitride or a silicon oxide film may provide an enhanced effect, as may be desired.
  • the present invention may be used, e.g., for signaling an etch end point. For example, when conventional silicon nitride etching is performed, there has been a problem with wanting to stop the etch at the end of the silicon nitride and not etch over onto the silicon. However, such an etch end point many times has not been sharp and etching into the silicon has been common with the conventional methods.
  • a doped silicon nitride such as a Ge-doped silicon nitride
  • the presence of the Ge in the silicon nitride may be used to signal the endpoint of the etch, thereby advantageously preventing over-etching, such as, e.g., by using optical emission spectroscopy to detect the Ge (e.g., a Ge-Fluoride signal may be searched-for).
  • Such an aforementioned etch-stop example is not limiting, and the invention is extended to a variety of signaling uses of a dopant in a doped nitride film or a doped oxide film.
  • a dopant in a doped nitride film or a doped oxide film there may be provided a thin silicon nitride layer doped as an etch stop layer (such as a Ge-doped silicon nitride layer, etc.), and the dopant signal (e.g., the Ge signal, etc.) may be monitored for determining where the layer begins.
  • a number of different implementations of the present invention may be provided, in the etching context.
  • Another example is a thin layer of carbon or boron doped oxide under a Ge-doped nitride.
  • a further example of using the invention in an etching process is use of two different dopants, such as providing one dopant in each of the respective layers, or providing the two different dopants in a same layer. It will be appreciated that the present invention includes use of different signals being controlled for maximal sensitivity, and that the above-mentioned are only some examples.
  • Another use of the present invention is to change stress of a produced film (e.g., a silicon nitride, silicon oxide) by including a dopant, compared to a film in which the dopant is not included.
  • a produced film e.g., a silicon nitride, silicon oxide
  • dopant e.g., silicon nitride, silicon oxide
  • inclusion of a Ge dopant has been found to change stress of the film to the tensile region.
  • RTCVD silicon nitride films have a stress of about 1 to 1.5 G Pa (tensile).
  • Including Ge in the silicon nitride films provides a significant change raising the stress of the film, such as a doped Ge-silicon nitride film with a stress exceeding 1.5 G Pa (tensile), such as a stress of 2 G Pa (tensile), or higher, etc.
  • a delta of 1 G Pa or greater preferably, such as a delta of 1.2 G Pa or greater
  • the present invention may be used to change the stress of a film from compressive to tensile, which signifies a significant change in the nature of a film.
  • the present invention advantageously may be used to tune stress of a silicon nitride or silicon oxide film or silicon oxynitride or silicon carbide film as desired.
  • the present invention may be used to produce doped silicon nitride films, doped silicon oxide films, doped silicon oxynitride films, and doped silicon carbide films, such as, e.g., a Ge-doped silicon nitride film, an Al-doped silicon oxide film, a boron-doped silicon nitride film, etc.
  • the invention also provides production methods in which a doped silicon nitride film or doped silicon oxynitride film is produced by a method comprising at least: providing a silicon precursor combination comprising (A) an inorganic Si precursor (such as silane, disilane, trisilane, hexachloro disilane, di chloro silane (DCS), etc.) and (B) an organic-based Si precursor (such as BTBAS, etc.); and providing at least one nitrogen precursor (such as, e.g., NH 3 ); and producing a doped silicon nitride film or a doped silicon oxynitride film through deposition; and methods of increasing deposition rate during producing a silicon nitride film from a nitrogen precursor, the method comprising: reacting the nitrogen precursor with a silicon precursor combination.
  • a silicon precursor combination comprising (A) an inorganic Si precursor (such as silane, disilane, trisilane, hexachloro disilane, di chloro
  • the silicon precursor combination and the at least one nitrogen precursor may be provided simultaneously and in a form of providing flow of a gas.
  • at least one additional precursor may be provided in addition to BTBAS, silane and the at least one nitrogen precursor.
  • a silicon precursor combination may be used in a deposition process that is, e.g., RTCVD, PECVD, LPCVD, remote plasma nitride, ALD, etc.
  • a deposition method in which a silicon precursor combination is used is RTCVD deposition in which a silicon nitride film is produced.
  • deposition may proceed at an advantageous rate, such as, e.g., a deposition rate exceeding about 128 angstroms/minute, preferably, a deposition rate exceeding about 190 angstroms/minute.
  • Films produced using a silicon precursor combination may be, e.g., silicon nitride films; germanium- and/or carbon-doped silicon nitride films; films having a tunable stress; a film having a tunable stress in a range of about 3 G Pa (compressive) to 3 G Pa (tensile); a film that includes at least one dopant.
  • deposition may proceed at various temperatures (such as, e.g., at a temperature in a range of about 400-800° C.) and at various pressures (such as, e.g., at a pressure in a range of about 10-650 torr).
  • the bottom plot in FIG. 1 is for the film deposited at 650° C., with the same ratios as for the film deposited at 700° C.
  • germane to a mixture of a silicon precursor and ammonia allows for: increasing the deposition rate of an existing process making the process more manufacturable; lowering the deposition rate of a process to make it extendable to future technology; and/or manipulating stress of the formed film.
  • deposition rate and/or stress tuning are not limited to nitride films, and may be applicable for oxide films (such as silicon oxide films, etc.) and other films, such as other amorphous films.
  • Ge was added to a mixture of silane and ammonia, forming a Ge-doped Si nitride film.
  • the deposition rate was increased for the germane process, compared to an equivalent no-germane process.
  • the stress of the produced film was 0.4 GPa (compressive).
  • the stress was 0.8 GPa (tensile).
  • the use of Ge according to the invention achieved a change in stress of 1.2 GPa, which was a substantial improvement.
  • Example 2 in the '844 patent discloses an RTCVD process in which BTBAS and NH 3 are reacted, under the following conditions, without any other silicon precursor, to form films of thickness 500 or 750 angstroms: Carbon concentration: ⁇ 6 to 10% Temperature 650° C. Pressure 140 torr
  • BTBAS is expensive and by using BTBAS, the cost of producing a wafer becomes unreasonable.
  • the deposition temperature can be increased; in practice, however, a temperature-increasing approach generally is not easy to implement where the technology is already in manufacturing, and the thermal budget already has been established.
  • the inventors set about to increase the deposition rate of the BTBAS/NH 3 process without changing any of the main parameters but by adding a chemical which is already present in the manufacturing tool sets, and is not foreign to the process environment.
  • the inventors then experimented as follows to determine whether deposition rate would increase by adding (rather than GeH 4 ) silane to a BTBAS/NH 3 mixture, by adding different amounts of silane to a BTBAS/NH 3 mixture.
  • the results of the experimentation are shown in FIGS. 8, 9 and 10 .
  • the deposition rate increased compared to a BTBAS/NH 3 mixture without silane being used in a film production process.
  • the stress of a silane-only film is considerably less than the stress of a BTBAS film or a BTBAS/silane mixture film.
  • wafers were produced at a deposition rate in a range of from 190.1 to 315.1 angstroms/minute and with a stress in a range of from 1600.83 to 1661.48 M Pa.
  • Silicon nitride films were prepared using BTBAS (585 mgm) and silane flow, at 700° C. with a deposition time of 105 sec, and deposition rate and stress were measured as reported in FIG. 9 .
  • Silicon nitride films were prepared using BTBAS (585 mgm) and silane flow, at 675° C. with a deposition time of 350 sec. Stress was measured as reported in FIG. 10 . Deposition rates were measured as reported in FIG. 11 .
  • FTIR spectra were measured for a series of films produced using a combination of BTBAS and silane, including, respectively, POR 0 silane 2.24 g/cc; 20 sccm silane 2.46 g/cc; 40 sccm silane 2.18 g/cc; and 60 sccm silane 2.50 g/cc. Results are shown in FIGS. 12 and 13 . In FIG. 12 , all spectra are normalized to film thickness and plotted on a common scale.
  • FIG. 12 shows NHx and SiH stretching FTIR spectra.
  • FIG. 13 shows SiN bonding from FTIR spectra.
  • Stressed nitride liner 40 (produced according to the invention) is shown in use with spacer 41 , gate (POLY) with a layer 44 (silicide), with the gate being over a channel (SOI).
  • POLY gate
  • SOI channel
  • FIGS. 5A-5C an example of a counter-doped nitride or oxide layer for endpoint detection according to the invention is shown.
  • a spacer nitride 51 (with a first dopant) is provided over a nitride or oxide layer 50 (with a second dopant).
  • the as-deposited films of FIG. 5A are processed according to an initial RIE step shown in FIG. 5B , wherein during initial RIE, the first dopant is detected.
  • a step of final RIE is performed, as shown in FIG. 5C , wherein an etch endpoint is reached.
  • a smaller amount of the first dopant (in the spacer nitride 51 or etched spacer nitride 51 ′) is detected, and detection of the second dopant (in the nitride or oxide layer 50 ) begins.
  • a controllably etched spacer nitride 51 ′ remains.

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Abstract

When forming a silicon nitride film from a nitrogen precursor, using a silicon precursor combination rather than a single silane precursor advantageously increases the deposition rate. For example, adding silane during formation of a silicon nitride film made using BTBAS and ammonia improves (increases) the deposition rate while still yielding a film with a favorably high stress.

Description

    RELATED APPLICATION
  • This is a continuation-in-part of U.S. Ser. No. 10/710245 filed Jun. 29, 2004.
    • BACKGROUND OF THE INVENTION
  • 1. Field of the Invention
  • The present invention generally relates to films used in manufacture of semiconductor devices, especially to nitride films and oxide films.
  • 2. Background
  • In order to improve drive current in complementary metal oxide semiconductor (CMOS) devices, stressed films have been used either as spacers or middle-of-the-line (MOL) liners (also known as pre-metal dielectric (PMD) liners. Deposition regimes that result in either highly tensile or highly compressive nitride films are well known (e.g., rapid thermal chemical vapor deposition (RTCVD), plasma enhanced chemical vapor deposition (PECVD), high density plasma (HDP) using silicon (Si) precursor such as silane (SiH4), di chloro silane (DCS), Disilane, Hexachlorodisilane, bis-tertiary butyl amino silane (BTBAS), and ammonia (NH3)). However, within a given deposition regime it only has been possible to modulate the stress within a small range. It has been very difficult to modulate the stress to a large extent without comprising the film quality.
  • Also, there has been a growing need for nitride/oxide films deposited at a lower temperature for MOL driven by the introduction of nitride silicon (NiSi) processes. Many low temperature precursors have been investigated, and none has turned out to be ideal.
  • Typically, in an LPCVD furnace, DCS and NH3 are used for depositing silicon nitride film at temperatures of 700 C and higher.
  • The following are cited as background:
  • U.S. Pat. No. 5,347,100 to Fukuda et al.;
  • U.S. published Pat. Application No. 2004/0013009 by Tsunoda et al.;
  • U.S. published Pat. Application No. 2004/0029323 by Shimizu;
  • U.S. published Pat. Application No. 2005/0093078 by Chan et al.;
  • EerNisse, “Stress in ion-implanted CVD Si3N4 films,” Journal of Applied Physics, August, 1977, vol. 48, No. 8, pp. 3337-3341.
    • SUMMARY OF THE INVENTION
  • It is therefore an object of the present invention to provide increased deposition rate compared to conventional processes, thus providing for more manufacturable films, especially silicon nitride films, silicon oxide films, silicon oxynitride films, and silicon carbide films.
  • Another object of the present invention is to provide the ability to produce good quality nitride films of varying stress levels, thus enhancing device performance as a “plug-in” solution, i.e., with no integration changes needed.
  • Another object of the present invention is to lower the temperature for deposition of a silicon nitride film, a silicon oxide film, a silicon oxynitride film or a silicon carbide film.
  • A further object of the present invention is to manipulate germanium addition during production of a silicon nitride film, silicon oxide film, silicon oxynitride film or silicon carbide film, to control stress in the produced film.
  • Yet another object of the present invention is to increase the deposition rate when depositing a film.
  • The present invention, in one preferred embodiment which is a process in which at least one Si precursor is deposited, at least one Ge precursor and/or at least one C precursor is added, to produce a Ge- and/or C-doped silicon nitride or silicon oxide film with a tunable stress.
  • Thus, at least one chemical or physical property (such as a stress property) of a silicon nitride or a silicon oxide film being produced may be tuned by at least one precursor modification during deposition of the film.
  • Advantageously, lower-than-conventional temperature deposition can be obtained in depositing a silicon nitride, silicon oxide, silicon oxynitride or silicon carbide film according to the present invention.
  • The invention in one preferred embodiment provides a method of producing a doped nitride film, a doped oxide film, a doped oxynitride film or a doped carbide film, the method comprising at least: providing at least one silicon precursor (such as, e.g., SiH4, DCS, BTBAS, HCD, disilane, trisilane, etc.); providing at least one of: a nitrogen precursor (which may be the same as or different from the silicon precursor) or an oxygen precursor; further providing at least one non-silicon precursor (which may be the same as or different from the silicon precursor, the nitrogen precursor and/or the oxygen precursor); wherein a doped silicon nitride film, doped silicon oxide film, doped silicon oxynitride film or doped silicon carbide film is formed (provided that when the film is a doped oxide, the non-silicon precursor is not boron and not phosphorous).
  • Recently, a combination of silane and BTBAS has been discovered to produce particularly advantageous results when reacted in mixture with a nitrogen precursor (with NH3 being preferred).
  • Examples of the non-silicon precursor for use in the inventive method are, e.g., a germanium (Ge) precursor (such as, e.g., an organogermanium compound, etc.; GeH4, GeH3CH3, etc.), a carbon precursor (such as, e.g., C2H4, etc.); diborane; an aluminum (Al) precursor (such as, e.g., trimethyl aluminum (TMA), AlH3, aluminum isopropoxide etc.); a boron (B) precursor; an arsenic precursor; a hafnium precursor; a gallium precursor (such as trimethyl Ga, trialkyl amino Ga, GaH3, etc.); an indium precursor (such as trimethyl In, trialkyl amino In, InH3, etc.); etc. Additionally, alkyl hydrides or alkyl amino hydrides of germanium, carbon, boron, aluminum, aluminum, arsenic, hafnium, gallium, indium, etc., may be used as precursors. In a particularly preferred example of an inventive method, the providing of at least one silicon precursor and the providing of at least one non-silicon precursor occurs simultaneously and is in a form of providing flow of a gas.
  • The inventive methods may be used for producing a variety of doped films, such as, e.g., a germanium- and/or carbon-doped silicon nitride or silicon oxide or silicon oxynitride or silicon carbide; etc.; a silicon nitride, a silicon oxide, a silicon oxynitride or a silicon carbide film with a tunable stress; a doped silicon nitride film having a uniformly distributed dopant concentration (such as, e.g., a Ge-doped silicon nitride film having a uniformly distributed Ge concentration); etc. One example of a method according to the invention is, e.g., adding germane (a germanium precursor) to a mixture of silane and ammonia, and forming a Ge-doped Si nitride film.
  • In a further preferred embodiment of an inventive method, a precursor modification (such as, e.g., a mixture of at least two precursors, etc.) may be applied to tune at least one chemical or physical property of a produced film (such as, e.g., stress of a produced film, wet etch rate; dry etch rate; etch end point; deposition rate; physical, electrical and/or optical property; etc.).
  • The inventive method optionally may further comprise a step of measuring a signal for a non-silicon dopant from the non-silicon precursor, said signal measuring for controlling an etch.
  • In certain embodiments of inventive methods, deposition advantageously may be at a lower temperature than if the non-silicon precursor were omitted, such as, e.g., a deposition temperature below about 700° C. (including but not limited to a deposition temperature as low as room temperature), etc. Preferred examples of depositions in which the inventive method may be used are, e.g., RTCVD, PECVD, LPCVD, remote plasma nitride, atomic layer deposition (ALD), etc.
  • The invention in other preferred embodiments provides certain films, such as, e.g., a silicon nitride, silicon oxide, silicon oxynitride or silicon carbide film (such as, e.g., a germanium-doped film, etc.), having a tunable stress in a range of about 3 G Pa (compressive) to 3 G Pa (tensile); a silicon nitride film, wherein the film is a Ge-doped silicon nitride film with uniformly distributed Ge; an aluminum-doped silicon oxide film; a germanium-doped silicon nitride film; etc.; a Ge-doped film wherein the Ge-doped film has a stress that is at least about 1.0 G Pa greater (preferably, 1.2 G Pa greater) than a film that has been made by a same process except without Ge-doping.
  • Inventive films may include one or more dopants, such as a multitude of dopants. Examples of dopants for use in inventive films include, e.g., germanium (Ge), carbon (C), boron (B), aluminum (Al), gallium (Ga), indium (In), etc., which dopants may be used singly or in combination.
  • Recently, reacting silane, BTBAS and NH3 in mixture has been found to be particularly preferred. Advantageously, using a combination of silane, BTBAS and NH3 in mixture to produce films has been found to produce films of high stress at a desirably fast deposition rate.
  • The invention in another preferred embodiment provides a method of producing a doped silicon nitride film or doped silicon oxynitride film, the method comprising at least: providing a silicon precursor combination (such as, e.g., a silicon precursor combination comprising silane and BTBAS) comprising (A) an inorganic Si precursor (e.g., silane, disilane, trisilane, dicholorosilane, etc.) and (B) an organic-based Si precursor (e.g., SiHx(NHR)4-x, SiHx(NRR′)4-x, SiHxR4-x, etc., where x=0, 1, 2 or 3, R, R′ may be any alkyl group, with a preferred example of an organic-based Si precursor being BTBAS); and providing at least one nitrogen precursor (such as, e.g., NH3); and producing a doped silicon nitride film or a doped silicon oxynitride film through deposition.
  • The invention in another preferred embodiment provides a method of increasing deposition rate during producing a silicon nitride film from a nitrogen precursor (such as, e.g., NH3), the method comprising: reacting the nitrogen precursor with a silicon precursor combination (such as, e.g., a silicon precursor combination comprising BTBAS and silane), such as, e.g., deposition rate increasing methods comprising increasing the deposition rate by at least 10 angstroms/minute (preferably, increasing the deposition rate by at least 50 angstroms/minute) when using the silicon precursor combination compared to with a single component.
    • BRIEF DESCRIPTION OF THE DRAWINGS
  • The foregoing and other objects, aspects and advantages will be better understood from the following detailed description of a preferred embodiment of the invention with reference to the drawings, in which:
  • FIG. 1 is a chart of ellipsometry measurements (49 points) for one silicon nitride film and two LPCVD SiGe Nitride films.
  • FIG. 2 is a chart of etch rate of one silicon nitride film and two SiGe nitride films, based on ellipsometry, 49 points, with FIG. 2 relating to the films charted in FIG. 1.
  • FIG. 3 is a chart of deposition rate as function of Ge incorporation, with plots for with and without Ge, with FIG. 3 relating to the films charted in FIG. 1.
  • FIG. 4 is a side view showing a stressed liner according to an embodiment of the invention, with the stressed liner in use with a spacer, a gate and a channel.
  • FIGS. 5A-5C depict an endpoint detection method according to an embodiment of the invention.
  • FIG. 6 is a table of deposition rates obtained experimentally for nitride wafers produced using BTBAS and silane according to embodiments of the invention.
  • FIG. 7 is a graph showing, respectively, deposition rate (DR) and stress for BTBAS plus silane nitride wafers, produced using BTBAS at 585 mgm with varying amounts of silane.
  • FIG. 8 is a graph showing, respectively, deposition rate (DR) and stress for BTBAS plus silane nitride wafers, produced using silane at 60 sccm with varying amounts of BTBAS.
  • FIGS. 9, 10, 11 are graphs showing deposition rate data for inventive embodiments in which BTBAS and silane are used together during deposition.
  • FIGS. 12, 13 are FTIR spectra for films deposited according to FIGS. 9, 10, 11.
    • DETAILED DESCRIPTION OF A PREFERRED EMBODIMENT OF THE INVENTION
  • During production of a doped nitride film, a doped oxide film, a doped oxynitride film or a doped carbide film, at least one of the following is manipulated: the deposition rate; a chemical and/or physical property (such as, e.g., tunable stress) of the formed film. This manipulation is accomplished by introducing an additional non-silicon precursor that is otherwise not a traditional reagent for producing a nitride film, an oxide film, an oxynitride film, or a carbide film, with examples of the additional non-silicon precursor being a germanium precursor and a carbon precursor.
  • The inventors accomplish such advantages by including a non-silicon precursor dopant (such as, e.g., a Ge precursor, etc.) during the deposition process, such as deposition of a silicon nitride film, deposition of a silicon oxide film, deposition of a silicon oxynitride film, deposition of a silicon carbide film, etc.
  • For example, in one embodiment, the invention makes possible low-temperature deposition of a nitride film, an oxide film, an oxynitride film and/or a carbide film, by adding germanium to deposition of nitride films and oxide films and oxynitride films and carbide films, especially doped nitride or oxide films. The inventors exploit the fact that silicon germanium (SiGe) epitaxy can be done at a lower temperature than silicon epitaxy, and further have discovered that the addition of a germanium (Ge) precursor to a silicon precursor lowers the temperature of the deposition of the film.
  • A germanium precursor used in the present invention may be, e.g., a known germanium precursor such as the germanium precursors mentioned, e.g., in U.S. Pat. No. 6,429,098 issued Aug. 6, 2002 and U.S. Pat. No. 6,117,750 issued Sep. 12, 2000 to Bensahel et al. (France Telecom) or in U.S. Pat. No. 6,258,664 issued Jul. 10, 2001 to Reinberg (Micron Technology, Inc.). Germanium precursors are commercially available. An example of a germanium precursor used in the invention is GeH4.
  • The invention provides for use of at least one germanium precursor in deposition of a silicon nitride, a silicon oxide, a silicon oxynitride, a silicon carbide, etc., which deposition advantageously may, if desired, by a low-temperature deposition, such as, e.g., a deposition at 700° C. or lower, such as, e.g., room temperature and other temperatures. In a preferred example, an inventive method may proceed at room temperature in a P3i plasma immersion tool, to deposit nitride.
  • When including the non-silicon precursor in the present invention for producing a silicon nitride or silicon oxide film or silicon oxynitride film or silicon carbide film, the production process otherwise may proceed conventionally with regard to ingredients, for example, use of a nitrogen precursor (such as, e.g., NH3, etc.) and a silicon precursor (such as DCS, etc.), etc. For producing a silicon nitride film, a nitrogen precursor is included. For producing a silicon oxide film, an oxygen precursor is included. For producing a silicon nitride or a silicon oxide film, a silicon precursor is included. It will be appreciated that the silicon precursor may be different or the same as the nitride or oxide precursor. For example, BTBAS may serve as a silicon precursor and a nitrogen precursor. In the present invention, in some embodiments a reagent (such as, e.g., BTBAS, etc.) optionally may be used as two or more kinds of precursors.
  • An exemplary temperature for nitride or oxide or oxynitride or carbide film forming using a germanium precursor and/or a carbon precursor according to the invention is preferably at a temperature less than 700° C., more preferably at a temperature less than 650° C., even more preferably at a temperature of 500° C. or lower. For example, in the case of Ge-doping, an advantageous temperature of 500° C. or lower may be used for the deposition of a Ge-doped silicon nitride film. It will be appreciated that, while the present invention advantageously makes possible relatively low deposition temperatures that are desirable, low deposition temperatures are not necessarily required to be used in all embodiments, such as, for example, a film may be advantageously stress-tuned according to the invention at a variety of deposition temperatures.
  • The non-silicon precursor mentioned for use in the present invention is not particularly limited, and as examples may be mentioned a germanium precursor, a carbon precursor, an aluminum precursor, a boron precursor, an arsenic precursor, a hafnium precursor, a gallium precursor, an indium precursor, and, without limitation, other dopant precursors, etc.
  • The present invention also may be applied to MOL barrier technology. For example, it is well known that the MOL barrier nitride can enhance device reliability (negative bias temperature instability (NBTI), etc.). The present invention provides, through use of the germanium precursor and/or the carbon precursor, an ability to tune the chemical and/or physical properties of the barrier nitride film using different precursor combinations. Such an ability may be used to achieve a significant device reliability gain.
  • Thickness of a film produced according to the present invention is not particularly limited, and a thickness may be selected depending on the application. The film thickness may range from, on the thin end (such as, e.g., a film of 500 Angstroms, or of 10 Angstroms, or thinner), to the thick end (such as, e.g., a film of 1,000 Angstroms, or a film of 5,000 Angstroms, or thicker), and thicknesses in between, such as films in a range of about 10 to 5,000 Angstroms, and thinner or thicker as called for by the application.
  • The dopant concentration of a film made according to the invention is not particularly, and may be adjusted as desired. An example of a dopant (such as Ge, etc.) concentration is in a range of, e.g., about 1 to 10%, or, in another example, about 1 to 50%.
  • The present invention includes an embodiment in which multiple non-silicon precursors are used, such as a germanium precursor and a carbon precursor; a germanium precursor and a boron precursor; etc. For example, adding multiple precursors during deposition of a silicon nitride or a silicon oxide film may provide an enhanced effect, as may be desired. The present invention may be used, e.g., for signaling an etch end point. For example, when conventional silicon nitride etching is performed, there has been a problem with wanting to stop the etch at the end of the silicon nitride and not etch over onto the silicon. However, such an etch end point many times has not been sharp and etching into the silicon has been common with the conventional methods. With the present invention, if a doped silicon nitride is used (such as a Ge-doped silicon nitride), the presence of the Ge in the silicon nitride may be used to signal the endpoint of the etch, thereby advantageously preventing over-etching, such as, e.g., by using optical emission spectroscopy to detect the Ge (e.g., a Ge-Fluoride signal may be searched-for).
  • Such an aforementioned etch-stop example is not limiting, and the invention is extended to a variety of signaling uses of a dopant in a doped nitride film or a doped oxide film. For example, there may be provided a thin silicon nitride layer doped as an etch stop layer (such as a Ge-doped silicon nitride layer, etc.), and the dopant signal (e.g., the Ge signal, etc.) may be monitored for determining where the layer begins. A number of different implementations of the present invention may be provided, in the etching context. Another example is a thin layer of carbon or boron doped oxide under a Ge-doped nitride. For such a structure, drop in Ge signal and advent of C signal can be monitored, for better etching results. A further example of using the invention in an etching process is use of two different dopants, such as providing one dopant in each of the respective layers, or providing the two different dopants in a same layer. It will be appreciated that the present invention includes use of different signals being controlled for maximal sensitivity, and that the above-mentioned are only some examples.
  • Another use of the present invention is to change stress of a produced film (e.g., a silicon nitride, silicon oxide) by including a dopant, compared to a film in which the dopant is not included. For example, for a case of a silicon nitride film, inclusion of a Ge dopant has been found to change stress of the film to the tensile region. Conventionally, RTCVD silicon nitride films have a stress of about 1 to 1.5 G Pa (tensile). Including Ge in the silicon nitride films provides a significant change raising the stress of the film, such as a doped Ge-silicon nitride film with a stress exceeding 1.5 G Pa (tensile), such as a stress of 2 G Pa (tensile), or higher, etc. When measuring a film doped according to the invention and a comparable non-doped film on the same stress tool, a delta of 1 G Pa or greater (preferably, such as a delta of 1.2 G Pa or greater) may be obtained in the doped film. Also, the present invention may be used to change the stress of a film from compressive to tensile, which signifies a significant change in the nature of a film.
  • Thus, the present invention advantageously may be used to tune stress of a silicon nitride or silicon oxide film or silicon oxynitride or silicon carbide film as desired.
  • Also, the present invention may be used to produce doped silicon nitride films, doped silicon oxide films, doped silicon oxynitride films, and doped silicon carbide films, such as, e.g., a Ge-doped silicon nitride film, an Al-doped silicon oxide film, a boron-doped silicon nitride film, etc.
  • The invention also provides production methods in which a doped silicon nitride film or doped silicon oxynitride film is produced by a method comprising at least: providing a silicon precursor combination comprising (A) an inorganic Si precursor (such as silane, disilane, trisilane, hexachloro disilane, di chloro silane (DCS), etc.) and (B) an organic-based Si precursor (such as BTBAS, etc.); and providing at least one nitrogen precursor (such as, e.g., NH3); and producing a doped silicon nitride film or a doped silicon oxynitride film through deposition; and methods of increasing deposition rate during producing a silicon nitride film from a nitrogen precursor, the method comprising: reacting the nitrogen precursor with a silicon precursor combination. In inventive methods using a silicon precursor combination, the silicon precursor combination and the at least one nitrogen precursor may be provided simultaneously and in a form of providing flow of a gas. In inventive methods using a silane precursor, optionally, at least one additional precursor may be provided in addition to BTBAS, silane and the at least one nitrogen precursor.
  • A silicon precursor combination may be used in a deposition process that is, e.g., RTCVD, PECVD, LPCVD, remote plasma nitride, ALD, etc. A preferred example of a deposition method in which a silicon precursor combination is used is RTCVD deposition in which a silicon nitride film is produced. When producing a silicon nitride film by RTCVD using a silicon precursor combination, deposition may proceed at an advantageous rate, such as, e.g., a deposition rate exceeding about 128 angstroms/minute, preferably, a deposition rate exceeding about 190 angstroms/minute.
  • Films produced using a silicon precursor combination may be, e.g., silicon nitride films; germanium- and/or carbon-doped silicon nitride films; films having a tunable stress; a film having a tunable stress in a range of about 3 G Pa (compressive) to 3 G Pa (tensile); a film that includes at least one dopant.
  • When using a silicon precursor combination, deposition may proceed at various temperatures (such as, e.g., at a temperature in a range of about 400-800° C.) and at various pressures (such as, e.g., at a pressure in a range of about 10-650 torr).
    • EXAMPLE 1
  • In an LPCVD furnace, GEH4 was added to a mixture of DCS and NH3 at two different temperatures, 700 and 650° C. respectively. A standard silicon nitride film was also deposited at 785° C. as a control. Two germanium-doped silicon nitride films and one standard silicon nitride film were thus deposited. The results are summarized in the charts which are FIGS. 1, 2 and 3.
  • In FIG. 1, the top plot is for the film deposited at 785° C., with DCS/NH3=0.3 The middle plot in FIG. 1 is for the film deposited at 700° C., with (DCS+Ge)/NH3=0.3, Ge/DCS=0.25. The bottom plot in FIG. 1 is for the film deposited at 650° C., with the same ratios as for the film deposited at 700° C.
  • From FIG. 3, it is clear that by adding GeH4 to the process gas, a significant increase in the deposition rate has been achieved. Also, the germanium-doped films of this Example 1 have a similar property (determined by wet etch rate) to the standard high temperature films.
  • The addition of germane to a mixture of a silicon precursor and ammonia allows for: increasing the deposition rate of an existing process making the process more manufacturable; lowering the deposition rate of a process to make it extendable to future technology; and/or manipulating stress of the formed film.
    • EXAMPLE 2
  • Importantly, the present inventors have recognized that stress in a film may be modified by germanium addition during nitride film formation. There may be considered the following results, both for silicon substrates:
    TABLE 1
    Film Stress (in E9 Dyne/cm2)
    Si—N   4 (compressive)
    SiGe—N 8.2 (tensile)

    As the above Table 1 shows, there is almost an order of magnitude stress difference between a conventional silicon nitride film and an inventive germanium-doped silicon nitride film.
  • It will be appreciated that the advantages of the present invention with regard to deposition rate and/or stress tuning are not limited to nitride films, and may be applicable for oxide films (such as silicon oxide films, etc.) and other films, such as other amorphous films.
    • EXAMPLE 3
  • Ge was added to a mixture of silane and ammonia, forming a Ge-doped Si nitride film. The deposition rate was increased for the germane process, compared to an equivalent no-germane process. For the no-Ge processs, the stress of the produced film was 0.4 GPa (compressive). For the inventive process using Ge, the stress was 0.8 GPa (tensile). Thus, the use of Ge according to the invention achieved a change in stress of 1.2 GPa, which was a substantial improvement.
    • EXAMPLE 3A BTBAS, NH3
  • Previously, one way to improve drive current in CMOS devices was to use stressed films that can be used as spacers or MOL liners. Recently much work has been done to produce films with high compressive stress using plasma techniques, which is a relatively easy to deposit films with high compressive stress using plasma techniques. On the other hand, the deposition of films with high tensile stress (>1.6 GPa) has not been achieved in the industry as desired. Much work has been done to synthesize new precursors, without achieving the goal of providing needed stress. The only precursor that gives stress above 1.5 GPa consistently thus far has been BTBAS.
    • COMPARATIVE EXAMPLE 3A.1
  • For example, U.S. Pat. No. 7,001,844 issued Feb. 21, 2006 to Chakravarti discloses (abstract) that an ammonia-treated BTBAS film is particularly excellent in providing a high-stress property, and further having maintainability of that high-stress property over repeated annealing. Example 2 in the '844 patent discloses an RTCVD process in which BTBAS and NH3 are reacted, under the following conditions, without any other silicon precursor, to form films of thickness 500 or 750 angstroms:
    Carbon concentration: ˜6 to 10%
    Temperature
    650° C.
    Pressure 140 torr
  • However, BTBAS is expensive and by using BTBAS, the cost of producing a wafer becomes unreasonable. In order to reduce the cost per wafer, the deposition temperature can be increased; in practice, however, a temperature-increasing approach generally is not easy to implement where the technology is already in manufacturing, and the thermal budget already has been established.
    • INVENTIVE EXAMPLE 3A.2
  • Therefore, the inventors set about to increase the deposition rate of the BTBAS/NH3 process without changing any of the main parameters but by adding a chemical which is already present in the manufacturing tool sets, and is not foreign to the process environment.
  • The inventors already have demonstrated (see Example 3 herein) that by addition of GeH4, the deposition rate increases for many RTCVD processes.
  • The inventors then experimented as follows to determine whether deposition rate would increase by adding (rather than GeH4) silane to a BTBAS/NH3 mixture, by adding different amounts of silane to a BTBAS/NH3 mixture. The results of the experimentation are shown in FIGS. 8, 9 and 10.
  • By addition of silane to a BTBAS/NH3 mixture, the deposition rate increased compared to a BTBAS/NH3 mixture without silane being used in a film production process.
  • According to the data, the stress of a silane-only film is considerably less than the stress of a BTBAS film or a BTBAS/silane mixture film.
  • Particularly, by using BTBAS and silane (FIG. 6), wafers were produced at a deposition rate in a range of from 190.1 to 315.1 angstroms/minute and with a stress in a range of from 1600.83 to 1661.48 M Pa.
  • Thus, adding silane to a reaction mixture of BTBAS and NH3 has been found to be being particularly advantageous in terms of stress of the produced film, with the production process proceeding at an increased deposition rate which is advantageous from a manufacturing perspective when working with BTBAS.
    • EXAMPLE 3B
  • Silicon nitride films were prepared using BTBAS (585 mgm) and silane flow, at 700° C. with a deposition time of 105 sec, and deposition rate and stress were measured as reported in FIG. 9.
    • EXAMPLE 3C
  • Silicon nitride films were prepared using BTBAS (585 mgm) and silane flow, at 675° C. with a deposition time of 350 sec. Stress was measured as reported in FIG. 10. Deposition rates were measured as reported in FIG. 11. FTIR spectra were measured for a series of films produced using a combination of BTBAS and silane, including, respectively, POR 0 silane 2.24 g/cc; 20 sccm silane 2.46 g/cc; 40 sccm silane 2.18 g/cc; and 60 sccm silane 2.50 g/cc. Results are shown in FIGS. 12 and 13. In FIG. 12, all spectra are normalized to film thickness and plotted on a common scale. FIG. 12 shows NHx and SiH stretching FTIR spectra. FIG. 13 shows SiN bonding from FTIR spectra.
    • EXAMPLE 4
  • With reference to FIG. 4, an example of a stressed film according to one embodiment of the invention is shown. Stressed nitride liner 40 (produced according to the invention) is shown in use with spacer 41, gate (POLY) with a layer 44 (silicide), with the gate being over a channel (SOI).
    • EXAMPLE 5
  • With reference to FIGS. 5A-5C, an example of a counter-doped nitride or oxide layer for endpoint detection according to the invention is shown. Referring to FIG. 5A, in a device including gate 52, a spacer nitride 51 (with a first dopant) is provided over a nitride or oxide layer 50 (with a second dopant). The as-deposited films of FIG. 5A are processed according to an initial RIE step shown in FIG. 5B, wherein during initial RIE, the first dopant is detected. Next, a step of final RIE is performed, as shown in FIG. 5C, wherein an etch endpoint is reached. During the final RIE step, a smaller amount of the first dopant (in the spacer nitride 51 or etched spacer nitride 51′) is detected, and detection of the second dopant (in the nitride or oxide layer 50) begins. After the etch endpoint step, a controllably etched spacer nitride 51′ remains.
  • While the invention has been described in terms of its preferred embodiment, those skilled in the art will recognize that the invention can be practiced with modification within the spirit and scope of the appended claims.

Claims (20)

1. A method of producing a doped silicon nitride film or a doped silicon oxynitride film, the method comprising at least:
providing a silicon precursor combination comprising (A) an inorganic Si precursor and (B) an organic-based Si precursor;
providing at least one nitrogen precursor; and
producing said doped silicon nitride film or said doped silicon oxynitride film through deposition.
2. The method of claim 1, wherein the silicon precursor combination comprises BTBAS and silane.
3. The method of claim 1, comprising providing the silicon precursor combination and providing the at least one nitrogen precursor at substantially the same time and in a form of providing flow of a gas.
4. The method of claim 2, wherein at least one additional precursor is provided in addition to the BTBAS, the silane and the at least one nitrogen precursor.
5. The method of claim 1, wherein NH3 is the at least one nitrogen precursor.
6. The method of claim 1, wherein a produced film is germanium- and/or carbon-doped silicon nitride film.
7. The method of claim 1, wherein a produced film has a tunable stress.
8. The method of claim 1, comprising producing said film at a temperature below about 700° C.
9. The method of claim 1, wherein the deposition is RTCVD, PECVD, LPCVD, remote plasma nitride or ALD.
10. The method of claim 1, wherein the deposition is RTCVD and a silicon nitride film is produced.
11. The method of claim 1, wherein a deposition rate of the film is in a range of about 190.1 to 315.1 angstroms/minute.
12. The method of claim 1, wherein a deposition rate of the film exceeds about 128 angstroms/minute.
13. The method of claim 1, wherein a deposition rate of the film exceeds about 190 angstroms/minute.
14. The method of claim 1, wherein a produced film has a tunable stress in a range of about 3 GPa (compressive) to 3 GPa (tensile).
15. The method of claim 1, wherein a produced film includes at least one dopant.
16. The method of claim 1, wherein the method is conducted at a temperature in a range of about 400-800° C. and at a pressure in a range of about 10-650 torr.
17. A method of increasing deposition rate during producing a silicon nitride film from a nitrogen precursor, the method comprising reacting the nitrogen precursor with a silicon precursor combination.
18. The method of claim 17, wherein the silicon precursor combination comprises silane and BTBAS, and the nitrogen precursor comprises NH3.
19. The method of claim 17, comprising using the silicon precursor combination to increase the deposition rate by at least 10 angstroms/minute in comparison with using a single component.
20. The method of claim 19, comprising using the silicon precursor combination to increase the deposition rate by 50 angstroms/minute or more in comparison with using a single component.
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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070082507A1 (en) * 2005-10-06 2007-04-12 Applied Materials, Inc. Method and apparatus for the low temperature deposition of doped silicon nitride films
US20110008938A1 (en) * 2008-02-19 2011-01-13 Tokyo Electron Limited Thin film and method for manufacturing semiconductor device using the thin film
US20120178264A1 (en) * 2010-12-21 2012-07-12 Tokyo Electron Limited Method and apparatus for forming silicon nitride film
US9090969B2 (en) 2011-06-22 2015-07-28 Hitachi Kokusai Electric Inc. Semiconductor device manufacturing and processing methods and apparatuses for forming a film

Families Citing this family (96)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7119016B2 (en) * 2003-10-15 2006-10-10 International Business Machines Corporation Deposition of carbon and nitrogen doped poly silicon films, and retarded boron diffusion and improved poly depletion
US20050287747A1 (en) * 2004-06-29 2005-12-29 International Business Machines Corporation Doped nitride film, doped oxide film and other doped films
US7288205B2 (en) * 2004-07-09 2007-10-30 Applied Materials, Inc. Hermetic low dielectric constant layer for barrier applications
JP2006165335A (en) * 2004-12-08 2006-06-22 Toshiba Corp Semiconductor device
US20060172556A1 (en) * 2005-02-01 2006-08-03 Texas Instruments Incorporated Semiconductor device having a high carbon content strain inducing film and a method of manufacture therefor
US7462527B2 (en) * 2005-07-06 2008-12-09 International Business Machines Corporation Method of forming nitride films with high compressive stress for improved PFET device performance
US20070065576A1 (en) * 2005-09-09 2007-03-22 Vikram Singh Technique for atomic layer deposition
US20070087581A1 (en) * 2005-09-09 2007-04-19 Varian Semiconductor Equipment Associates, Inc. Technique for atomic layer deposition
US7371649B2 (en) * 2005-09-13 2008-05-13 United Microelectronics Corp. Method of forming carbon-containing silicon nitride layer
US7416995B2 (en) * 2005-11-12 2008-08-26 Applied Materials, Inc. Method for fabricating controlled stress silicon nitride films
CN101473382A (en) * 2006-05-12 2009-07-01 高级技术材料公司 Low temperature deposition of phase change memory materials
US7514370B2 (en) * 2006-05-19 2009-04-07 International Business Machines Corporation Compressive nitride film and method of manufacturing thereof
US7501355B2 (en) 2006-06-29 2009-03-10 Applied Materials, Inc. Decreasing the etch rate of silicon nitride by carbon addition
KR100772836B1 (en) 2006-07-21 2007-11-01 동부일렉트로닉스 주식회사 Method of fabricating a semiconductor device
KR100761857B1 (en) * 2006-09-08 2007-09-28 삼성전자주식회사 Method for forming fine pattern in semiconductor device and method for semiconductor device using the same
KR101279925B1 (en) 2006-11-02 2013-07-08 어드밴스드 테크놀러지 머티리얼즈, 인코포레이티드 Antimony and germanium complexes useful for cvd/ald of metal thin films
US20080124946A1 (en) * 2006-11-28 2008-05-29 Air Products And Chemicals, Inc. Organosilane compounds for modifying dielectrical properties of silicon oxide and silicon nitride films
US7790635B2 (en) * 2006-12-14 2010-09-07 Applied Materials, Inc. Method to increase the compressive stress of PECVD dielectric films
US20080145978A1 (en) * 2006-12-18 2008-06-19 Air Liquide Electronics U.S. Lp Deposition of silicon germanium nitrogen precursors for strain engineering
US20080293194A1 (en) * 2007-05-24 2008-11-27 Neng-Kuo Chen Method of making a P-type metal-oxide semiconductor transistor and method of making a complementary metal-oxide semiconductor transistor
US8084356B2 (en) * 2007-09-29 2011-12-27 Lam Research Corporation Methods of low-K dielectric and metal process integration
US8834968B2 (en) 2007-10-11 2014-09-16 Samsung Electronics Co., Ltd. Method of forming phase change material layer using Ge(II) source, and method of fabricating phase change memory device
KR101458953B1 (en) 2007-10-11 2014-11-07 삼성전자주식회사 Method of forming phase change material layer using Ge(Ⅱ) source, and method of fabricating phase change memory device
US20090096106A1 (en) * 2007-10-12 2009-04-16 Air Products And Chemicals, Inc. Antireflective coatings
US8987039B2 (en) * 2007-10-12 2015-03-24 Air Products And Chemicals, Inc. Antireflective coatings for photovoltaic applications
US7994066B1 (en) * 2007-10-13 2011-08-09 Luxtera, Inc. Si surface cleaning for semiconductor circuits
US7994042B2 (en) * 2007-10-26 2011-08-09 International Business Machines Corporation Techniques for impeding reverse engineering
SG152203A1 (en) * 2007-10-31 2009-05-29 Advanced Tech Materials Amorphous ge/te deposition process
JP2009164260A (en) 2007-12-28 2009-07-23 Toshiba Corp Nonvolatile semiconductor memory
US20090215225A1 (en) 2008-02-24 2009-08-27 Advanced Technology Materials, Inc. Tellurium compounds useful for deposition of tellurium containing materials
JP2009260151A (en) * 2008-04-18 2009-11-05 Tokyo Electron Ltd Method of forming metal doped layer, film forming apparatus, and storage medium
US8343824B2 (en) * 2008-04-29 2013-01-01 International Rectifier Corporation Gallium nitride material processing and related device structures
WO2009152108A2 (en) * 2008-06-10 2009-12-17 Advanced Technology Materials, Inc. GeSbTe MATERIAL INCLUDING SUPERFLOW LAYER(S), AND USE OF Ge TO PREVENT INTERACTION OF Te FROM SbXTeY AND GeXTeY RESULTING IN HIGH Te CONTENT AND FILM CRISTALLINITY
WO2010065874A2 (en) 2008-12-05 2010-06-10 Atmi High concentration nitrogen-containing germanium telluride based memory devices and processes of making
WO2010135702A2 (en) 2009-05-22 2010-11-25 Advanced Technology Materials, Inc. Low temperature gst process
CN102484070B (en) * 2009-06-26 2014-12-10 康奈尔大学 Chemical vapor deposition process for aluminum silicon nitride
KR101602007B1 (en) * 2009-07-02 2016-03-09 인티그리스, 인코포레이티드 Hollow gst structure with dielectric fill
US20110124182A1 (en) * 2009-11-20 2011-05-26 Advanced Techology Materials, Inc. System for the delivery of germanium-based precursor
CN102194751A (en) * 2010-03-11 2011-09-21 中芯国际集成电路制造(上海)有限公司 Method for manufacturing complementary metal-oxide-semiconductor (CMOS) device
US9012876B2 (en) 2010-03-26 2015-04-21 Entegris, Inc. Germanium antimony telluride materials and devices incorporating same
US9018104B2 (en) 2010-04-09 2015-04-28 Hitachi Kokusai Electric Inc. Method for manufacturing semiconductor device, method for processing substrate and substrate processing apparatus
US9892917B2 (en) 2010-04-15 2018-02-13 Lam Research Corporation Plasma assisted atomic layer deposition of multi-layer films for patterning applications
US9373500B2 (en) 2014-02-21 2016-06-21 Lam Research Corporation Plasma assisted atomic layer deposition titanium oxide for conformal encapsulation and gapfill applications
US8728956B2 (en) 2010-04-15 2014-05-20 Novellus Systems, Inc. Plasma activated conformal film deposition
US9390909B2 (en) 2013-11-07 2016-07-12 Novellus Systems, Inc. Soft landing nanolaminates for advanced patterning
US9257274B2 (en) 2010-04-15 2016-02-09 Lam Research Corporation Gapfill of variable aspect ratio features with a composite PEALD and PECVD method
US9997357B2 (en) 2010-04-15 2018-06-12 Lam Research Corporation Capped ALD films for doping fin-shaped channel regions of 3-D IC transistors
US9611544B2 (en) 2010-04-15 2017-04-04 Novellus Systems, Inc. Plasma activated conformal dielectric film deposition
US8637411B2 (en) 2010-04-15 2014-01-28 Novellus Systems, Inc. Plasma activated conformal dielectric film deposition
US8993460B2 (en) * 2013-01-10 2015-03-31 Novellus Systems, Inc. Apparatuses and methods for depositing SiC/SiCN films via cross-metathesis reactions with organometallic co-reactants
US9287113B2 (en) 2012-11-08 2016-03-15 Novellus Systems, Inc. Methods for depositing films on sensitive substrates
US9190609B2 (en) 2010-05-21 2015-11-17 Entegris, Inc. Germanium antimony telluride materials and devices incorporating same
US8786012B2 (en) 2010-07-26 2014-07-22 Infineon Technologies Austria Ag Power semiconductor device and a method for forming a semiconductor device
US8614478B2 (en) 2010-07-26 2013-12-24 Infineon Technologies Austria Ag Method for protecting a semiconductor device against degradation, a semiconductor device protected against hot charge carriers and a manufacturing method therefor
CN102386089B (en) * 2010-09-03 2013-06-12 中芯国际集成电路制造(上海)有限公司 Method for preparing semiconductor device structure
US9685320B2 (en) 2010-09-23 2017-06-20 Lam Research Corporation Methods for depositing silicon oxide
KR101381900B1 (en) * 2010-10-01 2014-04-04 한국전자통신연구원 Method of tuning the resonance wavelength ring resonator
JP5847566B2 (en) 2011-01-14 2016-01-27 株式会社日立国際電気 Semiconductor device manufacturing method, substrate processing method, substrate processing apparatus, and program
EP3929326A3 (en) 2011-06-03 2022-03-16 Versum Materials US, LLC Compositions and processes for depositing carbon-doped silicon-containing films
JP5793398B2 (en) * 2011-10-28 2015-10-14 東京エレクトロン株式会社 Method for forming seed layer and method for forming silicon-containing thin film
TWI541377B (en) 2011-11-04 2016-07-11 Ａｓｍ國際股份有限公司 Methods for forming doped silicon oxide thin films
US9049061B2 (en) * 2012-03-21 2015-06-02 The Institute of Microelectronics Chinese Academy of Science CMOS device and method for manufacturing the same
JP5758829B2 (en) 2012-03-27 2015-08-05 東京エレクトロン株式会社 Method for forming boron-containing silicon oxycarbonitride film and method for forming silicon oxycarbonitride film
CN102623409B (en) * 2012-04-17 2014-08-13 上海华力微电子有限公司 Method for forming silicon nitride film with double stress layers
CN102623333B (en) * 2012-04-17 2014-09-03 上海华力微电子有限公司 Method for forming silicon nitride film with double stress layers
CN102623334B (en) * 2012-04-17 2014-10-22 上海华力微电子有限公司 Method for forming silicon nitride film with double stress layers
US9355839B2 (en) 2012-10-23 2016-05-31 Lam Research Corporation Sub-saturated atomic layer deposition and conformal film deposition
US9640757B2 (en) 2012-10-30 2017-05-02 Entegris, Inc. Double self-aligned phase change memory device structure
SG2013083241A (en) 2012-11-08 2014-06-27 Novellus Systems Inc Conformal film deposition for gapfill
US9500773B2 (en) * 2013-06-07 2016-11-22 Lawrence Livermore National Security, Llc High voltage photoconductive switch package
US9214334B2 (en) 2014-02-18 2015-12-15 Lam Research Corporation High growth rate process for conformal aluminum nitride
US9478411B2 (en) 2014-08-20 2016-10-25 Lam Research Corporation Method to tune TiOx stoichiometry using atomic layer deposited Ti film to minimize contact resistance for TiOx/Ti based MIS contact scheme for CMOS
US9478438B2 (en) 2014-08-20 2016-10-25 Lam Research Corporation Method and apparatus to deposit pure titanium thin film at low temperature using titanium tetraiodide precursor
US9564312B2 (en) 2014-11-24 2017-02-07 Lam Research Corporation Selective inhibition in atomic layer deposition of silicon-containing films
US9799509B2 (en) 2014-11-26 2017-10-24 Asm Ip Holding B.V. Cyclic aluminum oxynitride deposition
US9837281B2 (en) 2014-11-26 2017-12-05 Asm Ip Holding B.V. Cyclic doped aluminum nitride deposition
JP6378070B2 (en) * 2014-12-15 2018-08-22 東京エレクトロン株式会社 Deposition method
US10566187B2 (en) 2015-03-20 2020-02-18 Lam Research Corporation Ultrathin atomic layer deposition film accuracy thickness control
US9502238B2 (en) 2015-04-03 2016-11-22 Lam Research Corporation Deposition of conformal films by atomic layer deposition and atomic layer etch
KR102393833B1 (en) * 2015-06-16 2022-05-02 버슘머트리얼즈 유에스, 엘엘씨 Halidosilane compounds and compositions and processes for depositing silicon-containing films using same
US10526701B2 (en) 2015-07-09 2020-01-07 Lam Research Corporation Multi-cycle ALD process for film uniformity and thickness profile modulation
CN105047559B (en) * 2015-08-12 2018-01-12 沈阳拓荆科技有限公司 The method for highly obtaining different performance silicon nitride film by adjusting jewel ball
CN105256375B (en) * 2015-09-02 2017-10-31 光昱（厦门）新能源有限公司 A kind of method for improving solar cell diffusion furnace silicon carbide paddle fatigue resistance
KR102188750B1 (en) * 2015-09-11 2020-12-08 버슘머트리얼즈 유에스, 엘엘씨 Method for depositing conformal metal or metalloid silicon nitride film and film obtained
IL258508B2 (en) * 2015-10-06 2024-10-01 Versum Mat Us Llc Methods for depositing a conformal metal or metalloid silicon nitride film
US9773643B1 (en) 2016-06-30 2017-09-26 Lam Research Corporation Apparatus and method for deposition and etch in gap fill
US10062563B2 (en) 2016-07-01 2018-08-28 Lam Research Corporation Selective atomic layer deposition with post-dose treatment
US10037884B2 (en) 2016-08-31 2018-07-31 Lam Research Corporation Selective atomic layer deposition for gapfill using sacrificial underlayer
CN106449907B (en) * 2016-11-18 2019-04-12 电子科技大学 A kind of growing method of p-type exponential doping structure GaN photoelectric cathode materials
US10529563B2 (en) * 2017-03-29 2020-01-07 Asm Ip Holdings B.V. Method for forming doped metal oxide films on a substrate by cyclical deposition and related semiconductor device structures
US10269559B2 (en) 2017-09-13 2019-04-23 Lam Research Corporation Dielectric gapfill of high aspect ratio features utilizing a sacrificial etch cap layer
CN108417481B (en) * 2018-03-22 2021-02-23 京东方科技集团股份有限公司 Processing method of silicon nitride dielectric layer, thin film transistor and display device
WO2020222853A1 (en) 2019-05-01 2020-11-05 Lam Research Corporation Modulated atomic layer deposition
US11276573B2 (en) * 2019-12-04 2022-03-15 Applied Materials, Inc. Methods of forming high boron-content hard mask materials
US11674222B2 (en) * 2020-09-29 2023-06-13 Applied Materials, Inc. Method of in situ ceramic coating deposition
US20220195606A1 (en) * 2020-12-23 2022-06-23 Raytheon Technologies Corporation Method for metal vapor infiltration of cmc parts and articles containing the same

Citations (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4892753A (en) * 1986-12-19 1990-01-09 Applied Materials, Inc. Process for PECVD of silicon oxide using TEOS decomposition
US5347100A (en) * 1991-03-29 1994-09-13 Hitachi, Ltd. Semiconductor device, process for the production thereof and apparatus for microwave plasma treatment
US5478765A (en) * 1994-05-04 1995-12-26 Regents Of The University Of Texas System Method of making an ultra thin dielectric for electronic devices
US5976991A (en) * 1998-06-11 1999-11-02 Air Products And Chemicals, Inc. Deposition of silicon dioxide and silicon oxynitride using bis(tertiarybutylamino) silane
US6117750A (en) * 1997-12-29 2000-09-12 France Telecom Process for obtaining a layer of single-crystal germanium or silicon on a substrate of single-crystal silicon or germanium, respectively
US6162737A (en) * 1998-11-24 2000-12-19 Micron Technology, Inc. Films doped with carbon for use in integrated circuit technology
US6258664B1 (en) * 1999-02-16 2001-07-10 Micron Technology, Inc. Methods of forming silicon-comprising materials having roughened outer surfaces, and methods of forming capacitor constructions
US20020194876A1 (en) * 2001-05-11 2002-12-26 International Business Machines Corporation Method for manufacturing an optical device with a defined total device stress
US20040013009A1 (en) * 2002-04-04 2004-01-22 Kabushiki Kaisha Toshiba Semiconductor memory device having a gate electrode and a method of manufacturing thereof
US20040029323A1 (en) * 2000-11-22 2004-02-12 Akihiro Shimizu Semiconductor device and method for fabricating the same
US20050085054A1 (en) * 2003-10-15 2005-04-21 Chakravarti Ashima B. Deposition of carbon and nitrogen doped poly silicon films, and retarded boron diffusion and improved poly depletion
US20050093078A1 (en) * 2003-10-30 2005-05-05 Victor Chan Increasing carrier mobility in NFET and PFET transistors on a common wafer
US7001844B2 (en) * 2004-04-30 2006-02-21 International Business Machines Corporation Material for contact etch layer to enhance device performance
US20060102076A1 (en) * 2003-11-25 2006-05-18 Applied Materials, Inc. Apparatus and method for the deposition of silicon nitride films
US7361611B2 (en) * 2004-06-29 2008-04-22 International Business Machines Corporation Doped nitride film, doped oxide film and other doped films

Family Cites Families (32)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2557079C2 (en) * 1975-12-18 1984-05-24 Ibm Deutschland Gmbh, 7000 Stuttgart Method for producing a masking layer
NL171942C (en) * 1976-02-13 1983-06-01 Hitachi Ltd METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE APPLICATING A SEMICON AND GERMANIUM NITRIDES ON A SEMICONDUCTOR BODY
JPS5298473A (en) * 1976-02-13 1977-08-18 Hitachi Ltd Thin film material
JPS5693375A (en) * 1979-12-26 1981-07-28 Shunpei Yamazaki Photoelectric conversion device
JPS56122123A (en) * 1980-03-03 1981-09-25 Shunpei Yamazaki Semiamorphous semiconductor
JPS56169333A (en) * 1980-05-29 1981-12-26 Fujitsu Ltd Semiconductor device
US4743563A (en) * 1987-05-26 1988-05-10 Motorola, Inc. Process of controlling surface doping
JPH01176067A (en) * 1987-12-29 1989-07-12 Hoya Corp Formation of silicon nitride film
JP2663508B2 (en) * 1988-05-12 1997-10-15 ソニー株式会社 Vapor growth method
JPH02233531A (en) * 1989-03-07 1990-09-17 Sony Corp Coating glass composition and semiconductor device
JPH0770531B2 (en) * 1989-06-30 1995-07-31 川崎製鉄株式会社 Method for forming buried oxide film
JPH04165623A (en) * 1990-10-30 1992-06-11 Nec Corp Method of forming silicon boron nitride film
DE69224640T2 (en) * 1991-05-17 1998-10-01 Lam Res Corp METHOD FOR COATING A SIOx FILM WITH REDUCED INTRINSIC TENSION AND / OR REDUCED HYDROGEN CONTENT
EP0724286A1 (en) * 1995-01-25 1996-07-31 Applied Materials, Inc. A method of forming a thin film of silicon oxide for a semiconductor device
JP3597305B2 (en) * 1996-03-05 2004-12-08 株式会社半導体エネルギー研究所 Liquid crystal display device and manufacturing method thereof
US5741737A (en) * 1996-06-27 1998-04-21 Cypress Semiconductor Corporation MOS transistor with ramped gate oxide thickness and method for making same
TW335511B (en) * 1996-08-02 1998-07-01 Applied Materials Inc Stress control by fluorination of silica film
US5997634A (en) * 1996-11-14 1999-12-07 Micron Technology, Inc. Method of forming a crystalline phase material
JPH113869A (en) * 1997-06-11 1999-01-06 Nec Corp Semiconductor device and manufacture thereof
US5972765A (en) * 1997-07-16 1999-10-26 International Business Machines Corporation Use of deuterated materials in semiconductor processing
US6306722B1 (en) * 1999-05-03 2001-10-23 United Microelectronics Corp. Method for fabricating shallow trench isolation structure
US6121164A (en) * 1997-10-24 2000-09-19 Applied Materials, Inc. Method for forming low compressive stress fluorinated ozone/TEOS oxide film
US6280651B1 (en) * 1998-12-16 2001-08-28 Advanced Technology Materials, Inc. Selective silicon oxide etchant formulation including fluoride salt, chelating agent, and glycol solvent
US6261975B1 (en) * 1999-03-04 2001-07-17 Applied Materials, Inc. Method for depositing and planarizing fluorinated BPSG films
CN100385694C (en) * 1999-03-10 2008-04-30 日立金属株式会社 thermoelectric conversion material and method of producing same
US7043133B2 (en) * 2001-07-12 2006-05-09 Little Optics, Inc. Silicon-oxycarbide high index contrast, low-loss optical waveguides and integrated thermo-optic devices
DE60213555T2 (en) * 2002-03-28 2007-08-09 Fluid Automation Systems S.A. Electromagnetic valve
KR100769783B1 (en) * 2002-03-29 2007-10-24 가부시끼가이샤 도시바 Display input device and display input system
US6624093B1 (en) * 2002-10-09 2003-09-23 Wisys Technology Foundation Method of producing high dielectric insulator for integrated circuit
US20040198069A1 (en) * 2003-04-04 2004-10-07 Applied Materials, Inc. Method for hafnium nitride deposition
US6930058B2 (en) * 2003-04-21 2005-08-16 Micron Technology, Inc. Method of depositing a silicon dioxide comprising layer doped with at least one of P, B and Ge
US7129126B2 (en) * 2003-11-05 2006-10-31 International Business Machines Corporation Method and structure for forming strained Si for CMOS devices

Patent Citations (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4892753A (en) * 1986-12-19 1990-01-09 Applied Materials, Inc. Process for PECVD of silicon oxide using TEOS decomposition
US5347100A (en) * 1991-03-29 1994-09-13 Hitachi, Ltd. Semiconductor device, process for the production thereof and apparatus for microwave plasma treatment
US5478765A (en) * 1994-05-04 1995-12-26 Regents Of The University Of Texas System Method of making an ultra thin dielectric for electronic devices
US6117750A (en) * 1997-12-29 2000-09-12 France Telecom Process for obtaining a layer of single-crystal germanium or silicon on a substrate of single-crystal silicon or germanium, respectively
US6429098B1 (en) * 1997-12-29 2002-08-06 FRANCE TéLéCOM Process for obtaining a layer of single-crystal germanium or silicon on a substrate of single-crystal silicon or germanium, respectively, and multilayer products obtained
US5976991A (en) * 1998-06-11 1999-11-02 Air Products And Chemicals, Inc. Deposition of silicon dioxide and silicon oxynitride using bis(tertiarybutylamino) silane
US6162737A (en) * 1998-11-24 2000-12-19 Micron Technology, Inc. Films doped with carbon for use in integrated circuit technology
US6258664B1 (en) * 1999-02-16 2001-07-10 Micron Technology, Inc. Methods of forming silicon-comprising materials having roughened outer surfaces, and methods of forming capacitor constructions
US20040029323A1 (en) * 2000-11-22 2004-02-12 Akihiro Shimizu Semiconductor device and method for fabricating the same
US20020194876A1 (en) * 2001-05-11 2002-12-26 International Business Machines Corporation Method for manufacturing an optical device with a defined total device stress
US20040013009A1 (en) * 2002-04-04 2004-01-22 Kabushiki Kaisha Toshiba Semiconductor memory device having a gate electrode and a method of manufacturing thereof
US20050085054A1 (en) * 2003-10-15 2005-04-21 Chakravarti Ashima B. Deposition of carbon and nitrogen doped poly silicon films, and retarded boron diffusion and improved poly depletion
US20050093078A1 (en) * 2003-10-30 2005-05-05 Victor Chan Increasing carrier mobility in NFET and PFET transistors on a common wafer
US20060102076A1 (en) * 2003-11-25 2006-05-18 Applied Materials, Inc. Apparatus and method for the deposition of silicon nitride films
US7001844B2 (en) * 2004-04-30 2006-02-21 International Business Machines Corporation Material for contact etch layer to enhance device performance
US7361611B2 (en) * 2004-06-29 2008-04-22 International Business Machines Corporation Doped nitride film, doped oxide film and other doped films

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070082507A1 (en) * 2005-10-06 2007-04-12 Applied Materials, Inc. Method and apparatus for the low temperature deposition of doped silicon nitride films
US20110008938A1 (en) * 2008-02-19 2011-01-13 Tokyo Electron Limited Thin film and method for manufacturing semiconductor device using the thin film
US20120178264A1 (en) * 2010-12-21 2012-07-12 Tokyo Electron Limited Method and apparatus for forming silicon nitride film
US8753984B2 (en) * 2010-12-21 2014-06-17 Tokyo Electron Limited Method and apparatus for forming silicon nitride film
US9090969B2 (en) 2011-06-22 2015-07-28 Hitachi Kokusai Electric Inc. Semiconductor device manufacturing and processing methods and apparatuses for forming a film
US9184046B2 (en) 2011-06-22 2015-11-10 Hitachi Kokusai Electric Inc. Semiconductor device manufacturing and processing methods and apparatuses for forming a film

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