US20060109049A1 - Low noise audio amplifier - Google Patents

Low noise audio amplifier Download PDF

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Publication number
US20060109049A1
US20060109049A1 US11/252,228 US25222805A US2006109049A1 US 20060109049 A1 US20060109049 A1 US 20060109049A1 US 25222805 A US25222805 A US 25222805A US 2006109049 A1 US2006109049 A1 US 2006109049A1
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Prior art keywords
signal
noise reduction
transistor
output
detect
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Abandoned
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US11/252,228
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English (en)
Inventor
Peng Xu
Wei Chen
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Monolithic Power Systems Inc
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Monolithic Power Systems Inc
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Priority to US11/252,228 priority Critical patent/US20060109049A1/en
Assigned to MONOLITHIC POWER SYSTEMS, INC. reassignment MONOLITHIC POWER SYSTEMS, INC. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: CHEN, WEI, XU, PENG
Publication of US20060109049A1 publication Critical patent/US20060109049A1/en
Abandoned legal-status Critical Current

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/06—Receivers
    • H04B1/10—Means associated with receiver for limiting or suppressing noise or interference
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/26—Modifications of amplifiers to reduce influence of noise generated by amplifying elements
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/02—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/32—Modifications of amplifiers to reduce non-linear distortion
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/32—Modifications of amplifiers to reduce non-linear distortion
    • H03F1/3211—Modifications of amplifiers to reduce non-linear distortion in differential amplifiers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/34—Negative-feedback-circuit arrangements with or without positive feedback
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/181—Low-frequency amplifiers, e.g. audio preamplifiers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
    • H03F3/217—Class D power amplifiers; Switching amplifiers
    • H03F3/2173—Class D power amplifiers; Switching amplifiers of the bridge type
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/38—DC amplifiers with modulator at input and demodulator at output; Modulators or demodulators specially adapted for use in such amplifiers
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/06—Receivers
    • H04B1/16—Circuits

Definitions

  • a method introduces a noise reduction feedback network.
  • the noise reduction feedback network is coupled to an output stage and a control stage of an audio amplifier. It includes a detect circuit and a modulation circuit.
  • the detect circuit is coupled to the output stage to monitor output voltages, detect output voltages near saturation states, and produce a control signal or multiple control signals to the modulation circuit. Once output voltages are near saturation state, the modulation circuit produces adjustable currents to the control stage to modulate output signal(s) and remove audible oscillations near saturation.
  • the detect circuit may include a transistor coupled between a supply voltage, Vcc, and the output stage, and a second transistor coupled between the ground and the output stage. Both transistors are activated as long as the output voltage is not in a near saturation state. The first transistor becomes deactivated once the output voltage is near the Vcc region and the second transistor becomes deactivated once the output voltage is near the ground voltage region. The first transistor is also coupled to a third transistor in the current circuit. These two transistors are such coupled that the third transistor is only activated once the first transistor is deactivated and becomes deactivated once the first transistor is activated. The second transistor is also coupled to a fourth transistor in the current circuit.
  • FIG. 1 is a circuit schematic showing embodiments of a system having a Class D amplifier and other components that are useable for audio signal amplification and other audio signal processing.
  • FIG. 3 shows output waveforms with and without the invention in the BTL Class D amplifier.
  • FIG. 4 is a circuit block diagram showing embodiments of a system having an audio amplifier and other components that are useable for audio signal amplification and other audio signal processing.
  • FIG. 6 shows a waveform with “clipping” audible noise in an amplifier without the present invention.
  • Embodiments of a system and method that uses an audio amplifier and accompanying circuitry to achieve low noise audio signal amplification and other audio signal processes are described in detail herein.
  • some specific details, such as example circuits and example values for these circuit components, are included to provide a thorough understanding of embodiments of the invention.
  • One skilled in relevant art will recognize, however, that the invention can be practiced without one or more specific details, or with other methods, components, materials, etc.
  • the present invention relates to circuits and methods of producing low noise amplified audio signals.
  • Proposed circuits in an audio amplifier can monitor output signals, detect output signals near saturation state, and produce an adjustable current to a control stage of the amplifier to modulate output signals and remove oscillation near saturation.
  • An input signal, Vin is coupled to an input node, X 1 , through a capacitor, Cin 1 , and a resistor, Rin 1 .
  • Another input node, X 2 is coupled to ground through a resistor, Rin 2 , and a capacitor, Cin 2 .
  • the nodes, X 1 and X 2 are coupled together by a capacitor, C 2 .
  • the signals at the node, X 1 comprise three components: AC portions of Vin, a feedback signal from the node, S 1 , and a feedback signal from the upper portion of a noise reduction feedback network, Y.
  • the signals at the node, X 2 comprise three components: a portion of signal from X 1 coupled through C 2 , a feedback signal from the node, S 2 , and a feedback signal from the lower portion of the noise reduction feedback network, Y.
  • the control stage A includes 4 transistors, M 1 , M 2 , M 3 , and M 4 , that serve as power output switching devices.
  • M 1 and M 2 drive output switching node, S 1 ; while M 3 and M 4 drive output switching node, S 2 .
  • M 2 's source terminal is coupled to ground and M 1 's drain terminal is coupled to a power supply, Vcc.
  • M 2 's drain terminal and M 1 's source terminal are both coupled to the switching node S 1 .
  • the node S 1 is coupled to the input node, X 1 , through a resistor, Rfb 1 .
  • the noise reduction feedback network comprises adjustable current sources (I 1 and I 2 ), and a control circuit triggered by the output signal difference between V+ and V ⁇ , Vd.
  • the control circuit is in an “OFF” state unless Vd exceeds a preset voltage level.
  • the adjustable current sources are controlled by the control circuit.
  • When current sources are turned on by the control circuit extra current flows to the input nodes, X 1 , and X 2 . This extra current sets the minimum switching frequencies of two comparators, CMP 1 and CMP 2 , in the control stage A.
  • the input node, X 1 is a negative summing node for the comparator, CMP 1 , and it is a positive summing node for the comparator, CMP 2 .
  • the input node, X 2 is a positive summing node for the comparator, CMP 1 , and it is a negative summing node for the comparator, CMP 2 .
  • the output signal of CMP 1 provides an input signal of a logic gate driver, LDR 1 .
  • An output of LDR 1 , LDR 11 drives the gate of the transistor, M 1 .
  • Another output of LDR 1 , LDR 12 drives the gate of the transistor, M 2 .
  • the output signal of CMP 2 provides an input signal of a logic gate driver, LDR 2 .
  • An output of LDR 2 , LDR 21 drives the gate of the transistor, M 3 .
  • Another output of LDR 2 , LDR 22 drives the gate of the transistor, M 4 .
  • a rectangular waveform at the node S 1 is filtered by an inductor, LL 1 , and a capacitor, Cout 1 , which is coupled to ground, and then delivered to an output node, V+.
  • a rectangular waveform at the node S 2 is filtered by an inductor, LL 2 , and a capacitor, Cout 2 , which is coupled to ground, and then delivered to an output node, V ⁇ .
  • the output stage O is used to drive a load, such as a loudspeaker, SP.
  • a capacitor, C 3 is connected in parallel with SP and coupled between V+ and V ⁇ .
  • FIG. 2 An example of one embodiment of the present invention used in a bridge tied load (BTL) Class D amplifier is shown FIG. 2 .
  • the system comprises a class D amplifier circuit AA, an output stage, OO, and a noise reduction feedback network, YY.
  • An input signal is coupled to a node XX 1 through a capacitor, C 6 , and a resistor R 3 .
  • Ground is coupled to a node XX 2 through a capacitor, C 28 , and a resistor R 6 .
  • the capacitor, C 6 is introduced to block DC components of input signal.
  • XX 1 and XX 2 are coupled by a capacitor, C 12 .
  • the signal at a node SW 1 is fed back to XX 1 through a resistor, R 10 , a grounded capacitor, C 17 , and a resistor, R 11 .
  • the signal at a node SW 2 is fed back to XX 2 through a resistor, R 18 , connected to a grounded capacitor, C 16 , and through a resistor, R 19 .
  • the rectangular waveform at SW 1 is filtered by an inductor, L 1 , and a capacitor, C 7 , and then delivered to an output node OUT 1 +.
  • the rectangular waveform at SW 2 is filtered by an inductor, L 2 , and a capacitor, C 22 , and then delivered to an output node OUT 1 ⁇ .
  • the stage OO further includes a loudspeaker, SP 1 :A, and a capacitor, C 9 , connected in parallel with SP 1 :A and coupled between OUT 1 + and OUT 1 ⁇ .
  • C 9 filters high frequency noise between nodes OUT 1 + and OUT 1 ⁇ .
  • the noise reduction feedback network YY connects the output node, OUT 1 + and OUT 1 ⁇ , and the input nodes, XX 1 and XX 2 .
  • a node, T 1 is connected with OUT 1 + through a resistor, R 30 .
  • a node, T 2 is connected with OUT 1 ⁇ through a resistor, R 31 .
  • the node T 1 is connected with the node T 2 through a resistor R 29 .
  • the combination of R 29 , R 30 , and R 31 helps to define adjustable currents of the circuit YY in the discussion below.
  • the node T 1 is also connected to the node T 2 through a resistor, R 12 , two back-to-back transistors Q 11 and Q 12 , and a resistor, R 15 .
  • the emitters and collectors of transistors Q 11 and Q 12 are all connected.
  • the base of the transistor Q 11 is connected to the bases of a transistor Q 7 , and a transistor Q 8 .
  • the emitters of the transistor Q 7 and the transistor Q 8 are connected and further connected to the node T 1 through a resistor R 36 .
  • the collector of the transistor Q 7 is connected to the node X 1 through a diode, D 22 , and a resistor R 22 ; and the collector of the transistor Q 8 is connected to the node X 1 through a diode, D 21 , and the resistor R 22 .
  • the base of the transistor Q 12 is connected to the bases of a transistor Q 9 , and a transistor Q 10 .
  • the emitters of the transistor Q 7 and the transistor Q 8 are connected and further connected to the node T 2 through a resistor R 37 .
  • the collector of the transistor Q 9 is connected to the node XX 2 through a diode, D 23 , and a resistor R 24 ; and the collector of the transistor Q 10 is connected to the node X 2 through a diode, D 24 , and the resistor R 24 .
  • the back-to-back transistors, Q 11 and Q 12 have a minimum turn-on voltage, V 1 .
  • the transistors, Q 7 , Q 8 , Q 9 , and Q 10 typically have a turn-on voltage V 2 .
  • Vd the voltage difference between the node OUT 1 + and the node OUT 1 ⁇ exceeds V 1 .
  • the transistors, Q 11 and Q 12 are turned on. Once
  • the current feeds back to the node XX 1 through either D 22 or D 21 and the resistor, R 22 .
  • the extra current increases the voltage switching frequency at the node XX 1 and defines a minimum switching frequency for the top comparator in the upper half of YY.
  • the increased minimum frequency produces a more “curved” sinusoidal waveform in the near “clipping” range. This helps to eliminate the audio noises when output sinusoidal waves enter and exit the voltage “clipping” range.
  • exceeds V 1 +2V 2 , either Q 9 or Q 10 is turned on in the lower half of circuit YY.
  • the current feeds back to the node XX 2 through either D 23 or D 24 and the resistor, R 24 .
  • the extra current increases the voltage switching frequency at the node XX 2 and defines the minimum switching frequency for the lower comparator in the lower half of YY.
  • FIG. 3 illustrates output waveforms in the BTL Class D amplifier with and without the present invention.
  • the BTL circuit without the noise reduction feedback network produces low frequency oscillation that may be in the audible frequency range; however; the circuit with the network produces clean output voltages without any low frequency oscillations.
  • FIG. 4 provides schematic showing a system that comprises an audio input, a control stage, an output stage, and a noise reduction network that receives the feedback signals from the output stage.
  • the noise reduction network modulates the control stage to eliminate the audible oscillation at the output stage when the output is near saturation.
  • FIG. 5 Another example of embodiments of the invention is illustrated in FIG. 5 .
  • Vout+ and Vout ⁇ are two input nodes of a noise reduction feedback network while FB 1 and FB 2 are two output nodes of the noise reduction network in FIG. 5 ( a ).
  • FIGS. 5 ( b ) and 5 ( c ) are detailed schematics showing embodiments of the circuit.
  • Vout+ is connected to the base of a transistor, Q 3 , through a resistor, R 13 , and the base of a transistor, Q 4 , through a resistor, R 14 .
  • the emitter of the transistor, Q 3 is coupled to a power source, Vcc, and the emitter of the transistor, Q 4 , is coupled to the ground.
  • the base of a transistor, Q 1 is connected to the collector of the transistor, Q 3 , and they are coupled to the ground through a resistor, R 5 .
  • the emitter of the transistor, Q 1 is coupled to the power source, Vcc, through a resistor, R 1 ; while the collector of Q 1 is connected to a node FB 1 through a resistor, R 2 .
  • the base of a transistor, Q 2 is connected to the collector of the transistor, Q 4 , and they are coupled to the power source, Vcc, through a resistor, R 6 .
  • the emitter of the transistor, Q 2 is coupled to the ground through a resistor, R 4 ; while the collector of Q 2 is connected to the node FB 1 through a resistor, R 3 .
  • Vout ⁇ is connected to the base of a transistor, Q 7 , through a resistor, R 15 , and the base of a transistor, Q 8 , through a resistor, R 16 .
  • the emitter of the transistor, Q 7 is coupled to the power source, Vcc, and the emitter of the transistor, Q 8 , is coupled to the ground.
  • the base of a transistor, Q 5 is connected to the collector of the transistor, Q 7 , and they are coupled to the ground through a resistor, R 11 .
  • the emitter of the transistor, Q 5 is coupled to the power source, Vcc, through a transistor, R 7 ; while the collector of Q 5 is connected to a node FB 2 through a resistor, R 8 .
  • the base of a transistor, Q 6 is connected to the collector of the transistor, Q 8 , and they are coupled to the power source, Vcc, through a resistor, R 12 .
  • the emitter of the transistor, Q 6 is coupled to the ground through a resistor, R 10 ; while the collector of Q 6 is connected to the node FB 2 through a resistor, R 9 .
  • the network provides an adjustable feedback current through Q 1 to the node FB 1 .
  • the same analysis applies to the node Vout ⁇ and the node FB 2 in circuit of FIG. 5 ( c ).
  • the output voltage at Vout ⁇ , VOUT ⁇ is in the range between Vbe(Q 8 ) and (Vcc ⁇ Vbe(Q 7 ))
  • transistors, Q 7 and Q 8 are activated; while transistors, Q 5 and Q 6 , are deactivated.
  • the noise reduction network does not provide feedback signal to the node FB 2 .
  • VOUT ⁇ is less than Vbe(Q 8 )
  • the transistor, Q 8 becomes deactivated; while the transistor, Q 6 , becomes activated.
  • the network provides an adjustable feedback current through Q 6 to the node FB 2 .
  • VOUT ⁇ is larger than (Vcc ⁇ Vbe(Q 7 ))
  • the transistor, Q 7 becomes deactivated; while the transistor, Q 5 , becomes activated.
  • the network provides an adjustable feedback current through
  • the noise reduction network in FIGS. 5 ( b ) and 5 ( c ) produces an adjustable feedback current through the node FB 1 when VOUT+ in the range [0, Vbe] and [Vcc ⁇ Vbe, Vcc]; and an adjustable feedback current through the node FB 2 when VOUT ⁇ in the range [0, Vbe] and [Vcc ⁇ Vbe, Vcc].
  • These feedback currents define a minimum switching frequency of the amplifier control stage in FIG. 4 .
  • the increased minimum frequency produces a more “curved” sinusoidal waveform in the near “clipping” range of output signals, which is schematically shown in FIG. 5 ( d ).
  • a noise reduction feedback network is introduced between an amplifier control stage and an output stage.
  • the noise reduction feedback network couples with the input terminals of the amplifier control stage with output terminals of the output stage. It monitors the output voltages of the output stage, and remains “inactivated” as long as output voltages are not near saturation.
  • the waveforms of output voltage are the amplified curves of input voltages with substantially the same shape. Once output voltages are near saturation, the noise reduction feedback network starts to be activated. In one embodiment, it sends an adjustable current to the input terminals of amplifier control stage.
  • the adjustable current increases and defines the minimum switching frequency of the amplifier control stage. As a result, the waveforms of output voltage near saturation become more “curved” sinusoidal waveforms comparing with those of input signal.
  • the noise reduction feedback network reduces the close-loop gain of the amplifier control stage. It has the similar effect on the output voltage near saturation and the waveforms of output voltage near saturation become more “curved” sinusoidal waveforms comparing with those of input signal.
  • the present invention has many advantages over approaches in references.
  • the circuit is very simple and has high efficiency and fast loop response.
  • the output signals in non-saturation region, together with its quality, are not affected by the “inactivated” noise reduction feedback network.
  • the output signals near saturation and inside saturation regions are amplified by less close-loop gains than those in non-saturation regions. Their waveforms become more “curved”, which, in turn, greatly reduce or eliminate audio noises near or in the saturation regions.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Multimedia (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Amplifiers (AREA)
  • Tone Control, Compression And Expansion, Limiting Amplitude (AREA)
US11/252,228 2004-10-18 2005-10-17 Low noise audio amplifier Abandoned US20060109049A1 (en)

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US11/252,228 US20060109049A1 (en) 2004-10-18 2005-10-17 Low noise audio amplifier

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US11/252,218 Active 2026-01-01 US7417503B2 (en) 2004-10-18 2005-10-17 Method for high efficiency audio amplifier

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KR (3) KR100648584B1 (ko)
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US10778160B2 (en) 2016-01-29 2020-09-15 Dolby Laboratories Licensing Corporation Class-D dynamic closed loop feedback amplifier
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US6489841B2 (en) * 2000-07-12 2002-12-03 Monolithic Power Systems, Inc. Class D audio amplifier
US20090052101A1 (en) * 2005-07-22 2009-02-26 Nxp B.V. Path sharing high-voltage esd protection using distributed low-voltage clamps

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TW200618465A (en) 2006-06-01
KR20060054062A (ko) 2006-05-22
CN1770623B (zh) 2011-09-07
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KR100858751B1 (ko) 2008-09-16
KR100648584B1 (ko) 2006-11-24
KR20060054063A (ko) 2006-05-22
CN100544192C (zh) 2009-09-23
KR20070095854A (ko) 2007-10-01
KR100776116B1 (ko) 2007-11-15
US20060082414A1 (en) 2006-04-20
TWI315937B (en) 2009-10-11
CN1770623A (zh) 2006-05-10
US7417503B2 (en) 2008-08-26
CN1770624A (zh) 2006-05-10

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