US20050236110A1 - Semiconductor component handling device having a performance film - Google Patents

Semiconductor component handling device having a performance film Download PDF

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Publication number
US20050236110A1
US20050236110A1 US10/496,754 US49675405A US2005236110A1 US 20050236110 A1 US20050236110 A1 US 20050236110A1 US 49675405 A US49675405 A US 49675405A US 2005236110 A1 US2005236110 A1 US 2005236110A1
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Prior art keywords
film
containment
thermoplastic
semiconductor
handling
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Abandoned
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US10/496,754
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English (en)
Inventor
Sanjiv Bhatt
Shawn Eggum
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Entegris Inc
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Individual
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Priority to US10/496,754 priority Critical patent/US20050236110A1/en
Assigned to ENTEGRIS, INC. reassignment ENTEGRIS, INC. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: EGGUM, SHAWN D., BHATT, SANJIV M.
Publication of US20050236110A1 publication Critical patent/US20050236110A1/en
Abandoned legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/68—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/673—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere using specially adapted carriers or holders; Fixing the workpieces on such carriers or holders
    • H01L21/6732—Vertical carrier comprising wall type elements whereby the substrates are horizontally supported, e.g. comprising sidewalls
    • H01L21/67323—Vertical carrier comprising wall type elements whereby the substrates are horizontally supported, e.g. comprising sidewalls characterized by a material, a roughness, a coating or the like
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/673—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere using specially adapted carriers or holders; Fixing the workpieces on such carriers or holders
    • H01L21/67326—Horizontal carrier comprising wall type elements whereby the substrates are vertically supported, e.g. comprising sidewalls
    • H01L21/6733—Horizontal carrier comprising wall type elements whereby the substrates are vertically supported, e.g. comprising sidewalls characterized by a material, a roughness, a coating or the like
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/673—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere using specially adapted carriers or holders; Fixing the workpieces on such carriers or holders
    • H01L21/67346—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere using specially adapted carriers or holders; Fixing the workpieces on such carriers or holders characterized by being specially adapted for supporting a single substrate or by comprising a stack of such individual supports
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/673—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere using specially adapted carriers or holders; Fixing the workpieces on such carriers or holders
    • H01L21/6735—Closed carriers
    • H01L21/67366—Closed carriers characterised by materials, roughness, coatings or the like

Definitions

  • the present invention relates generally to film insert molding, and more particularly to insert molding a thin protective containment polymer film during the molding of semiconductor component handlers or carriers.
  • PE polyethylene
  • PC polycarbonates
  • PFA perflueroalkoxy
  • PEEK polyetheretherketone
  • wafer carrier provides this protection. Additionally, since the processing of wafer disks is generally automated, it is necessary for disks to be precisely positioned relative to the processing equipment for the robotic removal and insertion of the wafers. A second purpose of a wafer carrier is to securely hold the wafer disks during transport.
  • Carriers are generally configured to axially arrange the wafers or disks in shelves or slots, and to support the wafers or disks by or near their peripheral edges.
  • the wafers or disks are conventionally removable from the carriers in a radial direction upwardly or laterally.
  • Carriers may have supplemental top covers, bottom covers, or enclosures to enclose the wafers or disks.
  • Contaminants in the form of particles may be generated by abrasion such as the rubbing or scraping of the carrier with the wafers or disks, with the carrier covers or enclosures, with storage racks, with other carriers, or with the processing equipment.
  • a most desirable characteristic of a carrier is therefore a resistance to particle generation upon abrasion, rubbing, or scraping of the plastic molded material.
  • U.S. Pat. No. 5,780,127 discusses various characteristics of plastics which are pertinent to the suitability of such materials for wafer carriers, and is incorporated herein by reference.
  • Carrier materials should also have minimal outgassing of volatile components as these may leave films which also constitute a contaminant which can damage wafers and disks.
  • the carrier materials must have adequate dimensional stability, that is rigidity, when the carrier is loaded. Dimensional stability is necessary to prevent damage to the wafers or disks and to minimize movement of the wafers or disks within the carrier. The tolerances of the slots holding wafers and disks are typically quite small and any deformation of the carrier can directly damage the highly brittle wafers or increase the abrasion and thus the particle generation when the wafers or disks are moved into, out of, or within the carrier. Dimensional stability is also extremely important when the carrier is loaded in some direction such as when the carriers are stacked during shipment or when the carriers integrate with processing equipment. The carrier material should also maintain its integrity under elevated temperatures which may be encountered during storage or cleaning.
  • Transparent plastics suitable for such containers are desirable in that such plastic is low in cost but such plastics may not have sufficient performance characteristics such as abrasion resistance, heat resistance, chemical resistance, outgassing containment, rigidity characteristics, creep reduction, fluid absorption containment, UV protection, and the like.
  • Carriers are typically formed of injection molded plastics such as PC, acrylonitrile butadiene styrene (ABS), polypropylene (PP), PE, PFA, PEEK, and like materials.
  • the present invention relates generally to a system and method for including a thin protective containment thermopolymer film in the molding process for handlers, transporters, carriers, trays and like devices utilized in the semiconductor processing industry.
  • the thermoplastic film of predetermined size and shape is selectively placed along a shaping surface in a mold cavity for alignment with a desired target surface of a moldable material.
  • the molding process causes a surface of the film to bond to a contact surface of the moldable material such that the film is permanently adhered to the moldable material.
  • a compatible polymer film can be selectively bonded only to those target surfaces where performance characteristics such as abrasion resistance, heat resistance, chemical resistance, outgassing containment, rigidity enhancement, hardness, creep reduction, fluid absorption containment, and the like is needed.
  • semiconductor wafer carrier support structures can include such a polymer film along at least a portion to provide an abrasion resistance contact surface for receivably securable wafers.
  • the protective containment film can include addition film layers to comprise a film laminate for bonding to the semiconductor component handling devices, and to add polymer layers having different functional performance characteristics.
  • An object and feature of particular embodiments of the present invention is that it provides a cost-efficient method of selectively utilizing desirable polymers, and the polymers' corresponding functional characteristic, wherein it is not necessary to utilize more of the polymer than is required.
  • thermoplastic film can be selectively bonded to a portion of a wafer carrier, chip tray, or other semiconductor component handler or transporter that contacts sensitive parts, components, or processing equipment.
  • a further object and feature of particular embodiments of the present invention is the selective use of preferred abrasion-resistant polymer films on parts being used in the semiconductor processing industry.
  • Still another object and feature of particular embodiments of the present invention is forming a semiconductor component handling device with a polymer filmed surface area that is transparent or translucent while still providing functional performance advancements for the selected surface.
  • a handling device is formed by utilizing a thin enough layer of a material on a selected target structure of the device, and overmolding the structure, with or without an intermediate layer, to the substantially transparent or translucent device body constructed of a material such as PC.
  • FIG. 1 is a side cross-sectional view of a performance film insert molding system in accordance with an embodiment of the present invention.
  • FIG. 2 is a side cross-sectional view of portion of the performance film insert molding system of FIG. 1 .
  • FIG. 3 is a side cross-sectional view of a performance film insert molding system in accordance with an embodiment of the present invention.
  • FIG. 4 is a side cross-sectional view of a molded part and bonded performance film in accordance with an embodiment of the present invention.
  • FIG. 5 is a side cross-sectional view of a molded part and bonded performance film laminate in accordance with an embodiment of the present invention.
  • FIG. 6 is a perspective view of a semiconductor wafer handling device in accordance with an embodiment of the present invention.
  • FIG. 7 is an exploded perspective view of a semiconductor wafer handling device in accordance with an embodiment of the present invention.
  • FIG. 8 is a perspective view of stackable chip handling devices in accordance with an embodiment of the present invention.
  • FIG. 9 is a side cross-sectional view of stackable chip handling devices in accordance with an embodiment of the present invention.
  • the present invention includes insert molding at least one protective or containment thermoplastic film 10 to a selected target surface of semiconductor component handling device 12 utilizing a molding unit 20 .
  • the at least one protective or containment film 10 is a thermoplastic polymer having a functional performance characteristic.
  • Functional performance characteristics can include abrasion resistance, heat resistance, chemical resistance, outgassing containment, fluid absorption containment, UV protection, and the like concerns known to be considered in the field of semiconductor processing. Additional functional performance characteristics can include rigidity characteristics, creep reduction, hardness, and a myriad of other dimensionally stabilizing characteristics.
  • the film 10 is at least partially defined by a limited thickness. For instance, a single film layer thickness equal to or less than approximately 0.040 inches (forty thousandths) is envisioned. Preferably, the single film layer is less than or equal to approximately 0.030 inches (thirty thousandths).
  • any compatible material can be utilized for the film 10 to achieve these functional performance characteristics.
  • polyester polyimide (PI), polyether imide (PEI), PEEK, perfluoroalkoxy resin (PFA), fluorinated ethylene propylene copolymer (FEP), polyvinylidene fluoride (PVDF), polymethyl methacrylate (PMMA), polyether sulfone (PES), polystyrene (PS), polyphenylene sulfide (PPS), and a myriad of other compatible polymers are available.
  • PI polyimide
  • PEI polyether imide
  • PEEK perfluoroalkoxy resin
  • FEP fluorinated ethylene propylene copolymer
  • PVDF polyvinylidene fluoride
  • PMMA polymethyl methacrylate
  • PES polyether sulfone
  • PS polystyrene
  • PPS polyphenylene sulfide
  • PPS polyphenylene sulfide
  • the film 10 is generally cut to a predetermined shape and size depending on the particular needs of the bonding application. After cutting, the film 10 can then be thermoformed.
  • the film 10 is generally thin and sheet-like to better facilitate moldability and to capitalize on the transparent or translucent characteristics of the material.
  • Co-pending U.S. application Ser. No. ______ owned by the present Applicant and entitled “SEMICONDUCTOR COMPONENT HANDLING DEVICE HAVING AN ELECTROSTATIC DISSIPATING FILM” is incorporated herein by reference in its entirety.
  • a plurality of films 10 can be laminated to comprise a composite film structure for moldable bonding to the semiconductor component handling devices 12 .
  • various film layers can include differing performance or containment characteristics listed herein, or to provide a combination thereof.
  • a myriad of film lamination techniques known to one skilled in the film lamination art are envisioned for use with the present invention. For instance, U.S. Pat. Nos. 3,660,200, 4,605,591, 5,194,327, 5,344,703, and 5,811,197 disclose thermoplastic lamination techniques and are incorporated herein by reference.
  • the molding unit 20 generally includes a mold cavity 22 , a cover portion 24 , and at least one injection channel portion 28 .
  • the at least one injection channel 28 is in fluid communication with the mold cavity 22 .
  • the mold cavity 22 can include a shaping surface 26 , or surfaces, designed to shape the injected moldable material 30 and/or the film 10 during the molding process.
  • the cover portion 24 selectively engages or covers the mold cavity 22 .
  • Various embodiments of the molding unit 20 can further include at least one vacuum channel 29 in communication with the mold cavity 22 and/or the shaping surface 26 to introduce vacuum suction in securing an object, such as the film 10 , to the mold cavity 22 .
  • the cover portion 24 is removably securable to the mold cavity 22 to facilitate film 10 insertion, and removal of the finished handling device portion or part 32 .
  • the molded part 32 is generally something less than a completed handling device 12 .
  • sidewall inserts and shelves of wafer carriers it is common for sidewall inserts and shelves of wafer carriers to be separately molded, and often to be molded of dissimilar plastics in comparison to the main body of the carrier.
  • Various injection and insert molding techniques are commonly known to those skilled in the art and can be implemented without deviating from the spirit or scope of the present invention.
  • the moldable material 30 is preferably a substantially non-conductive thermoplastic material commonly used in molding parts for any handling device used in the semiconductor processing industry.
  • the material 30 can be PFA, PE, PC, and like known materials. More specifically, the moldable material 30 can be the material conventionally used to construct wafer carriers, chip trays, and components and parts thereof.
  • the performance film 10 is generally cut to a predetermined shape and then thermoformed to a required form.
  • the thermoformed film 10 is placed into the molding unit 20 such that the film 10 is in surface contact with at least a portion of the at least one shaping surface 26 of the mold cavity 22 .
  • various techniques such as vacuum, static, and forceable securement can be implemented to facilitate proper positioning of the film 10 to the cavity 22 or the shaping surface 26 .
  • the cover portion 24 may then be closed in preparation for injection of the material 30 .
  • the moldable material 30 is injected in a substantially molten state into the cavity through the at least one injection channel 28 .
  • the moldable material 30 within the molding unit 20 cools to form the substantially solidified molded part 32 .
  • the molten injection combined with the cooling process forms a permanent adhering bond between the at least one film 10 and the molded part 32 .
  • the molded part 32 can be ejected from the molding unit 32 with the part 32 having a performance enhancing film 10 permanently bonded to a selective target surface.
  • Conventional tooling, techniques, and practices known by those skilled in the art can be used in injecting the material 30 and ejecting the part 32 .
  • FIGS. 4-7 Various conventional wafer handling devices 34 and device 34 components or parts are shown in FIGS. 4-7 .
  • the film 10 or film laminate can be bonded to selective components and/or portions of the wafer handling device 34 (i.e., wafer carrier) with the film insert molding processes described herein.
  • Wafer handlers 34 are generally formed from at least two different melt processable materials. Consequently, once a part 32 of the wafer handler 34 has been injection molded as described, it is often necessary to later place the part 32 in a second mold cavity for overmolding with another molded part or component of the wafer handler 34 . This is yet another reason why it is necessary to have a film 10 made of a durable polymer plastic.
  • the wafer handler 34 includes at least a body portion 38 , and a support structure 40 having a plurality of axial support shelves 42 capable of receivably supporting the wafers or disks by, or near, their peripheral edges.
  • the wafers or disks are conventionally removable from the carriers 34 , at the shelves 42 , in a radial direction upwardly or laterally.
  • the shelves 42 serve as the primary point of contact between the wafers and the carrier 34 .
  • one embodiment of the present invention includes insert molding a protective film 10 to at least a portion of this support structure 40 and/or the supporting shelves 42 .
  • the protective film 10 can be selectively placed within the mold cavity 22 of the molding unit 20 such that it covers an entire surface or side of the molded part, wherein the molded part 32 is the support 40 , the support shelves 42 , a limited predefined portion of the shelves 42 , or various other combinations. Further, the film 10 can be specifically bonded for alignment with other adjacent and abuttable components of the wafer handler 23 to provide for extended protection.
  • the wafer handler 34 can include flanges 44 ( FIG. 6 ) along the outside portion of the handler body 38 to facilitate transporting, including engagement by robotic equipment during semiconductor processing.
  • These flanges 44 can similarly include the insert molded performance film 10 to promote abrasion-resistance.
  • the remaining portions and surfaces of the body 38 can be constructed of less expensive less functional polymers.
  • Still further embodiments can included the molded protective film 10 at selected surfaces of a kinematic coupling structure 46 , wherein the kinematic coupling 46 ( FIG. 7 ) is adapted to facilitate equipment engagement with the handling device 34 as described in U.S. Pat. No. 6,010,008.
  • the insert molded performance film 10 may not adhere sufficiently to other polymers.
  • PEEK i.e., film 10
  • overmolded PC i.e., wafer handler 34 components such as the body 38 .
  • an intermediate film, or tie layer, such as PEI adheres to both the PEEK and PC material.
  • a film laminate 10 of at least two polymer films may be inserted individually in a mold, as a laminate, before injecting the PC material with the intermediate film being positioned intermediate the film 10 and the molten moldable PC material 30 .
  • the two films may be adhered to one another, such as by vacuum molding, lamination processes as described herein, or by other means wherein the two layers or films are bonded prior to insertion and positioning within the molding unit 20 .
  • the handling device 12 is a chip tray 36 including a plurality of seating recesses 50 or recess assemblies adapted to secure a plurality of chips, and peripheral side walls 52 , as shown in FIGS. 8-9 .
  • U.S. Pat. Nos. 5,484,062 and 6,079,565 disclose such chip trays and are incorporated herein by reference.
  • One embodiment of the present invention includes insert molding the performance film 10 to a selected portion or surface of the chip tray 36 , such as the seating recesses 50 .
  • Other embodiments can include insert molding the film 10 to the entire top surface of the tray 36 including the recesses 50 , the side walls 52 , and combinations thereof.
  • the film 10 can be selectively bonded to portions of the side walls 52 to enhance abrasion resistance from contact or engagement with processing equipment or automated machinery and robotics.
  • peripheral side walls 52 of the chip trays 36 are generally shaped for stackable engagement with other chip trays 36 .
  • Stacking posts/members and/or peripheral wall ledges on the bottom portion of the trays 36 can be sized and shaped for alignment with corresponding grooves or lips on the top surfaces of the trays 36 .
  • Other stacking techniques and tray designs known to one skilled in the art are also envisioned for implementation with the present invention.
  • film 10 can be molded to the stackable engagement regions of the peripheral side walls 52 .
  • selective bonding of the at least one protective performance film 10 to selected target surfaces of the chip tray 36 provides a preferred employment of performance enhancing thermoplastics while still allowing a manufacturer to construct the remaining portions of the tray 36 of other preferred polymers.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Packaging Frangible Articles (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Injection Moulding Of Plastics Or The Like (AREA)
  • Laminated Bodies (AREA)
  • Sheets, Magazines, And Separation Thereof (AREA)
US10/496,754 2001-11-27 2002-11-26 Semiconductor component handling device having a performance film Abandoned US20050236110A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US10/496,754 US20050236110A1 (en) 2001-11-27 2002-11-26 Semiconductor component handling device having a performance film

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US33368901P 2001-11-27 2001-11-27
US10/496,754 US20050236110A1 (en) 2001-11-27 2002-11-26 Semiconductor component handling device having a performance film
PCT/US2002/037860 WO2003046950A2 (en) 2001-11-27 2002-11-26 Semiconductor component handling device having a performance film

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US (1) US20050236110A1 (ja)
EP (1) EP1567034A4 (ja)
JP (1) JP2005521236A (ja)
KR (1) KR20040062643A (ja)
CN (1) CN1636275A (ja)
AU (1) AU2002346528A1 (ja)
TW (1) TW200300996A (ja)
WO (1) WO2003046950A2 (ja)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20140037406A1 (en) * 2012-07-31 2014-02-06 Shenzhen China Star Optoelectronics Technology Co. Ltd. Glass Substrate Cassette and Pick-and-Place System for Glass Substrate
WO2017210293A1 (en) 2016-06-01 2017-12-07 Entegris, Inc. Fluid circuit with integrated electrostatic discharge mitigation
EP3929969A1 (de) * 2020-06-22 2021-12-29 Siltronic AG Verfahren zum herstellen eines prozessbehälters für halbleiterwerkstücke und prozessbehälter
US11339063B2 (en) 2018-05-07 2022-05-24 Entegris, Inc. Fluid circuit with integrated electrostatic discharge mitigation
EP4068343A1 (de) 2021-04-01 2022-10-05 Siltronic AG Vorrichtung zum transport von halbleiterscheiben

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AU2002352956A1 (en) * 2001-11-27 2003-06-10 Entegris, Inc Semiconductor component handling device having an electrostatic dissipating film
JP5305113B2 (ja) 2010-05-11 2013-10-02 サムソン エレクトロ−メカニックス カンパニーリミテッド． 低周波用アンテナパターンが埋め込まれる電子装置ケース、その製造金型及び製造方法
EP2386401A1 (en) 2010-05-11 2011-11-16 Samsung Electro-Mechanics Co., Ltd. Case of electronic device having antenna pattern embedde therein, and mold therefor and mthod of manufacturing thereof
EP2386400A1 (en) * 2010-05-11 2011-11-16 Samsung Electro-Mechanics Co., Ltd. Case of electronic device having antenna pattern frame embedded therein, mold therefor and method of manufacturing thereof
TW201611169A (zh) * 2014-08-28 2016-03-16 安堤格里斯公司 基板容器

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5194327A (en) * 1990-04-20 1993-03-16 Teijin Limited Antistatic polyester film
US5593916A (en) * 1988-08-12 1997-01-14 Mitsui Toatsu Chemicals, Incorporated Processing of glass substrates using holding container and holding container
US6039186A (en) * 1997-04-16 2000-03-21 Fluoroware, Inc. Composite transport carrier
US6068137A (en) * 1997-09-16 2000-05-30 Sumitomo Metal Industries, Ltd. Semiconductor wafer carrier
US6079565A (en) * 1998-12-28 2000-06-27 Flouroware, Inc. Clipless tray
US6382419B1 (en) * 1999-04-20 2002-05-07 Shin-Etsu Polymer Co. Ltd. Wafer container box

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH088294B2 (ja) * 1988-05-17 1996-01-29 三井東圧化学株式会社 Ｉｃ用ウエハーのコンテナー
US6428729B1 (en) * 1998-05-28 2002-08-06 Entegris, Inc. Composite substrate carrier
DE29924287U1 (de) * 1998-05-28 2002-08-29 Fluoroware Inc Träger für zu bearbeitende, aufzubewahrende und/oder zu transportierende Scheiben
AU2002352956A1 (en) * 2001-11-27 2003-06-10 Entegris, Inc Semiconductor component handling device having an electrostatic dissipating film

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5593916A (en) * 1988-08-12 1997-01-14 Mitsui Toatsu Chemicals, Incorporated Processing of glass substrates using holding container and holding container
US5194327A (en) * 1990-04-20 1993-03-16 Teijin Limited Antistatic polyester film
US6039186A (en) * 1997-04-16 2000-03-21 Fluoroware, Inc. Composite transport carrier
US6068137A (en) * 1997-09-16 2000-05-30 Sumitomo Metal Industries, Ltd. Semiconductor wafer carrier
US6079565A (en) * 1998-12-28 2000-06-27 Flouroware, Inc. Clipless tray
US6382419B1 (en) * 1999-04-20 2002-05-07 Shin-Etsu Polymer Co. Ltd. Wafer container box

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20140037406A1 (en) * 2012-07-31 2014-02-06 Shenzhen China Star Optoelectronics Technology Co. Ltd. Glass Substrate Cassette and Pick-and-Place System for Glass Substrate
US9079714B2 (en) * 2012-07-31 2015-07-14 Shenzhen China Star Optoelectronics Technology Co., Ltd Glass substrate cassette and pick-and-place system for glass substrate
WO2017210293A1 (en) 2016-06-01 2017-12-07 Entegris, Inc. Fluid circuit with integrated electrostatic discharge mitigation
DE112017002783T5 (de) 2016-06-01 2019-02-21 Entegris, Inc. Fluidkreis mit integrierter Elektrostatische-Entladung-Mitigation
US11384879B2 (en) 2016-06-01 2022-07-12 Entegris, Inc. Fluid circuit with integrated electrostatic discharge mitigation
US11339063B2 (en) 2018-05-07 2022-05-24 Entegris, Inc. Fluid circuit with integrated electrostatic discharge mitigation
EP3929969A1 (de) * 2020-06-22 2021-12-29 Siltronic AG Verfahren zum herstellen eines prozessbehälters für halbleiterwerkstücke und prozessbehälter
EP4068343A1 (de) 2021-04-01 2022-10-05 Siltronic AG Vorrichtung zum transport von halbleiterscheiben
WO2022207419A1 (de) 2021-04-01 2022-10-06 Siltronic Ag Vorrichtung zum transport von halbleiterscheiben

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JP2005521236A (ja) 2005-07-14
KR20040062643A (ko) 2004-07-07
AU2002346528A8 (en) 2003-06-10
CN1636275A (zh) 2005-07-06
EP1567034A2 (en) 2005-08-31
AU2002346528A1 (en) 2003-06-10
TW200300996A (en) 2003-06-16
EP1567034A4 (en) 2007-11-14
WO2003046950A2 (en) 2003-06-05
WO2003046950A3 (en) 2005-06-02

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