TW200300996A - Semiconductor component handling device having a performance film - Google Patents

Semiconductor component handling device having a performance film Download PDF

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Publication number
TW200300996A
TW200300996A TW091134457A TW91134457A TW200300996A TW 200300996 A TW200300996 A TW 200300996A TW 091134457 A TW091134457 A TW 091134457A TW 91134457 A TW91134457 A TW 91134457A TW 200300996 A TW200300996 A TW 200300996A
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Taiwan
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film
thermoplastic
item
patent application
scope
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TW091134457A
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Chinese (zh)
Inventor
Sanjiv M Bhatt
Shawn D Eggum
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Entegris Inc
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Publication of TW200300996A publication Critical patent/TW200300996A/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/68—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/673—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere using specially adapted carriers or holders; Fixing the workpieces on such carriers or holders
    • H01L21/6732—Vertical carrier comprising wall type elements whereby the substrates are horizontally supported, e.g. comprising sidewalls
    • H01L21/67323—Vertical carrier comprising wall type elements whereby the substrates are horizontally supported, e.g. comprising sidewalls characterized by a material, a roughness, a coating or the like
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/673—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere using specially adapted carriers or holders; Fixing the workpieces on such carriers or holders
    • H01L21/67326—Horizontal carrier comprising wall type elements whereby the substrates are vertically supported, e.g. comprising sidewalls
    • H01L21/6733—Horizontal carrier comprising wall type elements whereby the substrates are vertically supported, e.g. comprising sidewalls characterized by a material, a roughness, a coating or the like
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/673—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere using specially adapted carriers or holders; Fixing the workpieces on such carriers or holders
    • H01L21/67346—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere using specially adapted carriers or holders; Fixing the workpieces on such carriers or holders characterized by being specially adapted for supporting a single substrate or by comprising a stack of such individual supports
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/673—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere using specially adapted carriers or holders; Fixing the workpieces on such carriers or holders
    • H01L21/6735—Closed carriers
    • H01L21/67366—Closed carriers characterised by materials, roughness, coatings or the like

Abstract

The present invention relates generally to a system and method for including a thin protective containment thermopolymer film, such as PEEK, in the molding process for handlers, transporters, carriers, trays and like devices utilized in the semiconductor processing industry. The thermoplastic film of predetermined size and shape is selectively placed along a shaping surface in a mold cavity for alignment with a desired target surface of a moldable material. The molding process causes a surface of the film to bond to a contact surface of the moldable material such that the film is permanently adhered to the moldable material. As a result, a compatible polymer film can be selectively bonded only to those target surfaces where performance characteristics such as abrasion resistance, heat resistance, chemical resistance, outgassing containment, rigidity enhancement, hardness, creep reduction, fluid absorption containment, and the like is needed.

Description

200300996 玫發·說明 本發明在民國90年11月27日提出申請臨時 申請案第 6 0 / 3 3 3，6 8 9號的優先權，標題爲晶圓 載體用的性能聚合物薄膜插入模塑，其係在此 以引用的方式倂入本文。 發明領域= 本發明一般係關於薄膜插入模塑，而且更特 別地關於在半導體組件處理器或載體之模塑期 間內將薄的保護性防滲漏聚合物薄膜插入模 塑。 發明背景= 習知的薄膜插入模塑技術一般係使用於製造 製程，以增加各種消費產品中的美學吸引力。 亦即是，裝飾性花樣、指令、商標、以及其它 視覺上的圖案係印在薄透明聚合物薄膜的一表 面上，以使用於插入模塑製程。稍後的發展則 擴充薄膜之使用，以將譬如條碼的功能性特徵 永久地固定到該產品。在兩種情形之中，在注 入可塑性材料之前，可將該薄膜放置於一部份 模子內。這種情形會產生薄膜與塑模部份之間 的接合，以致使可將價錢低廉的裝飾或指標選 擇性地放置於該部份上，而卻同時在複雜輪廓 的四週以及困難達到的位置上將指標之使用簡 化。相同地，藉由消除令該指標受到蝕刻或成 形爲模子本身之實際表面的需求，此薄膜插入 312/發明說書(補件)/92-02/91134457 200300996 模塑或裝飾性的模塑會簡化該製造過程。這種 情形增力α 了設計與製造彈性，以及可包括在最 後產品中之細節的程度。 半導體工業將獨特且非常規的純淨與抗髒的 需求條件引入於產品設計與製造方法的發展與 實施內。最重要地，在元件與組件的製造、儲 存、與運輸中，材料的挑選是必要的。例如， 種種聚合物材料，譬如聚醚醯亞胺（Ρ Ε )、聚碳 酸酯（PC)、聚四氟乙烯樹脂（PFA)、聚芳醚 酮（PEEK)與類似物，其係一般使用於包含在 架構晶圓載體與晶片盤之元件與結構的製造 中 。 晶圓載體= 將晶圓圓盤加工處理成積體電路晶片通常包 含許多步驟，在此，圓盤係重複地予以加工、 儲存與運輸。由於圓盤的易碎特性以及它們的 高價値，適當地在整個過程將它們保護係爲不 可或缺的。晶圓載體的一目的乃在提供此種保 護。此外，因爲晶圓圓盤的力日工處理一般爲自 動化，所以就有必要將圓盤相關於自動移除與 插入晶圓用之處理裝置精確地放置。晶圓載體 的第二目的乃在於運輸期間內牢固地固持住晶 圓圓盤。 載體一般架構來將晶圓或圓盤軸向地排列在 架或槽中，並且藉由或靠近周圍邊緣而支撐該 8 312/發明說書(補件)/92-02/91134457 200300996 晶圓或圓盤。傳統上，在徑方向上，可向上或 水平地將晶圓或圓盤從載體移除。載體可具有 補充的頂部遮蓋物、底部遮蓋物、或將晶圓或 圓盤密封的外殼。有許多的材料特徵，其係對 晶圓載體有用以及有利，其係取決於載體的型 態以及該載體的特別部份。 由於半導體晶酒或磁圓盤的加工處理，微粒 物質之存在與產生呈現出非常明顯的污染問 題。污染係被認爲是在半導體工業中產量耗損 的單獨最大原因。因爲已經持續地將積體電路 的尺寸縮小，所以可污染積體電路的顆粒尺寸 則同樣變得更小，其係將所有更關鍵的污染問 題縮減到最小。成顆粒型式的污染問題，其係 可由磨損所產生，譬如載體與晶圓或圓盤、與 載體蓋子或外殼、與儲存網架、與其它載體、 或與其它加工處理裝置的磨擦或切削。載體最 令人希望的特徵則是在塑膠模塑材料之磨損、 磨擦、或切削上抗顆粒的產生。美國專利第 5，7 8 0，1 2 7號揭露出有關此種用於晶圓載體之 材料之適宜性的種種塑膠特性，其係在此以引 用的方式倂入本文。 載體材料應該同樣具有揮發性元件的最小漏 氣，當它們可能離開薄膜時，其係同樣地構成 可傷害晶圓與圓盤的污染。當力α載載體時，該 載體材料必須具有足夠的尺寸穩定度，亦即是 9 312/發明說書(補件)/92-02/91134457 200300996 剛度。就預防對晶圓或圓盤之損壞以及將晶圓 或圓盤在載體內之移動最小化來說，尺寸的穩 定度是必要的。固持晶圓與圓盤之槽的容差基 本上非常地小，而且載體的任何變形可直接地 傷害高度易碎的晶圓或增加磨損，以及當將晶 圓或圓盤移入時，來自載體或其內的顆粒產 生。當在某方向上加載載體時，例如當將載體 於裝載期間堆疊時，或當載體與處理裝置合倂 時，尺寸穩定度則同樣地極其重要。在儲存或 淸潔期間內可遇到的高溫之下，載體材料應該 同樣地維持其整體性。 密封容器內的晶圓可見度乃高度地令人希望 並且爲終端使用者所需要。適合此容器的透明 塑膠，譬如聚碳酸酯，其係在此塑膠成本很低 但此塑膠可能不具有足夠性能特徵，譬如抗 磨、耐熱、抗化、防漏氣、剛度特徵、潛變降 低、防流體吸收、防紫外線與類似的情形上是 令人希望的。 其它重要的考量包括載體材料之成本與將該 材料模塑之不費力氣。載體典型地由注入模塑 塑料所形成，譬如 P C (聚碳酸酯）、A B S (丙烯 腈-丁二烯-苯乙烯共聚物）、PP(聚丙烯）、PE (聚醚醯亞胺）、PFA(聚四氟乙烯樹fl旨）、PEEK (聚芳醚酮）以及類似材料。 特定專門聚合物的一主要好處是它們的抗磨 10 312/發明說書(補件)/92-02/91134457 200300996 特性。典型價錢低廉的習知塑膠在磨損或甚至 在對著其它材料或物體摩擦時，會將微小的顆 粒釋入到空氣中。雖然這些顆粒對肉眼來說基 本上是不可見的，但是他們卻導致可附著到予 以加工之半導體組件的潛在傷害性污染的引 入，並且引入到必要的控制環境內。不過，特 定的熱塑性聚合物比習知聚合物還更顯著地昂 貴。事實上，種種的特定熱塑性聚合物本身可 巨幅地改變，亦即，P E E K (聚芳醚酮）比 P C (聚碳酸酯）還更貴。 習知的實施包括架構一材料的全部晶圓載體 /處理器元件，以獲得任一列出的性能特徵。不 過，如所述，譬如 PEEK之材料的製造與使用 則明顯地更昂貴，而且將該材料使用於大型處 理器元件的架構中則經常令人不喜歡，甚至不 可實施。此外，以製造此半導體處理器所需要 的方式來操作與將 PEEK (聚芳醚酮）模塑是困 難的。現在，晶圓載體的製造商被迫在特定熱 塑性塑膠之功能性能特徵的好處以及製造該材 料的所有或實質一部份產物的成本之間做一決 定。雖然功能性熱塑性材料僅在載體之特別部 份或元件表面上的特別應用上令人需要，該載 體係碰觸到易碎的半導體組件或處理裝置，但 是全部或部份的處理器則典型地由功能性聚合 物所構成。如所述，這在成本與製造整體性的 11 312/發明說書(補件)/92-02/91134457 200300996 兩方面上是沒有效率的。 結果，在半導體工業中，在目標處理器表面上提供增進 性能的特徵，其係對實質減少不必要之製造過 程並允許功能性熱塑性材料之目標與局部化實 施的製造技術來說是需要的。此一創新將藉由 容許希望但卻經常昂貴之熱塑性聚合物的選擇 性使用而明顯地降低製造與設計成本。 發明槪述： 本發明一般係關於在半導體製程工業中所利 用之處理器、運輸器、載具、盤與類似裝置之 模塑製程中，包括薄保護性防滲漏熱聚合物薄 膜用的系統與方法。將預定尺寸與形狀的熱塑 性薄膜沿著模穴中的成形表面而選擇性地放 置，以用來對齊可塑性材料的希望目標表面。 該模塑製程導致該薄膜的表面接合到可塑性材 料的接觸表面，以便將該薄膜永久地黏附到可 塑性材料。結果則可選擇性地僅僅將相容性聚 合物薄膜接合到那些目標表面，在那裡譬如抗 磨性、耐熱性、抗化性、防漏氣、剛度之提高、 硬度、潛變之降低、防流體吸收以及類似情形 的性能特徵則是需要的。例如，半導體晶圓載 體支撐結構可包括沿著其結構至少一部份的此 一聚合物薄膜，對可接收地牢固的晶圓提供一 抗磨接觸表面。再者，保護性防滲漏薄膜可包 括額外的薄.膜層，以包含薄膜疊層，以接合到 12 312/發明說書(補件)/92-02/91134457 200300996 半導體組件處理裝置，並且增加具有不同功能 性能特徵的聚合物層。 本發明之特定具體實施例的目標與特徵乃在 於它能提供選擇性地利用所希望聚合物以及聚 合物之相對應功能性特徵的成本節約方法，其 中利用比所需要者還更多的聚合物則並非必 要。 本發明之特定具體實施例的另一目標與特徵 乃在於可將功能性熱塑性薄膜選擇性地接合到 接觸敏感部件、元件、或處理裝置的一部份晶 圓載體、晶片盒、或其它半導體組件處理器或 運輸器。 本發明之特定具體實施例的進一步目標與特 徵是在半導體製程工業所使用之部件上之較佳 抗磨性聚合物薄膜的選擇性使用。 本發明之特定具體實施例的仍另一目標與特 徵係爲形成具有聚合物薄膜表面區域的半導體 組件處理裝置，該聚合物薄膜表面區域在仍提 供功能性能進展給被選定的表面時是透明或半 透明的。此一處理裝置乃藉由將一足夠薄的材 料層形成於該裝置的選出目標結構上，以及在 有或沒有中間層的情形下，將該結構重疊注塑 到譬如 p c (聚碳酸酯）材料所構成之實質透明 或半透明裝置的體部而來形成。 較佳具體實施例之詳細說明= 13 312/發明說書(補件)/92-02/91134457 200300996 參考圖1 - 9，本發明包括將至少一保護性或 防滲漏熱塑性薄膜1 〇插入模塑至利用模塑單 元 2 0之半導體組件處理裝置1 2的一選出的目 標表面。 保護性/防滲漏薄膜 至少一保護性或防滲漏薄膜1 〇係爲具有功 能性能特徵的熱塑性聚合物。功能性能特徵可 包括抗磨性、耐熱性、抗化性、防漏氣、防流 體吸收、抗紫外線、以及在半導體製程之領域 中視爲已知的類似考慮。額外的功能性能特徵 可包括剛性、潛變之減少、硬度、以及多數的 其它尺寸穩定特性。該薄膜 1 〇至少局部地由有 限的厚度所界定。例如，相等或小於大約.〇 4 0 英吋（千分之四十）的單一薄膜層厚度是可想 像的。較佳地，該單一薄膜層小於或等於大 約· 0 3 0英吋（千分之三十）。當然，實施複數層 之疊層將改變標準的較佳厚度。任何相容性的 材料可予以採用，以用於薄膜 1 0，以得到這些 功能性能特徵。例如，聚酯、聚亞烯胺 (Polyimide)、聚醚醯亞胺（Polyetherimide， PEI)、聚芳醚酮（poly ether ether ketone ， PEEK)、聚四氟乙烯樹月旨（perfluoroalkoxy resin，PFA)、乙烯丙烯氟化物（Fluorinated Ethylene Propylene ，FEP)、聚氟化亞乙稀 (polyvinylidene fluoride, PVDF)、聚甲基丙 14 312/發明說書(補件)/92-02/91134457 200300996 稀酸甲酯（poly methyl methacrylate, PMMA)、 聚醚硕（Polyether sulfone，PES)、聚苯乙烯 (Polystyrene ，PS)、聚伸苯基硫 (polyphenylene sulfide, PPS)、以及無數個其 它相容性聚合物是可使用的。爲了在半導體組 件處理裝置1 2之製造中，應用該性能增進薄膜 1 〇，薄膜1 〇則依據接合應用之特殊需求而切割 成預定的形狀與尺寸。在切割之後，隨後可將 薄膜 1 〇力CI熱成形。薄膜 1 〇 —般很薄而且像薄 片，以較佳地促進可塑性，並且在該材料的透 明或半透明特性上利用。本申請人所擁有、審 理中的美國申請案編號第_號、標題爲” 具有靜電耗散薄膜的半導體組件處理裝置”，其 係完成以引用的方式倂入本文內。 除了將單一薄膜 1 0插入模塑以外，可將複數 個薄膜1 〇疊層，以包含合成薄膜結構，以可塑 性地接合到半導體組件處理裝置1 2。例如，種 種薄膜層可包括在此所列出的不同性能或防滲 漏特性，或者提供其結合。將熟諳該薄膜疊層 技藝者所已知的種種薄膜疊層技術想像成與本 發明一起使用。例如，美國專利案編號第 3, 660, 200、4, 605, 591、5, 194, 327、5, 344, 703、 與 5，8 1 1，1 9 7號揭露出熱塑性疊層技術而且在 此以引用的方式倂入本文。 功能薄膜插入模塑 15 312/發明說書(補件)/92-02/9113445 7 200300996 主要地參考圖1 - 7，模塑單元 2 0 —般包括模 穴 2 2、遮蓋部份 2 4、以及至少一注入通道部份 2 8。該至少一注入通道 2 8可以流體而與模穴 22互通。模穴22可包括在模塑製程期間內， 設計以將注入可塑性材料3 0與/或薄膜1 0模塑 的一個成形表面 2 6或多個表面。遮蓋部份 2 4 選擇性地結合或遮罩住該模穴 2 2。模塑單元 2 0 的種種具體實施例可進一步地包括與模穴 22 以及/或者成形表面 26互連的至少一真空通道 2 9，以在將譬如薄膜 1 0之物質固定到模穴 2 2 時引入真空吸力。可固定地使薄膜1 〇符合於穴 2 2內，並應用靜態固定與強迫性結合而將表面 2 6成形之其它已知技術亦同樣地令人想像成 與本發明一起使用。應該注意的是，好幾個圖 將薄膜 1 〇描繪成與相對應處理裝置相較之下 之不成比例的大，其係僅爲了說明之目的，而 卻不打算代表本發明用的真實比例。 在一具體實施例中，遮蓋部份 24可移動地固 定到模穴 2 2，以助於薄膜 1 0之插入以及完成 後之處理裝置部份與部件 3 2的移動。模塑部件 3 2 —般小於完成的處理裝置1 2。例如，將邊牆 插入物與晶圓載體架分開模塑並且常常以相較 於該載體本體的不同塑料來模塑則是常見的。 種種的注入與插入模塑技術對那些熟諳該技藝 者而言是已知的，而且其係可在不偏離本發明 16 312/發明說書(補件)/92-02/91134457 200300996 之精神與範圍的情形下實施。 可塑性材料 3 0較佳地爲實質非傳導性的熱 塑性材料，其係一般使用於半導體製程工業中 所使用之任何處理裝置用的模塑部件中。此 外，材料 30可以是 PFA (聚四氟乙烯樹脂）、 P E (聚醚醯亞胺）、P C (聚碳酸酯）與類似已 知的材料。更明確地，可塑性材料 3 0可以是習 知用來架構晶圓載體、晶片盤、以及其元件與 部件的材料。 當操作時，可將性能薄膜1 〇切割成預定的形 狀，隨後並加熱成形成需要的形式。將受到加 熱成形的薄膜 1 〇放置於模塑單元 2 0內，以致 使該薄膜10以表面與模穴 22之至少一成形表 面 2 6的至少一部份接觸。如在此所指出的，可 將譬如真空、靜態、與強迫性固定的各種技術 實施，以助於將薄膜 1 〇正確地放置於穴 2 2或 成形表面 2 6。隨後可將遮蓋部份 2 4密封，以 準備材料 3 0之注入。在製程的階段中，可塑性 材料 3 0會經由至少一注入通道 2 8而以實質熔 化的狀態注入到穴內。在等待一不可或缺的冷 卻時期以後，模塑單元 2 0內的可塑性材料 3 0 會冷卻，以形成實質凝固的模塑部件 3 2。與冷 卻製程合倂的熔化注入，其係在至少一薄膜1 〇 與模塑部件 3 2之間形成永久的黏附接合。 在模塑製程完成之後，可將模塑部件 3 2從模 17 312/發明說書(補件)/92-02/91134457 200300996 塑單元 3 2排出，而部件 3 2的性能增進薄膜1 0 則永久地接合到選出的目標表面。爲那些熟諳 該技藝者所已知的習知加工、技術、與實施， 其係可使用於材料3 0之注入與部件3 2之排出。 晶圓處理器/載體 各種習知的晶圓處理裝置 34以及裝置 34元 件與部件係顯示於圖 4 - 7中。可將薄膜 1 0或薄 膜疊層以在此所說的薄膜插入模塑製程而來接 合到該晶圓處理裝置 3 4 (亦即，晶圓載體）之 挑選出的元件與/或部份。晶圓處理器 3 4 —般 係由至少兩不同的熔化可加工材料所形成。結 果，一旦已經如說明地將晶圓處理器 3 4之部件 3 2注入模塑的話，稍後則經常必須將部件 3 2 放置於第二模穴中，以用於以晶圓處理器 34 的另一模塑部件或元件而來重疊注塑。這是爲 什麼必須使薄膜 1 〇由持久性聚合物塑料製成 的另一原因。重複地暴露於模塑製程中的剪力 與高溫需要較佳熱塑性聚合物之使用。由本申 請人所擁有之審理中的美國專利申請案第 0 9 / 3 1 7，9 8 9號揭露出了重疊注塑以製造晶圓載 體之使用，其係並且在此以引用的方式倂入本 文。此外，美國專利第 6 4 3 9 9 8 4號揭露出晶圓 載體用的模塑技術，其係同樣地在此以引用的 方式倂入本文。 美國專利案第 6，428, 729、 6, 039, 186、 18 312/發明說書(補件)/92-02/91134457 200300996 5，4 8 5，0 9 4與5 5 9 4 4，1 9 4號揭露出構成晶圓處理 裝置3 4用的特別架構與製程，其係在此以引用 的方式倂入本文。在一具體實施例中，晶圓處 理器 3 4包括至少一體部 3 8以及具有複數個軸 向支撐架 42的一支撐結構 40，該支撐架能夠 藉著或靠近它們的周圍外圍而可接收地支撐該 晶圓或盤狀物。在架子 42上，該晶圓或盤狀物 係可習知地沿著徑方向向上或水平地從載體 3 4移除。架子 4 2用作晶圓與載體 3 4之間的主 要接觸點。結果，本發明之一具體實施例包括 將一保護性薄膜 1 〇插入模塑到至少一部份的 此支撐架構 40以及/或者支撐架 42。可將保護 性薄膜 1 〇選擇性地放置於模塑單元 2 0的模穴 22內，以致使它能遮蓋模塑部件的所有表面或 邊側，其中該模塑部件 3 2係爲支撐 40、支撐 架 42、架 42的有限預先界定部份、或各種其 它的結合。再者，可將薄膜 1 0明確地接合，以 對齊晶圓處理器 2 3的其它鄰近與可毗連元 件，以提供用於延伸之保護。藉由促進薄膜1 〇 之選擇性的接合放置到靠近晶圓處理器3 4之 任何表面或元件表面，以引進或增力D抗磨性、 耐熱性、抗化性、防漏氣、抗紫外線、剛性特 徵、潛變之減少、硬度、防流體吸收以及類似 情形。 在本發明的另一具體實施例中，晶圓處理器 19 312/發明說書(補件)/92-02/91134457 200300996 3 4可包括沿著處理器本體 3 8之外面部份的凸 緣 4 4 (圖6 )，以助於運輸，包括在半導體製程 期間內經由自動裝置的結合。這些凸緣 44可同 樣地包括插入模塑性能薄膜 1 〇，以促進抗磨 性。就其本身而論，體部 3 8的剩餘部份與表面 可由較不貴、較沒有功能的聚合物所構成。仍 進一步的具體實施例可包括模塑的保護薄膜 1 〇於動態耦合結構 4 6的被選定的表面上，其 中動態耦合 4 6 (圖7 )適於促進如美國專利案 第 6 5 0 1 0，0 0 8號所說之與處理裝置 3 4的裝置結 合。 在某些場合中，插入模塑的功能性薄膜1 〇 不能足夠地黏附於其它的聚合物。例如J PEEK (聚芳醚酮）（亦即，薄膜10)無法在所有的 情形中黏附到重疊注塑的 P C (亦即，譬如體部 3 8的晶圓處理器 3 4元件）。參考圖 5，中間薄 膜或連結層，譬如 PEI (聚醚醯亞胺）被發現 可黏附到 PEEK (聚芳醚酮）與 PC (聚碳酸酯） 兩物質。因此，在注入 P C材料，而中間薄膜放 置於薄膜 1 〇與熔化可模塑 P C材料 3 0間之前， 可將至少兩聚合物薄膜的薄膜疊層 1 0個別地 插入於一模子裡，以作爲疊層。不然的話，可 將兩薄膜彼此黏附，其係譬如藉由在此所說明 的真空模塑、疊層製程，或者藉由其它的方法， 其中將兩層或薄膜在插入與放置於模塑單元 20 312/發明說書(補件)/92-02/91134457 200300996 2 〇內之前接合。 由於至少一性能或功能薄膜 1 〇的此種選擇 性接合，所以在特別目標表面與處理器元件上 之特定材料的選擇性使用則是可能的。此選擇 性目標如希望地促進製造與成本效益，或者甚 至需要的薄膜 1 〇材料可非常地不同於晶圓載 體 3 4之建構中所剩餘的部分，或者甚至特定部 件 3 2所需要者。 晶片處理器/盤 在另一具體實施例中，處理裝置 i 2是一晶片 盤3 6，其係包括適於固定複數片之晶片的複數 個放置凹處 5 0或凹處組件，以及周圍邊牆5 2， 如圖 8-9所示。美國專利第 5,484, 062號與第 6，0 7 9，5 6 5號揭露出此種晶片盤，其係並且在此 以引用的方式倂入本文。由於在此所說之晶圓 處理器 3 4用的製程與材料，對於引進或增進盤 3 6之特定表面或位置的功能性能特徵會有助 益。例如，接合到放置凹處 5 0的耐磨性薄膜 1 〇會將來自晶片之經常放置所導致之接觸與 摩擦的潛在微粒子分佈最小化。 本發明之一具體實施例包括將性能薄膜1〇 插入模塑到晶粒盤 3 6的選定部份或表面，譬如 放置凹處 5 0。其它的具體實施例則可包括將薄 膜 1 〇插入模塑到包括凹處 5 0、邊牆 5 2及其結 合之盤 3 6的全部頂部表面。例如，可選擇性地 21 312/發明說書(補件)/92-02/91134457 200300996 將薄膜 1 〇接合到邊牆 5 2部份，以提升對與處 理裝置或自動機械與自動裝置之接觸或結合的 抗磨性。 再者，一般可將晶片盤 3 6的周圍邊牆 5 2成 形，以可與其它晶片盤3 6堆疊結合。在盤3 6 底部部份上的堆疊柱/元件與/或者周圍邊牆突 出物的尺寸與形狀可用來與盤 3 6之頂部表面 上的對應溝槽或唇狀物相對齊。可同樣地將一 般熟諳該技藝者所已知的其它堆疊技術與盤的 設計想像成與本發明一起實施。爲了提供一保 護層，可將薄膜1 0模塑到周圍邊牆 5 2的可堆 疊結合區域。 由於晶圓處理器 3 4，將至少一保護性功能薄 膜1 〇選擇性地接合到晶片盤3 6的被選定目標 表面，其係提供提升熱塑性之性能的較佳應 用，而·卻仍允許製造者架構出其它較佳聚合物 之盤 3 6的剩下部份。 本發明可以用其它特定的形式來實施，而不 會背離其精神與基本特性，而且令人因此希望 的是，在所有態樣中，本具體實施例可視爲是 說明性而非限制性。 圖式簡單說明： 圖1係爲根據本發明之較佳具體實施例而設 計之性能薄膜插入模塑系統的側橫剖圖。 圖2係爲圖1之部分性能薄膜插入模塑系統 22 312/發明說書(補件)/92-02/91134457 200300996 的側橫剖圖。 圖3係爲根據本發明具體實施例而設計之性 能薄膜插入模塑系統的側橫剖圖。 圖 4係爲根據本發明一具體實施例而設計之 模塑部件與接合性能薄膜的側橫剖圖。 圖5係爲根據本發明一具體實施例而設計之 模塑部件與接合性能薄膜疊層的側橫剖圖。 圖 6係爲根據本發明一具體實施例而設計之 半導體晶圓處理裝置的透視圖。 圖 7係爲根據本發明一具體實施例而設計之 半導體晶圓處理裝置的分解透視圖。 圖 8係爲根據本發明一具體實施例而設計之 可堆疊晶片處理裝置的透視圖。 圖 9係爲根據本發明一具體實施例而設計之 可堆疊晶片處理裝置的側橫剖圖。 元件符號說明： 1〇 保護性或防滲漏熱塑性薄膜 12 半導體組件處理裝置 2 0 模塑單元 2 2 模穴 2 3 晶圓處理器 2 4 遮蓋部份 2 6 成形表面 2 8 注入通道部份 2 9 真空通道 23 312/發明說書(補件)/92-02/91134457 200300996 3 0 可塑性材料 3 2 模塑部件 3 4 晶圓處理裝置 3 4 載體 3 6 晶片盤 3 8 體部 4 0 支撐結構200300996 Illustrate the present invention's priority in the provisional application No. 6 0/3 3 3, 6 8 9 filed on November 27, 1990, entitled "Performance Polymer Film Insert Molding for Wafer Carriers" , Which is hereby incorporated by reference. Field of the Invention = The present invention relates generally to film insert molding, and more particularly to inserting a thin protective leak-proof polymer film into a mold during molding of a semiconductor component processor or carrier. Background of the Invention = Conventional film insert molding techniques are generally used in manufacturing processes to increase aesthetic appeal in various consumer products. That is, decorative patterns, instructions, trademarks, and other visual patterns are printed on one surface of a thin transparent polymer film for use in the insert molding process. Later developments expanded the use of films to permanently fix functional features such as barcodes to the product. In both cases, the film can be placed in a part of the mold before the plastic material is injected. This situation creates a joint between the film and the mold part, so that inexpensive decorations or indicators can be selectively placed on the part, but at the same time around the complex contour and in difficult to reach locations Simplify the use of indicators. Similarly, by eliminating the need for the indicator to be etched or shaped into the actual surface of the mold itself, this film insert 312 / Inventory Story (Supplements) / 92-02 / 91134457 200300996 molding or decorative molding will be simplified The manufacturing process. This situation reinforces the degree of design and manufacturing flexibility and detail that can be included in the final product. The semiconductor industry has introduced unique and unconventional requirements for purity and dirt resistance into the development and implementation of product design and manufacturing methods. Most importantly, the selection of materials is necessary in the manufacture, storage, and transportation of components and assemblies. For example, various polymer materials such as polyetherimide (PE), polycarbonate (PC), polytetrafluoroethylene resin (PFA), polyaryletherketone (PEEK), and the like are generally used in Included in the manufacture of components and structures that structure wafer carriers and wafer disks. Wafer Carrier = Processing wafer wafers into integrated circuit wafers usually involves many steps, where the disks are repeatedly processed, stored, and transported. Due to the fragile nature of the discs and their high price, proper protection of them throughout the process is indispensable. One purpose of wafer carriers is to provide this protection. In addition, since the wafer processing of wafers is generally automated, it is necessary to accurately place the wafers in a processing device for automatic removal and insertion of wafers. The second purpose of the wafer carrier is to securely hold the wafer during transport. The carrier is generally structured to align wafers or disks axially in racks or slots, and to support the 8 312 / Inventor's Story (Supplement) / 92-02 / 91134457 200300996 wafer or circle by or near the surrounding edges. plate. Traditionally, wafers or discs can be removed from the carrier upward or horizontally in the radial direction. The carrier may have a supplementary top cover, a bottom cover, or a housing that seals the wafer or disc. There are many material features that are useful and advantageous for wafer carriers, depending on the type of carrier and the particular part of the carrier. Due to the processing of semiconductor crystal wine or magnetic discs, the existence and generation of particulate matter presents a very obvious pollution problem. Pollution is considered to be the single largest cause of production loss in the semiconductor industry. Since the size of integrated circuits has been continuously reduced, the particle size of contaminated integrated circuits has also become smaller, which minimizes all more critical pollution problems. Particle-type pollution problems can be caused by abrasion, such as friction or cutting of carriers and wafers or disks, carrier covers or housings, storage racks, other carriers, or other processing equipment. The most desirable feature of the carrier is the resistance to the generation of particles during abrasion, friction, or cutting of plastic molding materials. U.S. Patent No. 5,780,127 discloses various plastic properties related to the suitability of such materials for wafer carriers, which are incorporated herein by reference. Carrier materials should also have minimal leakage of volatile components. When they are likely to leave the film, they should also constitute contamination that can harm wafers and discs. When a force α is applied to the carrier, the carrier material must have sufficient dimensional stability, that is, a stiffness of 9 312 / Invention Story (Supplement) / 92-02 / 91134457 200300996. Dimensional stability is necessary in order to prevent damage to the wafer or disk and to minimize the movement of the wafer or disk within the carrier. The tolerance between the groove holding the wafer and the disc is basically very small, and any deformation of the carrier can directly damage the highly fragile wafer or increase wear, and when the wafer or disc is moved in, the carrier or The particles inside it are produced. When the carrier is loaded in a certain direction, such as when the carriers are stacked during loading, or when the carrier is combined with a processing device, dimensional stability is also extremely important. Under the high temperatures that can be encountered during storage or cleaning, the carrier material should likewise maintain its integrity. Wafer visibility in sealed containers is highly desirable and needed by end users. Transparent plastics suitable for this container, such as polycarbonate, are low cost plastics, but this plastic may not have sufficient performance characteristics, such as abrasion resistance, heat resistance, chemical resistance, gas leakage prevention, stiffness characteristics, reduced creep, Anti-fluid absorption, UV protection and the like are desirable. Other important considerations include the cost of the carrier material and the effort required to mold the material. The carrier is typically formed of injection molded plastic such as PC (polycarbonate), ABS (acrylonitrile-butadiene-styrene copolymer), PP (polypropylene), PE (polyetherimide), PFA (Polytetrafluoroethylene tree fl), PEEK (polyaryletherketone) and similar materials. A major benefit of specific specialty polymers is their abrasion resistance 10 312 / Inventory Story (Supplement) / 92-02 / 91134457 200300996. Typical low-cost conventional plastics release tiny particles into the air when they are worn or even rubbed against other materials or objects. Although these particles are essentially invisible to the naked eye, they lead to the introduction of potentially harmful contamination that can attach to the processed semiconductor components and to the necessary controlled environment. However, certain thermoplastic polymers are significantly more expensive than conventional polymers. In fact, the variety of specific thermoplastic polymers can change dramatically, that is, PEEK (polyaryletherketone) is more expensive than PC (polycarbonate). Conventional implementations include all wafer carrier / processor components of a material to achieve any of the listed performance characteristics. However, as mentioned, materials such as PEEK are significantly more expensive to manufacture and use, and the use of such materials in the architecture of large processor components is often unpleasant or even impossible to implement. In addition, it is difficult to operate and mold PEEK (polyaryletherketone) in the manner required to manufacture this semiconductor processor. Manufacturers of wafer carriers are now being forced to decide between the benefits of the functional performance characteristics of a particular thermoplastic and the cost of manufacturing all or a substantial portion of the material. Although functional thermoplastics are desirable only for special parts of the carrier or for special applications on the surface of the component, the carrier touching a fragile semiconductor component or processing device, but all or part of the processor is typically Consists of functional polymers. As mentioned, this is not efficient in terms of both cost and manufacturing integrity 11 312 / Invention Story (Supplements) / 92-02 / 91134457 200300996. As a result, in the semiconductor industry, providing performance-enhancing features on the surface of a target processor is required for manufacturing techniques that substantially reduce unnecessary manufacturing processes and allow the target and localized implementation of functional thermoplastic materials. This innovation will significantly reduce manufacturing and design costs by allowing the selective use of desired but often expensive thermoplastic polymers. Description of the invention: The present invention relates generally to systems for the processing of processors, carriers, carriers, trays, and similar devices used in the semiconductor process industry, including systems for thin, protective, heat-resistant polymer films. And methods. A thermoplastic film of a predetermined size and shape is selectively placed along a forming surface in a cavity to align a desired target surface of a plastic material. The molding process causes the surface of the film to be bonded to the contact surface of the plastic material in order to permanently adhere the film to the plastic material. As a result, it is possible to selectively join only compatible polymer films to those target surfaces, such as abrasion resistance, heat resistance, chemical resistance, gas leakage prevention, increased rigidity, reduced hardness, reduced creep, and Performance characteristics for fluid absorption and similar situations are needed. For example, a semiconductor wafer carrier support structure can include such a polymer film along at least a portion of its structure to provide an abrasion-resistant contact surface to an acceptably strong wafer. Furthermore, the protective anti-leak film may include an additional thin film layer to include a thin film stack to be bonded to 12 312 / Inventive Storybook (Supplement) / 92-02 / 91134457 200300996 semiconductor device processing device, and increase Polymer layers with different functional performance characteristics. The object and feature of a particular embodiment of the present invention is that it can provide a cost-saving method for selectively utilizing the desired polymer and the corresponding functional characteristics of the polymer, wherein more polymer is used than needed It is not necessary. Another object and feature of certain embodiments of the present invention is to selectively bond functional thermoplastic films to contact sensitive parts, components, or parts of a wafer carrier, wafer cassette, or other semiconductor component of a processing device Processor or transporter. A further object and feature of the specific embodiment of the present invention is the selective use of a better abrasion-resistant polymer film on components used in the semiconductor process industry. Yet another object and feature of certain embodiments of the present invention is to form a semiconductor device processing device having a polymer film surface area that is transparent or transparent while still providing functional performance progress to the selected surface. translucent. This processing device is formed by forming a sufficiently thin layer of material on the selected target structure of the device, and with or without an intermediate layer, the structure is overmolded to, for example, a PC (polycarbonate) material. The body is formed of a substantially transparent or translucent device. Detailed description of the preferred embodiment = 13 312 / Inventory Story (Supplement) / 92-02 / 91134457 200300996 Referring to Figures 1-9, the present invention includes inserting at least one protective or leak-proof thermoplastic film 10 into the mold To a selected target surface of the semiconductor device processing apparatus 12 using the molding unit 20. Protective / leak-proof film At least one protective or leak-proof film 10 is a thermoplastic polymer with functional characteristics. Functional performance characteristics may include abrasion resistance, heat resistance, chemical resistance, gas leakage resistance, fluid absorption resistance, ultraviolet resistance, and similar considerations that are known to be known in the field of semiconductor manufacturing. Additional functional performance features may include stiffness, reduced creep, stiffness, and most other dimensional stability characteristics. The film 10 is at least partially defined by a limited thickness. For example, a single film layer thickness that is equal to or less than about .40 inches (forty thousandths) is conceivable. Preferably, the single thin film layer is less than or equal to about 0.30 inches (30 thousandths). Of course, implementing multiple layers of lamination will change the standard preferred thickness. Any compatible material can be used for film 10 to obtain these functional performance characteristics. For example, polyester, polyimide, polyetherimide (PEI), polyether ether ketone (PEEK), perfluoroalkoxy resin (PFA) Fluorinated Ethylene Propylene (FEP), Polyvinylidene fluoride (PVDF), Polymethyl propylene 14 312 / Inventory Story (Supplement) / 92-02 / 91134457 200300996 Methyl Dilute Acid (Poly methyl methacrylate, PMMA), polyether sulfone (PES), polystyrene (PS), polyphenylene sulfide (PPS), and countless other compatible polymers are available in use. In order to apply the performance-enhancing film 10 in the manufacture of the semiconductor device processing device 12, the film 10 is cut into a predetermined shape and size according to the special requirements of the bonding application. After cutting, the film can then be thermoformed with 10 force CI. The film 10 is as thin as a thin sheet to better promote plasticity and is utilized in the transparent or translucent properties of the material. The US application No. _, which is owned by the applicant and is under review and entitled "Semiconductor Device Processing Device with Static Dissipative Film", has been incorporated herein by reference. In addition to inserting a single film 10 into a mold, a plurality of films 10 may be laminated to include a synthetic film structure to be plastically bonded to the semiconductor device processing device 12. For example, various thin film layers may include or provide a combination of the different properties or leakage prevention properties listed herein. Various film lamination techniques known to those skilled in the art of film lamination are conceived for use with the present invention. For example, U.S. Patent Nos. 3, 660, 200, 4, 605, 591, 5, 194, 327, 5, 344, 703, and 5, 8 1 1, 1 9 7 disclose thermoplastic lamination technology and This is incorporated herein by reference. Functional film insert molding 15 312 / Inventory Story (Supplement) / 92-02 / 9113445 7 200300996 Mainly referring to FIGS. 1-7, the molding unit 20 generally includes a mold cavity 2 2, a covering portion 2 4, and At least one injection channel portion 28. The at least one injection channel 28 can be in fluid communication with the cavity 22. The cavity 22 may include a shaped surface 26 or more that is designed to mold the injected plastic material 30 and / or the film 10 during the molding process. The covering portion 2 4 selectively combines or covers the cavity 2 2. Various specific embodiments of the molding unit 20 may further include at least one vacuum channel 29 interconnected with the mold cavity 22 and / or the molding surface 26 so as to fix a substance such as the film 10 to the mold cavity 2 2 Introduce vacuum suction. Other known techniques for fixedly conforming the film 10 within the cavity 22 and applying a static fixation and forcing to form the surface 26 are similarly conceivable for use with the present invention. It should be noted that several figures depict the film 10 as disproportionately large compared to the corresponding processing device, which is for illustration purposes only and is not intended to represent the true scale used in the present invention. In a specific embodiment, the covering portion 24 is movably fixed to the mold cavity 22 to facilitate the insertion of the film 10 and the movement of the processing device portion and the component 32 after the completion. The molded part 3 2 is generally smaller than the finished processing device 12. For example, it is common to mold the side wall insert separately from the wafer carrier and often in a different plastic than the carrier body. Various injection and insert molding techniques are known to those skilled in the art, and they can be made without departing from the spirit and scope of the present invention 16 312 / Invention Book (Supplement) / 92-02 / 91134457 200300996 Implementation. The plastic material 30 is preferably a substantially non-conductive thermoplastic material, which is generally used in molded parts for any processing device used in the semiconductor process industry. In addition, the material 30 may be PFA (polytetrafluoroethylene resin), PE (polyetherimide), PC (polycarbonate) and similar known materials. More specifically, the plastic material 30 may be a material conventionally used to structure a wafer carrier, a wafer disc, and its components and parts. When in operation, the performance film 10 can be cut into a predetermined shape, and then heated to form a desired form. The heat-formed film 10 is placed in the molding unit 20 such that the surface of the film 10 is in contact with at least a part of at least one of the forming surfaces 26 of the cavity 22. As noted herein, various techniques such as vacuum, static, and compulsory fixation can be implemented to help properly place the film 10 on the cavity 22 or the forming surface 26. The covering portion 24 can then be sealed to prepare the material 30 for injection. In the process stage, the plastic material 30 is injected into the cavity in a substantially molten state through at least one injection channel 28. After waiting for an indispensable cooling period, the plastic material 30 in the molding unit 20 is cooled to form a substantially solid molded part 32. The melt injection combined with the cooling process forms a permanent adhesive bond between at least one film 10 and the molded part 32. After the molding process is completed, the molded part 3 2 can be ejected from the mold 17 312 / Inventory Book (Supplement) / 92-02 / 91134457 200300996 The plastic unit 3 2 is discharged, and the performance-improving film 10 of the part 3 2 is permanently Ground bonding to the selected target surface. For those familiar with the processes, techniques, and implementations known to those skilled in the art, it can be used for the injection of material 30 and the discharge of component 32. Wafer Processors / Carriers Various conventional wafer processing devices 34 and devices 34 are shown in Figures 4-7. The thin film 10 or thin film stack may be bonded to selected components and / or portions of the wafer processing apparatus 3 4 (i.e., a wafer carrier) by a thin film insertion molding process referred to herein. The wafer processor 3 4 is generally formed from at least two different molten processable materials. As a result, once the component 32 of the wafer processor 34 has been injection-molded as described, it is often necessary later to place the component 32 in the second cavity for the use of the wafer processor 34. Another molded part or element is overmolded. This is another reason why the film 10 must be made of a durable polymer plastic. Repeated exposure to shear and high temperatures during the molding process requires the use of better thermoplastic polymers. The pending U.S. patent application No. 0 9/3 1 7, 9 8 9 owned by the present applicant discloses the use of overmolding to manufacture a wafer carrier, which is hereby incorporated herein by reference. . In addition, U.S. Patent No. 6 4 3 9 984 discloses a molding technique for a wafer carrier, which is also incorporated herein by reference. U.S. Patent Nos. 6,428,729, 6, 039, 186, 18 312 / Inventory Story (Supplement) / 92-02 / 91134457 200300996 5, 4 8 5, 0 9 4 and 5 5 9 4 4, 1 9 No. 4 reveals the special structure and process for forming the wafer processing device 34, which is incorporated herein by reference. In a specific embodiment, the wafer processor 34 includes at least one integrated portion 38 and a support structure 40 having a plurality of axial support frames 42 that can be received receivably by or near their peripheral periphery. Support the wafer or disk. On the shelf 42, the wafer or disk is conventionally removed from the carrier 34 in a radial direction or horizontally. The shelf 42 is used as the main contact point between the wafer and the carrier 34. As a result, a specific embodiment of the present invention includes inserting a protective film 10 into at least a portion of the support structure 40 and / or the support frame 42. The protective film 10 can be selectively placed in the cavity 22 of the molding unit 20 so that it can cover all surfaces or sides of the molded part, wherein the molded part 32 is a support 40, The support frame 42, a limited pre-defined portion of the frame 42, or various other combinations. Furthermore, the film 10 can be explicitly bonded to align other adjacent and adjoinable elements of the wafer processor 23 to provide protection for extension. By promoting the selective bonding of the thin film 10, it is placed on any surface or component surface close to the wafer processor 34 to introduce or increase the resistance to abrasion resistance, heat resistance, chemical resistance, gas leakage prevention, and ultraviolet resistance. , Rigidity characteristics, reduction of creep, hardness, resistance to fluid absorption, and the like. In another embodiment of the present invention, the wafer processor 19 312 / inventory book (supplied) / 92-02 / 91134457 200300996 3 4 may include a flange 4 along an outer surface portion of the processor body 38. 4 (Figure 6) to facilitate transportation, including the integration of robotic devices during the semiconductor process. These flanges 44 may also include insert moldability films 10 to promote abrasion resistance. For its part, the remainder and surface of the body 38 may be composed of a less expensive, less functional polymer. Still further specific embodiments may include a molded protective film 10 on a selected surface of a dynamic coupling structure 46, where the dynamic coupling 4 6 (FIG. 7) is suitable for promoting, for example, US Patent No. 6 5 0 1 0 No. 0 08 is combined with the processing device 34. In some cases, the insert-molded functional film 10 cannot sufficiently adhere to other polymers. For example, J PEEK (polyaryletherketone) (ie, film 10) cannot adhere to the overmolded PC (ie, wafer processor 3 4 components such as body 3 8) in all cases. Referring to Figure 5, an intermediate film or tie layer, such as PEI (polyether sulfonimide), was found to adhere to both PEEK (polyaryletherketone) and PC (polycarbonate). Therefore, before the PC material is injected and the intermediate film is placed between the film 10 and the moldable PC material 30, the film stack 10 of at least two polymer films can be individually inserted into a mold as a Stacked. Otherwise, the two films can be adhered to each other, such as by vacuum molding, lamination process described herein, or by other methods, in which two layers or films are inserted and placed in the molding unit 20 312 / Inventory Story (Supplement) / 92-02 / 91134457 200300996 2 〇 before joining. Due to this selective bonding of at least one performance or functional film 10, the selective use of specific materials on specific target surfaces and processor elements is possible. This optional goal, if it is desired to promote manufacturing and cost-effectiveness, or even the required film 10 material can be very different from the remainder of the construction of the wafer carrier 34, or even the specific component 32 is required. Wafer processor / disk In another specific embodiment, the processing device i 2 is a wafer tray 36, which includes a plurality of placement recesses 50 or recess components adapted to hold a plurality of wafers, and a peripheral edge Wall 5 2 as shown in Figure 8-9. U.S. Patent Nos. 5,484,062 and 6,079,55,65 disclose such wafer discs, which are and are incorporated herein by reference. Because of the processes and materials used in the wafer processor 34 described herein, it may be helpful to introduce or enhance the functional performance characteristics of a particular surface or location of the disk 36. For example, an abrasion resistant film 10 bonded to the placement recess 50 will minimize the distribution of potential particles from contact and friction caused by frequent placement of the wafer. A specific embodiment of the present invention includes inserting a performance film 10 into a selected portion or surface of the die plate 36, such as placing a recess 50. Other specific embodiments may include insert-molding the film 10 over the entire top surface including the recess 50, the side wall 52, and the combined disk 36. For example, 21 312 / Inventive Storybook (Supplement) / 92-02 / 91134457 200300996 can be optionally joined to the side wall 5 2 section to enhance the contact with the processing device or robot and robot or Combined abrasion resistance. Furthermore, the surrounding sidewalls 52 of the wafer trays 36 can be generally formed so as to be stacked and combined with other wafer trays 36. The size and shape of the stacked posts / elements and / or the surrounding side wall protrusions on the bottom portion of the tray 36 can be aligned with corresponding grooves or lips on the top surface of the tray 36. Other stacking techniques and tray designs known to those skilled in the art can be similarly imagined to be implemented with the present invention. To provide a protective layer, the film 10 can be molded into the stackable bonding area of the surrounding side wall 52. Since the wafer processor 34 selectively attaches at least one protective functional film 10 to the selected target surface of the wafer tray 36, it provides a better application for improving the performance of thermoplastics while still allowing manufacturing The latter constructs the remainder of the disk 36 of other preferred polymers. The invention may be embodied in other specific forms without departing from its spirit or essential characteristics, and it is therefore desirable that, in all aspects, this particular embodiment be considered as illustrative and not restrictive. Brief description of the drawings: Fig. 1 is a side cross-sectional view of a performance film insertion molding system designed according to a preferred embodiment of the present invention. FIG. 2 is a side cross-sectional view of a part of the performance film insert molding system 22 312 / Inventory Story (Supplement) / 92-02 / 91134457 200300996 of FIG. 1. Fig. 3 is a side cross-sectional view of a performance film insertion molding system designed according to a specific embodiment of the present invention. Fig. 4 is a side cross-sectional view of a molded part and a bonding performance film designed according to a specific embodiment of the present invention. Fig. 5 is a side cross-sectional view of a laminate of a molded part and a bonding film designed according to an embodiment of the present invention. FIG. 6 is a perspective view of a semiconductor wafer processing apparatus designed according to an embodiment of the present invention. FIG. 7 is an exploded perspective view of a semiconductor wafer processing apparatus designed according to a specific embodiment of the present invention. FIG. 8 is a perspective view of a stackable wafer processing apparatus designed according to an embodiment of the present invention. Fig. 9 is a side cross-sectional view of a stackable wafer processing apparatus designed according to a specific embodiment of the present invention. Component symbol description: 10 Protective or leak-proof thermoplastic film 12 Semiconductor device processing device 2 0 Molding unit 2 2 Cavity 2 3 Wafer processor 2 4 Covering portion 2 6 Forming surface 2 8 Injection channel portion 2 9 Vacuum channel 23 312 / Inventory story (Supplement) / 92-02 / 91134457 200300996 3 0 Plastic material 3 2 Molded part 3 4 Wafer processing device 3 4 Carrier 3 6 Wafer tray 3 8 Body 4 0 Support structure

4 2 軸向支撐架 4 4 凸緣 4 6 動態耦合 5 0 放置凹處 5 2 周圍邊牆4 2 Axial support 4 4 Flange 4 6 Dynamic coupling 5 0 Place recess 5 2 Surrounding wall

312/發明說書(補件)/92-02/91134457 24312 / Invention Story (Supplement) / 92-02 / 91134457 24

Claims (1)

200300996 拾、·典請專利:範圍’ 1 . 一種半導體晶圓處理裝置，包含： 至少一實質剛性熱塑性元件結構，其係組成 一部份的晶圓處理裝置；以及 至少一保護性熱塑性薄膜，其係接合到使用 一插入模塑製程之一部分該至少一熱塑性元件 結構，以將防滲漏特徵引進到該半導體晶圓處 理裝置。 2 .如申請專利範圍第1項之裝置，其中該至 少一保護性熱塑性薄膜包括具有從以下組成之 一群組所挑出之防滲漏特性的一薄膜：抗磨 性、抗化性、耐熱性、防紫外線、阻礙流體吸 收特性、與阻礙漏氣特性。 3 .如申請專利範圍第2項之裝置，其中該至 少一保護性熱塑性薄膜係爲具有至少兩薄膜層 的一薄膜疊層，以致使該至少兩薄膜層的至少 一層爲保護性薄膜。 4 .如申請專利範圍第3項之裝置，其中該至 少兩薄膜層各具有不同防滲漏特性。 5 .如申請專利範圍第3項之裝置，其中該至 少兩薄膜層的至少一層係爲中間連結層，以用 於改善保護性薄膜與至少一熱塑性元件結構之 間的接合強度。 6 .如申請專利範圍第1項之裝置，其中該至 25 312/發明說書(補件)/92-02/91134457 200300996 少一熱塑性元件結構係爲一支撐結構，其係具 有適於接收半導體晶圓的複數個隔開支撐架。 7 .如申請專利範圍第1項之裝置，其中該至 少一熱塑性元件結構係爲適於與半導體製程裝 置進行機械式互連的動態耦合。 8 .如申請專利範圍第1項之裝置，其中該至 少一熱塑性元件結構是一處理凸緣，其係適於 與一自動裝置進行選擇性的結合互連。 9 .如申請專利範圍第1項之裝置，其中該至 少一熱塑性元件結構係爲該晶圓處理裝置的一 體部外殻部份。 1 0 .如申請專利範圍第1項之裝置，其中該至 少一保護性熱塑性薄膜實質上是半透明的。 1 1 .如申請專利範圍第 1項之裝置，其中該至 少一保護性薄膜實質地由以下所組成群組所挑 出的材料構成：聚酯、聚亞烯胺、聚醚醯亞胺、 聚芳醚酮、聚四氟乙烯樹脂、乙烯丙烯氟化物、 聚氟化亞乙烯、聚甲基丙烯酸甲酯、聚醚硕、 聚苯乙烯、聚伸苯基硫。 1 2 .如申請專利範圍第 1項之裝置，其中該至 少一保護性薄膜係實質地由聚芳醚酮構成。 1 3 . —種半導體組件處理裝置，包含： 該處理裝置之一第一實質剛性熱塑性部份； 以及 26 312/發明說書(補件)/92-02/91134457 200300996 藉助一薄膜插入模塑製程，而接合到至少一 部份第一熱塑性元件的至少一熱塑性防滲漏薄 膜，其中該熱塑性防滲漏薄膜在半導體組件製 程期間內提供保護給敏感性半導體組件。 1 4 .如申請專利範圍第1 3項之裝置，其中第 一熱塑性部份係爲半導體晶圓處理裝置的一部 份，該晶圓處理裝置包括一體部外殻，以及接 收半導體晶圓用的一晶圓支撐結構。 1 5 .如申請專利範圍第1 4項之裝置，其中該 至少一熱塑性防滲漏薄膜係接合到晶圓支撐結 構的至少一部份，以將傷害性微粒擴散入空氣 中的情形降到最小。 1 6 .如申請專利範圍第1 3項之裝置，其中第 一熱塑性部份係爲半導體晶片處理架的一部 份，該架包括適於接收半導體晶片的複數個凹 處，以及複數個外圍邊牆部份。 1 7 .如申請專利範圍第1 6項之裝置，其中至 少一周圍邊牆部份適合與一分開的半導體晶片 處理裝置進行不光澤可堆疊地結合。 1 8 .如申請專利範圍第1 7項之裝置，其中將 至少一防滲漏薄膜接合到複數個凹處以及至少 一外圍邊牆部份，以將傷害性微粒擴散入空氣 中的情形降到最小。 1 9 .如申請專利範圍第1 3項之裝置，其中該 27 312/發明說書(補件)/92-02/91134457 200300996 至少一防滲漏薄膜係爲包含複數薄膜層的薄膜 堆疊，其中至少一薄膜層是防滲漏薄膜。 2 0 .如申請專利範圍第1 9項之裝置，其中薄 膜堆疊之各薄膜層具有明顯的保護特性。 2 1 .如申請專利範圍第 2 0項之裝置，其中薄 膜堆疊之各薄膜層具有明顯的保護特性，各個 係從以下組成的群組挑選出：抗磨性、抗化性、 耐熱性、防紫外線、流體吸收阻礙特性以及阻 礙漏氣特性。 2 2 .如申請專利範圍第 1 3項之裝置，其中至 少一防滲漏薄膜具有從以下組成之群組挑選出 的保護特性：抗磨性、抗化性、耐熱性、防紫 外線、流體吸收阻礙特性與阻礙漏氣特性。 2 3 .如申請專利範圍第 1 3項之裝置，其中至 少一防滲漏薄膜則實質地由以下組成之群組所 挑選出的材料構成：聚酯、聚亞烯胺、聚醚醯 亞胺、聚芳醚酮、聚四氟乙烯樹脂、乙烯丙烯 氟化物、聚氟化亞乙烯、聚甲基丙烯酸甲酯、 聚醚硕、聚苯乙烯、聚伸苯基硫。 2 4 .如申請專利範圍第1 3項之裝置，其中至 少一防滲漏薄膜則實質地由聚芳醚酮構成。 2 5 . —種經由將至少一防滲漏熱塑性薄膜可 熔化地接合到至少一部份熱塑性材料而使一半 導體處理裝置組件薄膜插入模塑的方法，包含 28 312/發明說書(補件)/92-02/91134457 200300996 以下步驟： 形成至少一防滲漏熱塑性薄膜； 使用具有一模穴的一模塑單元，該模穴包括 至少一成形表面； 沿著該至少一成形表面的至少一部份，而將 該至少一成形防滲漏熱塑性薄膜放置於該模塑 單元的該模穴內； 將一實質熔化的熱塑性材料注入於該模塑單 元的該模穴內，以符合該至少一成形表面的該 形狀； 等待一冷卻時期，其中該熱塑性材料實質地 凝固，以無光澤地與至少一防滲漏熱塑性薄膜 接合，以在該半導體處理裝置元件上產生一保 護性防滲漏表面；以及 從該模塑單元注射該半導體處理裝置元件。 2 6 .如申請專利範圍第 2 5項之方法，其中該 半導體處理裝置元件之模塑形成一半導體晶圓 處理裝置的一元件部件。 2 7 .如申請專利範圍第2 6項之方法，其中該 半導體處理裝置元件之模塑形成了該半導體晶 圓處理裝置的一支撐架構，該支撐架構具有複 數個隔開的支撐架，其中該至少一防滲漏熱塑 性薄膜則接合到一部份的隔開支撐架。 2 8 .如申請專利範圍第 2 5項之方法，其中該 29 312/發明說書(補件)/92-02/91134457 200300996 半導體處理裝置元件之模塑形成具有複數個晶 片接收凹處的半導體晶片處理盤，其中該至少 一防滲漏熱塑性薄膜則接合到該複數個晶片接 收凹處，以在使用期間，將微粒釋放入空氣中 的情形降到最小。 2 9 .如申請專利範圍第 2 5項之方法，其中該 半導體處理裝置元件之模塑形成具有複數個晶 片接收凹處與周圍邊牆的半導體晶片處理盤， 其中該至少一防滲漏熱塑性薄膜則接合到該至 少一部份的周圍邊牆，以在使用期間，將微粒 釋放入空氣中的情形降到最小。 3 0 .如申請專利範圍第 2 5項之方法，其中該’ 至少一防滲漏熱塑性薄膜之形成包括將一多層 薄膜堆疊加熱成形，其中至少一薄膜層是一防 滲漏熱塑性薄膜。 3 1 .如申請專利範圍第 3 0項之方法，其中該 多層薄膜堆疊包括至少兩薄膜層，其中該至少 兩薄膜層之第一層具有不同該至少兩薄膜層之 第二層的一防滲漏特徵。 3 2 .如申請專利範圍第 2 5項之方法，其中該 至少一防滲漏熱塑性薄膜之形成包括形成一實 質半透明至少一防滲漏熱塑性薄膜。 3 3 .如申請專利範圍第 2 5項之方法，其中該 至少一防滲漏薄膜具有從以下組成之群組挑選 30 312/發明說書(補件)/92-02/91134457 200300996 出的保護性特性：抗磨性、抗化性、耐熱性、 防紫外線、阻礙流體吸收特性、與阻礙漏氣特 性。 3 4 .如申請專利範圍第 2 5項之方法，其中形 成該至少一防滲漏熱塑性薄膜包括形成由以下 組成之群組所挑出之材料所實質構成的至少一 防滲漏薄膜：聚酯、聚亞烯胺、聚醚醯亞胺、 聚芳醚酮、聚四氟乙烯樹脂、乙烯丙烯氟化物、 聚氟化亞乙烯、聚甲基丙烯酸甲酯、聚醚硕、 聚苯乙烯、聚伸苯基硫。 3 5 .如申請專利範圍第 2 5項之方法，其中至 少一防滲漏薄膜之形成包括實質地由一聚芳醚 酮材料構成之至少一防滲漏薄膜的形成。 3 6 . —種半導體晶片處理盤，包含： 複數個凹處部份，其係能夠接收半導體組件； 一外部周圍邊牆部份，適於促進與其它半導 體晶片處理盤的堆疊性；以及 至少一防滲漏熱塑性薄膜，以一插入模塑製 程而黏附地接合到複數個凹處部份，以在使用 期間內提供表面性的保護。 3 7 .如申請專利範圍第 3 6項之晶片處理盤， 其中該至少一防滲漏熱塑性薄膜係進一步地模 塑到該晶片處理盤之至少一部份的外部周圍邊 牆部份，以在使用期間，將微粒釋放入空氣中 31 312/發明說書(補件)/92-02/91134457 200300996 的情形降到最小。 3 8 .如申請專利範圍第 3 6項之晶片處理盤， 其中該至少一防滲漏薄膜具有從以下組成之群 組挑選出的保護性特性：抗磨性、抗化性、耐 熱性、防紫外線、阻礙流體吸收特性、與阻礙 漏氣特性。 3 9 .如申請專利範圍第 3 6項之晶片處理盤， 其中至少一防滲漏薄膜實質是半透明的。 4 0 .如申請專利範圍第 3 6項之晶片處理盤， 其中至少一防滲漏薄膜實質地由以下組成之群 組所挑選出的材料構成：聚酯、聚亞烯胺、聚 醚醯.亞胺、聚芳醚酮、聚四氟乙烯樹脂、乙烯 丙烯氟化物、聚氟化亞乙烯、聚甲基丙烯酸甲 酯、聚醚硕、聚苯乙烯、與聚伸苯基硫。 4 1 .如申請專利範圍第 3 6項之晶片處理盤， 其中至少一防滲漏薄膜則實質地由聚芳醚酮構 成。 4 2 . —種以至少一防滲漏薄膜來使至少一部 份半導體組件處理裝置模塑的薄膜插入模塑系 統，包含： 一些實質熔化的熱塑性材料，以用來將至少 一部份的半導體處理裝置成形； 一模塑單元，具有一模穴與至少一成形表 面，該模穴與該至少一成形表面適於接收實質 312/發明說書(補件)/92-02/91134457 200300996 熔化熱塑性材料之數量；以及 至少一防滲漏薄膜，沿著至少一部份的該至 少一成形表面而可插入於該模穴內，以在該模 塑製程期間內，永久地接合到一些實質熔化的 熱塑性材料。 4 3 .如申請專利範圍第 4 2項之系統，其中該 至少一防滲漏薄膜具有從以下組成之群組所挑 選出的保護性特性：抗磨性、抗化性、耐熱性、 防紫外線、阻礙流體吸收特性、與阻礙漏氣特 性。 4 4 .如申請專利範圍第 4 2項之系統，其中該 至少一防滲漏薄膜實質地爲半透明。 4 5 .如申請專利範圍第 4 2項之系統，其中至 少一防滲漏薄膜實質地由以下組成之群組所挑 選出的材料構成：聚酯、聚亞烯胺、聚醚醯亞 胺、聚芳醚酮、聚四氟乙烯樹脂、乙烯丙烯氟 化物、聚氟化亞乙烯、聚甲基丙烯酸甲酯、聚 醚硕、聚苯乙烯、與聚伸苯基硫。 4 6 .如申請專利範圍第 4 2項之系統，其中至 少一防滲漏薄膜實質地由聚芳醚酮構成。 4 7 . —種半導體組件處理裝置，包含： 該處理裝置的一第一熱塑性部份；以及 至少一熱塑性尺寸穩定薄膜，其係藉由一薄 膜插入模塑製程而接合到第一熱塑性元件的至 33 312/發明說書(補件)/9102/9113糾57 200300996 少一部份。 4 8 .如申請專利範圍第 4 7項之裝置，其中該 至少一熱塑性尺寸穩定薄膜減少第一熱塑性部 份至少一部份的潛變。 4 9 .如申請專利範圍第 4 7項之裝置，其中至 少一熱塑性尺寸穩定薄膜提供增加的剛度益處 給第一熱塑性部份的至少一部份。 5 0 .如申請專利範圍第 4 7項之裝置，其中至 少一熱塑性尺寸穩定薄膜提供增加的硬度益處 給第一熱塑性部份的至少一部份。 5 1 .如申請專利範圍第 4 7項之裝置，其中至 少一尺寸穩定薄膜實質地由以下組成之群組所 挑選出的材料構成：聚酯、聚亞烯胺、聚醚醯 亞胺、聚芳醚酮、聚四氟乙烯樹脂、乙烯丙烯 氟化物、聚氟化亞乙烯、聚甲基丙烯酸甲酯、 聚醚硕、聚苯乙烯與聚伸苯基硫。 5 2 .如申請專利範圍第 4 7項之裝置，其中至 少一尺寸穩定薄膜實質地由聚芳醚酮構成。 34 312/發明說書(補件)/92-02/91134457200300996 Patent: Scope '1. A semiconductor wafer processing device comprising: at least one substantially rigid thermoplastic element structure, which is a part of a wafer processing device; and at least one protective thermoplastic film, which It is bonded to the at least one thermoplastic element structure using part of an insert molding process to introduce a leak-proof feature into the semiconductor wafer processing apparatus. 2. The device according to item 1 of the scope of patent application, wherein the at least one protective thermoplastic film includes a film having anti-leakage characteristics selected from one of the following groups: abrasion resistance, chemical resistance, heat resistance Properties, UV protection, fluid absorption resistance, and air leakage resistance. 3. The device as claimed in claim 2, wherein the at least one protective thermoplastic film is a film stack having at least two film layers such that at least one of the at least two film layers is a protective film. 4. The device according to item 3 of the patent application, wherein the at least two thin film layers each have different anti-leakage characteristics. 5. The device according to item 3 of the patent application, wherein at least one of the at least two film layers is an intermediate connection layer for improving the bonding strength between the protective film and at least one thermoplastic element structure. 6. The device according to item 1 of the scope of patent application, wherein the to 25 312 / Invention Book (Supplement) / 92-02 / 91134457 200300996 is one less thermoplastic element structure is a supporting structure, which has a structure suitable for receiving semiconductor crystals. A plurality of round spaced support frames. 7. The device according to item 1 of the patent application scope, wherein the at least one thermoplastic element structure is a dynamic coupling suitable for mechanical interconnection with a semiconductor process device. 8. The device according to item 1 of the patent application scope, wherein the at least one thermoplastic element structure is a processing flange which is adapted to be selectively combined and interconnected with an automatic device. 9. The device according to item 1 of the scope of patent application, wherein the at least one thermoplastic component structure is a body shell portion of the wafer processing device. 10. The device according to item 1 of the patent application, wherein the at least one protective thermoplastic film is substantially translucent. 1 1. The device according to item 1 of the patent application scope, wherein the at least one protective film is substantially composed of materials selected from the group consisting of: polyester, polyimide, polyetherimide, poly Aryl ether ketone, polytetrafluoroethylene resin, ethylene propylene fluoride, polyfluorinated vinylene, polymethyl methacrylate, polyether master, polystyrene, polyphenylene sulfide. 12. The device as claimed in claim 1, wherein the at least one protective film is substantially composed of polyaryletherketone. 1 3. A semiconductor device processing device comprising: one of the processing device's first substantially rigid thermoplastic portion; and 26 312 / Inventor's Story (Supplement) / 92-02 / 91134457 200300996 through a thin film insert molding process, At least one thermoplastic leak-proof film bonded to at least a portion of the first thermoplastic element, wherein the thermoplastic leak-proof film provides protection to the sensitive semiconductor device during the semiconductor device manufacturing process. 14. The device according to item 13 of the scope of patent application, wherein the first thermoplastic part is a part of the semiconductor wafer processing device, and the wafer processing device includes an integrated housing and a device for receiving semiconductor wafers. A wafer support structure. 15. The device according to item 14 of the scope of patent application, wherein the at least one thermoplastic leak-proof film is bonded to at least a part of the wafer support structure to minimize the diffusion of harmful particles into the air. . 16. The device according to item 13 of the patent application scope, wherein the first thermoplastic part is a part of a semiconductor wafer processing rack, the rack includes a plurality of recesses suitable for receiving a semiconductor wafer, and a plurality of peripheral edges The wall part. 17. The device according to item 16 of the patent application scope, wherein at least one peripheral side wall portion is suitable for matt and stackable bonding with a separate semiconductor wafer processing device. 18. The device according to item 17 of the scope of patent application, wherein at least one anti-leakage film is bonded to a plurality of recesses and at least one peripheral side wall portion to reduce the situation where harmful particles are diffused into the air. The smallest. 1 9. The device according to item 13 of the scope of patent application, wherein the 27 312 / Inventory Book (Supplement) / 92-02 / 91134457 200300996 at least one anti-leakage film is a film stack including a plurality of film layers, of which at least One thin film layer is a leakproof film. 20. The device according to item 19 of the scope of patent application, wherein each thin film layer of the thin film stack has obvious protection characteristics. 2 1. According to the device in the scope of application for patent No. 20, each thin film layer of the thin film stack has obvious protection characteristics, and each is selected from the following groups: abrasion resistance, chemical resistance, heat resistance, Ultraviolet rays, fluid absorption blocking characteristics, and gas leakage blocking characteristics. 2 2. The device according to item 13 of the scope of patent application, wherein at least one anti-leak film has protection characteristics selected from the group consisting of: abrasion resistance, chemical resistance, heat resistance, UV resistance, fluid absorption Impeding characteristics and impeding air leakage characteristics. 2 3. According to the device in the scope of claim 13 of the patent application, at least one anti-leakage film is substantially composed of materials selected from the group consisting of polyester, polyimide, and polyetherimide. , Polyaryletherketone, polytetrafluoroethylene resin, ethylene propylene fluoride, polyfluorinated vinylene, polymethyl methacrylate, polyether master, polystyrene, polyphenylene sulfide. 24. The device according to item 13 of the patent application scope, wherein at least one anti-leakage film is substantially composed of polyaryletherketone. 2 5. A method for insert-molding a semiconductor processing device component film by fusion-bonding at least one leak-proof thermoplastic film to at least a portion of the thermoplastic material, including 28 312 / Inventory Book (Supplement) / 92-02 / 91134457 200300996 The following steps: forming at least one leak-proof thermoplastic film; using a molding unit having a cavity including at least one forming surface; along at least a portion of the at least one forming surface And placing the at least one formed leak-proof thermoplastic film in the cavity of the molding unit; injecting a substantially molten thermoplastic material into the cavity of the molding unit to conform to the at least one forming surface Waiting for a cooling period in which the thermoplastic material is substantially solidified to matte with at least one leak-proof thermoplastic film to produce a protective leak-proof surface on the semiconductor processing device element; and The molding unit injects the semiconductor processing device element. 26. The method according to item 25 of the scope of patent application, wherein the molding of the semiconductor processing device components forms a component part of a semiconductor wafer processing device. 27. The method according to item 26 of the patent application scope, wherein the molding of the semiconductor processing device components forms a supporting structure of the semiconductor wafer processing device, the supporting structure has a plurality of spaced-apart support frames, wherein the At least one leak-proof thermoplastic film is bonded to a portion of the partitioned support frame. 28. The method according to item 25 of the scope of patent application, wherein the 29 312 / Inventory Book (Supplement) / 92-02 / 91134457 200300996 molds a semiconductor processing device element to form a semiconductor wafer having a plurality of wafer receiving recesses The processing tray, wherein the at least one leak-proof thermoplastic film is bonded to the plurality of wafer receiving recesses to minimize the release of particles into the air during use. 29. The method of claim 25, wherein the semiconductor processing device element is molded to form a semiconductor wafer processing disc having a plurality of wafer receiving recesses and surrounding side walls, wherein the at least one leak-proof thermoplastic film It is joined to the at least part of the surrounding side wall to minimize the release of particles into the air during use. 30. The method of claim 25, wherein the formation of the at least one leak-proof thermoplastic film comprises heating and forming a multilayer film stack, wherein at least one film layer is a leak-proof thermoplastic film. 31. The method of claim 30, wherein the multilayer thin film stack includes at least two thin film layers, wherein a first layer of the at least two thin film layers has an impermeability different from a second layer of the at least two thin film layers. Leak feature. 32. The method of claim 25, wherein the forming of the at least one leak-proof thermoplastic film includes forming a substantially translucent at least one leak-proof thermoplastic film. 3 3. The method according to item 25 of the scope of patent application, wherein the at least one anti-leakage film has a protective property selected from the group consisting of 30 312 / Invention Book (Supplement) / 92-02 / 91134457 200300996 Features: abrasion resistance, chemical resistance, heat resistance, UV resistance, fluid absorption resistance, and air leakage resistance. 34. The method of claim 25, wherein forming the at least one leak-proof thermoplastic film includes forming at least one leak-proof film substantially composed of materials selected from the group consisting of: polyester , Polyalkyleneamine, polyetherimine, polyaryletherketone, polytetrafluoroethylene resin, ethylene propylene fluoride, polyfluorinated vinylene, polymethyl methacrylate, polyether master, polystyrene, poly Phenylsulfur. 35. The method of claim 25, wherein the formation of at least one anti-leakage film includes the formation of at least one anti-leakage film consisting essentially of a polyaryletherketone material. 3 6. A semiconductor wafer processing disk, comprising: a plurality of recessed portions capable of receiving semiconductor components; an external peripheral wall portion adapted to promote stackability with other semiconductor wafer processing disks; and at least one The leak-proof thermoplastic film is adhesively bonded to a plurality of recessed portions by an insert molding process to provide surface protection during use. 37. The wafer processing tray according to item 36 of the patent application scope, wherein the at least one leak-proof thermoplastic film is further molded to an outer peripheral wall portion of at least a portion of the wafer processing tray to During use, the release of particulates into the air 31 312 / Invention Story (Supplement) / 92-02 / 91134457 200300996 is minimized. 38. The wafer processing tray of item 36 in the scope of patent application, wherein the at least one anti-leak film has protective characteristics selected from the group consisting of: abrasion resistance, chemical resistance, heat resistance, Ultraviolet rays, blocking fluid absorption characteristics, and blocking gas leakage characteristics. 39. The wafer processing tray of item 36 in the scope of patent application, wherein at least one anti-leakage film is substantially translucent. 40. If the wafer processing tray of item 36 of the patent application scope, at least one anti-leakage film is substantially composed of materials selected from the group consisting of: polyester, polyalkyleneamine, polyether 醯. Imine, polyaryletherketone, polytetrafluoroethylene resin, ethylene propylene fluoride, polyfluorinated vinylene, polymethyl methacrylate, polyether master, polystyrene, and polyphenylene sulfide. 41. The wafer processing tray of item 36 in the patent application scope, wherein at least one anti-leakage film is substantially composed of polyaryletherketone. 4 2. A film insert molding system that molds at least a portion of a semiconductor device processing device with at least one leak-proof film, comprising: some substantially molten thermoplastic material used to insert at least a portion of a semiconductor Processing device forming; a molding unit having a cavity and at least one forming surface, the cavity and the at least one forming surface are adapted to receive the essence 312 / inventory book (Supplement) / 92-02 / 91134457 200300996 melting thermoplastic material Quantity; and at least one leakage-preventive film that can be inserted into the cavity along at least a portion of the at least one forming surface to permanently join some substantially molten thermoplastic during the molding process material. 4 3. The system according to item 42 of the scope of patent application, wherein the at least one anti-leakage film has protective properties selected from the group consisting of: abrasion resistance, chemical resistance, heat resistance, and UV resistance , Hinder fluid absorption characteristics, and hinder air leakage characteristics. 4 4. The system according to item 42 of the patent application scope, wherein the at least one anti-leakage film is substantially translucent. 4 5. The system according to item 42 of the scope of patent application, wherein at least one anti-leakage film is substantially composed of materials selected from the group consisting of: polyester, polyimide, polyetherimine, Polyaryletherketone, polytetrafluoroethylene resin, ethylene propylene fluoride, polyfluorinated vinylene, polymethyl methacrylate, polyether master, polystyrene, and polyphenylene sulfide. 46. The system according to item 42 of the patent application scope, wherein at least one anti-leakage film is substantially composed of polyaryletherketone. 47. A semiconductor device processing device comprising: a first thermoplastic portion of the processing device; and at least one thermoplastic dimensionally stable film that is bonded to the first thermoplastic element through a film insertion molding process. 33 312 / Invention Storybook (Supplement) / 9102/9113 Correction 57 200300996. 48. The device according to item 47 of the patent application scope, wherein the at least one thermoplastic dimensionally stable film reduces the creep of at least a portion of the first thermoplastic portion. 49. The device of claim 47, wherein at least one thermoplastic dimensionally stable film provides added stiffness benefits to at least a portion of the first thermoplastic portion. 50. The device of claim 47, wherein at least one thermoplastic dimensionally stable film provides increased hardness benefits to at least a portion of the first thermoplastic portion. 51. The device according to item 47 of the scope of patent application, wherein at least one dimensionally stable film is substantially composed of materials selected from the group consisting of: polyester, polyimide, polyetherimide, polyimide Aryl ether ketone, polytetrafluoroethylene resin, ethylene propylene fluoride, polyfluorinated vinylene, polymethyl methacrylate, polyether master, polystyrene and polyphenylene sulfide. 52. The device according to item 47 of the patent application scope, wherein at least one dimensionally stable film is substantially composed of polyaryletherketone. 34 312 / Inventive Storytelling (Supplement) / 92-02 / 91134457
TW091134457A 2001-11-27 2002-11-27 Semiconductor component handling device having a performance film TW200300996A (en)

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