US10095260B2 - Start-up circuit arranged to initialize a circuit portion - Google Patents

Start-up circuit arranged to initialize a circuit portion Download PDF

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Publication number
US10095260B2
US10095260B2 US15/736,763 US201615736763A US10095260B2 US 10095260 B2 US10095260 B2 US 10095260B2 US 201615736763 A US201615736763 A US 201615736763A US 10095260 B2 US10095260 B2 US 10095260B2
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circuit
transistors
transistor
divider
mirror
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US20180188764A1 (en
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Phil Corbishley
Sebastian Ioan Ene
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Nordic Semiconductor ASA
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Nordic Semiconductor ASA
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    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02—Regulating voltage or current
    • G05F3/08—Regulating voltage or current wherein the variable is dc
    • G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/26—Current mirrors
    • G05F3/262—Current mirrors using field-effect transistors only
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02—Regulating voltage or current
    • G05F3/08—Regulating voltage or current wherein the variable is dc
    • G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/24—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations wherein the transistors are of the field-effect type only
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02—Regulating voltage or current
    • G05F3/08—Regulating voltage or current wherein the variable is dc
    • G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/30—Regulators using the difference between the base-emitter voltages of two bipolar transistors operating at different current densities

Definitions

  • Start-up circuits are an essential building block for the construction of many integrated circuits, in particular circuits that have a number of possible stable states such as bandgap voltage reference circuits, oscillators, and flip-flops.
  • bandgap voltage reference circuits are used to provide a temperature-stable voltage reference.
  • Such a bandgap reference circuit operates using a voltage difference between two transistors operated at different current densities to produce an output voltage with low temperature dependence.
  • a silicon-based bandgap circuit will usually produce an output voltage of around 1.25 V, close to the voltage required for a charge carrier (i.e. an electron or a hole) to overcome the 1.22 eV bandgap associated with silicon at absolute zero.
  • the bandgap reference circuit is stable over a wide range of temperatures.
  • the first is what is known as the “zero operating point”, in which the voltage applied and the drain currents are all zero—a situation which is of little interest for producing a reference voltage.
  • the “non-zero operating point” exists at a finite, non-zero voltage which when applied across the gate-source interface of the two transistors, causes the same current to flow through each transistor.
  • Such a bandgap reference is stable at each of these operating points and will converge towards one or the other whenever possible. It is clear therefore that while there are two possible operating points, only the normal operating point is of interest with a view to creating a stable, non-zero reference voltage. When such a bandgap reference circuit is powered on with no external voltages applied, more often than not it will tend to stabilise at the zero operating point. A start-up circuit is therefore used in order to give the bandgap reference circuit a “kick” (i.e. an “impulse” or a “transient event”) in order to force it towards the non-zero operating point as required.
  • a start-up circuit is therefore used in order to give the bandgap reference circuit a “kick” (i.e. an “impulse” or a “transient event”) in order to force it towards the non-zero operating point as required.
  • One conventional solution is to sense the zero operating point and inject a current into a transistor of the bandgap reference circuit. This can be used to force the bandgap reference circuit to a desired operating point with relative ease, but can lead to large currents on the output of the circuit which, if connected to external circuits, may cause damage. This start-up circuitry will also draw small amounts of current, which will cause an error in the output voltage. This is particularly an issue for smaller device fabrication sizes such as 16 nm and 28 nm.
  • the present invention provides a start-up circuit arranged to initialise a circuit portion with a zero stable point and a non-zero stable point, the start-up circuit comprising:
  • a capacitive voltage divider including a first capacitor in series with a second capacitor that generates a divider bias voltage between said first and second capacitors at a divider node;
  • a differential amplifier including a first amplifier input, a second amplifier input, and an amplifier output connected to the divider node;
  • a first driver transistor arranged such that a gate terminal of the first driver transistor is connected to the divider node, and a drain terminal of the first driver transistor is connected to both a first start-up output and the first amplifier input; and a second driver transistor arranged such that a gate terminal of the second driver transistor is connected to the divider node, and a drain terminal of the second driver transistor is connected to both a second start-up output and the second amplifier input;
  • start-up circuit is arranged such that the differential amplifier controls the divider bias voltage and drives the circuit portion to the non-zero stable point.
  • the present invention provides a start-up circuit that can be used to initialise a circuit portion such as a bandgap voltage reference circuit to a desired state.
  • the capacitive voltage divider provides the initial kick to the system on power-up. Due to the voltage divider, a small divider bias voltage causes the driver transistors to open, allowing a small current to flow through each, which in turn increases the voltage applied to the amplifier inputs. The amplifier then permits a greater current to flow through itself, reducing the bias voltage (i.e. the amplifier pulls down the bias voltage), which causes the driver transistors to permit more current to flow therethrough.
  • the bias voltage i.e. the amplifier pulls down the bias voltage
  • the differential amplifier comprises a long tailed pair arrangement including first and second mirror transistors, and first and second differential pair transistors.
  • the mirror transistors are p-channel metal-oxide-semiconductor (PMOS) field-effect transistors.
  • the differential pair transistors are n-channel metal-oxide-semiconductor (NMOS) field-effect transistors. This choice of PMOS and NMOS transistors is particularly suitable for use between a positive supply rail and ground as conventional in integrated circuit design, but the invention could be implemented by reversing the transistor types and swapping the polarity of the voltage supply.
  • the first and second mirror transistors are arranged such that their respective source terminals are connected to a supply voltage and their respective gate terminals are connected together.
  • the first mirror transistor is diode-connected (i.e. its drain terminal is connected to its gate terminal).
  • the drain terminal of the first mirror transistor is connected to the drain terminal of the first differential pair transistor and the drain terminal of the second mirror transistor is connected to the drain terminal of the second differential pair transistor. This ensures that the same current flows through each “leg” of the differential amplifier.
  • the source terminals of the first and second differential pair transistors are connected to each other. In a set of embodiments, the source terminals of the first and second differential pair transistors are connected to a current source. In a set of embodiments, the current source is a current mirror.
  • the circuit comprises a current mirror output transistor arranged such that its gate terminal is connected to the divider node.
  • the drain terminal of the current mirror output transistor is connected to an external current mirror. This external current mirror provides an output current for external circuitry and mirrors the current flowing through the circuit portion.
  • FIG. 1 shows the stable points of a typical bandgap reference voltage circuit
  • FIG. 2 is a circuit diagram of a start-up circuit in accordance with an embodiment of the invention.
  • FIG. 3 is a timing diagram showing the typical operation of the start-up circuit of FIG. 2 .
  • FIG. 1 shows the stable points of a typical bandgap reference voltage circuit with two reference transistors. There are two points at which the current-voltage plots for each reference transistor meet, i.e. where for a given current density, the voltage across the transistors is the same. These are the desirable operating points where the reference voltage taken as the output has a flat temperature response.
  • FIG. 2 is a circuit diagram of a start-up circuit 2 in accordance with an embodiment of the invention.
  • the start-up circuit is configured to initialise a bandgap reference circuit 4 with the stable points illustrated in FIG. 1 .
  • the bandgap reference circuit 4 comprises a pair of n-channel metal-oxide-semiconductor (“NMOS”) field-effect transistors (“FET”s or “MOSFET” s) 6 , 8 —one transistor 8 of which is connected in series with a fixed resistor 10 via its drain terminal.
  • NMOS metal-oxide-semiconductor
  • the drain terminals of the driver transistors 12 , 14 are each connected to the respective gate terminals of NMOS differential pair transistors 20 , 22 .
  • these differential pair transistors 20 , 22 form a single-sided differential amplifier.
  • the PMOS current mirror transistors 24 , 26 are arranged such that their source terminals are connected to the supply voltage 40 , while their drain terminals are each connected to the respective drain terminals of the differential pair transistors 20 , 22 .
  • the gate terminals of the current mirror transistors 24 , 26 are connected to one another, and the drain and gate terminals of one current mirror transistor 26 are connected in order to place it in a diode-connected configuration.
  • a capacitive voltage divider is formed by two capacitors 16 , 18 which are connected between the positive supply rail 40 and ground 44 . This arrangement leads to a non-zero voltage located at the node 48 between the two capacitors.
  • the drain terminals of one of the current mirror transistors 24 and its associated differential pair transistor 20 are connected directly to the node 48 between the two capacitors 16 , 18 .
  • the node 48 is further connected to the gate terminals of the two divider transistors and of a PMOS output current mirror transistor 36 , which feeds current to a current mirror 38 , which in turn produces an output current 46 .
  • the source terminals of the differential pair transistors 20 , 22 are both connected to an NMOS current source transistor 28 , which acts as a current source for the differential amplifier. It is arranged to mirror the current passing through an NMOS transistor 30 , which itself is connected to an input current 42 .
  • a voltage difference between the two transistors 6 , 8 when operated at different current densities due to the fixed resistor 10 is used as a reference voltage by external circuits.
  • the bandgap circuit 4 is stable when operated at a point at which the two transistors 6 , 8 draw an identical drain current when the same gate-source voltage is applied to each.
  • the circuit 2 When the circuit 2 is switched on at initial time 100 , there is a time-varying component on the supply voltage 40 and thus the input current 42 due to the transient response of the circuit. While the capacitors 16 , 18 are effectively open circuit to DC (i.e. non-time-varying) signals, they provide charge injection due to the resulting time-varying voltage.
  • the voltage at the node 48 is determined—at least initially when the transistors connected thereto are “off”—by the magnitude of the time-varying voltage present on the supply rail, multiplied by the ratio of the capacitance of capacitor 16 to the total capacitance of both capacitors 16 , 18 combined.
  • each of the driver transistors 12 , 14 Since the voltage at the node 48 is necessarily smaller than the supply voltage 40 , there is a negative gate-source voltage applied across the two driver transistors 12 , 14 . This causes each of the driver transistors 12 , 14 to switch “on” and conduct a small current 52 , 54 respectively (only the current 52 through driver transistor 12 is shown for illustrative purposes).
  • driver transistors 12 , 14 conduct more current, their drain terminals are driven to increasingly higher voltages, which drives the voltage applied at the gate terminals of the differential pair transistors 20 , 22 to higher voltages accordingly. This increases the gate-source voltage of each of the differential pair transistors 20 , 22 , causing them to switch on and also begin conducting current 50 , 56 .
  • the driver transistors 12 , 14 Since the voltage at the node 48 is then reduced, the driver transistors 12 , 14 have a yet higher negative gate-source voltage applied to them, and thus conduct yet more current.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Power Engineering (AREA)
  • Control Of Electrical Variables (AREA)
US15/736,763 2015-06-16 2016-06-16 Start-up circuit arranged to initialize a circuit portion Active US10095260B2 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
GB1510554.7A GB2539446A (en) 2015-06-16 2015-06-16 Start-up circuits
GB1510554.7 2015-06-16
PCT/GB2016/051790 WO2016203237A1 (fr) 2015-06-16 2016-06-16 Circuits de démarrage

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US20180188764A1 US20180188764A1 (en) 2018-07-05
US10095260B2 true US10095260B2 (en) 2018-10-09

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US15/736,763 Active US10095260B2 (en) 2015-06-16 2016-06-16 Start-up circuit arranged to initialize a circuit portion

Country Status (8)

Country Link
US (1) US10095260B2 (fr)
EP (1) EP3308240B1 (fr)
JP (1) JP2018517990A (fr)
KR (1) KR20180018759A (fr)
CN (1) CN107743602B (fr)
GB (1) GB2539446A (fr)
TW (1) TW201702786A (fr)
WO (1) WO2016203237A1 (fr)

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Publication number Priority date Publication date Assignee Title
US11036247B1 (en) * 2019-11-28 2021-06-15 Shenzhen GOODIX Technology Co., Ltd. Voltage regulator circuit with high power supply rejection ratio
JP7451314B2 (ja) * 2020-06-12 2024-03-18 日清紡マイクロデバイス株式会社 バイアス電流発生回路
DE102021134256A1 (de) 2021-12-22 2023-06-22 Infineon Technologies Ag Start-up-Schaltung

Citations (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4956618A (en) 1989-04-07 1990-09-11 Vlsi Technology, Inc. Start-up circuit for low power MOS crystal oscillator
US5087830A (en) * 1989-05-22 1992-02-11 David Cave Start circuit for a bandgap reference cell
US6133719A (en) 1999-10-14 2000-10-17 Cirrus Logic, Inc. Robust start-up circuit for CMOS bandgap reference
US6242898B1 (en) 1999-09-14 2001-06-05 Sony Corporation Start-up circuit and voltage supply circuit using the same
US20040113709A1 (en) * 2002-12-11 2004-06-17 Dialog Semiconductor Gmbh. High quality parallel resonance oscillator
US20040124823A1 (en) 2002-12-30 2004-07-01 Robert Fulton Low power start-up circuit for current mirror based reference generators
US20040257150A1 (en) * 2003-06-20 2004-12-23 Farooqui Arshad Suhail Bandgap reference voltage generator
US20050218988A1 (en) * 2002-05-16 2005-10-06 Koninklijke Philips Electronics N.V. Power amplifier end stage
US20060091955A1 (en) * 2004-09-24 2006-05-04 Yoon-Kyung Choi Circuits and methods for improving slew rate of differential amplifiers
US20060197584A1 (en) 2005-03-03 2006-09-07 Etron Technology, Inc. Speed-up circuit for initiation of proportional to absolute temperature biasing circuits
US7148672B1 (en) 2005-03-16 2006-12-12 Zilog, Inc. Low-voltage bandgap reference circuit with startup control
GB2430766A (en) 2005-09-30 2007-04-04 Texas Instruments Inc Band-gap voltage reference start up circuit
US20070164722A1 (en) 2006-01-17 2007-07-19 Rao T V Chanakya Low power beta multiplier start-up circuit and method
US20070194770A1 (en) 2006-02-17 2007-08-23 Vignesh Kalyanaraman Low voltage bandgap reference circuit and method
US20070200616A1 (en) * 2006-02-28 2007-08-30 Hynix Semiconductor Inc. Band-gap reference voltage generating circuit
US20110006749A1 (en) * 2009-07-08 2011-01-13 Dialog Semiconductor Gmbh Startup circuit for bandgap voltage reference generators
US20150349734A1 (en) * 2014-06-03 2015-12-03 Texas Instruments Incorporated Differential amplifier with high-speed common mode feedback

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CN100514249C (zh) * 2007-12-14 2009-07-15 清华大学 一种带隙基准源产生装置
JP2010033448A (ja) * 2008-07-30 2010-02-12 Nec Electronics Corp バンドギャップレファレンス回路
CN104062999A (zh) * 2013-03-21 2014-09-24 中国人民解放军理工大学 自启动高匹配带隙基准电压源芯片设计
CN103218008A (zh) * 2013-04-03 2013-07-24 中国科学院微电子研究所 具有自动调整输出电压的全cmos带隙电压基准电路
CN103869867B (zh) * 2014-03-04 2015-06-03 芯原微电子(上海)有限公司 一种斩波带隙基准电路
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Patent Citations (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4956618A (en) 1989-04-07 1990-09-11 Vlsi Technology, Inc. Start-up circuit for low power MOS crystal oscillator
US5087830A (en) * 1989-05-22 1992-02-11 David Cave Start circuit for a bandgap reference cell
US6242898B1 (en) 1999-09-14 2001-06-05 Sony Corporation Start-up circuit and voltage supply circuit using the same
US6133719A (en) 1999-10-14 2000-10-17 Cirrus Logic, Inc. Robust start-up circuit for CMOS bandgap reference
US20050218988A1 (en) * 2002-05-16 2005-10-06 Koninklijke Philips Electronics N.V. Power amplifier end stage
US20040113709A1 (en) * 2002-12-11 2004-06-17 Dialog Semiconductor Gmbh. High quality parallel resonance oscillator
US20040124823A1 (en) 2002-12-30 2004-07-01 Robert Fulton Low power start-up circuit for current mirror based reference generators
US20040257150A1 (en) * 2003-06-20 2004-12-23 Farooqui Arshad Suhail Bandgap reference voltage generator
US20060091955A1 (en) * 2004-09-24 2006-05-04 Yoon-Kyung Choi Circuits and methods for improving slew rate of differential amplifiers
US20060197584A1 (en) 2005-03-03 2006-09-07 Etron Technology, Inc. Speed-up circuit for initiation of proportional to absolute temperature biasing circuits
US7148672B1 (en) 2005-03-16 2006-12-12 Zilog, Inc. Low-voltage bandgap reference circuit with startup control
GB2430766A (en) 2005-09-30 2007-04-04 Texas Instruments Inc Band-gap voltage reference start up circuit
US20070164722A1 (en) 2006-01-17 2007-07-19 Rao T V Chanakya Low power beta multiplier start-up circuit and method
US20070194770A1 (en) 2006-02-17 2007-08-23 Vignesh Kalyanaraman Low voltage bandgap reference circuit and method
US20070200616A1 (en) * 2006-02-28 2007-08-30 Hynix Semiconductor Inc. Band-gap reference voltage generating circuit
US20110006749A1 (en) * 2009-07-08 2011-01-13 Dialog Semiconductor Gmbh Startup circuit for bandgap voltage reference generators
US20150349734A1 (en) * 2014-06-03 2015-12-03 Texas Instruments Incorporated Differential amplifier with high-speed common mode feedback

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
International Search Report and Written Opinion for PCT/GB2016/051790, dated Sep. 26, 2016, 11 pages.
Search Report under Section 17(5) for GB1510554.7, dated Jan. 21, 2016, 3 pages.

Also Published As

Publication number Publication date
GB201510554D0 (en) 2015-07-29
TW201702786A (zh) 2017-01-16
EP3308240A1 (fr) 2018-04-18
WO2016203237A1 (fr) 2016-12-22
CN107743602B (zh) 2019-11-15
GB2539446A (en) 2016-12-21
EP3308240B1 (fr) 2018-12-12
KR20180018759A (ko) 2018-02-21
CN107743602A (zh) 2018-02-27
JP2018517990A (ja) 2018-07-05
US20180188764A1 (en) 2018-07-05

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