TWM541118U - 無引腳網格陣列導線架預成形體及導線架封裝結構 - Google Patents
無引腳網格陣列導線架預成形體及導線架封裝結構 Download PDFInfo
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- 238000004806 packaging method and process Methods 0.000 title description 2
- 235000012431 wafers Nutrition 0.000 claims description 77
- 239000010410 layer Substances 0.000 claims description 39
- 239000000758 substrate Substances 0.000 claims description 28
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- 239000002861 polymer material Substances 0.000 claims description 8
- 238000000034 method Methods 0.000 claims description 7
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- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 4
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- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 2
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- 229910052763 palladium Inorganic materials 0.000 description 2
- 229910001030 Iron–nickel alloy Inorganic materials 0.000 description 1
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- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
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Description
本新型是有關於一種導線架預成形體及導線架封裝結構,特別是指一種無引腳網格陣列導線架預成形體,及含有該無引腳網格陣列導線架預成形體的導線架封裝結構。
參閱圖1,美國專利第US8652879 B2公告號公開一種無引腳網格陣列導線架封裝結構。其主要是利用在一導電基板112上電鍍形成多個彼此間隔的晶片座(die pads)122及多個接觸墊(contact pads)124,接著將晶片(die)132設置於該等晶片座122上。然後利用導線(wire)134將該等晶片132與接觸墊124電連接;接著,再利用一由絕緣高分子材料所構成的封裝膠層142將該等晶片132包覆封裝,最後,將該基板112移除並切單,即可得到獨立的晶片封裝結構。
然而前述結構,因為形成的該等晶片座122與該導電基板112的表面間會有一高度落差,而在導線架封裝密度要求越來越高的狀況下,晶片座122的尺寸也越來越小,因此當該等晶片座122的尺寸微縮至小於該等晶片132的尺寸時,設置於該等晶片座122上的晶片132在後續製程時容易因為該晶片座122的面積較小,支撐平穩性不佳,而容易會有傾倒或位移的缺點。
因此,本新型之目的,即在提供一種可預防晶片傾倒的無引腳網格陣列導線架預成形體。
於是,本新型該無引腳網格陣列導線架預成形體,包括一個基板、多個導線架單元、一成形膠層,及多個接觸墊。
該基板由導電材料構成。
該等導線架單元由導電材料構成,設置於該基板表面且彼此間隔,每一個導線架單元具有至少一晶片座及多個與該至少一晶片座間隔且各自不相連接的導電墊,且各導電墊及各晶片座分別具有一反向該基板的頂面。
該成形膠層由絕緣高分子材料構成,形成於該基板表面並填置於相鄰的該等導線架單元的間隙及該每一個導線架單元的該至少一晶片座與該等導電墊的間隙,該成形膠層具有一反向該基板的頂面,且該成形膠層的頂面與該等晶片座及該等導電墊的頂面齊平。
該等接觸墊由導電材料構成,且每一個接觸墊形成於相應的每一個晶片座的頂面。
此外,本新型的另一目的,在於提供一種利用前述該無引腳網格陣列導線架預成形體封裝而得的導線架封裝結構。
於是,該導線架封裝結構包括一成形膠層、多個導線架單元、多個接觸墊、多個晶片、多條導線,及一封裝膠層。
該成形膠層具有彼此反向的一頂面及一底面。
該等導線架單元由導電材料構成,彼此間隔地嵌設於該成形膠層內,每一個導線架單元具有至少一晶片座及多個與該至少一晶片座間隔且各自不相連接的導電墊,該至少一晶片座及各導電墊分別具有彼此反向的一頂面及一底面,且該等導電墊及該至少一晶片座的頂面及底面會分別與該成形膠層的該頂面及該底面齊平。
該等接觸墊由導電材料構成,且每一個接觸墊形成於對應的其中一晶片座的頂面。
每一個晶片為設置於相應的其中一接觸墊上。
每一條導線分別與其中一晶片及其中一導電墊電連接。
該封裝膠層由絕緣高分子材料構成,且與該成形膠層於不同製程形成,包覆該等晶片、導線及該成形膠層的該頂面。
本新型之功效在於:利用於每一個導線架單元的間隙填覆成形膠層,讓晶片座與周圍的非導電區域無高低落差,而可讓後續封裝的晶片可更穩定的封置於晶片座。此外本新型還提供一種利用該無引腳網格陣列導線架預成形體封裝而得的導線架封裝結構。
參閱圖2、3,圖2是本新型無引腳網格陣列導線架預成形體200的一實施例的俯視示意圖,圖3是圖2中III-III割面線的剖視圖。
該無引腳網格陣列導線架預成形體200包含一個基板2、多個導線架單元3、一成形膠層4,及多個接觸墊5。
該基板2是由例如金屬或合金金屬等導電材料所構成。具體的說,該基板2可選自銅、銅系合金或鐵鎳合金,但不限於此。
該等導線架單元3由導電材料構成,設置於該基板2表面21且彼此間隔。詳細的說,該等導線架單元3為成陣列排列方式間隔設置於該基板2的表面21。每一個導線架單元3具有一晶片座31及多個位於該晶片座31外圍與該晶片座31間隔且各自不相連接的導電墊32,且各晶片座31及各導電墊32分別具有一反向該基板2的頂面311、321,及一與該基板2連接的底面312、322。且該等導電架單元3的每一個晶片座31及導電墊32分包含多層導電層33。要說明的是,該導電層33可以配合後續封裝需裝而可以為單層或是多層,且各層的材料可部分相同或不同。於本實施例中,是以該等晶片座31及該等導電墊32分別具有4層(金/鈀/鎳/鈀)導電層33為例說明。
該成形膠層4由高分子絕緣材料,例如環氧樹脂所構成,形成於該基板2表面21並填置於相鄰的該等導線架單元3的間隙及該每一個導線架單元3的該晶片座31與該等導電墊32的間隙。該成形膠層4具有一反向該基板2的頂面41及一與該基板2連接的底面42,且該成形膠層4的頂面41與該等晶片座31及該等導電墊32的頂面311、321齊平。
該等接觸墊5由導電材料構成,且每一個接觸墊5形成於相應的每一個晶片座31的頂面311,用於供後續與晶片電連接。
此外,參閱圖4,本新型無引腳網格陣列導線架預成形體200的該實施例的該每一個導線架單元3也可具有多個彼此不相連接的晶片座31;且該等導電墊32也可以是以單排或多排的排列方式設置於該等晶片座31的外圍。圖4是以該每一個導線架單元3具有多個彼此不相連接的晶片座31,且該等導電墊32以多排排列方式環圍該等晶片座31說明。
配合參閱圖3、圖5,前述該無引腳網格陣列導線架預成形體200可進一步進行晶片封裝,而得到一導線架封裝結構300。
該導線架封裝結構300的實施例具有一如該圖3所述的無引腳網格陣列導線架預成形體200、多個晶片6、多條導線7,及一封裝膠層8。
其中,每一個晶片6為設置於該無引腳網格陣列導線架預成形體200的該每一個導線架單元3相應的其中一接觸墊5上,且該每一個晶片6具有多個用以對外電連接的連接墊(圖未示),該等導線7是由導電材料所構成,分別連接該等晶片6晶與相應的該等接觸墊5,用以令該等晶片6與該等接觸墊5電連接。該封裝膠層8由絕緣高分子材料構成,是於該等晶片6及該等導線7設置完成後才覆蓋於該等晶片6、該等導線7及該成形膠層4露出的頂面41,與該成形膠層4是在不同製程所形成,因此,該封裝膠層8的構成材料可選擇與該成形膠層4的材料相同或不同。
當要將前述該導線架封裝結構300與一電路板(圖未示)電連接時,則進一步將該基板2移除至該等成形膠層4的底面42、該等晶片座31的底面312及該等導電墊32的底面322露出,得到如圖6所示之導線架封裝結構300A,即可利用該等晶片座31及該等導電墊32露出的底面312、322與該電路板電連接。
綜上所述,本新型該無引腳網格陣列導線架預成形體利用預成型方式於該等導線架單元3的間隙預先填置由絕緣高分子材料所構成並與晶片座31等高的該成形膠層4,因此,可避免因為該等晶片座31的高度與周圍的高低落差較大,所導致當該晶片座31面積小於該晶片6時,支撐度不足或不平穩的缺點;且該成形膠層4還可用於支撐該等導線7,減少導線7坍塌斷線的問題,故確實能達成本新型之目的。
惟以上所述者,僅為本新型之實施例而已,當不能以此限定本新型實施之範圍,凡是依本新型申請專利範圍及專利說明書內容所作之簡單的等效變化與修飾,皆仍屬本新型專利涵蓋之範圍內。
200‧‧‧無引腳網格陣列導線架預成形體
33‧‧‧導電層
2‧‧‧基板
4‧‧‧成形膠層
21‧‧‧表面
41‧‧‧頂面
3‧‧‧導線架單元
42‧‧‧底面
31‧‧‧晶片座
5‧‧‧接觸墊
311‧‧‧頂面
6‧‧‧晶片
312‧‧‧底面
7‧‧‧導線
32‧‧‧導電墊
8‧‧‧封裝膠層
321‧‧‧頂面
300、300A‧‧‧導線架封裝結構
322‧‧‧底面
本新型之其他的特徵及功效,將於參照圖式的實施方式中清楚地呈現,其中: 圖1是習知的無引腳網格陣列導線架封裝結構的一製作流程示意圖; 圖2是本新型無引腳網格陣列導線架預成形體200的實施例的一俯視示意圖; 圖3是圖2中沿III-III割面線的剖視示意圖; 圖4是本新型無引腳網格陣列導線架預成形體200的該實施例的另一態樣結構示意圖; 圖5是本新型導線架封裝結構300的結構示意圖; 圖6本新型導線架封裝結構300A的結構示意圖。
200‧‧‧無引腳網格陣列
導線架預成形體
321‧‧‧頂面
2‧‧‧基板
322‧‧‧底面
21‧‧‧表面
33‧‧‧導電層
3‧‧‧導線架單元
4‧‧‧成形膠層
31‧‧‧晶片座
41‧‧‧頂面
311‧‧‧頂面
42‧‧‧底面
312‧‧‧底面
5‧‧‧接觸墊
32‧‧‧導電墊
Claims (7)
- 一種無引腳網格陣列導線架預成形體,包括 一個基板,由導電材料構成; 多個導線架單元,由導電材料構成,設置於該基板表面且彼此間隔,每一個導線架單元具有至少一晶片座及多個與該至少一晶片座間隔且各自不相連接的導電墊,且各導電墊及各晶片座分別具有一反向該基板的頂面; 一成形膠層,由絕緣高分子材料構成,形成於該基板表面並填置於相鄰的該等導線架單元的間隙及該每一個導線架單元的該至少一晶片座與該等導電墊的間隙,該成形膠層具有一反向該基板的頂面,且該成形膠層的頂面與該等晶片座及該等導電墊的頂面齊平;及 多個接觸墊,由導電材料構成,且每一個接觸墊形成於相應的每一個晶片座的頂面。
- 如請求項1所述的無引腳網格陣列導線架預成形體,其中,該每一個導線架單元具有多個彼此不相連接的晶片座。
- 如請求項1所述的無引腳網格陣列導線架預成形體,其中,該每一個導線架單元的該至少一晶片座及該等導電墊分別具有多層導電層。
- 一種導線架封裝結構,包含: 一成形膠層,由絕緣高分子材料構成,具有彼此反向的一頂面及一底面; 多個導線架單元,由導電材料構成,彼此間隔地嵌設於該成形膠層內,每一個導線架單元具有至少一晶片座及多個與該至少一晶片座間隔且各自不相連接的導電墊,該至少一晶片座及各導電墊分別具有彼此反向的一頂面及一底面,且該等導電墊及該至少一晶片座的頂面及底面會分別與該成形膠層的該頂面及該底面齊平; 多個接觸墊,由導電材料構成,且每一個接觸墊形成於對應的其中一晶片座的頂面; 多個晶片,每一個晶片為設置於相應的其中一接觸墊上; 多條導線,每一條導線分別連接其中一晶片及其中一導電墊; 一封裝膠層,由絕緣高分子材料構成,且與該成形膠層於不同製程形成,包覆該等晶片、該等導線及該成形膠層的該頂面。
- 如請求項4所述的導線架封裝結構,還包含一基板,該基板與該成形膠層、該等晶片座及該等導電墊的底面相連接。
- 如請求項4所述的導線架封裝結構,其中,該每一個導線架單元具有多個彼此不相連接的晶片座。
- 如請求項4所述的導線架封裝結構,其中,該每一個導線架單元的該至少一晶片座及該等導電墊分別具有多層導電層。
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TW106201265U TWM541118U (zh) | 2017-01-24 | 2017-01-24 | 無引腳網格陣列導線架預成形體及導線架封裝結構 |
JP2017002035U JP3211532U (ja) | 2017-01-24 | 2017-05-09 | リードフレームの予備成形体及びリードフレームパッケージ |
US15/591,552 US10373886B2 (en) | 2017-01-24 | 2017-05-10 | Preformed lead frame and lead frame packaged structure including the same |
MYPI2017701941A MY183590A (en) | 2017-01-24 | 2017-05-26 | Preformed lead frame and lead frame packaged structure including the same |
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US8492906B2 (en) * | 2006-04-28 | 2013-07-23 | Utac Thai Limited | Lead frame ball grid array with traces under die |
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- 2017-05-09 JP JP2017002035U patent/JP3211532U/ja not_active Expired - Fee Related
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JP3211532U (ja) | 2017-07-20 |
MY183590A (en) | 2021-02-27 |
US10373886B2 (en) | 2019-08-06 |
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