TWM436298U - Printed circuit boards - Google Patents

Abstract

Methods of manufacturing printed circuit boards using parallel processes to interconnect with subassemblies are provided. In one embodiment, the invention relates to a method of manufacturing a printed circuit board including providing a core subassembly including at least one metal layer, providing a plurality of one-metal layer carriers after parallel processing each of the plurality of one-metal layer carriers, and attaching at least two of the plurality of one-metal layer carriers with each other and with the core subassembly.

Description

M436298 V. New description: Type C belongs to Dongyue Zhenzhen ^^] New field This new type is about printed circuit boards, which are generally related to printed circuit boards and their manufacturing methods, and more systematically related to the use of parallel processing interconnects. Printed circuit board manufacturing method for sub-components. C Good winter; 3 New background The electronic system of the big eve includes a printed circuit board with two-density electronic interconnection. A printed circuit board (PCB) can include one or more circuit cores 'substrate or carrier. In a manufacturing process for a printed circuit board having the one or more circuit carriers, electronic circuits (eg, pads, electronic interconnects, etc.) are fabricated on opposite sides of a separate circuit carrier to form A pair of circuit layers. These circuit layer pairs of the circuit board can then be laminated by pressing an adhesive (or a prepreg or a bonding polymer) to laminate the sinusoidal circuit layer and the adhesive. The circuit board is constructed by drilling through holes and then plating the vias with a copper material to interconnect the circuit layers to form a physical or electronic connection to form the printed circuit board. The curing process is used to cure the adhesive to provide a permanent physical bond to the board construction. However, the adhesive generally shrinks significantly during the curing process. This shrinkage, coupled with later through hole drilling and plating procedures, can result in considerable stresses in the overall construction, which can result in damage between the circuit layers. Therefore, there is a need in the industry for materials and related procedures that can compensate for this shrinkage and provide a reliable electronic connection between the circuit layers and the stress-free 3 ivmo. In addition, the penetration or via plating of copper material requires additional, mussel and time consuming processing procedures that cannot be performed in a fast and flexible manner. The 'Fig.' is a sequential lamination process for manufacturing a printed circuit board having laminated vias' which includes an up-and-down sequential lamination and surface steps. Therefore, the industry is able to quickly and materially manufacture and/or be able to secure the alignment of interconnects on a printed circuit board by reducing the weight of the program.

Printed circuit boards and their manufacturing methods that reduce the manufacturing time and cost have a demand... C Remaining Content_] New Overview

The present invention is directed to a printed circuit board in accordance with an embodiment of the present invention: a printed circuit that is related to and intended to use parallel processing of interconnected sub-assemblies; The present invention provides an embodiment of a method for manufacturing a printed circuit board. The method includes providing - at least one assembly of a metal layer carrier, and a single gold in a single-golden system in parallel. The layer carrier is then provided with a single-gold carrier, the plurality of single-metal layer carriers of the plurality of single-metal layer carriers, wherein at least one of the parallel processing comprises imaging the photoresist onto at least a portion of the substrate, the substrate The at least one portion of the at least one layer (four) on the surface of the substrate H; the substrate having the j V layer copper > from the portion; the at least one layer of the photoresist to expose at least the layer (four) at least a part, by which at least - (4) an outline is formed; a laminated lacquer plus a second surface of the substrate; a silk-protective P film to the layer of the secret agent; formed in the second surface of the interesting substrate; M436298 microvias to expose the at least one copper foil liner; filling the conductive paste into the at least one microvia; and removing the protective film to expose the laminated adhesive on the substrate for adhesion, And bonding at least two of the plurality of single metal layer carriers to each other And subassemblies attached to the core adhesion.

Another embodiment of the present invention provides a method of fabricating a printed circuit board, the method comprising providing a core material assembly including at least one metal layer carrier, after processing each of the plurality of single metal layer carriers in parallel Providing a plurality of single metal layer carriers, wherein parallel processing of at least one of the plurality of single metal layer carriers comprises imaging the photoresist onto at least a portion of a substrate, the at least a portion of the substrate having the At least one copper foil on the first surface of the substrate; etching the substrate to have at least one portion of the copper foil; removing at least one layer of photoresist to expose at least a portion of the at least one copper foil, thereby forming at least one copper foil a pad; applying a laminating adhesive to the second surface of the substrate; applying a protective film to the laminating adhesive; forming at least one microvia in the second surface of the substrate to expose the at least a copper foil liner; filling a conductive paddle into the at least one microvia; and removing the protective film to expose the substrate for adhesion Attaching a laminating adhesive, at least two of the plurality of single metal layer carriers are adhered to each other and adhered to the first surface of the core material assembly; and at least two of the plurality of single metal layer carriers Adhered to each other and adhered to the core sub-assembly. Yet another embodiment of the present invention provides a method of fabricating a printed circuit board, the method comprising: providing a total of 5 M436298 of a core material comprising at least one metal layer carrier, and processing each of the plurality of single metal layer carriers in parallel After the carrier, the plurality of single metal layer carriers are adhered to each other to form a first subassembly, wherein parallel processing of at least one of the plurality of single metal layer carriers includes imaging the photoresist onto a substrate At least a portion of the substrate having at least one copper foil formed on the first surface of the substrate; the substrate having the at least one layer of copper foil; the at least one photoresist removed Exposing at least a portion of the at least one layer of copper foil to form at least one copper foil liner; applying a laminating adhesive to the second surface of the substrate; applying a protective film to the laminating adhesive; Forming at least one microvia in the second surface to expose the at least one copper foil liner; filling the conductive slurry into the at least one microvia; Removing the protective film to expose a laminating adhesive on the substrate for adhering, and after processing the plurality of single metal layer carriers in each of the single metal layer carriers in parallel, bonding the plurality of single metal layer carriers to each other to A second subassembly is formed, the first assembly is adhered to one of the first surfaces of the core subassembly, and the second subassembly is adhered to the second surface of the core subassembly. BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 is a flow diagram of a sequential lamination process for fabricating a printed circuit board having a laminate pass, including sequential lamination and plating steps. Figure 2 is a flow diagram of a sequential lamination process for fabricating a printed circuit board having laminated vias in accordance with an embodiment of the present invention, including a separate lamination process. 3a-3g show a procedure for fabricating a 6 single metal layer substrate for a separate lamination cycle with stacked (or staggered) microvias, in accordance with an embodiment of the present invention In the handler. Figure 4a is a cross-sectional exploded view of a hybrid printed circuit board according to an embodiment of the present invention, comprising four etched single metal layer substrates of 3a to 3g and two untouched The engraved single metal layer substrate sandwiches a core sub-assembly. Figure 4b is a cross-sectional exploded view of a hybrid printed circuit board according to one embodiment of the present invention, comprising six etched single metal layer substrates shown in Figure 3g sandwiching a core material Assembly. Figure 4c is a cross-sectional exploded view of a hybrid printed circuit board according to one embodiment of the present invention, comprising six single metal layer substrates in a pre-compressed form as shown in Figure 3g. Core material sub-assembly. Figure 5 is a cross-sectional view of the completed hybrid printed circuit board of Figure 4b or 4c. Figure 6 is a cross-sectional view of a hybrid printed circuit board according to an embodiment of the present invention, comprising an external hybrid layer sandwiching two single sides on a side of a four-layer metal core assembly Metal layer substrate. Figure 7 is a cross-sectional view of a hybrid printed circuit board according to an embodiment of the present invention, comprising a hybrid layer adhered to two single metal layer bases sandwiching a four-layer metal core assembly One of the materials. Figure 8 is a cross-sectional view of a hybrid printed circuit board according to an embodiment of the present invention, comprising six single metal layer substrates shown in Figure 3g sandwiching a core material including an active device Sub-assembly. Figure 9 is a cross-sectional view of a hybrid printed circuit M436298 according to an embodiment of the present invention, comprising six single metal substrate substrates shown in Figure 3g, including a core of the active device Material sub-assembly. Figure 10 is a cross-sectional view of a k of a hybrid printed circuit board in accordance with an embodiment of the present invention including a cut-away region separating the flexible portion of the assembly from the rigid portion. [Implementation of the cold type] Detailed Description In the following detailed description, a practical example of the present invention will be shown and described by the drawings. As can be appreciated by those skilled in the art, the described embodiments can be modified in various ways without departing from the spirit and scope of the present invention. Accordingly, the drawings and description are to be regarded as illustrative rather than limiting. The components in the embodiments having the "," or "not shown" are not to be considered in the present description because the components are not necessary for a comprehensive understanding of the present invention. The same reference numerals represent the same elements. Figure 2 is a flow diagram of a process for making a transfer plate having a stack of through holes, in accordance with an embodiment of the present invention, the process comprising - an early layup. In the second step, the single-layer lamination process of Figure 2 essentially includes fewer processing steps. More specifically, the single-layer process of Figure 2 eliminates some of the steps used to fabricate multilayer printed circuit boards. The sequence of the sequence of the steps required for the process of the single-phase process for the manufacture of the board is described in US Patent No. 7,523,545 and U.S. Provisional Patent Application Serial No. (8)(7). The complete content of each case is incorporated by reference. 8 M436298 In the flow chart shown in Figure 2, the program implements some steps related to the printed circuit _ processing. In other implementations, _ use other suitable Printed circuit board technology, in place of the one shown in the drawings, includes conventional printed circuit board manufacturing techniques. In some embodiments, the program does not perform all of the operations described. In other embodiments, The program then performs additional operations. In the embodiment, the program performs the operations in a different order than the display. In some embodiments, the program performs certain jobs simultaneously. In an embodiment In the process, the procedure proceeds directly from "stacking and laminating, to "final finished product," in one embodiment, "developing, plating, stripping, etching, stripping, "development, shafting, stripping" force 〇 to replace. Figures 3a to 3g show a procedure for fabricating a single metal layer substrate for an early single lamination cycle or treatment with stacked (or staggered) microvias in accordance with an embodiment of the present invention. Program order. As shown in Figure 3a, a double-sided substrate or carrier was prepared. The substrate 10 includes a copper foil 1 〇a formed on the opposite side or surface of the substrate, and a core material 100b made of metal, ceramic or insulating material (for example, FR4, liquid crystal polymer (LCP) ), Thermount, Bismuthmine-Triazabenzene (BT), GPY, such as Teflon, heat-conducting carbon (stabiec〇r), halogen-free insulating materials, etc. GPY is a laminate that is not of the FR4 type such as polyamine, such as Kapton polyimide film, aziridine hardened epoxy, bismalimide, and other electrical grade laminates. However, 'the present invention is not limited to this'. For example, in one embodiment of the present invention, a single core material or substrate is used, and a copper foil (for example, a single layer film) is formed only on one side of the substrate. . In other embodiments, 9 M436298 can be used with other suitable substrates and conductive layer materials. In the embodiment shown in Figure 3a, the substrate has a thickness ranging from 3 to 4 mils (mil, thousandths of a mil) (or about 3 to 4 mils). However, in other embodiments The substrate and other components can have other suitable dimensions. In Figure 3b, two layers of photoresist 20 are imaged onto the substrate 10. Herein, the two-layer photoresist is shown directly imaged (or printed) by laser onto one side (i.e., the bottom side) of the substrate. However, the present invention is not limited to this. For example, the two layer photoresist can be imaged using any suitable printing method such as optical, screen, offset, ink jet, and the like. In one embodiment, more or less than two layers of photoresist can be imaged onto the substrate. In the 3c figure, except for the portion of the copper foil 1A covered by the two layers of photoresist 2, the copper is removed from the substrate, and then the portion covered by the coating is removed. 'In order to expose the corresponding copper lining 1 i. However, this novel is not limited to this. For example, in another embodiment of the present invention, a single metal layer carrier (e.g., one or more single-sided circuits) is formed by a preparation-gold plate (e.g., a residual steel plate). In terms of more details about the procedure for using the metal sheet, a thin copper is called a fast-to-side or more or more or more layered metal sheet applied to the metal sheet or More money is imaged (eg, negative film forming chamber I and then stripping photoresist: two more chambers are then used to form one or more steel foil liners for one or more layers of 10 M436298 more circuit layers) In addition, one or more prepreg systems are applied to the copper foil liners to laminate the prepregs and the metal sheets. The prepregs are then hardened. Laminated and hardened with a metal layer filled with a copper foil liner and a copper thin plating layer. The copper foil liner is then stripped with the copper thin coating and the hardened prepreg, and then removed by etching. The copper is thinly plated to expose a copper foil liner on the hardened prepreg. The circuit layer comprising the copper foil pads (eg, a pad or a circuit layer including a copper pad) Once formed, one of the protective films shown in Figure 3 (or A Mylar sheet 40 is attached to the substrate by laminating an adhesive (or a prepreg or an uncured prepreg) 30 between the Mylar sheet 40 and the core 10b. (or hardened prepreg) core material l〇b. In Fig. 3d, the protective layer or cisturbus anal sheet 4 is attached to the substrate with two copper foils The other side of the liner 1 side. However, the present invention is not limited to this case using only Mylar sheets, and it can be made of any other suitable material, such as polyester, oriented polypropylene, polyvinyl fluoride, poly Ethylene, high density polyethylene, polyethylene 2,6 naphthalate, pac〇thane, polydecylpentene or a combination thereof. In Figure 3e, a via or micro via 50 is formed on the substrate. 1〇 (or hardened prepreg). Each microvia 50 is drilled in a diameter of the substrate 1 (or hardened prepreg) by laser drilling (and/or mechanical drilling). Holes ranging from 4 to 10 mils (or about 4 to 10 mils) are formed. In other embodiments, microvias having other suitable diameters can be used. The vias or microvias can be generated using a photoimageable dielectric process, a plasma process sequence, an imprint process, or other suitable via generation process. In Figure 3f, a conduction The slurry (or ink) 6 is filled into microvias 50 each formed in the substrate 1 (or hardened prepreg), and in the 3g diagram, the Mylar sheet 40 is subsequently stripped to form a A single metal layer carrier 70 is used for lamination and lamination. In other embodiments, the metal layer carrier can include additional layers or germanium components. In an embodiment, for example, the metal layer carrier can include the use of a special layer or Lamination is performed to implement a buried resistor or a buried electrical valley. The metal layer carrier can also include surface treatment including, but not limited to, organometallic 'immersion gold' immersion in silver, immersion tin, and/or Apply outer copper before sticking. These surface treatments can improve electron and thermal conductivity. The metal layer supports can be laminated using a variety of different laminating machines including, but not limited to, all laminating presses, a laminating press, a hot rolling laminator, a vacuum laminator, a fast Laminating embossing machine, or other suitable laminating machine. Figure 4a is a cross-sectional exploded view of a hybrid printed circuit board 100-1 according to an embodiment of the present invention, the printed circuit board including four single metal layer substrates shown in Figures 3a to 3g The crucible and the two unetched single metal layer substrates 70-2 sandwich a core subassembly 丨〇2. The outer single metal layer substrate or the unetched substrate 70-2 has an unetched copper layer on its outer surface. The core subassembly 102 has four metal layers formed using a lamination process and two electric ore or filled through holes 104. In other embodiments, the core subassembly 102 includes more or less than two through holes including through holes and/or micro vias. The single metal layer substrate or carrier (704, 70-2) each 12 M436298 includes a plurality of microvias 150 that are filled with a conductive paste such that each component forms two stacked vias. The combination of the hybrid printed circuit board (9) enables the single-metal materials (7 (M, 70_2) to be aligned above and below the underlying component 1〇2 and to be bonded using one or more adhesive layers. It is squeezed together to clamp the subassembly 102.

In the embodiment shown in Figure 4a, the core subassembly has four metal layer carriers. In other implementations, the correction component can have more or less than four metal layers. Here—the towel, the sub-assembly of the material is assembled using a procedure that utilizes only a single lamination. In other such embodiments, the S-material subassembly is assembled using a procedure for no lamination (e.g., the 3-material sub-assembly does not have a through-hole). In some embodiments, the layers of the δ 玄 ' vi sub-assembly are laminated while laminating a single metal layer carrier such as S Hai to form the PCB. In other embodiments, the layers of the core subassembly are laminated prior to laminating the single metal layer carriers together.

In the embodiment shown in Figure 4a, three single metal layer carriers are disposed above the material assembly and three single metal layer carriers are disposed thereunder. In other embodiments, more or less than three single metal layer carriers can be disposed over the core subassembly. Likewise, in other embodiments, more or less than three single metal layer carriers can be disposed under the 材 material sub-assembly. In one embodiment, one or more of the core sub-assemblies are replaced by a single metal layer substrate having conductive microvias. In the embodiment shown in Figure 4a, the hybrid PCB includes two stacked vias. In other embodiments, the hybrid PCB can have more or less than two stacked passes. FIG. 4b is a cross-sectional exploded view of a coincident printed circuit board according to an embodiment of the present invention. The etched single-metal layer substrate shown in the third figure shows the core subassembly. Except for the outer single-metal layer carrier system, according to the procedure described in the figures 3a to 3g, (4), instead of the _th, the 4th diagram is substantially the same as the 4a diagram & Among other points of view, Figure 4b can be implemented as shown in Figure 4a. In the servant diagram, the stacked micro vias 151 are aligned with the underlying through vias 1G4, while the other microvias 150 are offset from the through vias 1〇4. Figure 4c is a cross-sectional exploded view of a 1-in printed circuit board 100-3 according to an embodiment of the present invention, which includes six single-metal layer substrates 7 in a pre-extrusion form as shown. (M-clamping - core material subassembly. The pre-extrusion form includes an upper assembly 8 (M comprising three of the six single metal layer substrates 70-1, and a lower assembly 8〇2 , which includes the six single-gold eyebrow base materials 7 (M of which are the other three. In addition to the single-metal layer of the first-metal layer in the first map in the - (four) shape, the embodiment shown in the figure And the other _. In other views, the & graph can be implemented as shown in Figure 4b. Figure 5 is a completed hybrid printing according to the embodiments of Figure 4b or 4c A cross-sectional view of a circuit board _·4. In many embodiments, except for the outer layer comprising un-steel, the finished hybrid printed circuit board in Figure 4a looks similar to Figure 5. Figure 6 is A cross-sectional view of a hybrid pcB 2 根据 according to an embodiment of the present invention, comprising - a combined layer 27 〇 2 sandwiching two sub-assemblies of a four-layer gold M436298 genus core material A single metal layer substrate 270-1 on either side of the 202. In many embodiments, the hybrid PCB 200 includes the advantages of a sequential laminate fabrication process and a single laminate fabrication process. For example, the hybrid PCB 200 can provide a rough Upper or indeed flat outer surface. In some embodiments, such substantially or indeed a surface is highly desirable in the industry. In addition, the manufacturing process of hybrid PCB 200 can be accomplished by removing many different laminates and The electroplating step improves manufacturing time and cost.

The four single metal layer substrates 270-1 comprise a plurality of stacked microvias 250' and can be formed using any of the procedures described above. The four metal layer core sub-assemblies 202 include a plurality of through vias 2〇4 and can be formed using the sequential lamination procedure described above. In some embodiments, the through vias are replaced by microvias filled with copper or a conductive paste. The two combined layers 270-2 include a plurality of charged or filled microvias (e.g., through vias) 284, and can be formed by the procedure for fabricating the PCB shown in FIG. In the embodiment shown in Figure 6, the PCB includes two single metal layer substrates above and below the core subassembly. In other embodiments, the PCB can include more than two single metal layer substrates. In the embodiment shown in Fig. 6, a combination layer 270-2 is disposed over the single metal layer substrates, and the tantalum composite layer 270-2 is disposed under the single metal layer substrates. In other embodiments, more than one combined layer can be disposed over the single metal layer substrates and more than one combined layer can be disposed beneath the single metal layer substrates. In one embodiment, one or more of the combined layers are replaced by another of the single metal layer substrates, 15 M436298 or removed together. In the embodiment shown in Fig. 6, a four metal core component subassembly 202 is disposed in the center of the hybrid PCB 200. In other embodiments, the core subassembly can include more or less than four layers. In the embodiment illustrated in Figure 6, the four metal core component subassembly includes two shovel or filled through holes 204. In other embodiments, the core subassembly can include more or less than two through holes. In one such embodiment, the core subassembly can have no through holes. In the embodiment shown in Figure 6, the hybrid PCB includes two stacked vias. In other embodiments, the hybrid PCB can include more or less than two stacked vias. In Figures 5 and 6, the core sub-assemblies 1〇2 and 202 each comprise two through-vias (1〇4, 2〇4) 'with a single metal layer substrate (7〇_1, 27) The stack via 150 of 〇-1) is offset. In other embodiments, the core sub-assemblies 1〇2 and 202 can include one or more micro-through holes. In some embodiments, the microvias are filled with conductive ink or copper. In this embodiment, the conductive ink microvia has a trapezoidal cross section, wherein one of the microvias has a wider opening closest to a centerline of the core subassembly (see, for example, the micrograph in FIG. 5) The direction of the through hole 150). In some embodiments, the through vias of the submounts 202 and 202 are not offset from the stacked vias of the single metal layer substrate. Figure 7 is a cross-sectional view of a hybrid pcB 3 根据 according to an embodiment of the present invention, comprising a composite layer 27 〇 2, the composite layer being adhered to the four single metal layer substrates One of the four metal core component subassemblies 202 is clamped. The hybrid PCB 300 includes a composite layer 270-2 that sandwiches two single metal layer substrates mi on one side of the core material subassembly 202. The hybrid 16 M436298 PCB 3 00 further encloses the upper/twist two single metal layer substrates 270-1 which are missing the core metal sub-assembly on the other side of the core member. 2. The embodiment shown in Fig. 7 and the actual example of Fig. 6 are removed except for the removal of the outer hybrid layer. In other embodiments, the upper single-metal layer carrier or one of the upper ones can also be removed. In many embodiments, the construction of the PCB of Figure 7 can be modified in a manner similar to that described above for the hybrid PCB of Figure 6. Figure 8 is a cross-sectional view of a hybrid printed circuit board 400 in accordance with an embodiment of the present invention, comprising a six-figure single metal layer substrate (470-1, 470-2) sandwiched including an active A core subassembly 402 of the device 4〇6. In addition to the core subassembly 4〇2 including the active device 4〇6 of the embodiment, and the upper single metal layer substrate 470-2 includes an additional micro via 450, which forms a stacked via for connecting to the active In addition to device 406, the hybrid PCB 400 shown in Figure 8 is similar to the embodiment of Figure 5. The active device 406 can be a transistor, an integrated circuit, or other active device that is commonly used in conjunction with printed circuit boards. In the embodiment shown in Figure 8, the hybrid PCB 400 includes a separate active device 4〇6. Additional active devices and additional through holes can be used in other embodiments to support a variety of different desired connections. In many embodiments, the hybrid pCB of Figure 8 can be modified in a manner similar to that described above for the hybrid PCBs of Figures 4a, 4b, 4c, 5 and 6. In one embodiment, the active device can be located on or within the single metal layer substrate. In other embodiments, the active device can be located on or in any of a single metal layer substrate and a core material subassembly. 17 M436298 Figure 9 is a cross-sectional view of a hybrid printed circuit board 500 in accordance with an embodiment of the present invention, comprising two 3g drawings of a single metal shore material (570-1J70-2) clamped to include A core material subassembly 502 of an active device 5〇6. In addition to including an additional through hole 584 for connecting the active device 5〇6, which is further implemented in the core material subassembly 502 in FIG. 8, the PCB system shown in FIG. 9 is substantially the same as the first 8 figures are similar. Among other points of view, the function of the hybrid PCB of Fig. 9 can be modified as in the case of the hybrid peg of Fig. 8. Figure 10 is a cross-sectional view of a printed circuit board assembly 600 in accordance with an embodiment of the present invention including a resected area separating the flexible region 6〇6 of the assembly from the hard section (602, 604) . The through holes 6 〇 8 are capable of providing electrical interconnection between different flexural, rigid and hard and flexible layers. In many embodiments, the board assembly 600 can be formed using any of the fabrication procedures described herein, including, for example, the separate lamination procedures described above in Figures 3a through 3g, 4a through 4c. Conventional laminating procedures, including sequential laminating procedures, require a significant amount of processing steps that can damage a pull-up or hard-flexible substrate during the manufacturing process. More specifically, conventional processing steps such as electrical bonding, cleaning, wiping, and planarization can damage flexible or rigid-flexible substrates and cause problems associated with a slight positioning tolerance. In accordance with the fabrication procedures described herein, the circuit board assembly 600' can be formed while avoiding or significantly reducing the repetitive steps commonly used in many conventional programs' including, for example, invasive plating, cleaning, wiping, and planarization processing steps. Although the above description contains many specific embodiments of the present invention, it should not be construed as a limitation of the present invention. Therefore, the scope of the novel is not limited to the embodiments shown, but is defined by the scope of the appended claims and their equivalents. For example, the fabrication procedures described herein can be used in conjunction with a number of techniques including, but not limited to, flip chip, microelectromechanical systems (MEMS) circuits, ceramic packages, organic packages, high density substrates, ball grid array (BGA) based Materials, rigid substrates, flexible substrates, and hard-flex substrates. In some embodiments, the microvias described herein may be referred to as Z-axis interconnects. In the above embodiment, the circuit board assembly is formed using through holes, through holes, micro via holes, blind via holes or other through holes. In other embodiments, these vias can be interchangeably used' and/or can be replaced with other suitable vias well known in the art. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a flow chart of a sequential lamination process for fabricating a printed circuit board having laminated vias, including sequential lamination and electro-minening steps. Figure 2 is a flow diagram of a sequential lamination process for fabricating a printed circuit board having laminated vias in accordance with an embodiment of the present invention, including a separate lamination process. Figures 3a-3g show a procedure for fabricating a single metal layer substrate for a separate lamination cycle or treatment with stacked (or staggered) microvias in accordance with an embodiment of the present invention. In the program. Figure 4a is a cross-sectional exploded view of one of the hybrid printed circuit boards according to an embodiment of the present invention. The four-layered M19298 metal layer substrate comprising four 3a~3g patterns and two An untouched single metal layer substrate catastrophes a core material sub-assembly. Figure 4b is a cross-sectional exploded view of a hybrid printed circuit board according to one embodiment of the present invention, comprising six etched single metal layer substrates shown in Figure 3g sandwiching a core material Assembly. Figure 4c is a cross-sectional exploded view of a hybrid printed circuit board according to one embodiment of the present invention, comprising six single metal layer substrates in a pre-compressed form as shown in Figure 3g. Core material sub-assembly. Figure 5 is a cross-sectional view of the completed hybrid printed circuit board of Figure 4b or 4c. Figure 6 is a cross-sectional view of a hybrid printed circuit board according to an embodiment of the present invention, comprising an external hybrid layer sandwiching two single sides on a side of a four-layer metal core assembly Metal layer substrate. Figure 7 is a cross-sectional view of a hybrid printed circuit board according to an embodiment of the present invention, comprising a hybrid layer adhered to two single metal layer bases sandwiching a four-layer metal core assembly One of the materials. Figure 8 is a cross-sectional view of a hybrid printed circuit board according to an embodiment of the present invention, comprising six single metal layer substrates shown in Figure 3g sandwiching a core material including an active device Sub-assembly. Figure 9 is a cross-sectional view of a hybrid printed circuit board according to an embodiment of the present invention, comprising six single metal layer substrates shown in Figure 3g sandwiching a core material including an active device Sub-assembly. Figure 10 is a cross-sectional view of a hybrid printed circuit board in accordance with an embodiment of the present invention including a cut-away region separating the flexible portion of the assembly from the hard section 20 M436298. [Main component symbol description] 10...double-sided substrate 200...mixed printed circuit board 10a...copper pig 10b...core material 11..copper foil liner 20..resist 30.. Laminating Adhesive 40... Protective Film 50.. Through Hole/Micro Through Hole 60.. Conductive Paste 70... Single Metal Layer Carrier 70-1... Single Metal Layer Substrate 70-2.··Single Metal Layer substrate 80-1...upper assembly 80-2...lower assembly 100-1...mixed printed circuit board 100-2...hybrid printed circuit board 100-3...hybrid printed circuit board 100 -4...mixed printed circuit board 102.. core material subassembly 104...through hole 150.. microvia 151.. microvia 202.. core subassembly 204.. Hole 250.. .Stacked micro-vias 270-1...single metal layer substrate 270-2.. combination layer 284.. micro-via 300...mixed printed circuit board 400.. mixed printed circuit board 402.. Core material sub-assembly 406.. Active device 450.. microvia 470-1... single metal layer substrate 470-2... single metal layer substrate 500.. mixed printed circuit board 502. .. core material sub-assembly 504.. through hole 506.. active device 550.. micro-via 570-1... single metal layer substrate 570-2... single Base metal layer 584 .. The vias 21 M436298 600 ... ... The printed circuit board assembly 606 of the flexible region 602 ... 608 ... hard segments through hole 604 ... Stiff section 22

Claims (1)

M436298 Double-sided photocopying 10th 〇21"7 专利 Patent application Scope of application for patent modification Amendment date·· April 101; i? 笱6. Patent application scope: 1. A printed circuit board comprising: a core material a subassembly comprising at least one metal layer carrier; a plurality of single metal layer supports; wherein: at least two of the plurality of single metal layer supports each comprise: a substrate on the first surface of one of the substrates Having a copper foil liner; a lamination adhesive on a second surface of the substrate, at least one microvia in the second surface of the substrate to expose the at least one copper foil liner; a conductive slurry filled in the at least one microvia; and at least two of the plurality of single metal layer carriers are adhered to each other and adhered to the core subassembly via the laminating adhesive. 2. The printed circuit board of claim 1, wherein: at least two of the plurality of single metal layer carriers adhere to each other and adhere to a first surface of one of the core sub-assemblies; and the plurality Each of the single metal layer carriers adheres to each other and adheres to a second surface of the core subassembly. 3. The printed circuit board of claim 1, wherein: at least two of the plurality of single metal layer carriers are adhered to each other to form a first separate laminated subassembly; and the core subassembly One of the first surface is adhered, and the printed circuit board further includes a micro-via 23 having a minimum of 23, M436298 Patent Application No. 100219970 Patent Application Revision Date: April, April 2010 It adheres to one of the surfaces of the first individual laminated subassembly. 4. The printed circuit board of claim 1, wherein: at least two of the plurality of single metal layer carriers are adhered to each other to form a first separate laminated subassembly, and the core material is One of the first surface of the component is adhered; at least two of the plurality of single metal layer carriers are adhered to each other to form a second separate laminated subassembly and adhered to the second surface of one of the core subassemblies The printed circuit board further includes: a first combination layer having one of the at least one microvia, adhered to a surface of the first individual laminated subassembly; and a second combination layer having one of the at least one microvia It adheres to one of the surfaces of the second individual laminated subassembly. 5. The printed circuit board of claim 1, wherein the core subassembly comprises at least one micro via. 6. The printed circuit board of claim 1, wherein the core subassembly comprises at least one active device. 7. The printed circuit board of claim 6, wherein the at least one active device comprises a device selected from the group consisting of a transistor and an integrated circuit. 8. The printed circuit board of claim 1, further comprising: at least one second single metal layer carrier, wherein the second single metal layer carrier comprises: 24 M436298 Apparent No. Patent Application Cap Patent Range Correction This date: April 1st, 2011, a second laminating adhesive, which is located on a second surface of a second substrate, the second substrate forming a copper foil on the first surface thereof; at least one a microvia having a second surface of the second substrate to expose a portion of the copper foil; a conductive paste filled in the at least one microvia; and wherein: the plurality of a metal layer carrier wherein at least two of the two adhere to each other 'to-separately laminate the subassembly and adhere to one surface of the core subassembly; and the at least one second single metal layer carrier adheres to the A surface of one of the individual laminated sub-assemblies. 9. The printed circuit board of claim 8, wherein: at least two of the plurality of single metal layer carriers are adhered to each other to form a second separate laminated subassembly, and the core subassembly is read a second surface adhesion; and the v to the second single metal layer carrier, the second single metal layer carrier, the second single riding surface of one of the components. 1. The printed circuit board of claim 1, wherein: at least two of the plurality of single-metal wide carriers are adhered to each other to form a --separate laminated sub-assembly, and the core material One of the sub-assemblies is surface-attached; the core sub-assembly includes a through-hole; and the position of the through-hole of the core sub-assembly is the same as the first separate lamination 25 M436298 Patent Application No. 10,219,970 Date: The position of the micro-via hole of the field component was shifted in April. 11. The printed circuit board of claim 10, wherein the through hole of the core subassembly is a plated through hole. A printed circuit board according to claim 10, wherein the through hole of the core member is a micro through hole. 13. The printed circuit board of claim 1, wherein the through-hole of the core sub-assembly is a micro-via filled with copper. 14. The printed circuit board of claim 10, wherein the through hole of the core component is a microvia filled with a conductive paste. 15. The printed circuit board of claim 2, wherein: at least two of the plurality of single metal layer carriers are adhered to each other to form a first separate laminated subassembly, and the core subassembly One of the surface adhesions; and the core sub-assembly includes a through hole; and the through hole of the core sub-assembly is positioned substantially in alignment with the position of the micro-through hole of the first individual laminated sub-assembly. 16. The printed circuit board of claim 1, wherein the substrate comprises a substrate selected from the group consisting of a flexible substrate and a rigid-flexible substrate. The printed circuit board of claim 1, wherein: the plurality of single-metal layer carriers are such that at least two of them adhere to each other and adhere to a first surface of the core sub-assembly; A plurality of single metal layer carriers, at least two of which adhere to each other' and adhere to a second surface of the core subassembly. 26 M436298 §10〇21"7 专利 Patent Application Scope of Patent Application Amendment Date: April 9, 101. 18. The printed circuit board of claim 1 wherein: the plurality of single metal layer carriers Adhering to each other to form a first component; the plurality of additional single metal layer carriers are adhered to each other to form a second subassembly; the primary component is adhered to a first surface of the core subassembly And the second component is adhered to a second surface of the core subassembly. 27