TWI785503B - Rf電路模組及其製造方法 - Google Patents
Rf電路模組及其製造方法 Download PDFInfo
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- TWI785503B TWI785503B TW110105745A TW110105745A TWI785503B TW I785503 B TWI785503 B TW I785503B TW 110105745 A TW110105745 A TW 110105745A TW 110105745 A TW110105745 A TW 110105745A TW I785503 B TWI785503 B TW I785503B
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Abstract
本發明提供RF電路模組及其製造方法。構成能夠提高散熱性且能夠小型化的RF電路模組。另外,構成抑制基於線材的電路的電特性的惡化且高頻性能優異的RF電路模組。RF電路模組(113A)具備:模組基板(90);第一基材(10),構成有第一電路;以及第二基材(20),構成有第二電路。第一電路包括控制第二電路的動作的控制電路,第二電路包括放大RF訊號的高頻放大電路。第二基材(20)安裝於第一基材(10),第一基材(10)以電路形成面對置的方式配置於模組基板(90)。第一基材(10)和第二基材(20)具有將第一電路和第二電路不經由模組基板(90)而電連接的電路間連接佈線(32)。
Description
本發明涉及RF(射頻)電路模組,尤其是涉及對高頻功率進行處理的電路所使用且具有發熱部的RF電路模組及其製造方法。
以往,在移動體通訊、衛星通訊等電子設備中,組裝有將高頻訊號的發送接收功能一體化的RF前端模組。藉由將高頻放大器、控制高頻放大器的控制IC(積體電路)、開關IC、雙工器等搭載於模組基板,並對整體進行樹脂模製(molding),來構成RF前端模組。
例如,上述高頻放大器是形成於GaAs(砷化鎵)基板的MMIC(Monolithic Microwave Integrated Circuit:單晶微波積體電路),上述控制IC和開關IC是形成於Si(矽)基板的MMIC,單獨地搭載於模組基板的表面。
另一方面,在專利文獻1中公開如下的構造:為了將模組基板縮小化,在高頻放大器積層控制IC等,將高頻放大器和控制IC等與模組基板上的電極進行線接合(wire bonding)。
圖25的(A)是與專利文獻1所示的器件相同構成的器件的俯視圖,圖25的(B)是其剖視圖。在該例中,在電路基板(LAMINATE SUBSTRATE:積層基板)搭載有異質結雙極電晶體的晶片(HBT DIE),在該晶片上搭載有矽晶片(Si DIE),異質結雙極電晶體的晶片與電路基板之間、矽晶片與電路基板
之間、矽晶片與異質結雙極電晶體的晶片之間分別線接合。
專利文獻1:美國專利申請公開第2015/0303971號說明書
在將高頻放大器、控制IC、開關IC等單獨地搭載於模組基板的表面的構造中,針對模組基板的這些零件的構裝面積較大,將零件間連接的佈線較長,訊號損耗也較大。另外,高頻放大器例如構成在GaAs基板上,因此高頻放大器自身的散熱性較低。
根據專利文獻1所公開的構造,與佔有面積比較大的將高頻放大器、控制IC等並列設置的情況進行比較,能夠將模組基板的尺寸縮小化。然而,需要用於線接合的空間,模組基板的縮小效果較小,而且由於在線材產生的寄生電感等的影響,尤其是在高頻區域中損耗變大,或者容易產生線路的阻抗不匹配。另外,從高頻放大器產生的熱的散熱效果較低。
另一方面,伴隨著高頻放大器的近年來的更高速、高輸出化的要求,其自身發熱引起的特性界限成為課題。例如,在雙極電晶體中,由於其集電極損耗而發熱,雙極電晶體自身升溫,從而基極-發射極間飽和電壓Vbe降低,由此集電極電流增大,Vbe進一步降低,若施加上述那樣的正反饋,則會導致熱失控,因此在能夠控制的範圍中所能處理的功率被限制。
因此,在構成RF電路模組的狀態下,如果不能高效率地對高頻放大器的熱進行散熱,則也不能實現RF電路模組的小型化。
因此,本發明的目的在於提供一種不受散熱性制約且小型化的RF電路模組、或者小型且散熱性較高的RF電路模組、以及該RF電路模組的製造方法。另外,本發明的目的在於提供一種抑制基於線材的電路的電特性的惡化且高頻性能優異的RF電路模組以及該RF電路模組的製造方法。
(1)作為本發明的一個形態的RF電路模組具備:模組基板,具有零件搭載用的電極;第一基材,構成有第一電路;以及第二基材,構成有第二電路,上述第一電路包括控制上述第二電路的動作的控制電路,上述第二電路包括放大RF訊號的高頻放大電路,上述第二基材安裝於上述第一基材,上述第一基材覆晶接合於上述模組基板,上述第一基材和上述第二基材具有導體層,上述導體層構成將上述第一電路和上述第二電路不經由上述模組基板而電連接的電路間連接佈線,上述第一基材具有與上述模組基板的上述電極連接的第一基材側導體突起部,上述第二基材具有與上述模組基板的上述電極連接的第二基材側導體突起部。
(2)作為本發明的一個形態的RF電路模組具備:模組基板,具有零件搭載用的電極;第一基材,構成有第一電路;以及第二基材,構成有第二電路,上述第一電路包括控制上述第二電路的動作的控制電路,上述第二電路包括放大RF訊號的高頻放大電路,上述第二基材安裝於上述第一基材,上述第一基材和上述第二基材具有導體層,上述導體層構成將上述第一電路和上述第二電路不經由上述模組基板而電連接的電路間連接佈線,在俯視上述模組基板時,構成上述電路間連接佈線的導體層的上表面位於上述第二電路的上表面以下的位置。
(3)在作為本發明的一個形態的RF電路模組的製造方法中,上述RF電路模組具備:模組基板,具有零件搭載用的電極;第一基材,構成有包括控制電路的第一電路;以及第二基材,構成有包括由上述控制電路控制的高頻放大電路的第二電路,其中,上述RF電路模組的製造方法具有:在作為上述第一基材的單體半導體基材形成上述第一電路和基材間連接導體的步驟;在作為上述第二基材的化合物半導體基材,隔著剝離層形成具有上述第二電路和基材間連接導體的半導體薄膜的步驟;藉由蝕刻除去上述剝離層而將上述半導體薄
膜從上述化合物半導體基材剝離來構成上述第二基材的步驟;藉由在上述第一基材的既定位置接合上述第二基材,來將上述第一基材的上述基材間連接導體和上述第二基材的上述基材間連接導體連接,並構成由上述第一基材和上述第二基材形成的積層體的步驟;形成與上述第一電路連接的第一基材側導體突起部以及與上述第二電路連接的第二基材側導體突起部的步驟;以及藉由將上述第一基材側導體突起部和上述第二基材側導體突起部與上述模組基板的上述電極連接,來將上述積層體搭載於上述模組基板的步驟。
(4)在作為本發明的一個形態的RF電路模組的製造方法中,上述RF電路模組具備:模組基板,具有零件搭載用的電極;第一基材,構成有包括控制電路的第一電路;以及第二基材,構成有包括由上述控制電路控制的高頻放大電路的第二電路,其中,上述RF電路模組的製造方法具有:在作為上述第一基材的單體半導體基材形成上述第一電路的步驟;在作為上述第二基材的化合物半導體基材,隔著剝離層形成具有上述第二電路的半導體薄膜的步驟;藉由蝕刻除去上述剝離層而將上述半導體薄膜從上述化合物半導體基材剝離來構成上述第二基材的步驟;在上述第一基材的既定位置接合上述第二基材來構成由上述第一基材和上述第二基材形成的積層體的步驟;形成將上述第一電路和上述第二電路連接的基材間連接導體的步驟;以及將上述積層體搭載於上述模組基板的步驟。
根據本發明,能夠得到不受散熱性制約且小型化的RF電路模組、或者小型且散熱性較高的RF電路模組。另外,能夠得到避免基於線材的電路的電特性的惡化且高頻性能優異的RF電路模組。
ANT:天線
CMOS:互補式金屬氧化物半導體
HS:散熱器
PB1:第一導體柱凸塊
PB2:第二導體柱凸塊
PCB:印刷電路板
PM:P-MOS
NM:N-MOS
Si-sub:Si基板
V:導通孔
3:PA電路元件
10:第一基材
10C:第一電路
12:第一基材側電極
13、23:導體柱
14、24:焊料層
15:樹脂層
20:第二基材
20C:第二電路
20D:外延層
20N:GaAs基材
21:電路元件
22:第二基材側電極
22U:基底電極
29:剝離層
31:外部連接用電極(接合焊盤)
32:電路間連接佈線
41、41A、41B、42、43:接合線
51:貫通導體
52:表面導體
60:高頻放大器
61:高頻放大器控制電路(PAC)
62、64、65:開關(SW)
63、66、69A、69B:阻抗匹配電路
67:低噪聲放大器
68A、68B:雙工器
70:天線開關(ANT-SW)
71:帶通濾波器
85:抗蝕劑膜
90:模組基板
91、92、93:模組基板側電極
100:模製樹脂
104A、104B:積層體
111、113A、113B、113C、114B、115、116A、116B:RF電路模組
120:前端模組
200:母基板
[圖1]的(A)是第一實施形態的RF電路模組111的俯視圖。圖1的
(B)是圖1的(A)中的X-X部分處的剖視圖。
[圖2]的(A)、圖2的(B)是表示RF電路模組111的製造步驟的圖。
[圖3]是表示RF電路模組111中的、自形成於第二基材20的電路元件的散熱路徑亦即兩個熱傳導路徑的圖。
[圖4]是表示PA(功率放大)電路元件3的製造方法的圖。
[圖5]是表示第二基材20的製造方法以及第二基材20相對於第一基材10的接合方法的圖,是各步驟的立體圖。
[圖6]的(A)是第二實施形態的前端模組120的俯視圖,圖6的(B)是圖6的(A)中的X-X部分處的剖視圖。
[圖7]是表示第二實施形態的前端模組120的電路構成的方塊圖。
[圖8]是第三實施形態的RF電路模組113A的局部剖視圖。
[圖9]是表示形成於第二基材20的HBT的構成的局部放大圖。
[圖10]是表示RF電路模組113A中的自電路元件21的散熱路徑亦即兩個熱傳導路徑的圖。
[圖11]是第三實施形態的其他的RF電路模組113B的局部剖視圖。
[圖12]是散熱器HS的導通孔層處的橫剖視圖。
[圖13]是表示RF電路模組113B中的自電路元件21的散熱路徑的圖。
[圖14]是第三實施形態的另一其他的RF電路模組113C的局部剖視圖。
[圖15]是第四實施形態的RF電路模組所具備的積層體104A的剖視圖。
[圖16]是第四實施形態的其他的電路模組114B的剖視圖。
[圖17]是表示第四實施形態的PA電路元件等積層體的製造方法的圖。
[圖18]是表示第四實施形態的前端模組120的電路構成的方塊圖。
[圖19]是表示第五實施形態的RF電路模組115的剖視圖。
[圖20]是第六實施形態的RF電路模組116A的概略前視圖。
[圖21]是第六實施形態的其他的RF電路模組116B的前視圖。
[圖22]是第七實施形態的RF電路模組117A的前視圖。
[圖23]是第七實施形態的其他的RF電路模組117B的前視圖。
[圖24]的(A)、圖24的(B)是表示作為第二實施形態的前端模組的比較例的前端模組的構成的圖。
[圖25]的(A)是與專利文獻1所示的器件相同構成的器件的俯視圖,圖25的(B)是其剖視圖。
[圖26]是表示作為第四實施形態的RF電路模組的比較例的RF電路模組的構成的圖。
[圖27]是表示作為第四實施形態的RF電路模組的其他的比較例的RF電路模組的構成的圖。
之後,參照圖式並列舉幾個具體的例子,表示用於實施本發明的複數個形態。在各圖中對同一部位標注同一圖式標記。考慮到要點的說明或者理解的容易性,為了便於說明實施形態,而分為複數個實施形態進行表示,但能夠進行在不同的實施形態中表示的構成的局部置換或者組合。在第二實施形態及其之後,省略與第一實施形態共同的事項的記述,僅對不同點進行說明。尤其是,對於基於相同的構成的相同的作用效果,不在每個實施形態中依次提及。
在第一實施形態中,例示具備基本的構成要素的RF電路模組。
圖1的(A)是第一實施形態的RF電路模組111的俯視圖。圖1的(B)是圖1的(A)中的X-X部分處的剖視圖。該RF電路模組111具備:具有零件搭載用的模組基板側電極91、92的模組基板90、構成有第一電路的第一基材
10、構成有第二電路的第二基材20、以及模製樹脂(mold resin)100。模組基板90例如是玻璃環氧基板等PCB(Printed Circuit Board:印刷電路板)。模製樹脂100例如是環氧樹脂。
上述第一電路包括控制上述第二電路的動作的控制電路,上述第二電路包括放大RF訊號的高頻放大電路。第二基材20安裝於第一基材10,第一基材10覆晶接合(倒裝搭載)於模組基板90。
第一基材10和第二基材20具有將形成於第一基材10的電路和形成於第二基材20的電路不經由模組基板90而電連接的電路間連接佈線。
第一基材10具有第一基材側電極12和第一導體柱凸塊PB1,第二基材20具有第二基材側電極22和第二導體柱凸塊PB2。第一導體柱凸塊PB1相當於本發明的“第一基材側導體突起部”,第二導體柱凸塊PB2相當於本發明的“第二基材側導體突起部”。
第一導體柱凸塊PB1由在第一基材10的第一基材側電極12形成的導體柱13和對該導體柱13的前端部施加的焊料層14構成。第二導體柱凸塊PB2由在第二基材20的第二基材側電極22形成的導體柱23和對該導體柱23的前端部施加的焊料層24構成。上述導體柱13、23例如是Cu(銅)鍍膜,焊料層14、24例如是SnAg(錫銀)合金的膜。
形成於第一基材10的第一電路和形成於第二基材20的第二電路與模組基板90的電極形成面對置。
在模組基板90形成有模組基板側電極91、92。第一基材10的第一導體柱凸塊PB1與模組基板90的模組基板側電極91連接。另外,第二基材20的第二導體柱凸塊PB2與模組基板90的模組基板側電極92連接。
如此,形成於第一基材10的第一電路和形成於第二基材20的第二電路與模組基板90的電極形成面對置,並經由第一導體柱凸塊PB1和第二導體柱
凸塊PB2與模組基板90的模組基板側電極91、92連接,由此第一電路與模組基板90側的電路之間的路徑、第二電路與模組基板90側的電路之間的路徑分別最短化。因此,抑制訊號路徑中的電特性的惡化。
在將包括第一基材10和第二基材20的功率放大模組(之後所示的PA電路元件3)搭載於模組基板90之後,模組基板90的表面以模製樹脂100模製(molding)。
圖2的(A)、圖2的(B)是表示RF電路模組111的製造步驟的圖。圖2的(A)是表示緊接在模組基板90上搭載包括第一基材10和第二基材20的PA電路元件3之前的狀態的剖視圖。圖2的(B)是表示在模組基板90上搭載了PA電路元件3的狀態的剖視圖。
之後示出PA電路元件3的形成方法。在PA電路元件3的下表面形成有第一導體柱凸塊PB1和第二導體柱凸塊PB2。藉由將該PA電路元件3的第一導體柱凸塊PB1和第二導體柱凸塊PB2與模組基板90對位,並進行加熱加壓,從而如圖2的(B)所示,PA電路元件3的第一導體柱凸塊PB1和第二導體柱凸塊PB2的焊料層14、24與模組基板側電極91、92連接。
圖3是表示RF電路模組111中的、自形成於第二基材20的電路元件的散熱路徑亦即兩個熱傳導路徑的圖。在圖3中,虛線的箭頭表示兩個熱傳導路徑。第一熱傳導路徑由第二基材側電極22和第二導體柱凸塊PB2構成,電路元件產生的熱經由該第一熱傳導路徑而向模組基板側電極92和模組基板90散熱、排熱。另外,第二熱傳導路徑是從第二基材20向第一基材10方向的熱傳導路徑,電路元件產生的熱經由第二熱傳導路徑而散熱、排熱。
第二導體柱凸塊PB2設置在最接近作為形成於第二基材20的第二電路的一部分的第二基材側電極22的附近。因此,上述散熱、排熱效率較高。
第一導體柱凸塊PB1的高度比第一基材10的厚度低。因此,與例
如藉由線接合等構裝技術將安裝有第二基材20的第一基材10與模組基板90連接的情況相比,能夠縮短佈線長度,另外能夠削減環路電感。
接下來,例示RF電路模組111的製造方法。圖4是表示PA電路元件3的製造方法的圖。圖4中的步驟S1至S7的圖是PA電路元件3的製造中途階段的剖視圖,步驟S8是所完成的PA電路元件3的剖視圖。實際的製造是以晶圓為單位進行的,但在圖4中,圖示單個半導體裝置。
首先,如圖4中的步驟S1所示,配置由Si基材構成的第一基材10。也可以根據需要,在由該Si基材構成的第一基材10的表面,使用一般的半導體製程來形成接合層。該接合層是Au(金)膜等金屬膜、聚醯亞胺(PI)膜、聚苯並惡唑(PBO)、苯並環丁烯(BCB)等有機材料膜、AlN(氮化鋁)、SiC(碳化矽)、金剛石等絕緣體。
接下來,如步驟S2所示,在第一基材10上接合第二基材20。在第二基材20上已經藉由其他步驟而形成有電路元件和電極。
接下來,如步驟S3所示,藉由一般的半導體製程,在第二基材20上形成第二基材側電極22,另外,在第一基材10上形成第一基材側電極12。
接下來,如步驟S4所示,形成在應該形成導體柱13和焊料層14(圖2的(A)、圖2的(B))的區域具有開口的抗蝕劑膜85。電極12、22在抗蝕劑膜85的開口內露出。
然後,如步驟S5、步驟S6所示,藉由電鍍法,使導體柱13、23和焊料層14、24堆積於在抗蝕劑膜85的開口內露出的電極12、22上。導體柱13、23由Cu形成,其厚度例如為40μm。如此,形成CPB(Copper Pillar Bump:銅柱凸塊)。焊料層14、24由SnAg合金形成,其厚度例如為30μm。
然後,如步驟S7所示,除去抗蝕劑膜85,最後進行回流處理,使焊料層14、24熔融,然後固化,由此像步驟S8所示那樣得到PA電路元件3。
圖5是表示第二基材20的製造方法、以及第二基材20相對於第一基材10的接合方法的圖,是各步驟的立體圖。實際的製造是以晶圓為單位進行的,但在圖5中,圖示單個半導體裝置。
如圖5中步驟S11所示,首先,在化合物半導體基材的母基板200形成剝離層29,在該剝離層29的上部藉由磊晶成長法形成半導體薄膜,在該半導體薄膜形成複數個電路元件和與該電路元件連接的電極。該部分是之後的第二基材20。
接下來如步驟S12所示,藉由進行僅選擇性地蝕刻剝離層29的處理,來將第二基材20(半導體薄膜片)從母基板200剝離。
然后,如步骤S13所示,在第一基材10上接合(bonding)第二基材20。亦即,從母基板200將半導體薄膜片亦即第二基材20轉印到第一基材10。該接合基於凡得瓦結合或者氫結合。除此之外,也可以藉由靜電力、共價結合、共晶合金結合等來接合。此外,也可以在其他步驟中,在第一基材10上形成作為接合層的Au膜,使第二基材20加壓、緊貼於接合層的表面,從而使接合層的Au向第二基材的GaAs層擴散並共晶化,由此進行接合。
向上述第二基材20的電路元件和電極的形成不僅在步驟S11所示的階段進行,也可以如步驟S14所示,在將第二基材20與第一基材10接合之後,藉由針對第二基材20的製程(光刻、蝕刻步驟)來進行。
上述半導體薄膜片的剝離和轉印的方法能夠應用專利第5132725號中公開的方法。亦即,在如圖5中步驟S12所示,將第二基材20(半導體薄膜片)從母基板200剝離時,在第二基材20被支承體支承的狀態下,從母基板200剝離。另外,在如圖5中步驟S13所示,將第二基材20與第一基材10接合時,在被上述支承體支承的狀態下進行。在圖5中的步驟S12、S13中,為了明確表示第二基材20,省略上述支承體的圖示。
如此構成的本實施形態的RF電路模組111實現如下的效果。
(a)第一基材10覆晶接合(倒裝搭載)於模組基板90,因此不需要配置線接合用的焊盤、線材的空間,能夠整體小型化。
(b)關於第一基材10和第二基材20,形成於第一基材10的電路和形成於第二基材20的電路由基材間連接導體電連接而不經由模組基板90,另外,第一基材10具有與模組基板90的電極連接的第一導體柱凸塊PB1,第二基材20具有與模組基板90的電極連接的第二導體柱凸塊PB2,因此,不需要在模組基板90形成用於將形成於第一基材10的電路和形成於第二基材20的電路連接的佈線,能夠整體小型化。
(c)形成於第二基材20的高頻放大電路產生的熱能夠高效率地散熱、排熱,因此能夠得到不受散熱性制約且小型化的RF電路模組、或者小型且散熱性高的RF電路模組。
在第二實施形態中,例示構成為前端模組的RF電路模組。
圖6的(A)是第二實施形態的前端模組120的俯視圖,圖6的(B)是圖6的(A)中的X-X部分處的剖視圖。其中,圖6的(A)是沒有之後所示的頂面屏蔽層和模製樹脂的狀態下的俯視圖。
該前端模組120是連接在天線與發送電路和接收電路之間的電路。在模組基板90構裝複數個晶片零件而構成該前端模組120。在模組基板90的內層和最下層形成有接地導體。在模組基板90構裝有天線開關70、低噪聲放大器67、PA電路元件3、雙工器、晶片電感器、晶片電容器等。模組基板90的上部由模製樹脂100模製,在模製樹脂100的表面形成有頂面屏蔽用的金屬層。
PA電路元件3是由第一基材10和第二基材20構成的PA模組。在第一基材10形成有選擇之後所示的2個系統的發送訊號中的一方的開關和高頻放
大器的控制電路。在第二基材20上構成高頻放大電路。
圖7是表示本實施形態的前端模組120的電路構成的方塊圖。前端模組120具備:與天線ANT連接的帶通濾波器71、天線開關70、阻抗匹配電路69A、69B、雙工器68A、68B、開關65、阻抗匹配電路66、低噪聲放大器67、開關62、高頻放大器60、高頻放大器控制電路61、阻抗匹配電路63以及開關64。
開關62和高頻放大器控制電路61形成於第一基材10,高頻放大器60形成於第二基材20。
另外,在圖7中,天線開關70是選擇天線與兩個發送接收電路系統的連接的開關。低噪聲放大器67是接收訊號的初級的放大器。
這裡,圖24的(A)、圖24的(B)表示作為第二實施形態的前端模組的比較例的前端模組的構成例。圖24的(B)是圖24的(A)中的X-X部分處的剖視圖。與圖6的(A)、圖6的(B)所示的例子不同,具備作為分別單獨零件的高頻放大器60、高頻放大器控制電路61和開關62。
根據第二實施形態,與圖24的(A)、圖24的(B)所示的作為比較例的前端模組進行對比可知,針對模組基板90的電子零件的構裝面積縮小化。另外,高頻放大器60與開關62之間的佈線長度、高頻放大器60與高頻放大器控制電路61之間的佈線長度縮短化,減少訊號損耗、阻抗不匹配。
另外,在第一基材10上構成開關62和高頻放大器控制電路61,因此與開關62單體、高頻放大器控制電路61單體的尺寸相比,適度地變大,形成有高頻放大器60的第二基材20與第一基材10的積層體亦即PA電路元件3的形成變得容易。另外,利用該第一基材10與第二基材20的積層體構成PA電路元件3,由此提高前端模組120的面積的縮小化效率。
另外,在以往的例如藉由線接合、凸塊將GaAs基板連接的構成中,為了該處理而需要較厚的GaAs基板,但在本實施形態中,是將例如GaAs基
材的較薄的第二基材20粘貼於例如Si基材的第一基材10的構成,因此即使是2晶片的堆疊,也能夠實現低高度化。
在第三實施形態中,示出具備PA電路元件的RF電路模組的幾個構成例。
圖8是第三實施形態的RF電路模組113A的局部剖視圖。在該圖8中,表示構裝有PA電路元件3的模組基板90的一部分和PA電路元件3的剖面。
在基於PCB(Printed Circuit Board:印刷電路板)的模組基板90形成有零件搭載用的模組基板側電極91、92。PA電路元件3具備第一導體柱凸塊PB1和第二導體柱凸塊PB2。而且,PA電路元件3的第一導體柱凸塊PB1和第二導體柱凸塊PB2與模組基板90的模組基板側電極91、92連接,由此倒裝構裝PA電路元件3。第一導體柱凸塊PB1和第二導體柱凸塊PB2的構造如第一實施形態所示。
PA電路元件3包括第一基材10和第二基材20。第一基材10在Si基板Si-sub上依次形成有作為絕緣層的SiO2(二氧化矽)層、作為器件層的Si層、作為佈線形成層的SiO2層、作為鈍化層的SiN(一氮化矽)層。
在第二基材20上形成有複數個電路元件21和對該複數個電路元件21施加工作電壓或者通電工作電流的電極。第二基材20像第一實施形態中圖5所示那樣由其他步驟形成,上述電路元件形成在其外延層上。外延層例如為約3μm,上述電極(佈線層)為約10μm。
在SiN層的表面形成有作為再佈線層的第一基材側電極12、第二基材側電極22和電路間連接佈線32。在製造時,構成電路間連接佈線32的導體層與第二基材側電極22(本發明的“構成第二電路的導體層”)由同一層構成。
如圖8所示,第一導體柱凸塊PB1之一與構成電路間連接佈線32的導體層直接接觸。因此,第一電路的一部分與第二電路的一部分由較短的路徑連接,並且也以較短的路徑與模組基板側的電路連接。
第一基材側電極12、第二基材側電極22和電路間連接佈線32的表面被樹脂層15絕緣覆蓋。
在本實施形態中,第一基材10是單體半導體的基材,例如主要由Si或Ge構成。該第一基材10也可以由包括GaAs、AlAs(砷化鋁)、InAs(砷化銦)、InP(磷化銦)、GaP(磷化鎵)、InSb(銻化銦)、GaN(氮化鎵)、InN(氮化銦)、AlN、SiC、Ga2O3(氧化鎵)、DLC(Diamond-Like Carbon:類金剛石碳)、石墨(Graphite)、金剛石(Diamond)、玻璃(Glass)、藍寶石(Sapphire)、Al2O3中的任一種的複數種材料構成。
另外,在本實施形態中,第二基材20是化合物半導體的基材,例如由GaAs、AlAs、InAs、InP、GaP、InSb、GaN、InN、AlN、SiGe(矽鍺)、SiC、Ga2O3、GaBi(鉍化鎵)中的任一種構成。該第二基材20也可以是由這些材料中的複數種材料構成的多元系混晶材料。
但是,選定為第一基材10的材料與選定為第二基材20的材料不同,第一基材10與第二基材20的製造製程不同。基本上,較佳為第二基材20例如採用能夠得到放大率、截止頻率等既定的電特性的材料,另外,第一基材10選定為與第二基材20相比熱傳導率較高的關係。
在本實施形態中,第一基材10是Si基材,第二基材20是GaAs基材。Si基材的熱傳導率是156,GaAs基材的熱傳導率是46。上述電路元件21例如是複數個單位電晶體並聯連接而得的異質結雙極電晶體(HBT),是藉由針對第二基材20亦即GaAs基材的製程而形成者。上述導體柱凸塊PB2與複數個單位電晶體的發射極電連接。複數個單位電晶體在第一方向(圖1的(A)、圖1的(B)中的左右方向)上排列,導體柱凸塊PB2形成為在第一方向上也延伸的形狀。
圖9是表示形成於第二基材20的HBT的構成的局部放大圖。第二基材20具備GaAs基材20N和在其表面形成的外延層20D。在外延層20D形成有電
路元件21(HBT)。第二基材20是共用的集電極。複數個HBT的發射極由基底電極22U和第二基材側電極22共同連接。
在圖8中,在作為器件層的Si層例如形成有基於P溝道MOSPM和N溝道MOSNM的CMOS(Complementary Metal-Oxide-Semiconductor:互補式金屬氧化物半導體)電路等。另外,在作為器件層的Si層與作為鈍化層的SiN層之間形成有將形成於作為器件層的Si層的電路引出到第一基材側電極12和電路間連接佈線32的佈線。該佈線由基於Cu或者Al(鋁)的複數層佈線層和將各佈線層間連接的基於Cu或者Al的導通孔V構成。
圖10是表示RF電路模組113A中的自電路元件21的散熱路徑亦即兩個熱傳導路徑的圖。在圖10中,虛線的箭頭表示兩個熱傳導路徑。第一熱傳導路徑由第二基材側電極22和第二導體柱凸塊PB2構成,電路元件21產生的熱經由該第一熱傳導路徑而向模組基板側電極92和模組基板90散熱、排熱。另外,第二熱傳導路徑是從第二基材20向第一基材10方向的熱傳導路徑,電路元件21產生的熱經由第二熱傳導路徑而散熱、排熱。
作為佈線形成層的SiO2層的熱傳導率為1.0[W/cm K],Si基材的熱傳導率為156[W/cm K],GaAs基板的熱傳導率為46[W/cm K]。亦即,第一基材10的熱傳導率比第二基材20的熱傳導率高。因此,第一基材10作為高效的熱放射體發揮作用。如此第一基材10作為熱傳導路徑發揮作用,因此導體柱13、焊料層14和模組基板側電極92也作為熱傳導路徑發揮作用。
在圖8、圖10所示的例子中,向模組基板90側的散熱、排熱效果較高,因此抑制對上述CMOS電路等的熱影響。
在如此構成的RF電路模組113A中,與第一實施形態所示的例子同樣,能夠得到整體小型化、另外散熱性較高的RF電路模組。
圖11是第三實施形態的其他的RF電路模組113B的局部剖視圖。
在具備散熱器HS的方面與圖8所示的RF電路模組113A不同。該RF電路模組113B在作為佈線形成層的SiO2層不僅形成有將形成於作為器件層的Si層的電路引出到第一基材側電極12的佈線,而且在HBT亦即電路元件21的附近形成有散熱器HS。該散熱器HS由基於Cu或者Al的複數層佈線層和將各佈線層間連接的基於Cu或者Al的導通孔V構成。
圖12是上述散熱器HS的導通孔層處的橫剖視圖。如此,構成散熱器HS的佈線層的導體呈面狀擴展,複數個導通孔在面方向上排列。如此,在散熱器HS中,佈線層(導體層)和導通孔的周圍(絕緣體層)在橫剖面方向和縱剖面方向上分別形成為格子狀。
圖13是表示RF電路模組113B中的自電路元件21的散熱路徑的圖。在圖13中,如虛線的箭頭所示,電路元件21(HBT)產生的熱由3個熱傳導路徑散熱、排熱。第一熱傳導路徑是將電路元件21的熱經由第二基材側電極22、第二導體柱凸塊PB2向模組基板側電極92和模組基板90散熱、排熱的路徑。第二熱傳導路徑是將電路元件21產生的熱向第一基材10散熱、排熱的路徑。第三熱傳導路徑是將電路元件21的熱經由散熱器HS、第一基材側電極12、第一導體柱凸塊PB1向模組基板側電極91和模組基板90散熱、排熱的路徑。在該第一基材10形成有散熱器HS,因此向第一基材10方向的熱經由散熱器HS而高效率地散熱、排熱。另外,還形成上述第三熱傳導路徑,因此電路元件21的熱高效率地散熱、排熱。
圖14是第三實施形態的另一其他的RF電路模組113C的局部剖視圖。在散熱器HS的形成範圍較寬的方面與圖11所示的RF電路模組113B不同。在該RF電路模組113C中,散熱器HS的尺寸較大,由此電路元件21的熱經由散熱器HS而有效地散熱。另外,與圖13所示的例子相比,形成複數個將電路元件21的熱經由散熱器HS、第一基材側電極12、第一導體柱凸塊PB1向模組基板側電極91
和模組基板90散熱、排熱的熱傳導路徑,因此經由該熱傳導路徑的散熱效果也較高。
在如此構成的RF電路模組113B、113C中,添加向散熱器HS的散熱、排熱路徑,進而還添加經由第一基材側電極12和第一導體柱凸塊PB1的熱傳導路徑,從而能夠得到散熱性更高的RF電路模組。另外,散熱器HS的導通孔V到達Si基板,因此基於Si基板的散熱、排熱效率較高。
此外,在圖12所示的例子中,示出具有呈面狀擴展的佈線層的導體的散熱器HS,佈線層的導體也可以是按照導通孔V導通的每個部位而獨立的圖案。由此,抑制流過佈線層的導體的渦流。另外,佈線層的導體也可以在俯視佈線層時為格子狀。由此,也抑制流過佈線層的導體的渦流。
在第四實施形態中,例示了在使第一基材的電路形成面不與模組基板對置的狀態下構裝於模組基板的RF電路模組。
圖15是第四實施形態的RF電路模組所具備的積層體104A的剖視圖。PA電路元件3包括第一基材10和第二基材20。積層體104A是由第一基材10和第二基材20形成的積層體。
第一基材10在Si基板Si-sub上依次形成有作為絕緣層的SiO2層、作為器件層的Si層、作為佈線形成層的SiO2層、作為鈍化層的SiN層。在SiN層的表面形成有作為再佈線層的第一基材側電極12、第二基材側電極22和電路間連接佈線32。
在製造時,構成這些電路間連接佈線32、第二基材側電極22(本發明的“構成第二電路的導體層”)以及第一基材側電極12的導體層也可以由同一層構成。由此,能夠簡化製造步驟。
在第二基材20形成有複數個電路元件21和對該複數個電路元件
21施加工作電壓或者通電工作電流的電極。第二基材20像第一實施形態中圖5所示那樣由其他步驟形成,上述電路元件形成在其外延層上。
另外,在第一基材10的表面,在與第二基材20不重疊的位置形成有第一基材側電極12和電路間連接佈線32。第一基材側電極12、第二基材側電極22和電路間連接佈線32為了外部連接,而它們的表面露出。
第一基材10、形成於第一基材10的第一電路、第二基材20和形成於第二基材20的第二電路的構成與圖8所示的例子相同。
關於積層體104A,第一基材10的底面搭載於模組基板,第一基材側電極12、第二基材側電極22或者電路間連接佈線32與模組基板上的電極經由線材連接。
如圖15中細線的輔助線所示,在俯視模組基板時,構成電路間連接佈線32的導體層的上表面比位於第二電路的最上部的第二基材側電極22的上表面低。
圖16是第四實施形態的其他的電路模組114B的剖視圖。該電路模組114B具備模組基板90和積層體104B。
積層體104B的基本的構成與圖15所示的積層體104A相同,但在第一基材10和第二基材20的表面覆蓋樹脂層15,與第一基材側電極12導通的外部連接用電極(接合焊盤)31、第二基材側電極22和電路間連接佈線32的表面從該樹脂層15露出。
積層體104B搭載於模組基板90,積層體104B的上表面的外部連接用電極31與模組基板側電極93經由線材41連接。
在圖16所示的例中,在俯視模組基板90時,構成電路間連接佈線32的導體層的上表面與位於第二電路的最上部的第二基材側電極22的上表面為同一面。
在本實施形態中也是,構成與第一基材側電極12導通的外部連接用電極(接合焊盤)31、第二基材側電極22以及電路間連接佈線32的導體層可以由同一層構成,能夠藉由由同一層形成而簡化製造步驟。
圖17是表示第四實施形態的功率放大模組等積層體的製造方法的圖。尤其是表示電路間連接佈線的形成方法。
圖17中的步驟S1至S3的圖是功率放大模組的製造中途階段的剖視圖。實際的製造是以晶圓為單位進行的,但在圖17中,圖示單個半導體裝置。
首先,如圖17中的步驟S1所示,配置由Si基材構成的第一基材10。也可以根據需要,在由該Si基材構成第一基材10的表面,使用一般的半導體製程形成接合層。該接合層是Au膜等金屬膜、聚醯亞胺(PI)膜、聚苯並惡唑(PBO)、苯並環丁烯(BCB)等有機材料膜、AlN、SiC、金剛石等絕緣體。
接下來,如步驟S2所示,在第一基材10上接合第二基材20。在第二基材20上已經由其他步驟形成有電路元件和電極。
接下來,如步驟S3所示,藉由一般的半導體製程,在第二基材20上形成第二基材側電極22,在第一基材10上形成第一基材側電極12,從第二基材20到第一基材10形成電路間連接佈線32。該電路間連接佈線32將形成於第一基材10的第一電路和形成於第二基材20的第二電路連接。
上述第一基材側電極12、第二基材側電極22和電路間連接佈線32能夠在一個步驟中同時形成。
圖18是表示第四實施形態的前端模組120的電路構成的方塊圖。前端模組120具備:與天線ANT連接的帶通濾波器71、天線開關70、阻抗匹配電路69A、69B、雙工器68A、68B、開關64、65、阻抗匹配電路66、低噪聲放大器67、開關62、高頻放大器60、高頻放大器控制電路61、阻抗匹配電路63i、63o、開關64。
開關62和高頻放大器控制電路61形成於第一基材10的第一電路10C,高頻放大器60形成於第二基材20的第二電路20C。阻抗匹配電路63o形成於第一電路10C、第二電路20C或者這雙方。阻抗匹配電路63i也形成於第一電路10C、第二電路20C或者這雙方。阻抗匹配電路63i、63o例如分別由在將第一電路10C和第二電路20C連接的導體部產生的電感和電容構成。
圖18所示的前端模組120的基本的構成與圖7所示的前端模組120相同。在圖18中,若由(1)表示向開關62的發送訊號輸入部,由(2)表示發送訊號的第一電路10C的輸出部,由(3)表示發送訊號向第二電路20C的輸入部,則(2)與(3)的路徑非常近。
這裡,在圖26和圖27中表示作為比較例的RF電路模組的剖視圖。在圖26、圖27任一方所示的例子中,形成有第一電路的第一基材10搭載於模組基板90,形成有第二電路的第二基材20搭載於該第一基材10。
在圖26所示的例子中,模組基板側電極93A與第一電路的一部分經由線材41A連接,模組基板側電極93B與第一電路的一部分經由線材41B連接,該模組基板側電極93B與第二電路的一部分經由線材43連接。
在圖27所示的例子中,模組基板側電極93與第一電路的一部分經由線材41連接,第一電路的一部分與第二電路的一部分經由線材42連接。
在圖26所示的構造中,第一電路的一部分與第二電路的一部分經由線材41B、43連接,但該連接路徑成為圖18所示的(2)-(3)間的路徑,因此基於線材41B、43的寄生電感和寄生電容較大。因此,訊號損耗較大,另外無法得到阻抗匹配電路63i的既定的特性。
在圖27所示的構造中,第一電路的一部分與第二電路的一部分經由線材42連接,但該連接路徑成為圖18所示的(2)-(3)間的路徑,因此受到基於線材42的寄生電感和寄生電容的影響。因此,雖然與圖26所示的構造相比得
到改善,但仍然存在訊號損耗,另外無法得到既定的阻抗匹配電路63i的特性。
相對於此,在圖15、圖16、圖17所示的本實施形態的RF電路模組中,圖18所示的(2)-(3)間的路徑由電路間連接佈線32構成。該電路間連接佈線32所產生的寄生電感和寄生電容較小。因此,訊號損耗較小,另外能夠得到阻抗匹配電路63i的既定的特性。
在第五實施形態中,例示了在第一基材10具有貫通導體的RF電路模組。
圖19是第五實施形態的RF電路模組115的剖視圖。該RF電路模組115在作為佈線形成層的SiO2層形成有將形成於作為器件層的Si層的電路引出到第一基材側電極12的導通孔V等佈線。另外,在HBT亦即電路元件21的附近形成有散熱器HS。該散熱器HS由基於Cu或者Al的多層佈線層和將各佈線層間連接的基於Cu或者Al的導通孔V構成。在第一基材10的上表面形成有表面導體52,在該表面導體52與散熱器HS之間形成有複數個貫通導體51。
在第一基材10為Si的情況下,貫通導體51例如由W(鎢)或者Cu構成。在第一基材10為GaAs的情況下,貫通導體51例如能夠由Au構成。
根據本實施形態,能夠將HBT亦即電路元件21產生的熱經由散熱器HS、貫通導體51和表面導體52高效率地散熱、排熱到外部。
在第六實施形態中,表示第一電路與第二電路的連接構造和第一電路和第二電路相對於模組基板的連接構造與之前所示的例子不同的RF電路模組。
圖20是第六實施形態的RF電路模組116A的概略前視圖。在第一基材10的表面形成有第一電路10C,在第二基材20的表面形成有第二電路20C。
在模組基板90形成有零件連接用的電極亦即模組基板側電極93。
第一電路10C或者第二電路20C包括放大高頻訊號的高頻放大電
路。另外,構成有高頻放大電路的電路以外的另一個電路包括控制高頻放大電路的動作的控制電路。例如第二電路20C包括上述高頻放大器,第一電路10C包括上述控制電路。該“高頻放大電路”例如相當於圖18所示的高頻放大器60,“控制電路”例如相當於圖18所示的高頻放大器控制電路61。
第二基材20與第一基材10以在俯視模組基板90時一方內包於另一方的狀態重疊。在圖20所示的例子中,以第二基材20內包於第一基材10的狀態重疊。
從形成有第二電路20C的第二基材20到形成有第一電路10C的第一基材10,形成有構成將第一電路10C和第二電路20C電連接的電路間連接佈線32的導體層。亦即,第一基材10和第二基材20具有構成將第一電路10C和第二電路20C不經由模組基板90而電連接的電路間連接佈線32的導體層。
構成電路間連接佈線32的導體層與構成第一電路10C或者第二電路20C的導體層由同一層構成。亦即,構成電路間連接佈線32的導體層的一部分與構成第一電路10C的導體層處於同一層,構成電路間連接佈線32的導體層的一部分與構成第二電路20C的導體層處於同一層。
藉由該構造,第一電路10C的一部分與第二電路20C的一部分導通,並且該導通部經由線材41與模組基板側電極93導通。
圖21是第六實施形態的其他的RF電路模組116B的前視圖。在第一基材10的表面形成有第一電路10C,在第二基材20的表面形成有第二電路20C。
該RF電路模組116B在第一基材10的下表面形成有表面導體52,在該表面導體52與第一電路10C之間形成有複數個貫通導體51。其他的構成與RF電路模組116A相同。根據RF電路模組116B,能夠將第一電路10C產生的熱經由貫通導體51和表面導體52而高效率地散熱、排熱到外部。
在第七實施形態中,例示了在第一電路和第二電路與模組基板對置的狀態下,將第一基材和第二基材搭載於模組基板的RF電路模組。
圖22是第七實施形態的RF電路模組117A的前視圖。在第一基材10的表面形成有第一電路10C,在第二基材20的表面形成有第二電路20C。
第一基材10的第一電路10C和第二基材20的第二電路20C與模組基板90的電極的形成面對置。
第一基材10具有與模組基板90的電極連接的導體柱凸塊PB1A、PB1B。導體柱凸塊PB1B與構成電路間連接佈線32的導體層直接接觸。導體柱凸塊PB1A、PB1B相當於本發明的“導體突起部”。根據該構造,第一電路10C的一部分與第二電路20C的一部分的連接路徑能夠縮短化,並且這些第一電路10C和第二電路20C與模組基板90的電極的連接路徑也能夠較短。因此,與以往的使用線材進行連接的構造相比,能夠將上述連接路徑低阻抗化、低電感化。
第一電路10C或者第二電路20C包括放大高頻訊號的高頻放大電路。另外,構成有高頻放大電路的電路以外的另一個電路包括控制高頻放大電路的動作的控制電路。例如第二電路20C包括上述高頻放大器,第一電路10C包括上述控制電路。該“高頻放大電路”例如相當於圖18所示的高頻放大器60,“控制電路”例如相當於圖18所示的高頻放大器控制電路61。
第二基材20和第一基材10以在俯視模組基板90時一方內包於另一方的狀態重疊。在圖22所示的例子中,以第二基材20內包於第一基材10的狀態重疊。
從形成有第二電路20C的第二基材20到形成有第一電路10C的第一基材10,形成有構成將第一電路10C和第二電路20C電連接的電路間連接佈線32的導體層。
根據該構造,第一電路10C的一部分與第二電路20C的一部分經
由電路間連接佈線32導通,第一電路10C的一部分和第二電路20C的一部分經由導體柱凸塊PB1與模組基板的電極導通。
圖23是第七實施形態的其他的RF電路模組117B的前視圖。在第一基材10的表面形成有第一電路10C,在第二基材20的表面形成有第二電路20C。
第一基材10的第一電路10C和第二基材20的第二電路20C與模組基板90的電極的形成面對置。第一基材10具有與模組基板90的電極連接的導體柱凸塊PB1A、PB1B。另外,第二基材20具有與模組基板90的電極連接的導體柱凸塊PB2。
上述導體柱凸塊PB2與構成電路間連接佈線32的導體層直接接觸。根據該構造,第一電路10C的一部分與第二電路20C的一部分的連接路徑能夠縮短化,並且這些第一電路10C和第二電路20C與模組基板90的電極的連接路徑也能夠較短。尤其是,能夠使第二電路20C與形成於模組基板90的電極的連接路徑更短。因此,與以往的使用線材進行連接的構造相比,能夠將上述連接路徑低阻抗化、低電感化。
最後,上述的實施形態的說明在所有的方面均為例示,並非用於限制內容者。對於本發明所屬技術領域中具有通常知識者來說,能夠適當地變形和變更。本發明的範圍由申請專利範圍表示,而不是由上述的實施形態表示。進而,在本發明的範圍中包括與申請專利範圍均等的範圍內的根據實施形態的變更。
CMOS:互補式金屬氧化物半導體
PB1:第一導體柱凸塊
PB2:第二導體柱凸塊
PCB:印刷電路板
PM:P-MOS
NM:N-MOS
Si:矽
SiO2:二氧化矽
Si-sub:Si基板
V:導通孔
3:PA電路元件
10:第一基材
12:第一基材側電極
13、23:導體柱
14、24:焊料層
15:樹脂層
20:第二基材
21:電路元件
22:第二基材側電極
22U:基底電極
32:電路間連接佈線
90:模組基板
91、92:模組基板側電極
113A:RF電路模組
Claims (23)
- 一種RF電路模組,具備:模組基板,具有零件搭載用的電極;第一基材,構成有第一電路;以及第二基材,構成有第二電路;前述第一電路包括控制前述第二電路的動作的控制電路;前述第二電路包括放大RF訊號的高頻放大電路;前述第二基材安裝於前述第一基材;前述第一基材覆晶接合於前述模組基板;前述第一基材及前述第二基材具有導體層,前述導體層構成將前述第一電路和前述第二電路不經由前述模組基板而電連接的電路間連接佈線;前述第一基材具有與前述模組基板的前述電極連接的第一基材側導體突起部;前述第二基材具有與前述模組基板的前述電極連接的第二基材側導體突起部。
- 如請求項1所述之RF電路模組,其中,前述第二基材側導體突起部設置於最靠近前述第二電路的附近。
- 如請求項1或2所述之RF電路模組,其中,在前述第一基材的與前述第二基材不重疊的位置的表面形成有第一基材側電極,前述第一基材側導體突起部與前述第一基材側電極連接。
- 一種RF電路模組,具備:模組基板,具有零件搭載用的電極;第一基材,構成有第一電路;以及 第二基材,構成有第二電路;前述第一電路包括控制前述第二電路的動作的控制電路;前述第二電路包括放大RF訊號的高頻放大電路;前述第二基材安裝於前述第一基材;前述第一基材及前述第二基材具有導體層,前述導體層構成將前述第一電路和前述第二電路不經由前述模組基板而電連接的電路間連接佈線;在俯視前述模組基板時,構成前述電路間連接佈線的導體層的上表面位於前述第二電路的上表面以下的位置。
- 如請求項4所述之RF電路模組,其中,前述第一電路或者前述第二電路,具有在前述高頻放大電路與前述高頻放大電路的輸入或輸出之間使阻抗匹配的阻抗匹配電路或者阻抗匹配電路的一部分。
- 如請求項1、2、4、5中的任一項所述之RF電路模組,其中,前述第一基材為半導體的基材;前述第二基材為半導體的基材。
- 如請求項1、2、4、5中的任一項所述之RF電路模組,其中,前述第一基材為單體半導體的基材;前述第二基材為化合物半導體的基材。
- 如請求項1、2、4、5中的任一項所述之RF電路模組,其中,前述第一基材的熱傳導率比前述第二基材的熱傳導率高。
- 如請求項1、2、4、5中的任一項所述之RF電路模組,其中,前述第二基材比前述第一基材薄。
- 如請求項1、2、4、5中的任一項所述之RF電路模組,其中,前述控制電路具有前述RF訊號的開關電路。
- 如請求項1、2、4、5中的任一項所述之RF電路模組,其中,前述第一基材具備由導體層和絕緣體層積層而成的散熱器,前述散熱器配置在前述第二電路的附近。
- 如請求項1、2、4、5中的任一項所述之RF電路模組,其中,構成前述電路間連接佈線的導體層與構成前述第二電路的導體層由同一層構成。
- 如請求項1、2、4、5中的任一項所述之RF電路模組,其中,前述第一基材具有與前述模組基板的前述電極連接的第一基材側導體突起部;前述第二基材具有與前述模組基板的前述電極連接的第二基材側導體突起部;前述第一電路及前述第二電路,與前述模組基板的電極形成面對置。
- 如請求項13所述之RF電路模組,其中,前述第一基材側導體突起部與構成前述電路間連接佈線的導體層直接接觸。
- 如請求項13所述之RF電路模組,其中,前述第一基材側導體突起部的高度比前述第一基材的厚度低。
- 一種RF電路模組,具備:模組基板,具有零件連接用的電極;第一基材,構成有與前述模組基板的電極導通的第一電路;以及第二基材,構成有與前述模組基板的電極導通的第二電路;前述第一電路或者前述第二電路包括放大高頻訊號的高頻放大電路;構成有前述高頻放大電路的電路以外的另一個電路包括控制前述高頻放大電路的動作的控制電路; 前述第二基材和前述第一基材以在俯視前述模組基板時一方內包於另一方的狀態重疊;前述第一基材及前述第二基材具有導體層,前述導體層構成將前述第一電路和前述第二電路不經由前述模組基板而電連接的電路間連接佈線。
- 如請求項16所述之RF電路模組,其中,構成前述電路間連接佈線的導體層與構成前述第一電路或前述第二電路的導體層由同一層構成。
- 如請求項16或17所述之RF電路模組,其中,前述第一基材或前述第二基材中的與前述模組基板接近地配置的基材,具有貫通導體,前述貫通導體將構成電路的第一面和與前述第一面成對的第二面電連接。
- 如請求項16或17所述之RF電路模組,其中,前述第一基材或前述第二基材具有與前述模組基板的電極連接的導體突起部,前述第一基材的前述第一電路及前述第二基材的前述第二電路與前述模組基板的電極的形成面對置。
- 如請求項19所述之RF電路模組,其中,前述導體突起部與構成前述電路間連接佈線的導體層直接接觸。
- 如請求項19所述之RF電路模組,其中,前述第一基材或前述第二基材中的在俯視前述模組基板時內包另一個基材的基材所具備的前述導體突起部的高度,比前述第一基材的厚度低。
- 一種RF電路模組的製造方法,前述RF電路模組具備:模組基板,具有零件搭載用的電極;第一基材,構成有包括控制電路的第一電路;以及第二基材,構成有包括由前述控制電路控制的高頻放大電路的第二電路;其中,前述RF電路模組的製造方法具有: 在作為前述第一基材的單體半導體基材形成前述第一電路及基材間連接導體的步驟;在作為前述第二基材的化合物半導體基材,隔著剝離層形成具有前述第二電路和基材間連接導體的半導體薄膜的步驟;藉由蝕刻除去前述剝離層而將前述半導體薄膜從前述化合物半導體基材剝離來構成前述第二基材的步驟;藉由在前述第一基材的既定位置接合前述第二基材,來將前述第一基材的前述基材間連接導體和前述第二基材的前述基材間連接導體連接,並構成由前述第一基材和前述第二基材形成的積層體的步驟;形成與前述第一電路連接的第一基材側導體突起部、以及與前述第二電路連接的第二基材側導體突起部的步驟;以及藉由將前述第一基材側導體突起部及前述第二基材側導體突起部與前述模組基板的前述電極連接,來將前述積層體搭載於前述模組基板的步驟。
- 一種RF電路模組的製造方法,前述RF電路模組具備:模組基板,具有零件搭載用的電極;第一基材,構成有包括控制電路的第一電路;以及第二基材,構成有包括由前述控制電路控制的高頻放大電路的第二電路;其中,前述RF電路模組的製造方法具有:在作為前述第一基材的單體半導體基材形成前述第一電路的步驟;在作為前述第二基材的化合物半導體基材,隔著剝離層形成具有前述第二電路的半導體薄膜的步驟;藉由蝕刻除去前述剝離層而將前述半導體薄膜從前述化合物半導體基材剝離來構成前述第二基材的步驟;在前述第一基材的既定位置接合前述第二基材來構成由前述第一基材和前述第二基材形成的積層體的步驟; 形成將前述第一電路和前述第二電路連接的基材間連接導體的步驟;以及將前述積層體搭載於前述模組基板的步驟。
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