TWI780523B - 用於健康照護產品中溫度感測之封裝技術 - Google Patents

用於健康照護產品中溫度感測之封裝技術 Download PDF

Info

Publication number
TWI780523B
TWI780523B TW109141701A TW109141701A TWI780523B TW I780523 B TWI780523 B TW I780523B TW 109141701 A TW109141701 A TW 109141701A TW 109141701 A TW109141701 A TW 109141701A TW I780523 B TWI780523 B TW I780523B
Authority
TW
Taiwan
Prior art keywords
temperature sensor
layer
sensor package
wiring layer
conductive
Prior art date
Application number
TW109141701A
Other languages
English (en)
Other versions
TW202123406A (zh
Inventor
皮耶帕羅 路波
彼拉 孟翰每德 阿布拉因 卡尼
奇秀瑞 Ｎ 雷貞
金奎相
馬諾 凡登他凡達
Original Assignee
美商蘋果公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 美商蘋果公司 filed Critical 美商蘋果公司
Publication of TW202123406A publication Critical patent/TW202123406A/zh
Application granted granted Critical
Publication of TWI780523B publication Critical patent/TWI780523B/zh

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/4985—Flexible insulating substrates
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01K—MEASURING TEMPERATURE; MEASURING QUANTITY OF HEAT; THERMALLY-SENSITIVE ELEMENTS NOT OTHERWISE PROVIDED FOR
    • G01K13/00—Thermometers specially adapted for specific purposes
    • G01K13/20—Clinical contact thermometers for use with humans or animals
    • A—HUMAN NECESSITIES
    • A61—MEDICAL OR VETERINARY SCIENCE; HYGIENE
    • A61B—DIAGNOSIS; SURGERY; IDENTIFICATION
    • A61B5/00—Measuring for diagnostic purposes; Identification of persons
    • A61B5/01—Measuring temperature of body parts ; Diagnostic temperature sensing, e.g. for malignant or inflamed tissue
    • A—HUMAN NECESSITIES
    • A61—MEDICAL OR VETERINARY SCIENCE; HYGIENE
    • A61B—DIAGNOSIS; SURGERY; IDENTIFICATION
    • A61B5/00—Measuring for diagnostic purposes; Identification of persons
    • A61B5/68—Arrangements of detecting, measuring or recording means, e.g. sensors, in relation to patient
    • A61B5/6801—Arrangements of detecting, measuring or recording means, e.g. sensors, in relation to patient specially adapted to be attached to or worn on the body surface
    • A61B5/6813—Specially adapted to be attached to a specific body part
    • A61B5/6814—Head
    • A61B5/6815—Ear
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
    • G01J5/00—Radiation pyrometry, e.g. infrared or optical thermometry
    • G01J5/0003—Radiation pyrometry, e.g. infrared or optical thermometry for sensing the radiant heat transfer of samples, e.g. emittance meter
    • G01J5/0011—Ear thermometers
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
    • G01J5/00—Radiation pyrometry, e.g. infrared or optical thermometry
    • G01J5/0022—Radiation pyrometry, e.g. infrared or optical thermometry for sensing the radiation of moving bodies
    • G01J5/0025—Living bodies
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
    • G01J5/00—Radiation pyrometry, e.g. infrared or optical thermometry
    • G01J5/02—Constructional details
    • G01J5/0215—Compact construction
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
    • G01J5/00—Radiation pyrometry, e.g. infrared or optical thermometry
    • G01J5/02—Constructional details
    • G01J5/04—Casings
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
    • G01J5/00—Radiation pyrometry, e.g. infrared or optical thermometry
    • G01J5/02—Constructional details
    • G01J5/08—Optical arrangements
    • G01J5/0801—Means for wavelength selection or discrimination
    • G01J5/0802—Optical filters
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
    • G01J5/00—Radiation pyrometry, e.g. infrared or optical thermometry
    • G01J5/02—Constructional details
    • G01J5/08—Optical arrangements
    • G01J5/0875—Windows; Arrangements for fastening thereof
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
    • G01J5/00—Radiation pyrometry, e.g. infrared or optical thermometry
    • G01J5/10—Radiation pyrometry, e.g. infrared or optical thermometry using electric radiation detectors
    • G01J5/12—Radiation pyrometry, e.g. infrared or optical thermometry using electric radiation detectors using thermoelectric elements, e.g. thermocouples
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01K—MEASURING TEMPERATURE; MEASURING QUANTITY OF HEAT; THERMALLY-SENSITIVE ELEMENTS NOT OTHERWISE PROVIDED FOR
    • G01K1/00—Details of thermometers not specially adapted for particular types of thermometer
    • G01K1/08—Protective devices, e.g. casings
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01K—MEASURING TEMPERATURE; MEASURING QUANTITY OF HEAT; THERMALLY-SENSITIVE ELEMENTS NOT OTHERWISE PROVIDED FOR
    • G01K7/00—Measuring temperature based on the use of electric or magnetic elements directly sensitive to heat ; Power supply therefor, e.g. using thermoelectric elements
    • G01K7/02—Measuring temperature based on the use of electric or magnetic elements directly sensitive to heat ; Power supply therefor, e.g. using thermoelectric elements using thermoelectric elements, e.g. thermocouples
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01K—MEASURING TEMPERATURE; MEASURING QUANTITY OF HEAT; THERMALLY-SENSITIVE ELEMENTS NOT OTHERWISE PROVIDED FOR
    • G01K7/00—Measuring temperature based on the use of electric or magnetic elements directly sensitive to heat ; Power supply therefor, e.g. using thermoelectric elements
    • G01K7/16—Measuring temperature based on the use of electric or magnetic elements directly sensitive to heat ; Power supply therefor, e.g. using thermoelectric elements using resistive elements
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01K—MEASURING TEMPERATURE; MEASURING QUANTITY OF HEAT; THERMALLY-SENSITIVE ELEMENTS NOT OTHERWISE PROVIDED FOR
    • G01K7/00—Measuring temperature based on the use of electric or magnetic elements directly sensitive to heat ; Power supply therefor, e.g. using thermoelectric elements
    • G01K7/16—Measuring temperature based on the use of electric or magnetic elements directly sensitive to heat ; Power supply therefor, e.g. using thermoelectric elements using resistive elements
    • G01K7/18—Measuring temperature based on the use of electric or magnetic elements directly sensitive to heat ; Power supply therefor, e.g. using thermoelectric elements using resistive elements the element being a linear resistance, e.g. platinum resistance thermometer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/486—Via connections through the substrate with or without pins
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/4867—Applying pastes or inks, e.g. screen printing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3135—Double encapsulation or coating and encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49822—Multilayer substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5383—Multilayer substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5389—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates the chips being integrally enclosed by the interconnect and support structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L24/17—Structure, shape, material or disposition of the bump connectors after the connecting process of a plurality of bump connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L24/19—Manufacturing methods of high density interconnect preforms
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L24/20—Structure, shape, material or disposition of high density interconnect preforms
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L24/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L24/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • H05K1/185—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
    • A—HUMAN NECESSITIES
    • A61—MEDICAL OR VETERINARY SCIENCE; HYGIENE
    • A61B—DIAGNOSIS; SURGERY; IDENTIFICATION
    • A61B2562/00—Details of sensors; Constructional details of sensor housings or probes; Accessories for sensors
    • A61B2562/12—Manufacturing methods specially adapted for producing sensors for in-vivo measurements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/568—Temporary substrate used as encapsulation process aid
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68345—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used as a support during the manufacture of self supporting substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68372—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used to support a device or wafer when forming electrical connections thereto
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16235—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a via metallisation of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
    • H01L2224/241—Disposition
    • H01L2224/2413—Connecting within a semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73253—Bump and layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8119—Arrangement of the bump connectors prior to mounting
    • H01L2224/81192—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818—Bonding techniques
    • H01L2224/81801—Soldering or alloying
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1515—Shape
    • H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1517—Multilayer substrate
    • H01L2924/15172—Fan-out arrangement of the internal vias
    • H01L2924/15174—Fan-out arrangement of the internal vias in different layers of the multilayer substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1517—Multilayer substrate
    • H01L2924/15192—Resurf arrangement of the internal vias
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H01L2924/1815—Shape
    • H01L2924/1816—Exposing the passive side of the semiconductor or solid-state body
    • H01L2924/18161—Exposing the passive side of the semiconductor or solid-state body of a flip chip
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19106—Disposition of discrete passive components in a mirrored arrangement on two different side of a common die mounting substrate
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04R—LOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; DEAF-AID SETS; PUBLIC ADDRESS SYSTEMS
    • H04R1/00—Details of transducers, loudspeakers or microphones
    • H04R1/10—Earpieces; Attachments therefor ; Earphones; Monophonic headphones
    • H04R1/1016—Earpieces of the intra-aural type
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10007—Types of components
    • H05K2201/10151—Sensor

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Health & Medical Sciences (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Manufacturing & Machinery (AREA)
  • Pathology (AREA)
  • Animal Behavior & Ethology (AREA)
  • Biomedical Technology (AREA)
  • Heart & Thoracic Surgery (AREA)
  • Medical Informatics (AREA)
  • Molecular Biology (AREA)
  • Surgery (AREA)
  • Biophysics (AREA)
  • General Health & Medical Sciences (AREA)
  • Public Health (AREA)
  • Veterinary Medicine (AREA)
  • Ceramic Engineering (AREA)
  • Otolaryngology (AREA)
  • Measuring And Recording Apparatus For Diagnosis (AREA)
  • Testing Or Calibration Of Command Recording Devices (AREA)
  • Measuring Temperature Or Quantity Of Heat (AREA)

Abstract

所描述者係溫度感測器封裝及製造方法。根據實施例之溫度感測器封裝可係剛性或可撓性的。在一些實施例中，溫度感測器封裝經組態用於觸控感測，並且包括導電感測器圖案，諸如熱電偶或電阻溫度偵測器(RTD)圖案。在一些實施例中，溫度感測器封裝經組態用於非接觸式感測且包括嵌入式傳感器。

Description

用於健康照護產品中溫度感測之封裝技術
本文描述之實施例係關於微電子封裝，且更具體地係關於溫度感測器封裝技術。
可穿戴健康裝置日漸整合各式各樣感測器，以更佳地監測使用者的健康狀態。隨著封裝技術（諸如系統級封裝、內嵌型晶粒、半導體超大型積體電路(very-large-scale integration, VLSI)技術等）的發展，發展微型化系統及裝置已變得可行。皮膚溫度係患者健康的生命徵象之一。
所描述者係溫度感測器封裝、製造方法、及合併此類封裝之產品。例如，該等溫度感測器封裝可緊固在一可攜式電子裝置之（例如一殼體內）內，或緊固至一可穿戴裝置之一織物。該等溫度感測器封裝可特徵化為適用於觸控或非接觸式之溫度感測。在一些實施例中，觸控感測組態可特徵化為具有一背側導電感測器圖案，其中該導電感測器圖案係在一晶片（例如用於該封裝的控制器晶片）之一背側上方。在一些實施例中，該等觸控感測組態可特徵化為具有一前側導電感測器圖案，其中該其中該導電感測器圖案在該晶片之一前側上。在一些實施例中，一非接觸式溫度感測器封裝可包括一嵌入式傳感器。
在一實施例中，一溫度感測器封裝包括：一佈線層；一晶片，其面朝下地安裝在該佈線層上；一絕緣層，其將該晶片囊封在該佈線層上；複數個貫穿導通孔，其等通過該絕緣層；及一導電感測器圖案，其在該絕緣層上方且耦接至該複數個貫穿導通孔。該導電感測器圖案可直接在該晶片之一背側上方。在一實施例中，該晶片係焊接接合至該佈線層。
可使用各種技術來用於形成導電感測器圖案及貫穿導通孔。在一些實施例中，使用網版印刷或類似的施配技術。在一實施例中，該導電溫度感測器圖案之至少一部分及該複數個貫穿導通孔之至少一者係由一相同材料形成。在一實施方案中，該相同材料包括形成該導電溫度感測器圖案之該部分及該複數個貫穿導通孔中之該者的壓結金屬粒子。在一些實施例中，利用雷射直接成型(laser direct structuring, LDS)。在一實施方案中，該絕緣層係一LDS相容材料，該LDS相容材料包括一經分散非導電金屬有機化合物，且該複數個導通孔包括在該經分散非導電金屬有機化合物中之該金屬之金屬粒子的一成核層。類似地，該導電感測器圖案可選地可包括在該經分散非導電金屬有機化合物中的該金屬之金屬粒子的一成核層圖案。
導電感測器圖案具有不同操作模式，諸如熱電偶或電阻溫度偵測器(resistance temperature detector, RTD)圖案。在一實施例中，該導電感測器圖案係一熱電偶圖案，該熱電偶圖案具有一第一導電材料之一第一圖案及一第二導電材料之一第二圖案，該第二導電材料不同於該第一導電材料。在一實施例中，該複數個貫穿導通孔包括連接至該第一圖案之一第一導通孔及連接至該第二圖案之一第二導通孔。在一具體實施方案中，該第一導通孔包括該第一導電材料，且該第二導通孔包括該第二導電材料，但此並非係必需的。在一實施例中，該導電感測器圖案係一RTD圖案，其可由與該複數個貫穿導通孔相同或不同的材料形成。
在一實施例中，一溫度感測器封裝包括一佈線層，其具有一晶片接觸區域及相鄰於該晶片接觸區域的一觸控區域。該觸控區域可包括一導電感測器圖案，該導電感測器圖案電連接至該晶片接觸區域，而一晶片係接合至該晶片接觸區域中之該佈線層。此一組態可特徵化為一前側導電感測器圖案。在一實施例中，該晶片係囊封在一絕緣層中，該絕緣層側向圍繞該佈線層之一頂側上之該晶片，且該絕緣層橫跨該觸控區域。在一實施例中，該晶片係安裝於該佈線層之一第一側上，且與該第一側相對的該佈線層之一第二側包括該導電感測器圖案。在一實施例中，該佈線層包括一剛性-撓性連接件，該晶片係安裝於該剛性-撓性連接件之一剛性部分上，且該導電感測器圖案係該剛性-撓性連接件之一可撓性部分的部分。
在一實施例中，一溫度感測器封裝包括：一佈線層，其包括一頂側及一底側；一腔，其形成在該佈線層之該底側中；一傳感器，其安裝在該腔內；及一晶片，其安裝在該佈線層之該頂側上且與該傳感器電連接。一光學窗可形成於該傳感器之一表面上方。一絕緣層（諸如一模製化合物）可能可選地囊封該佈線層及該晶片。
實施例描述溫度感測器封裝、製造方法、及合併此類封裝之產品。尤其，實施例描述可嵌入於用於感測溫度（諸如皮膚溫度）之可穿戴健康裝置中的溫度感測器封裝解決方案。
在一態樣中，描述各種觸敏溫度感測器封裝。此類封裝解決方案可允許整合至可撓性結構中，且不需要用於操作的光學窗或傳感器。
在一實施例中，溫度感測器封裝包括：一佈線層；一晶片（諸如一數位控制器），其面朝下地安裝在該佈線層上；一絕緣層，其將該晶片囊封在該佈線層上；及複數個貫穿導通孔，其等通過該絕緣層。導電感測器圖案（諸如電阻溫度偵測器(RTD)圖案或熱電偶）係位於絕緣層上方且耦接至複數個貫穿導通孔。
在一實施例中，溫度感測器封裝包括佈線層，其包括晶片接觸區域及相鄰於該晶片接觸區域的觸控區域。該觸控區域可包括一導電感測器圖案，該導電感測器圖案電連接至該晶片接觸區域，而一晶片係接合至該晶片接觸區域中之該佈線層。
在另一態樣中，描述紅外線(IR)溫度感測器封裝。此一封裝解決方案可允許空間節省，此係由於嵌入式熱感測器（例如傳感器），並且提供短及可撓性的佈線。在一實施例中，溫度感測器封裝包括一佈線層（例如電路板），其包括頂側及底側。一腔係形成在該佈線層之底側中，且一傳感器係安裝在該腔內。一晶片係安裝在該佈線層之頂側上且與該傳感器電連接。
根據本文中所述之各種實施例之佈線層可使用各種解決方案（諸如重分佈層或印刷電路板(printed circuit board, PCB)）來形成，各者包括一或多個配線層及介電層。此外，該等佈線層可係剛性或可撓性，且在一實施例中，可包括一剛性-撓性連接件。
在各種實施例中，參照圖式進行說明。然而，某些實施例可在無這些特定細節之一或多者的情況下實行或可與其他已知的方法及組態結合實行。在下列敘述中，為了提供對實施例的全面瞭解而提出眾多特定細節（例如，特定組態、尺寸、及程序等）。在其他例子中，為了避免不必要地使本實施例失焦，所以並未特別詳細地敘述公知的半導體程序及製造技術。此專利說明書通篇指稱的「一實施例(one embodiment)」係指與該實施例一同描述之具體特徵、結構、組態、或特性係包括在至少一實施例中。因此，此專利說明書通篇於各處出現之詞組「在一實施例中(in one embodiment)」不必然指稱相同實施例。此外，在一或多個實施例中，可以任何合適的方式結合特定特徵、結構、組態、或特性。
如本文所用之「在…上方(over)」、「至(to)」、「介於…之間(between)」、「橫跨(spanning)」、及「在…上(on)」之用語可指稱一層相對於其他層之一相對位置。在另一層「上方」、「橫跨」另一層、或在另一層「上」或者接合「至」另一層或與另一層「接觸(contact)」的一層可直接與該另一層接觸或可具有一或多個中介層。一層介於（多個）層「之間」可直接與該等層接觸或可具有一或多個中介層。
現請參照圖1，提供根據一實施例之具有嵌入式晶片110及前側導電感測器圖案120之溫度感測器封裝100的截面側視圖繪示。如所繪示者，溫度感測器封裝100可包括佈線層130，其包括晶片接觸區域132及相鄰於晶片接觸區域132的觸控區域134。在所繪示的實施例中，觸控區域134包括導電感測器圖案120，其電連接至晶片接觸區域132及接合至晶片接觸區域132中之佈線層130的晶片110。
晶片110可係用於溫度感測器封裝100之操作的任何類型之控制器晶片（諸如數位IC、類比IC、混合數位及類比IC），並可包括額外的電路系統（諸如積體放大器）。根據實施例，晶片110係與導電感測器圖案120電連接。
佈線層130可包括一或多個介電層142及配線層144、及（可選地）導通孔146。如所示，晶片110可係封裝在佈線層的頂側136上的絕緣層140中，而佈線層130的底側138包括導電感測器圖案120。絕緣層140可由各種材料（諸如黏著劑接合或可撓性模製化合物）形成，且可額外地橫跨佈線層130之頂側136上的觸控區域134。例示性材料包括但不限於苯環丁烯(BCB)、環氧樹脂、聚矽氧、基於環氧樹脂的光阻，諸如SU-8等。頂側鈍化層150可形成於晶片110及絕緣層140上方。例如，頂側鈍化層150可係可撓性聚合物，諸如聚醯亞胺。除了提供鈍化功能外，頂側鈍化層150可用以調諧溫度感測器封裝100之可撓性。同樣地，除了提供用於導電感測器圖案120之絕緣基材外，一或多個介電層142可用以調諧可撓性。一或多個介電層142可能可選地由與頂側鈍化層150相似的材料形成。根據實施例，絕緣層140可提供密封特徵及用於疊起之底部填充特徵兩者。
溫度感測器封裝100（諸如在圖1中所繪示者）可提供可撓性囊封結構，其實現將晶片110嵌入至可撓性堆疊中而無需光學窗或傳感器，此係因為導電感測器圖案120可形成為佈線層130之底側的部分。
溫度感測器封裝100可額外地特徵化為具有前側連接件，其中導電感測器圖案120相鄰於晶片110之前側111。此外，導電感測器圖案120形成在佈線層130之相對於晶片110的相對側上。如所示，晶片110在佈線層130之第一側（例如頂側136）上，而導電感測器圖案120在相對於第一側136之佈線層130之第二側（例如底側138）上，或在該第二側之一部分上。在一實施例中，佈線層130係直接形成在晶片110之前側111上。例如，配線層144或導通孔146可直接形成在晶片接觸墊112上。同樣地，導電感測器圖案120可直接形成在佈線接觸件148上，諸如在與佈線層130之相對側上的配線層144或導通孔146。
圖2根據一實施例之具有嵌入式晶片110及背側導電感測器圖案120之溫度感測器封裝100的截面側視圖繪示。如所示，溫度感測器封裝100可包括：一佈線層130；一晶片110，其面朝下地安裝在佈線層130上；一絕緣層140，其將該晶片囊封在佈線層130上；及複數個貫穿導通孔160，其等穿過絕緣層140。例如，貫穿導通孔160可延伸於絕緣層140之第一（例如頂部）表面143及第二（例如底部）表面141之間，以與佈線層130之佈線接觸件148接觸。在所繪示之實施例中，導電感測器圖案120形成於絕緣層上方（例如在頂部表面143上方）且耦接至複數個貫穿導通孔160。此外，導電感測器圖案120可直接在晶片110的背側113上方。
導電感測器圖案120可由一或多個材料所形成，且可由與複數個貫穿導通孔160相同或不同的材料形成。在一實施例中，導電溫度感測器圖案120之至少一部分及複數個貫穿導通孔160之至少一者係由相同材料形成。該特定材料可取決於製造方法，諸如電鍍（電鍍、無電電鍍）、印刷、施配等。例如，電鍍技術可包括晶種層及主體層，而印刷或施配技術可包括壓結金屬粒子（其可與黏著劑（諸如聚合物或玻璃）混合）之基質。
現請參照圖3A至圖3B，導電感測器圖案120可取決於功能而具有各種不同的形狀。例如，根據實施例，圖3A係例示性電阻溫度偵測器(RTD)圖案的示意俯視圖繪示，而圖3B係例示性熱電偶圖案的示意俯視圖繪示。現請參照圖3A，呈RTD圖案形式的導電感測器圖案120可包括單一導電層122（或層堆疊）。例如，此可係金屬層、或金屬堆疊、或例如壓結金屬粒子之層。例如，導電層122可由與圖2之貫穿導通孔160相同的材料或不同的材料所形成。參照圖3B，呈熱電偶圖案形式的導電感測器圖案120可包括第一導電材料之第一層122圖案及第二導電材料之第二層124圖案，該第二導電材料不同於該第一導電材料。例如，此等可係具有不同電阻的不同金屬層。第一層122及第二層124可與對應的貫穿導通孔160分開形成，或與該等對應的貫穿導通孔形成。在一實施例中，第一貫穿導通孔160包括對應的第一層122之第一導電材料，且第二貫穿導通孔160包括對應的第二層124之第二導電材料。例如，施配技術可用以形成相同材料的導電層及通孔。在驅離溶劑及退火之後，此經施配之膏或溶液可導致壓結金屬粒子（其可與黏著劑（諸如聚合物或玻璃）混合）之本體。
圖1至圖2之溫度感測器封裝100可共用數個共同特徵，雖然係使用不同製造次序來形成。各製造技術可包括塗佈電氣級(electrical grade)聚合物（諸如聚醯亞胺），並且將主動及/或被動組件（包括晶片110）放置在該電氣級聚合物上。接著，可使用可撓性接合材料來囊封該等組件，且可將第二電氣級可撓性聚合物形成在經囊封結構上。接著，可形成導電感測器圖案120（例如，金屬化層）。
圖4係根據一實施例之製造圖1之溫度感測器封裝之方法的流程圖。圖5A至圖5G係根據一實施例之製造圖1之溫度感測器封裝之方法的示意截面側視圖繪示。為了清楚及簡明起見，同時描述圖4及圖5A至圖5G的處理次序。
在操作4010，形成頂側鈍化層150。如圖5A至圖5B中所示，此次序可包括以黏著劑層202（諸如膠帶）製備剛性載體基材200，隨後施加頂側鈍化層150。例如，可層壓或沉積及固化頂側鈍化層150。在操作4020，使用合適的技術（諸如拾取及放置工具）將晶片110面朝上置於頂側鈍化層150上，如圖5C所示。現請參照圖5D至圖5E，在操作4030，將晶片110囊封在絕緣層140中，隨後在操作4040，在晶片110及絕緣層140上形成佈線層130。取決於應用，絕緣層140可係可撓性材料，但此並非係必需的。用於頂側鈍化層150及佈線層130之（多個）介電層142的材料可係電氣級的，且亦可係可撓性的。接著，在操作4050，可形成導電感測器圖案120，隨後移除黏著劑層202及剛性載體基材200，如圖5F至圖5G中所示。導電感測器圖案120可使用各種適當技術形成，諸如印刷或其他施配技術、物理或化學氣相沉積、及電鍍。
圖6係根據一實施例之製造圖2之溫度感測器封裝之方法的流程圖。圖7A至圖7G係根據一實施例之製造圖2之溫度感測器封裝之方法的示意截面側視圖繪示。為了清楚及簡明起見，同時描述圖4及圖7A至圖7G的處理次序。
在操作6010，將晶片110安裝在佈線層130上。在圖7A至圖7C中繪示的具體次序中，具有黏著劑層202（諸如膠帶）之剛性載體基材200，隨後施加或形成佈線層130。佈線層130可經層壓或替代地使用沉積及圖案化（多個）介電層142及導電（例如金屬化）層以形成配線層144及（可選地）導通孔146之薄膜製造次序來形成。可使用合適的技術（諸如拾取及放置）以焊料凸塊114將晶片110安裝至佈線層130上，該等焊料凸塊例如可接合至佈線接觸件148。
現請參照圖7D，可選地可將晶片110底部填充，隨後在操作6020以絕緣層140囊封，隨後形成可選的頂側鈍化層150。取決於應用，絕緣層140可係可撓性材料，但此並非係必需的。用於頂側鈍化層150及佈線層130之（多個）介電層142的材料可係電氣級的，且亦可係可撓性的。
接著，在操作6030，形成導通孔開口145通過絕緣層140以暴露佈線層130。在頂側鈍化層150存在之處，可額外地形成導通孔開口145通過頂側鈍化層150。可使用圖案化技術（諸如雷射、鑽孔、或化學蝕刻）來形成導通孔開口145。
現參照圖7F，接著在操作6040，在導通孔開口145內形成導電貫穿導通孔160，且在操作6050，形成導電感測器圖案120。可根據實施例循序地或同時執行操作6040及6050。此外，一或多個相同或相異材料係用以形成貫穿導通孔160及導電感測器圖案120。因此，貫穿導通孔160及導電感測器圖案可由相同材料或不同材料形成，且可同時（當相同材料時）或循序地形成。合適的材料包括鎳、銅、鉑、及可包括導電粒子之導電膏，該等導電粒子可經退火或燒結在一起以形成壓結粒子本體。例示性沉積技術包括網版印刷或其他施配技術、物理或化學氣相沉積、及電鍍。在一實施例中，溫度感測器封裝100包括一對貫穿導通孔160，各貫穿導通孔160具有不同組成。例如，諸如組態可連同RTD圖案使用，該RTD圖案包括由不同材料（例如金屬）形成之層122、124。
在下文描述中，描述許多溫度感測器封裝100及製造方法。具體而言，溫度感測器封裝100可係關於圖1至圖2描述及繪示的溫度感測器封裝100的變化。據此，相似的特徵共用相同的元件符號，且相關的描述可不重複以避免不必要地模糊實施例。
圖8係根據一實施例之具有嵌入式晶片110及背側導電感測器圖案120之溫度感測器封裝100的截面側視圖繪示。具體而言，圖8共用許多關於圖2而繪示及描述之實施例的結構相似性，其中一個變化係可將圖8之溫度感測器封裝100視為無基材，且具體而言，佈線層130可係無基材的。在一實施例中，佈線層130可係單一配線層144，並且不包括額外的介電層。類似於圖2，圖8的溫度感測器封裝100可選地可係可撓性堆疊。
圖9係根據一實施例之製造圖8之溫度感測器封裝之方法的流程圖。圖10A至圖10H係根據一實施例之製造圖8之溫度感測器封裝之方法的示意截面側視圖繪示。為了清楚及簡明起見，同時描述圖9及圖10A至圖10H的處理次序。
如在圖10A中所繪示，該次序可以剛性載體基材200上之底側鈍化層300開始。例如，底側鈍化層300可係使用合適的技術形成，諸如層壓或沉積。底側鈍化層300可以與先前描述之頂側鈍化層150類似的材料形成。在操作9010，在底側鈍化層300上形成佈線層130，如圖10B中所示。在一實施例中，佈線層130包括單一金屬化層或配線層144，其可使用各種技術形成，諸如網版印刷或其他施配方法、物理或化學氣相沉積、及電鍍。尤其，網版印刷或其他施配方法可係製造上特別簡單的。
參照圖10C至圖10D，依任一順序，在操作9020，在佈線層130上形成絕緣層，且在操作9030，將晶片110安裝在佈線層130上。在所繪示的特定次序中，可在安裝晶片110之前形成絕緣層140，但順序可反轉。絕緣層140可由先前針對絕緣層140所述之任何材料形成，且可使用合適的技術（諸如噴塗或其他塗佈技術）沉積。在此類次序中，可在固化絕緣層140之前安裝晶片110。替代地，可在放置晶片110之前將一腔蝕刻至絕緣層140中。在又另一實施例中，可在形成絕緣層140之前安裝晶片110。
接著，圖10E至圖10H中繪示的處理次序可如關於圖7D至圖7G所繪示及描述者類似地進行。具體而言，可形成頂側鈍化層150，隨後形成導通孔開口145通過絕緣層140（及頂側鈍化層150，若存在）以暴露佈線層130（或具體而言，配線層144）。循序地或同時地，在操作9040及9050，將導電貫穿導通孔160形成在導通孔開口145內，並且形成導電感測器圖案120。
圖11係根據一實施例之具有嵌入式晶片110及背側導電感測器圖案120之溫度感測器封裝100的截面側視圖繪示。具體而言，圖11共用許多關於圖2所繪示及描述之實施例的結構相似性，其中一個變化係可使用雷射直接成型(laser direct structuring, LDS)製造圖11之溫度感測器封裝100。在一實施例中，絕緣層140係包括經分散非導電金屬有機化合物之LDS相容材料，且可使用LDS來界定導電貫穿導通孔160。具體而言，複數個貫穿導通孔160可包括在該經分散非導電金屬有機化合物中之該金屬之金屬粒子的一成核層。類似地，該導電感測器圖案120可包括在該經分散非導電金屬有機化合物中的該金屬之金屬粒子的一成核層圖案。
圖12係根據一實施例之製造圖11之溫度感測器封裝之方法的流程圖。圖13A至圖13E係根據一實施例之製造圖11之溫度感測器封裝之方法的示意截面側視圖繪示。為了清楚及簡明起見，同時描述圖12及圖13A至圖13D的處理次序。
現請參照圖13A，在操作1210，將晶片110安裝至佈線層130上。應理解，亦可將額外的組件180類似地安裝在本文中所述的所有實施例中。例如，一或多個組件180可係被動裝置，諸如用於晶片110（例如數位IC）之電容器等。在一實施例中，佈線層130係印刷電路板(PCB)，其可選地可係剛性基材。接著，在操作1220，將晶片110及可選的（多個）組件180囊封在絕緣層140中。根據實施例，絕緣層140可係LDS相容材料。應理解，雖然組件180僅關於圖12之實施例來描述及繪示，但在本文中所述之所有其他實施例中，組件180可類似地相鄰於晶片110整合。
根據實施例的LDS相容模製化合物可包括基質材料，及分散在基質材料中的LDS添加劑。例如，LDS添加劑可係非導電金屬有機化合物。此可包括各種金屬氧化物組成物，其可與基質材料（例如，樹脂）複合（錯合）。在一例示性實施例中，LDS添加劑係與基質材料錯合的經分散氧化錫組成物。實施例不限於氧化錫，且可使用各種其他非導電金屬有機化合物，包括其他的複合金屬氧化物。
可將各種有機材料用於基質材料，其可取決於暴露溫度。低溫材料包括聚碳酸酯(PC)及丙烯腈丁二烯苯乙烯(ABS)。可承受焊接溫度的中間溫度材料包括聚己內醯胺(PA6/6)及聚鄰苯二甲醯胺(PPA)。可實際承受任何焊接聚醚醚酮(PEEK)的較高溫材料。其他合適的材料可包括聚丙烯(PP)、聚對苯二甲酸乙二酯(PET)、聚對苯二甲酸丁二酯(PBT)、聚苯硫醚(PPS)、及液晶聚合物(LCP)。
在操作1230，導通孔開口145係雷射界定在絕緣層140中。選擇LDS添加劑及雷射參數使得在將雷射施加至模製化合物時，非導電金屬有機化合物中的元素金屬從該化合物斷開並形成在成核層1410內的成核粒子，而形成對應於雷射圖案的傳導路徑。如所示，成核層1410可作為導通孔開口145之側壁的內襯。可選地，可將雷射程序施加至絕緣層140的頂部表面143，以額外界定可隨後用以形成導電感測器圖案的成核層1412。
根據實施例，在操作1240，可藉由雷射隨後藉由電鍍或施配導電膏（例如基於銀的環氧樹脂）至空的導通孔開口145中作為主體層1420而填充由在雷射程序形成的導通孔開口145來建立貫穿導通孔160。接著，在操作1250，可在絕緣層上形成導電感測器圖案120。如前文所述，導電感測器圖案120可由與貫穿導通孔160相同或不同的材料形成，並且可循序或同時形成。在一實施例中，導電感測器圖案120係相同組成（例如單一金屬層、或金屬堆疊）的RTD圖案。在一實施例中，導電感測器圖案120係包括相異金屬層122、124之熱電偶圖案。圖13D至圖13E繪示此一處理次序。在一實施例中，導電感測器圖案120係使用網版印刷、施配、或選擇性電鍍技術形成。在一實施例中，可針對用於形成層122、124的電鍍次序利用成核（晶種）層1412。因此，針對相異的層122、124，成核（晶種）層1412可由相同材料形成。各種金屬層可以電鍍程序形成，其包括金、鎳、銀、鋅、錫、鉑、鉑銠合金、鐵、鐵銅合金、銅鎳合金等。圖14係根據一實施例之使用LDS及電鍍形成之貫穿導通孔160及導電感測器圖案120及層122的特寫示意截面側視圖繪示。
到目前為止，所述之實施例已關於觸敏溫度感測器封裝100，其中導電感測器圖案120可形成用於該封裝之感測表面的一部分。圖15根據一實施例之用於非接觸式溫度感測之具有嵌入式傳感器之溫度感測器封裝的截面側視圖繪示。根據實施例，嵌入傳感器可提供節省間距。額外地，可在傳感器與晶片110之間提供短且可撓性之佈線以用於整合成用於非接觸式溫度感測之不同子系統。
在一實施例中，溫度感測器封裝100包括：佈線層130（例如PCB），其包括頂側136及底側138；腔190，其形成在佈線層130之底側138中；及傳感器400，其安裝在腔190內。晶片110係安裝在該佈線層之頂側136上且與該傳感器電連接（例如以佈線層144、導通孔146等）。絕緣層430可囊封在腔190內之傳感器400，可選地使表面401暴露，雖然此並非嚴格要求。
雖然未分開繪示，中介層（例如玻璃）或低導熱底部填充材料可用以提供晶片110（例如數位IC）與佈線層130之間的熱隔離。
在一實施例中，傳感器400係紅外線(IR)感測器，其藉由接收來自物體之輻射熱來測量溫度。例如，傳感器400可係基於熱電堆之微機電系統(microelectromechanical system, MEMS) IR感測器。此類感測器可如數百微米一樣小，並可額外包括信號調節器以將來自熱電堆的類比輸出轉換成用於晶片110的數位輸入。溫度感測器封裝100可額外包括在傳感器之表面上方的光學窗420。例如，光學窗420可對IR波長係透明的，且可選地濾除其他波長範圍以減少雜訊。光學窗420可包括多個層，該多個層包括分開的波長範圍濾波器層。替代地，傳感器400可係設計以回應於另一波長範圍（例如可見光等）。類似地，光學窗420可係設計以對可操作波長範圍係透射的，且可選地濾除非可操作波長。
在一實施例中，晶片110、佈線層130、及熱感測器配置可緊固在外殼450內部。外殼450可由金屬屏蔽、玻璃、剛性塑膠（如環氧樹脂、聚碳酸酯、聚乙烯）、軟塑膠（聚矽氧、熱塑性塑膠）等製成。該外殼可具有對應於傳感器400之開口452，或者在使用對IR透明之材料（如藍寶石、矽、熔融矽石、聚碳酸酯、或丙烯酸）時，可能不需要此一開口452。在一實施例中，光學窗420係配置在形成在佈線層130之底側138上的介電層410中之開口412內。介電層410可繼而用經配置在光學窗420上方的外殼中之可選的開口452而緊固至外殼450。在所繪示的實施例中，晶片及佈線層可由外殼450內之開放空間455圍繞（包括側向環繞）。替代地，開放空間455可以絕緣層140取代，該絕緣層囊封晶片及佈線層。在一實施例中，絕緣層140在沒有外殼450的情況中存在。
操作中，圖15的溫度感測器封裝100可位於距來源（諸如目標對象之身體皮膚）的工作距離處，而允許恆定的溫度監測。不需要來源與溫度感測器封裝100之間的實體接觸。
圖16係根據一實施例之製造圖15之溫度感測器封裝之方法的流程圖。圖17A至圖17G係根據一實施例之製造圖15之溫度感測器封裝之方法的示意截面側視圖繪示。在操作1610，將傳感器400安裝在形成於佈線層130中之腔190內。佈線層130可係剛性基材（例如剛性PCB）或可撓性基材（例如可撓性PCB、或使用物膜處理所形成的重分佈層）。如圖17A至圖17C所示，佈線層130可包括一或多個配線層144、介電層142、及導通孔146。可將佈線接觸件148暴露在頂側136、底側138、及腔190內之安裝表面上。導電凸塊404（例如焊料）可施加至腔190內的佈線接觸件148，隨後安裝傳感器400，或替代地，導電凸塊404可在將傳感器400安裝於腔190內之前附接至傳感器400。傳感器400亦可在放置至該腔中之前浸泡於膏或焊劑中，以降低製造複雜性。
現請參照圖17D，在操作1620，絕緣層430係施加在腔190內之傳感器400周圍以囊封傳感器400，而可選地使表面401暴露。接著在操作1630，在傳感器400上方形成光學窗420。如圖17E至圖17F所示，光學窗之形成可包括形成一層光學窗420（其可包括單一層、或多層堆疊），隨後在光學窗420周圍形成介電層（塗層）410。在操作1640，可將額外組件安裝在佈線層130的相對側（例如頂側）上，如圖17G所示。此可隨後整合外殼或額外囊封/模製以形成在圖15中繪示之封裝。
在以下圖18及圖21的描述中，描述及繪示溫度感測器封裝100變化，其與關於圖1所描述及繪示之實施例者共用類似的特徵，諸如包括晶片接觸區域132及相鄰於晶片接觸區域132之觸控區域134的佈線層130。現請參照圖18中繪示之實施例，佈線層130可包括剛性-撓性連接件1800，其中晶片110係安裝在剛性-撓性連接件的剛性部分1810上，且導電感測器圖案120橫跨剛性-撓性連接件的可撓性部分1820上方。類似於佈線層130之先前描述，剛性撓性連接件1800可包括一或多個介電層142及配線層144。剛性部分1810可包括與可撓性部分1820不同的介電層及/或諸如玻璃布等之額外層，以提供剛性。如所示，（多個）頂側金屬化層可用以在剛性-撓性連接件1800之頂側上形成頂側配線層144及導電感測器圖案120兩者。
圖19係根據一實施例之製造圖18之溫度感測器封裝之方法的流程圖。圖20A至圖20C係根據一實施例之製造圖18之溫度感測器封裝之方法的示意截面側視圖繪示。為了清楚及簡明起見，同時描述圖19及圖20A至圖20C的處理次序。在操作1910，將包括配線層144及導電感測器圖案120的頂側金屬化層形成在剛性-撓性連接件1800上。頂側金屬化層可使用任何合適的技術形成，諸如電鍍（電鍍、無電電鍍）、印刷、施配等。如在圖20A中所示，頂側金屬化層橫跨剛性-撓性連接件1800之剛性部分1810及可撓性部分1820兩者。在操作1920，接著將晶片110安裝在剛性部分1810上的頂側金屬化層上（如圖20B中所示），隨後在操作1930，以絕緣層140囊封（如圖20C中所示）。
現請參照圖21中繪示之實施例，可將佈線層130形成在單一基材301上。例如，基材301可係可撓性絕緣材料，諸如電氣級聚合物，諸如聚醯亞胺。佈線層130可係（多個）頂側金屬化層，其包括配線層144及導電感測器圖案120兩者。頂側金屬化層可使用任何合適的技術形成，諸如電鍍（電鍍、無電電鍍）、印刷、施配等。
圖22係根據一實施例之製造圖21之溫度感測器封裝之方法的流程圖。圖23A至圖23D係根據一實施例之製造圖21之溫度感測器封裝之方法的示意截面側視圖繪示。為了清楚及簡明起見，同時描述圖22及圖23A至圖23D的處理次序。在操作2210，將包括配線層144及導電感測器圖案120的頂側金屬化層形成在基材301上。頂側金屬化層可使用任何合適的技術形成，諸如電鍍（電鍍、無電電鍍）、印刷、施配等。如圖23A至圖3B中所示，首先可形成基材301至剛性載體基材上。例如，此可藉由層壓、沉積、施配等來完成。接著，頂側金屬化層係使用各種技術形成，諸如網版印刷或其他施配方法、物理或化學氣相沉積、及電鍍。尤其，網版印刷或其他施配方法可係製造上特別簡單的。接著在操作2220，將晶片110安裝至配線層144上（如圖23C中所示），隨後移除剛性載體基材200（如圖23D中所示）。
圖24至圖26繪示可於其中實施各種實施例的各種可穿戴健康裝置。此等繪示意欲係例示性且非窮舉的實施方案。圖24至圖25係根據實施例之可攜式電子裝置（諸如耳塞式耳機2400）的示意側視圖繪示，其包括殼體2402及本文中所述之一或多個溫度感測器封裝100。例如，IR溫度感測器封裝100（諸如關於圖15所描述及繪示者）可與殼體中的開口2410對準以用於非接觸式溫度感測。具體而言，光學窗420可與開口2410對準。在其他組態中，本文中所述之觸敏溫度感測器封裝100之任一者可係配置在殼體2402之表面內、在該表面上、或與該表面對準以用於觸控感測。圖26係可穿戴裝置2600的示意側視圖繪示，其中溫度感測器封裝100係緊固在織物2602內。例如，該織物可整合至一件衣物中，諸如襯衫、頭帶、手套、綁帶等。
在使用實施例的各種態樣的過程中，所屬技術領域中具有通常知識者將明白上述實施例的組合或變化對於形成溫度感測器封裝係可行的。雖然已經以結構特徵及/或方法動作之特定語言敘述實施例，應了解附加的申請專利範圍不必受限於所述的特定特徵或行為。替代地，所揭示之特定的特徵及動作應理解為可用於說明之申請專利範圍的實施例。
100:溫度感測器封裝 110:晶片 111:前側 112:晶片接觸墊 113:背側 114:焊料凸塊 120:感測器圖案 122:層 124:層 130:佈線層 132:晶片接觸區域 134:觸控區域 136:頂側 138:底側 140:絕緣層 141:表面 142:介電層 143:表面 144:配線層/佈線層 145:導通孔開口 146:導通孔 148:佈線接觸件 150:頂側鈍化層 160:貫穿導通孔 180:組件 190:腔 200:剛性載體基材 202:黏著劑層 300:底側鈍化層 301:基材 400:傳感器 401:表面 404:導電凸塊 410:介電層 412:開口 420:光學窗 430:絕緣層 450:外殼 452:開口 455:開放空間 1210:操作 1220:操作 1230:操作 1240:操作 1250:操作 1410:成核層 1412:成核層 1420:主體層 1610:操作 1620:操作 1630:操作 1640:操作 1800:剛性-撓性連接件 1810:剛性部分 1820:可撓性部分 1910:操作 1920:操作 1930:操作 2210:操作 2220:操作 2400:耳塞式耳機 2402:殼體 2410:開口 2600:可穿戴裝置 2602:織物 4010:操作 4020:操作 4030:操作 4040:操作 4050:操作 6010:操作 6020:操作 6030:操作 6040:操作 6050:操作 9010:操作 9020:操作 9030:操作 9040:操作 9050:操作
〔圖1〕係根據一實施例之具有嵌入式晶片及前側導電感測器圖案之溫度感測器封裝的截面側視圖繪示。 〔圖2〕係根據一實施例之具有嵌入式晶片及背側導電感測器圖案之溫度感測器封裝的截面側視圖繪示。 〔圖3A〕係根據一實施例之電阻溫度偵測器(RTD)圖案的示意俯視圖繪示。 〔圖3B〕係根據一實施例之熱電偶圖案的示意俯視圖繪示。 〔圖4〕係根據一實施例之製造圖1之溫度感測器封裝之方法的流程圖。 〔圖5A〕至〔圖5G〕係根據一實施例之製造圖1之溫度感測器封裝之方法的示意截面側視圖繪示。 〔圖6〕係根據一實施例之製造圖2之溫度感測器封裝之方法的流程圖。 〔圖7A〕至〔圖7G〕係根據一實施例之製造圖2之溫度感測器封裝之方法的示意截面側視圖繪示。 〔圖8〕係根據一實施例之具有嵌入式晶片及背側導電感測器圖案之溫度感測器封裝的截面側視圖繪示。 〔圖9〕係根據一實施例之製造圖8之溫度感測器封裝之方法的流程圖。 〔圖10A〕至〔圖10H〕係根據一實施例之製造圖8之溫度感測器封裝之方法的示意截面側視圖繪示。 〔圖11〕係根據一實施例之具有嵌入式晶片及背側導電感測器圖案之溫度感測器封裝的截面側視圖繪示。 〔圖12〕係根據一實施例之製造圖11之溫度感測器封裝之方法的流程圖。 〔圖13A〕至〔圖13E〕係根據一實施例之製造圖11之溫度感測器封裝之方法的示意截面側視圖繪示。 〔圖14〕係根據一實施例之使用雷射直接成型(LDS)及電鍍形成之貫穿導通孔及導電感測器圖案層的特寫示意截面側視圖繪示。 〔圖15〕根據一實施例之用於非接觸式溫度感測之具有嵌入式傳感器之溫度感測器封裝的截面側視圖繪示。 〔圖16〕係根據一實施例之製造圖15之溫度感測器封裝之方法的流程圖。 〔圖17A〕至〔圖17G〕係根據一實施例之製造圖15之溫度感測器封裝之方法的示意截面側視圖繪示。 〔圖18〕根據一實施例之具有安裝在剛性-撓性連接件上之晶片之溫度感測器封裝之截面側視圖繪示。 〔圖19〕係根據一實施例之製造圖18之溫度感測器封裝之方法的流程圖。 〔圖20A〕至〔圖20C〕係根據一實施例之製造圖18之溫度感測器封裝之方法的示意截面側視圖繪示。 〔圖21〕根據一實施例之可撓性溫度感測器封裝的截面側視圖繪示。 〔圖22〕係根據一實施例之製造圖21之溫度感測器封裝之方法的流程圖。 〔圖23A〕至〔圖23D〕係根據一實施例之製造圖21之溫度感測器封裝之方法的示意截面側視圖繪示。 〔圖24〕至〔圖25〕係根據實施例之耳塞式耳機(earbuds)的示意側視圖繪示。 〔圖26〕係根據一實施例之可穿戴裝置的示意側視圖繪示。
100:溫度感測器封裝
110:晶片
111:前側
112:晶片接觸墊
113:背側
120:感測器圖案
130:佈線層
132:晶片接觸區域
134:觸控區域
136:頂側
138:底側
140:絕緣層
141:表面
142:介電層
143:表面
144:配線層/佈線層
145:導通孔開口
146:導通孔
148:佈線接觸件
150:頂側鈍化層

Claims (14)

  1. 一種溫度感測器封裝，其包含：一佈線層(routing layer)，其包括一頂側及一底側；一腔，其形成在該佈線層之該底側中；一傳感器，其安裝在該腔內；一晶片，其安裝在該佈線層之該頂側上且與該傳感器電連接；一光學窗，其在該傳感器之一表面上方；以及一介電層，其圍繞該光學窗。
  2. 如請求項1之溫度感測器封裝，其進一步包含囊封該佈線層及該晶片之一絕緣層。
  3. 如請求項1之溫度感測器封裝，其中該佈線層包括複數個配線層(wiring layers)以及在相鄰配線層之間延伸的導通孔。
  4. 如請求項3之溫度感測器封裝，其中該佈線層為一剛性印刷電路板(PCB)。
  5. 如請求項1之溫度感測器封裝，其中該光學窗包含多個層。
  6. 如請求項1之溫度感測器封裝，其中該光學窗包含一波長範圍濾波器層。
  7. 如請求項6之溫度感測器封裝，其中該傳感器為一紅外線(IR)感測器，且該波長範圍濾波器層濾除在一IR波長範圍以外的一波長範圍。
  8. 如請求項1之溫度感測器封裝，其中該晶片緊固於一外殼內。
  9. 如請求項8之溫度感測器封裝，其中該佈線層緊固於該外殼內。
  10. 如請求項8之溫度感測器封裝，其中該外殼為一金屬屏蔽。
  11. 如請求項8之溫度感測器封裝，其中該介電層緊固至該外殼。
  12. 如請求項8之溫度感測器封裝，其中該外殼內之一開放空間側向環繞該晶片。
  13. 如請求項12之溫度感測器封裝，其中該佈線層緊固於該外殼內，且該外殼包括在該光學窗上方的一開口。
  14. 如請求項1之溫度感測器封裝，其進一步包含在該腔內之該傳感器周圍的一絕緣層。
TW109141701A 2019-12-11 2020-11-27 用於健康照護產品中溫度感測之封裝技術 TWI780523B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US16/711,247 US11313741B2 (en) 2019-12-11 2019-12-11 Packaging technologies for temperature sensing in health care products
US16/711,247 2019-12-11

Publications (2)

Publication Number Publication Date
TW202123406A TW202123406A (zh) 2021-06-16
TWI780523B true TWI780523B (zh) 2022-10-11

Family

ID=73854949

Family Applications (1)

Application Number Title Priority Date Filing Date
TW109141701A TWI780523B (zh) 2019-12-11 2020-11-27 用於健康照護產品中溫度感測之封裝技術

Country Status (4)

Country Link
US (2) US11313741B2 (zh)
CN (1) CN114746730A (zh)
TW (1) TWI780523B (zh)
WO (1) WO2021118803A2 (zh)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11313741B2 (en) * 2019-12-11 2022-04-26 Apple Inc. Packaging technologies for temperature sensing in health care products
US20220167857A1 (en) * 2020-11-29 2022-06-02 He Lin Intelligent portable medical instrument
CN113556639B (zh) * 2021-06-29 2023-07-28 荣成歌尔微电子有限公司 Sip模组及tws耳机
US20240088068A1 (en) * 2022-09-08 2024-03-14 Nxp Usa, Inc. Semiconductor device with through package via and method therefor

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW200534182A (en) * 2004-04-14 2005-10-16 Advanced Semiconductor Eng Pressing type fingerprint sensor package
TWM454627U (zh) * 2012-12-19 2013-06-01 Txc Corp 分區並列式光感測晶片封裝結構
TW201626514A (zh) * 2014-11-12 2016-07-16 英特爾公司 用於可穿戴裝置之可撓性系統級封裝解決方案
CN206364003U (zh) * 2016-01-20 2017-07-28 苹果公司 封装器件、系统级封装器件和电子设备

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6180867B1 (en) * 1996-04-17 2001-01-30 General Electric Company Thermal sensor array and methods of fabrication and use
WO2010100870A1 (ja) 2009-03-04 2010-09-10 パナソニック株式会社 発電装置付可撓性モジュールと、これを用いた発電装置付可撓性センサ装置
DK2312288T3 (da) 2009-10-16 2013-02-18 Jumo Gmbh & Co Kg Temperatursensor med printplade med flere lag
US8905635B2 (en) 2011-09-30 2014-12-09 Honeywell International Inc. Temperature sensor attachment facilitating thermal conductivity to a measurement point and insulation from a surrounding environment
US9564569B1 (en) * 2015-07-10 2017-02-07 Maxim Integrated Products, Inc. Hermetic solution for thermal and optical sensor-in-package
US10260961B2 (en) 2015-12-21 2019-04-16 Intel Corporation Integrated circuit packages with temperature sensor traces
US20170191879A1 (en) 2015-12-30 2017-07-06 Applied Electronic Materials, LLC Temperature sensors with integrated sensing components
US10634566B2 (en) * 2016-06-30 2020-04-28 Intel Corporation Piezoelectric package-integrated temperature sensing devices
US20180028072A1 (en) 2016-07-29 2018-02-01 VivaLnk, Inc. Wearable thermometer patch capable of measuring human skin temperature at high duty cycle
US10188015B2 (en) 2016-09-20 2019-01-22 Qualcomm Incorporated Hybrid design of heat spreader and temperature sensor for direct handheld device skin temperature measurement
US20190082968A1 (en) 2017-09-15 2019-03-21 Prasad Karnik System and method of continuous health monitoring
DE102018119538A1 (de) * 2018-08-10 2020-02-13 Osram Opto Semiconductors Gmbh Optoelektronisches halbleiterbauteil und herstellungsverfahren für optoelektronische halbleiterbauteile
US11313741B2 (en) * 2019-12-11 2022-04-26 Apple Inc. Packaging technologies for temperature sensing in health care products

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW200534182A (en) * 2004-04-14 2005-10-16 Advanced Semiconductor Eng Pressing type fingerprint sensor package
TWM454627U (zh) * 2012-12-19 2013-06-01 Txc Corp 分區並列式光感測晶片封裝結構
TW201626514A (zh) * 2014-11-12 2016-07-16 英特爾公司 用於可穿戴裝置之可撓性系統級封裝解決方案
CN206364003U (zh) * 2016-01-20 2017-07-28 苹果公司 封装器件、系统级封装器件和电子设备

Also Published As

Publication number Publication date
US20220270955A1 (en) 2022-08-25
WO2021118803A3 (en) 2021-07-22
US20210181039A1 (en) 2021-06-17
WO2021118803A2 (en) 2021-06-17
CN114746730A (zh) 2022-07-12
US11313741B2 (en) 2022-04-26
US11817383B2 (en) 2023-11-14
TW202123406A (zh) 2021-06-16

Similar Documents

Publication Publication Date Title
TWI780523B (zh) 用於健康照護產品中溫度感測之封裝技術
JP7289956B2 (ja) 指紋感知モジュール及びその方法
EP3465758B1 (en) Image sensor semiconductor packages and related methods
US8456021B2 (en) Integrated circuit device having die bonded to the polymer side of a polymer substrate
CN106548947A (zh) 封装结构及其形成方法
CN109891430B (zh) 指纹传感器模块以及用于制造指纹传感器模块的方法
US20210090908A1 (en) Embedded Packaging Concepts for Integration of ASICs and Optical Components
TW201248812A (en) Flip-chip, face-up and face-down centerbond memory wirebond assemblies
CN107958893B (zh) 改进的扇出球栅阵列封装结构及其制造方法
TWI639216B (zh) 埋入式基板封裝結構
TW201515166A (zh) 半導體封裝及製造其之方法
TWI538113B (zh) 微機電晶片封裝及其製造方法
EP2884242B1 (en) Sensor Package And Manufacturing Method
US10458826B2 (en) Mass flow sensor module and method of manufacture
JP2004343638A (ja) 光デバイス及びその製造方法、光モジュール並びに電子機器
TWI491001B (zh) 積體電路總成
TWM537714U (zh) 平板式半導體封裝結構
WO2021174395A1 (zh) 封装结构及封装结构的制作方法
TW202123793A (zh) 電子裝置及製造電子裝置的方法
TWM422746U (en) Flip chip packaging structure

Legal Events

Date Code Title Description
GD4A Issue of patent certificate for granted invention patent