M422746 五、新型說明： 【新型所屬之技術領域】 本創作涉及一種覆晶封裝結構，尤其涉及一種利用表面黏 貼技術（SMT)簡化微型照像模組（CCM)之封裝製程的覆晶封装 結構。 【先前技術】 請參閱第1圖所示’第1圖係為習知技術運用於微塑照像 模組（CCM)2之結構。該結構包括：一電路板35、一影像感測 元件12、錫球14、一蓋體16、一蓋板18、一鏡頭22以及一 鏡片20，其中該影像感測元件12尚需與其它元件相連接如散 熱、外殼保護等，因此需要加以封裝。近年來封裝的型式多樣 化且對製程精準度的要求也越來越高。另外，為了降低工資， 自動化與不銲線亦有其必要性。因此，封裝的技術從DIP(Dual Inline Package)、QFP(Quad Flat Package)等舊封裝型態轉向 BGA(Ball Grid Array)、覆晶 FC(Flip Chip)的封裝型態。由於 覆晶（Flip Chip)封裝方式，可解決打線接合所面臨尺寸過大之 問題’因此針對不同產品應用之各類覆晶封裝技術就此產生， 其中多需利用覆晶技術之導電凸塊來達成封裝接合之目的。 傳統的覆晶封裝技術的製程包括三個基本步驟：第一個步 驟是導電凸塊表面的清洗及去氧化物。第二步驟是迴銲。第三 步驟是後清洗，其中迴銲的步驟是相當重要的。在迴銲步驟中 經過再度加熱的接合劑必須可以在銲墊'導電凸塊與導線間自 由地流動以造成氣密及堅固的接合。然而，適當的迴銲只有在 去除欲接合的表面上之具高溶點之氧化物後才能發生。因此， 如何改良傳統的覆晶技術成為製造業面臨的相當重要的課題。 3 M422746 【新型内容】 為了克服上述現有技術中的問題，本創作提供一種覆晶封 裝結構，不僅可對影像感測元件形成隔熱保護，且可方便利用 表面黏貼技術（SMT)來簡化微型照像模組（CCM)之覆晶封裝製 程，以提昇製造的良率。 為達成上述創作目的，本創作提供一種覆晶封裝結構，適 用於該微型照像模組，其包括一影像感測元件、至少一接合 體、一電路板以及一隔絕板。 該影像感測元件，具有一動作面與一非動作面，該非動作 面設有至少一銲墊以電性連接該影像感測元件，且該動作面用 以截取影像。前述影像感測元件亦可為一般的積體電路元件。 該電路板，包括一金屬導線層及一基板，該基板具有一基 板表面以配置該金屬導線層。前述基板可為陶究基板、高分子 基板或FR4等材質。 該隔絕板，貼附於該影像感測元件的非動作面，使該影像 感測元件的非動作面與電路板之間保持一特定間距，隔絕該電 路板所發散的熱能。前述隔絕板可為紅外線濾光片或雲母片。 該至少一接合體位於該影像感測元件與電路板之間並對 應該至少一銲墊，其包括至少一第一導電結構如導電凸塊，以 及至少一第二導電結構如接合材料。透過該至少一第一導電結 構及該至少一第二導電結構之間的電性連接，進而使該影像感 測元件與電路板之間也達成電性連接。 依據本創作之一較佳實施例，該至少一第一導電結構係 設於該影像感測元件之銲墊上以與該銲墊電性連接，以及該至 少一第二導電結構之一部份，係附著於該至少一第一導電結構 的表面以作電性連接，其另一部份設於該電路板之金屬導線層 4 M422746 上。 依據本創作之另一較佳實施例，該至少一第一導電結構設 於該電路板之金屬導線層上以電性連接該金屬導線層，以及該 至少一第二導電結構的一部份附著於該至少一第一導電結構 的表面以作電性連接，其另一部份設於該影像感測元件之銲墊 上以電性連接該銲墊。 該隔絕板，貼附於該影像感測元件的非動作面，用以隔絕 該電路板之金屬導線層所發散的熱能，且使影像感測元件的非 動作面與該電路板之金屬導線層之間保持一特定間距。 由於本創作利用該隔絕板，使影像感測元件的非動作面與 金屬導線層之間保持特定間距，不僅可對影像感測元件形成隔 熱保護，且可方便利用表面黏貼技術（SMT)來簡化微型照像模 組（CCM)之覆晶封裝製程，可在不需要無塵室製作，即可降低 微粒污染，且可提高其覆晶封裝製程的良率。 【實施方式】 為詳細說明本創作之技術内容、構造特徵、所達成目的 及功效，以下茲舉例並配合圖式詳予說明。在此需注意的是， 不同圖式中相同的元件符號係表示相同或相似的元件。以下所 提及之附加圖式的面方向定義為垂直於該平面的法向量，在此 使用的方向用語是用以說明及理解本創作，而非用以限制本創 作。 請參閱第2a及2b圖，為本創作之一較佳實施例之覆晶封 裝結構，適用於一種微型照像模組(CCM)之製程，其結構包括 一影像感測元件12、複數個接合體33、一電路板35以及一隔 絕板40。 5 M422746 該影像感測元件12,具有一非動作面52與一動作面54 彼此相對，該非動作面52設有至少一銲墊30(如第3a及3b 所示）用於電性連接該影像感測元件12,且該動作面54用以截 取經由該影像感測元件12之影像。在此應注意的是，於本實 施例之覆晶封裝結構係使用影像感測元件12,但並不以此限 制本創作；於其他實施應用中，亦可採用其它積體電路(1C)。 上述其它積體電路(1C)所運用之實施例，皆包含於本創作。但 由於其應用大多與本實施例相同，為避免重複，在此省略。 該電路板35為一基板10及一金屬導線層48所組成，該 基板10具有一基板表面56用以配置該金屬導線層48，且該 金屬導線層48分佈許多金屬走線。前述基板10可為陶瓷基板 或高分子基板，適合易於散熱且因表面平滑易於實施覆晶加工 的製程，或使用一般玻璃纖維（FR4)的材料以降低成本。 如第2b圖所示，該隔絕板40配置於該影像感測元件12 與電路板35之間，特別是貼附於該影像感測元件12的非動作 面52上，而與該複數個接合體33呈共平面排列，藉此可隔絕 該電路板35之金屬導線層48所發散的熱能以保護該影像感測 元件12，且促使該影像感測元件12的非動作面52與該金屬 導線層48之間保持一特定間距D。其中該隔絕板40可使用紅 外線濾光片或是雲母片。 請進一步參閱第3a圖所示之較佳實施例中，該每一接合 體33，係設於該影像感測元件12與電路板35之間並對應該 至少一銲墊30,且該接合體33更包括至少一第一導電結構32 如一導電凸塊，以及至少一第二導電結構34,該至少一第二 導電結構34可用一種接合材料製作形成。其中該第一導電結 構32可以使用導電性佳之金屬例如金、銅或其合金製作，而 形成該至少一第二導電結構34之接合材料可以是銲錫、錫膏 6 M422746 或銀膠等可達到接合效果之導電材料。 上述至卜第—導電結構32之底部設置於該該影像感測 I 12之銲墊30上，用於與該銲墊30電性連接，以及該至 少一第二導電結構34之一部份，係附著於該至少—第一導電 =構32之頂點凸起的表面以作電性連接，且該至少一第二導 電結構34之另一部份設於該電路板35之金料線層48上以 電性連接該金屬導線層48上的-些金屬走線。藉由該至少一 第一導電結構32與該至少-第二導電結構34之間的電性連M422746 V. New Description: [New Technology Field] This creation involves a flip chip package structure, in particular, a flip chip package structure that simplifies the packaging process of a miniature photo module (CCM) by using surface mount technology (SMT). [Prior Art] Referring to Fig. 1 'Fig. 1 is a structure in which a conventional technique is applied to a micro-photographic module (CCM) 2. The structure includes: a circuit board 35, an image sensing component 12, a solder ball 14, a cover 16, a cover 18, a lens 22, and a lens 20, wherein the image sensing component 12 still needs to be combined with other components. The connection is such as heat dissipation, housing protection, etc., so it needs to be packaged. In recent years, the types of packages have been diversified and the requirements for process accuracy have become higher and higher. In addition, in order to reduce wages, automation and non-welding are also necessary. Therefore, the package technology is shifted from the old package type such as DIP (Dual Inline Package) and QFP (Quad Flat Package) to the package type of BGA (Ball Grid Array) or Flip Chip (Flip Chip). Due to the Flip Chip package, the problem of over-sized wire bonding is solved. Therefore, various types of flip chip packaging technologies for different product applications are generated, and the bumps of flip chip technology are often used to achieve the package. The purpose of the joint. The conventional flip chip packaging process consists of three basic steps: the first step is the cleaning and deoxidation of the conductive bump surface. The second step is reflow. The third step is post-cleaning, where the reflow step is quite important. The reheated bonding agent in the reflow step must be free to flow between the pad 'conductive bumps and the wires to create a hermetic and strong bond. However, proper reflow can only occur after removing the oxide with a high melting point on the surface to be joined. Therefore, how to improve the traditional flip chip technology has become a very important issue facing the manufacturing industry. 3 M422746 [New Content] In order to overcome the above problems in the prior art, the present invention provides a flip chip package structure, which not only forms thermal insulation protection for image sensing components, but also facilitates the use of surface mount technology (SMT) to simplify micro photography. A chip-on-package process like a module (CCM) to increase manufacturing yield. In order to achieve the above-mentioned creative purpose, the present invention provides a flip chip package structure suitable for the micro-photographic module, comprising an image sensing element, at least one bonding body, a circuit board and an insulating board. The image sensing component has an active surface and a non-operating surface. The non-operating surface is provided with at least one soldering pad for electrically connecting the image sensing component, and the motion surface is used for capturing an image. The image sensing element may also be a general integrated circuit component. The circuit board includes a metal wiring layer and a substrate having a substrate surface to configure the metal wiring layer. The substrate may be a ceramic substrate, a polymer substrate or a material such as FR4. The insulating plate is attached to the non-operating surface of the image sensing element to maintain a specific spacing between the non-operating surface of the image sensing element and the circuit board to isolate thermal energy emitted by the circuit board. The aforementioned insulation plate may be an infrared filter or a mica plate. The at least one bonding body is located between the image sensing element and the circuit board and includes at least one bonding pad including at least one first conductive structure such as a conductive bump, and at least one second conductive structure such as a bonding material. An electrical connection between the image sensing element and the circuit board is also achieved through electrical connection between the at least one first conductive structure and the at least one second conductive structure. According to a preferred embodiment of the present invention, the at least one first conductive structure is disposed on the pad of the image sensing device to be electrically connected to the pad, and a portion of the at least one second conductive structure. The surface of the at least one first conductive structure is electrically connected, and the other part is disposed on the metal wire layer 4 M422746 of the circuit board. According to another preferred embodiment of the present invention, the at least one first conductive structure is disposed on the metal wire layer of the circuit board to electrically connect the metal wire layer, and a portion of the at least one second conductive structure is attached. The surface of the at least one first conductive structure is electrically connected, and the other part is disposed on the solder pad of the image sensing component to electrically connect the solder pad. The insulating plate is attached to the non-operating surface of the image sensing component for isolating the heat energy radiated by the metal wire layer of the circuit board, and the non-operating surface of the image sensing component and the metal wire layer of the circuit board Maintain a specific spacing between them. Since the present invention utilizes the insulating plate to maintain a specific spacing between the non-operating surface of the image sensing element and the metal wiring layer, not only the image sensing component can be insulated, but also the surface pasting technology (SMT) can be conveniently used. The simplified micro-photographing module (CCM) flip chip packaging process can reduce particle contamination without the need of a clean room, and can improve the yield of the flip chip packaging process. [Embodiment] In order to explain in detail the technical contents, structural features, goals and effects of the present invention, the following is a detailed description with reference to the drawings. It is to be noted that the same element symbols in the different drawings represent the same or similar elements. The face orientation of the additional figures mentioned below is defined as the normal vector perpendicular to the plane, and the directional term used herein is used to describe and understand the present work, and is not intended to limit the creation. Please refer to FIGS. 2a and 2b, which are a flip chip package structure according to a preferred embodiment of the present invention, which is suitable for a process of a miniature camera module (CCM), the structure comprising an image sensing component 12 and a plurality of bonding The body 33, a circuit board 35 and an insulating board 40. 5 M422746 The image sensing component 12 has a non-action surface 52 and an action surface 54 opposite to each other. The non-action surface 52 is provided with at least one solder pad 30 (as shown in FIGS. 3a and 3b) for electrically connecting the image. The sensing component 12 is configured to capture an image of the sensing element 12 via the image. It should be noted that the flip chip package structure of the present embodiment uses the image sensing element 12, but the present invention is not limited thereto; in other implementation applications, other integrated circuits (1C) may also be used. The embodiments used in the above other integrated circuit (1C) are included in the present creation. However, since its application is mostly the same as that of the present embodiment, it is omitted here to avoid repetition. The circuit board 35 is composed of a substrate 10 and a metal wiring layer 48. The substrate 10 has a substrate surface 56 for arranging the metal wiring layer 48, and the metal wiring layer 48 is provided with a plurality of metal traces. The substrate 10 may be a ceramic substrate or a polymer substrate, and is suitable for a process which is easy to dissipate heat and which is easy to perform a flip chip process because of a smooth surface, or a material of a general glass fiber (FR4) to reduce cost. As shown in FIG. 2b, the isolation plate 40 is disposed between the image sensing element 12 and the circuit board 35, and particularly attached to the non-action surface 52 of the image sensing element 12, and is bonded to the plurality of interfaces. The body 33 is arranged in a coplanar manner, thereby tying the heat energy radiated by the metal wire layer 48 of the circuit board 35 to protect the image sensing element 12 and causing the non-action surface 52 of the image sensing element 12 and the metal wire A specific spacing D is maintained between the layers 48. The insulating plate 40 can use an infrared filter or a mica plate. In the preferred embodiment shown in FIG. 3a , each of the bonding bodies 33 is disposed between the image sensing component 12 and the circuit board 35 and corresponds to at least one bonding pad 30 , and the bonding body The 33 further includes at least one first conductive structure 32 such as a conductive bump, and at least one second conductive structure 34. The at least one second conductive structure 34 can be formed by using a bonding material. The first conductive structure 32 can be made of a conductive metal such as gold, copper or an alloy thereof, and the bonding material forming the at least one second conductive structure 34 can be solder, solder paste 6 M422746 or silver paste. The conductive material of the effect. The bottom of the at least one conductive structure 32 is disposed on the solder pad 30 of the image sensing I 12 for electrically connecting to the solder pad 30 and a portion of the at least one second conductive structure 34. Attached to the surface of the apex of the at least first conductive structure 32 for electrical connection, and another portion of the at least one second conductive structure 34 is disposed on the gold wire layer 48 of the circuit board 35 The metal traces on the metal wire layer 48 are electrically connected. Electrical connection between the at least one first conductive structure 32 and the at least-second conductive structure 34
接’可進-步導通影像感測元件12與電路板35之間的電性連 接0Connected to the electrical connection between the image sensing element 12 and the circuit board 35.
另請參閱第3b圖所示，為本創作之另一較佳實施例之覆 晶封裝結構，其與第3a圖之實施例不同之處在於：該至少一 第一導電結構32與該至少一第二導電結構34的配置位置正好 相反。於第3b圖中，該至少一第一導電結構32的底部係設於 該電路板35之金屬導線層48上以電性連接該金屬導線層 上之金屬走線，以及該至少一第二導電結構34的一部份係附 著於該至少一第一導電結構32之頂部凸起的表面以作電性連 接，其另一部份設於該影像感測元件12之銲墊3〇上以電性連 接該銲墊30。同樣的，藉由該至少一第一導電結構32與該至 少一第二導電結構34之間的電性連接，一樣可導通該影像感 測元件12與電路板35之間的電性連接。 如先前技術所述，在覆晶封裝技術的製程中，迴銲的步驟 是相當重要的。為增進了解’特以第2b及3a圖之實施例說明 本創作之製程應用，本創作利用隔絕板40使該影像感測元件 12的非動作面52與該電路板35之金屬導線層48之間保持該 特定間距D，藉此不僅可使迴銲步驟中經過再度加熱的第二導 電結構34可以在該影像感測元件12的銲墊30之上的第—導 7 M422746 電結構32與該電路板35之金屬導線層48之間自由地流動， 形成氣密及堅固的接合，並對影像感測元件12形成隔熱保護 以，提升覆晶製程良率，甚至因空間的足夠，可使用表面黏貼 (SMT)方式製作，以簡化其覆晶封裝製程，不容易有微粒 (particle)污染，無須在無塵室内製作。 如上所述，請參閱第4a圖至第4d圖所示，為依據本創作 之覆晶封裝結構的實施過程： 首先，如第4a圖所示，影像感測元件12的非動作面52 具有複數個第一導電結構32，每一個第一導電結構32的表面 附著一對應的第二導電結構34;其次，請參考如第4b圖所示， 於影像感測元件12的非動作面52附上隔絕板40 ;接著如第 4c圖所示，將第二導電結構34與隔絕板40連接至該電路板 35之金屬導線層48上之金屬走線。最後如第4d圖所示，加 入銲錫55於第一導電結構32、第二導電結構34與該金屬導 線層48之間，並以表面黏貼技術（SMT)加熱銲錫55以將第二 導電結構34固接至該金屬導線層48,以形成影像感測元件12 與電路板35之間的電性連接，因此可簡化製程，提高良率。 雖然本創作已用較佳實施例揭露如上，然其並非用以限定 本創作，本創作所屬技術領域中具有通常知識者，在不脫離本 創作之精神和範圍内，當可作各種之更動與潤飾。因此本創作 之保護範圍當視後附之申請專利範圍所界定者為準。 【圖式簡單說明】 第1圖為習知微型照像模組的結構示意圖。 第2a圖為本創作之覆晶封裝結構的元件分解圖。 第2b圖為本創作之覆晶封裝結構的元件組合圖。 8 M422746 第3a圖為覆晶封裝結構的接合體的結構示意圖。 第3b圖為另一個覆晶封裝結構的接合體的結構示意圖。 第4a圖至第4d圖為本創作之覆晶封裝結構的步驟圖。 【主要元件符號說明】Referring to FIG. 3b, a flip chip package structure according to another preferred embodiment of the present invention is different from the embodiment of FIG. 3a in that the at least one first conductive structure 32 and the at least one The second conductive structure 34 is disposed in the opposite position. In the third embodiment, the bottom of the at least one first conductive structure 32 is disposed on the metal wire layer 48 of the circuit board 35 to electrically connect the metal traces on the metal wire layer, and the at least one second conductive A portion of the structure 34 is attached to the top convex surface of the at least one first conductive structure 32 for electrical connection, and another portion is disposed on the pad 3 of the image sensing element 12 to be electrically connected. The pad 30 is connected sexually. Similarly, the electrical connection between the image sensing component 12 and the circuit board 35 can be turned on by the electrical connection between the at least one first conductive structure 32 and the at least one second conductive structure 34. As described in the prior art, the reflow step is quite important in the process of flip chip packaging techniques. In order to enhance the understanding of the embodiment of the present invention, the creation process of the present invention is described. The present invention utilizes the insulating panel 40 to cause the non-operating surface 52 of the image sensing element 12 and the metal wiring layer 48 of the circuit board 35. The specific spacing D is maintained therebetween, whereby not only the second conductive structure 34 that has been reheated in the reflow step can be the first conductive layer 32 above the pad 30 of the image sensing element 12 The metal wire layer 48 of the circuit board 35 freely flows between the metal wire layers 48 to form an airtight and strong joint, and forms an insulation protection for the image sensing element 12 to improve the coverage of the flip chip process, and even if the space is sufficient, it can be used. Surface mount (SMT) method to simplify the flip chip packaging process, not easy to particle contamination, no need to make in the clean room. As described above, referring to FIGS. 4a to 4d, the implementation of the flip chip package structure according to the present invention: First, as shown in FIG. 4a, the non-action surface 52 of the image sensing element 12 has a plurality of a first conductive structure 32, a surface of each of the first conductive structures 32 is attached with a corresponding second conductive structure 34; secondly, as shown in FIG. 4b, attached to the non-operating surface 52 of the image sensing element 12 The insulating plate 40; then, as shown in FIG. 4c, the second conductive structure 34 and the insulating plate 40 are connected to the metal traces on the metal wiring layer 48 of the circuit board 35. Finally, as shown in FIG. 4d, a solder 55 is added between the first conductive structure 32, the second conductive structure 34 and the metal wiring layer 48, and the solder 55 is heated by a surface pasting technique (SMT) to bond the second conductive structure 34. The metal wire layer 48 is fixed to form an electrical connection between the image sensing element 12 and the circuit board 35, thereby simplifying the process and improving the yield. Although the present invention has been disclosed in the above preferred embodiments, it is not intended to limit the present invention, and those skilled in the art can make various changes without departing from the spirit and scope of the present invention. Retouching. Therefore, the scope of protection of this creation is subject to the definition of the scope of the patent application. [Simple description of the drawing] Fig. 1 is a schematic structural view of a conventional miniature camera module. Figure 2a is an exploded view of the flip chip package structure of the present invention. Figure 2b is a component combination diagram of the flip chip package structure of the present invention. 8 M422746 Figure 3a is a schematic view of the structure of the bonded body of the flip chip package structure. Figure 3b is a schematic view showing the structure of a bonded body of another flip chip package structure. 4a to 4d are diagrams showing the steps of the flip chip package structure of the present invention. [Main component symbol description]
照像模組 2 基板 10 影像感測元件 12 錫球 14 蓋體 16 蓋板 18 鏡片 20 鏡頭 22 銲墊 30 第一導電結構 32 接合體 33 第二導電結構 34 電路板 35 隔絕板 40 金屬導線層 48 非動作面 52 動作面 54 鲜錫 55 基板表面 56 間距DPhotographic Module 2 Substrate 10 Image Sensing Element 12 Tin Ball 14 Cover 16 Cover 18 Lens 20 Lens 22 Pad 30 First Conductive Structure 32 Bonding Body 33 Second Conductive Structure 34 Circuit Board 35 Insulation Board 40 Metal Wire Layer 48 non-action surface 52 action surface 54 fresh tin 55 substrate surface 56 spacing D