TWI744358B - 三維半導體裝置及其製造方法 - Google Patents

三維半導體裝置及其製造方法 Download PDF

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TWI744358B
TWI744358B TW106124085A TW106124085A TWI744358B TW I744358 B TWI744358 B TW I744358B TW 106124085 A TW106124085 A TW 106124085A TW 106124085 A TW106124085 A TW 106124085A TW I744358 B TWI744358 B TW I744358B
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electrode
nanowire
fet
patent application
semiconductor device
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TW201813055A (zh
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傑佛瑞 史密斯
安東 德維利耶
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日商東京威力科創股份有限公司
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/021—Manufacture or treatment of interconnections within wafers or substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B10/00—Static random access memory [SRAM] devices
    • H10B10/12—Static random access memory [SRAM] devices comprising a MOSFET load element
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B10/00—Static random access memory [SRAM] devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B10/00—Static random access memory [SRAM] devices
    • H10B10/12—Static random access memory [SRAM] devices comprising a MOSFET load element
    • H10B10/125—Static random access memory [SRAM] devices comprising a MOSFET load element the MOSFET being a thin film transistor [TFT]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/673—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
    • H10D30/6735—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes having gates fully surrounding the channels, e.g. gate-all-around
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0186—Manufacturing their interconnections or electrodes, e.g. source or drain electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0193—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices the components including FinFETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/85—Complementary IGFETs, e.g. CMOS
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D88/00—Three-dimensional [3D] integrated devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/069—Manufacture or treatment of conductive parts of the interconnections by forming self-aligned vias or self-aligned contact plugs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0167—Manufacturing their channels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/017—Manufacturing their source or drain regions, e.g. silicided source or drain regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/056—Manufacture or treatment of conductive parts of the interconnections by filling conductive material into holes, grooves or trenches
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/074—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H10W20/077—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers on sidewalls or on top surfaces of conductors

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  • Semiconductor Memories (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Thin Film Transistor (AREA)
TW106124085A 2016-07-19 2017-07-19 三維半導體裝置及其製造方法 TWI744358B (zh)

Applications Claiming Priority (6)

Application Number Priority Date Filing Date Title
US201662363973P 2016-07-19 2016-07-19
US62/363,973 2016-07-19
US201662372106P 2016-08-08 2016-08-08
US62/372,106 2016-08-08
US201662373164P 2016-08-10 2016-08-10
US62/373,164 2016-08-10

Publications (2)

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TW201813055A TW201813055A (zh) 2018-04-01
TWI744358B true TWI744358B (zh) 2021-11-01

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US (3) US10453850B2 (OSRAM)
JP (1) JP7046049B2 (OSRAM)
KR (1) KR102228497B1 (OSRAM)
CN (1) CN109643715B (OSRAM)
TW (1) TWI744358B (OSRAM)
WO (1) WO2018017677A1 (OSRAM)

Families Citing this family (60)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10453752B2 (en) 2017-09-18 2019-10-22 Taiwan Semiconductor Manufacturing Co., Ltd. Method of manufacturing a gate-all-around semiconductor device
US10833078B2 (en) 2017-12-04 2020-11-10 Tokyo Electron Limited Semiconductor apparatus having stacked gates and method of manufacture thereof
WO2019183099A1 (en) 2018-03-19 2019-09-26 Tokyo Electron Limited Three-dimensional device and method of forming the same
US10381273B1 (en) 2018-04-11 2019-08-13 International Business Machines Corporation Vertically stacked multi-channel transistor structure
WO2020065732A1 (ja) 2018-09-25 2020-04-02 株式会社ソシオネクスト 半導体装置及びその製造方法
US10872818B2 (en) 2018-10-26 2020-12-22 Taiwan Semiconductor Manufacturing Company, Ltd. Buried power rail and method forming same
EP3671825A1 (en) 2018-12-20 2020-06-24 IMEC vzw Method for connecting a buried interconnect rail and a semiconductor fin in an integrated circuit chip
US10985103B2 (en) 2019-03-01 2021-04-20 Samsung Electronics Co., Ltd Apparatus and method of forming backside buried conductor in integrated circuit
US10818674B2 (en) * 2019-03-07 2020-10-27 Globalfoundries Inc. Structures and SRAM bit cells integrating complementary field-effect transistors
CN110176460B (zh) * 2019-03-29 2021-05-28 长江存储科技有限责任公司 3d存储器件及其制造方法
WO2020217400A1 (ja) 2019-04-25 2020-10-29 株式会社ソシオネクスト 半導体装置
WO2020217396A1 (ja) 2019-04-25 2020-10-29 株式会社ソシオネクスト 半導体装置
JP7560747B2 (ja) * 2019-05-13 2024-10-03 株式会社ソシオネクスト 半導体記憶装置
US11335599B2 (en) * 2019-05-24 2022-05-17 Tokyo Electron Limited Self-aligned contacts for 3D logic and memory
WO2020255801A1 (ja) 2019-06-17 2020-12-24 株式会社ソシオネクスト 半導体記憶装置
WO2020262248A1 (ja) 2019-06-28 2020-12-30 株式会社ソシオネクスト 半導体記憶装置
US11222964B2 (en) * 2019-07-08 2022-01-11 Tokyo Electron Limited Multiple planes of transistors with different transistor architectures to enhance 3D logic and memory circuits
KR102705854B1 (ko) * 2019-07-23 2024-09-11 에스케이하이닉스 주식회사 반도체 소자의 분석 시스템 및 방법
US11488947B2 (en) 2019-07-29 2022-11-01 Tokyo Electron Limited Highly regular logic design for efficient 3D integration
JP7598029B2 (ja) 2019-10-02 2024-12-11 株式会社ソシオネクスト 半導体集積回路装置および半導体集積回路装置の製造方法
US11581338B2 (en) 2019-10-04 2023-02-14 Samsung Electronics Co., Ltd. Optimization of semiconductor cell of vertical field effect transistor (VFET)
CN112614837B (zh) 2019-10-04 2026-03-03 三星电子株式会社 垂直场效应晶体管半导体单元的优化
JP7640861B2 (ja) * 2019-10-18 2025-03-06 株式会社ソシオネクスト 半導体集積回路装置
US11735525B2 (en) 2019-10-21 2023-08-22 Tokyo Electron Limited Power delivery network for CFET with buried power rails
US11495540B2 (en) * 2019-10-22 2022-11-08 Tokyo Electron Limited Semiconductor apparatus having stacked devices and method of manufacture thereof
US11251080B2 (en) 2019-12-02 2022-02-15 Tokyo Electron Limited Method of making 3D circuits with integrated stacked 3D metal lines for high density circuits
TWI839591B (zh) 2019-12-31 2024-04-21 日商東京威力科創股份有限公司 具有三堆疊元件層次的cfet sram位元格
JP7730024B2 (ja) 2020-01-27 2025-08-27 株式会社ソシオネクスト 半導体記憶装置
US11362090B2 (en) * 2020-01-31 2022-06-14 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device having buried logic conductor type of complementary field effect transistor, method of generating layout diagram and system for same
DE102020125647A1 (de) 2020-01-31 2021-08-05 Taiwan Semiconductor Manufacturing Co., Ltd. Halbleitervorrichtung mit Komplementärfeldeffekttransistor des Typs mit vergrabenenen Logikleitern, Layout-Diagramm-Herstellungsverfahren und System dafür
US10971505B1 (en) * 2020-02-10 2021-04-06 Taiwan Semiconductor Manufacturing Company Limited Memory devices and methods of manufacturing thereof
US11469321B2 (en) 2020-02-27 2022-10-11 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device
JP2021150501A (ja) * 2020-03-19 2021-09-27 キオクシア株式会社 半導体記憶装置
US11742247B2 (en) 2020-07-17 2023-08-29 Synopsys, Inc. Epitaxial growth of source and drain materials in a complementary field effect transistor (CFET)
US11915984B2 (en) * 2020-07-17 2024-02-27 Synopsys, Inc. Forming a wrap-around contact to connect a source or drain epitaxial growth of a complimentary field effect transistor (CFET) to a buried power rail (BPR) of the CFET
US12080608B2 (en) * 2020-07-17 2024-09-03 Synopsys, Inc. Self-limiting manufacturing techniques to prevent electrical shorts in a complementary field effect transistor (CFET)
US11710634B2 (en) 2020-07-17 2023-07-25 Synopsys, Inc. Fabrication technique for forming ultra-high density integrated circuit components
US12237333B2 (en) 2020-09-01 2025-02-25 Tokyo Electron Limited Power wall integration for multiple stacked devices
US11665878B2 (en) 2020-09-30 2023-05-30 Tokyo Electron Limited CFET SRAM bit cell with two stacked device decks
US11621332B2 (en) 2021-01-14 2023-04-04 International Business Machines Corporation Wraparound contact to a buried power rail
US11723187B2 (en) * 2021-03-16 2023-08-08 Tokyo Electron Limited Three-dimensional memory cell structure
US12557377B2 (en) 2021-05-13 2026-02-17 Tokyo Electron Limited Inverted cross-couple for top-tier FET for multi-tier gate-on-gate 3DI
US12087770B2 (en) 2021-08-05 2024-09-10 International Business Machines Corporation Complementary field effect transistor devices
US12002850B2 (en) 2021-08-31 2024-06-04 International Business Machines Corporation Nanosheet-based semiconductor structure with dielectric pillar
US11804436B2 (en) 2021-09-03 2023-10-31 International Business Machines Corporation Self-aligned buried power rail cap for semiconductor devices
US12426338B2 (en) 2021-10-27 2025-09-23 International Business Machines Corporation Buried power rail with robust connection to a wrap around contact
US12279452B2 (en) 2021-12-15 2025-04-15 International Business Machines Corporation Stacked complementary transistor structure for three-dimensional integration
US12349406B2 (en) 2021-12-17 2025-07-01 International Business Machines Corporation Hybrid gate cut for stacked transistors
US11665877B1 (en) 2021-12-29 2023-05-30 International Business Machines Corporation Stacked FET SRAM design
KR20230133440A (ko) 2022-03-11 2023-09-19 삼성전자주식회사 3차원 반도체 소자 및 그의 제조 방법
US12575113B2 (en) 2022-03-26 2026-03-10 International Business Machines Corporation High density memory with stacked nanosheet transistors
US12349457B2 (en) 2022-04-14 2025-07-01 International Business Machines Corporation Stacked transistors having bottom contact with replacement spacer
US12200920B2 (en) 2022-04-28 2025-01-14 Samsung Electronics Co., Ltd. Integrated circuit devices including a power distribution network and methods of forming the same
US12272648B2 (en) 2022-06-15 2025-04-08 International Business Machines Corporation Semiconductor device having a backside power rail
US12262552B2 (en) 2022-07-22 2025-03-25 International Business Machines Corporation Source/drain epitaxy process in stacked FET
US12604496B2 (en) 2022-09-22 2026-04-14 International Business Machines Corporation Epitaxy everywhere based self-aligned direct backside contact
US12394462B2 (en) 2022-09-28 2025-08-19 International Business Machines Corporation Stacked FET with three-terminal SOT MRAM
US12550427B2 (en) 2022-09-29 2026-02-10 International Business Machines Corporation Vertical inverter formation on stacked field effect transistor (SFET)
US12557260B2 (en) 2022-10-05 2026-02-17 International Business Machines Corporation Stacked-FET SRAM cell with bottom pFET
CN118431184A (zh) * 2024-07-05 2024-08-02 芯梦达半导体科技(济南)有限公司 存储装置、半导体器件及存储器系统

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060028861A1 (en) * 2004-08-04 2006-02-09 Gong-Heum Han Semiconductor memory device and method for arranging and manufacturing the same
US20090242260A1 (en) * 2008-04-01 2009-10-01 Altebaeumer Thomas Heinz-Helmut Device interconnects
US20130161756A1 (en) * 2011-12-23 2013-06-27 Glenn A. Glass Nanowire transistor devices and forming techniques
US20140001441A1 (en) * 2012-06-29 2014-01-02 Seiyon Kim Integration methods to fabricate internal spacers for nanowire devices
US20160181097A1 (en) * 2014-12-22 2016-06-23 Lnternational Business Machines Corporation Epitaxial Growth Techniques for Reducing Nanowire Dimension and Pitch

Family Cites Families (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5631863A (en) 1995-02-14 1997-05-20 Honeywell Inc. Random access memory cell resistant to radiation induced upsets
KR100653699B1 (ko) * 2004-08-04 2006-12-04 삼성전자주식회사 반도체 메모리 장치 및 이 장치의 배치방법
US7598544B2 (en) * 2005-01-14 2009-10-06 Nanotero, Inc. Hybrid carbon nanotude FET(CNFET)-FET static RAM (SRAM) and method of making same
JP4496094B2 (ja) 2005-01-14 2010-07-07 シャープ株式会社 半導体装置及び半導体集積回路
KR100707212B1 (ko) 2006-03-08 2007-04-13 삼성전자주식회사 나노 와이어 메모리 소자 및 그 제조 방법
KR100718159B1 (ko) * 2006-05-18 2007-05-14 삼성전자주식회사 와이어-타입 반도체 소자 및 그 제조 방법
US8338292B2 (en) * 2009-02-18 2012-12-25 International Business Machines Corporation Body contacts for FET in SOI SRAM array
US8084308B2 (en) * 2009-05-21 2011-12-27 International Business Machines Corporation Single gate inverter nanowire mesh
JP4922370B2 (ja) * 2009-09-07 2012-04-25 株式会社東芝 不揮発性半導体記憶装置、及びその製造方法
US8183104B2 (en) 2010-07-07 2012-05-22 Hobbs Christopher C Method for dual-channel nanowire FET device
US8753942B2 (en) 2010-12-01 2014-06-17 Intel Corporation Silicon and silicon germanium nanowire structures
DE112011105970B4 (de) 2011-12-19 2020-12-03 Intel Corporation CMOS-Implementierung aus Germanium und lll-V-Nanodrähten und -Nanobändern in Gate-Rundum-Architektur
WO2013095646A1 (en) 2011-12-23 2013-06-27 Intel Corporation Cmos nanowire structure
CN102623322B (zh) 2012-03-31 2014-07-16 上海华力微电子有限公司 基于体硅的纵向堆叠式SiNWFET制备方法
US9224809B2 (en) * 2012-05-17 2015-12-29 The Board Of Trustees Of The University Of Illinois Field effect transistor structure comprising a stack of vertically separated channel nanowires
KR102002380B1 (ko) 2012-10-10 2019-07-23 삼성전자 주식회사 반도체 장치 및 그 제조 방법
US9000530B2 (en) * 2013-04-23 2015-04-07 International Business Machines Corporation 6T SRAM architecture for gate-all-around nanowire devices
US9595525B2 (en) 2014-02-10 2017-03-14 International Business Machines Corporation Semiconductor device including nanowire transistors with hybrid channels
US9583490B2 (en) * 2015-01-20 2017-02-28 Taiwan Semiconductor Manufacturing Company, Ltd. Inverters and manufacturing methods thereof
EP3127862B1 (en) 2015-08-06 2018-04-18 IMEC vzw A method of manufacturing a gate-all-around nanowire device comprising two different nanowires
CN106910716B (zh) 2015-12-22 2021-10-15 Imec 非营利协会 Si基高迁移率CMOS装置的制造方法及所得装置
US10043796B2 (en) * 2016-02-01 2018-08-07 Qualcomm Incorporated Vertically stacked nanowire field effect transistors

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060028861A1 (en) * 2004-08-04 2006-02-09 Gong-Heum Han Semiconductor memory device and method for arranging and manufacturing the same
US20090242260A1 (en) * 2008-04-01 2009-10-01 Altebaeumer Thomas Heinz-Helmut Device interconnects
US20130161756A1 (en) * 2011-12-23 2013-06-27 Glenn A. Glass Nanowire transistor devices and forming techniques
US20140001441A1 (en) * 2012-06-29 2014-01-02 Seiyon Kim Integration methods to fabricate internal spacers for nanowire devices
US20160181097A1 (en) * 2014-12-22 2016-06-23 Lnternational Business Machines Corporation Epitaxial Growth Techniques for Reducing Nanowire Dimension and Pitch

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US20180240802A1 (en) 2018-08-23
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US10964706B2 (en) 2021-03-30
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