TWI719838B - Display device - Google Patents

Abstract

A display device has a display area and a peripheral area, and includes data lines, scan lines, gate transmission lines, and sub-pixels. The data lines and the gate transmission lines extend from the peripheral area into the display area. The data lines located in the display area extend along the first direction. The scan lines are located in the display area and extend along a second direction intersected with the first direction. The gate transmission lines are electrically connected to the scan lines. One of the gate transmission lines includes first, second, and third wires located in the display area. The first and third wires extend along the first direction. The second wire extends along the second direction. The first, second and third wires are electrically connected in sequence. The third wire is electrically connected to one of the scan lines.

Description

Display device

The present invention relates to a display device.

Products with display devices such as mobile phones, TVs, and tablet computers have become indispensable electronic devices in modern life. In order to attract consumers to purchase their own products, many display device manufacturers are committed to reducing the bezel of the display device so that the display device can have a better appearance. However, reducing the frame of the display device will increase the density of wires in the display device, and easily affect the display quality of the display device.

The invention provides a display device, which can reduce the negative influence of the gate transmission line on the display quality.

At least one embodiment of the present invention provides a display device. The display device has a display area and a peripheral area, and includes multiple data lines, multiple scan lines, multiple gate transmission lines, and multiple sub-pixels. The data line extends from the peripheral area into the display area. The data line located in the display area extends along the first direction. The scan line is located in the display area and extends along a second direction staggered with the first direction. The gate transmission line extends from the peripheral area into the display area and is electrically connected to the scan line. One of the gate transmission lines includes a first wire, a second wire, and a third wire located in the display area. The first wire and the third wire extend along the first direction. The second wire extends along the second direction. The first wire, the second wire and the third wire are electrically connected in sequence. The third wire is electrically connected to one of the scan lines. The sub-pixels are electrically connected to the scan line and the data line.

At least one embodiment of the present invention provides a display device. The display device has a display area and a peripheral area, and includes a plurality of data lines, a first level scan line to an nth level scan line, a first level gate transmission line to an nth level gate transmission line, and a plurality of sub-pixels. The data line extends from the peripheral area into the display area, and the data line located in the display area extends along the first direction. The scan lines from level 1 to level n are located in the display area and extend along a second direction staggered with the first direction, where n is an integer greater than one. The first level scan lines to the nth level scan lines are sequentially arranged along the first direction. The first gate transmission line to the nth gate transmission line extend from the peripheral area into the display area, and are electrically connected to the first scan line to the nth scan line, respectively. The first gate transmission line to the nth gate transmission line are arranged in a staggered arrangement. The sub-pixels are electrically connected to the first level scan line to the nth level scan line and the data line.

Hereinafter, multiple embodiments of the present invention will be disclosed in the form of drawings. For clear description, many practical details will be described in the following description. However, it should be understood that these practical details should not be used to limit the present invention. That is to say, in some embodiments of the present invention, these practical details are unnecessary. In addition, for the sake of simplification of the drawings, some conventional structures and elements will be omitted in the drawings or shown in a simple schematic manner.

Throughout the specification, the same reference numerals indicate the same or similar elements. In the drawings, the thickness of layers, films, panels, regions, etc., are exaggerated for clarity. It should be understood that when an element such as a layer, film, region, or substrate is referred to as being "on" or "connected to" another element, it can be directly on or connected to the other element, or There may be other elements between the element and the other element. In contrast, when an element is referred to as being "directly on" or "directly connected to" another element, there are no other elements between the element and the other element. As used herein, "connection" can refer to physical and/or electrical connection. Furthermore, the "electrical connection" or "coupling" between the two elements may mean that there are other elements between the two elements.

FIG. 1 is a schematic top view of a display device according to an embodiment of the invention.

1, the display device 10 has a display area AA and a peripheral area BA, and includes a plurality of data lines DL1 to DLz, a plurality of scan lines SL1 to SLy, a plurality of gate transmission lines GL1 to Gly, and a plurality of data lines DL1 to DLz on the substrate SB1. Sub-pixel SP. In this embodiment, the display device 10 further includes a driving circuit DR located in the peripheral area BA. In this embodiment, the display device 10 is single-sided, and the driving circuit DR is located on one side of the display area AA.

The data lines DL1 to DLz are electrically connected to the driving circuit DR. For example, the data lines DL1 to DLz are electrically connected to source driving elements (not shown) in the driving circuit DR. The data lines DL1 to DLz extend from the peripheral area BA into the display area AA. The data lines DL1 ˜DLz located in the display area AA extend along the first direction D1. Although in this embodiment, the data lines DL1 to DLz located in the peripheral area BA also extend along the first direction D1, the invention is not limited to this. In other embodiments, the data lines DL1 to DLz located in the peripheral area BA include fan-out lines, and the data lines DL1 to DLz located in the peripheral area BA may not be parallel to each other.

The gate transmission lines GL1-GLy are electrically connected to the driving circuit DR. For example, the gate transmission lines GL1 ˜GLy are electrically connected to X gate driving elements GD in the driving circuit DR, where X is an integer greater than or equal to 1. In this embodiment, the driving circuit DR includes four gate driving elements GD, and each gate driving element GD is connected to the gate transmission lines GL1 ˜GLy. In other words, the display device 10 includes four gate transmission lines GL1, four gate transmission lines GL2... and four gate transmission lines GLy, and each gate driving element GD is electrically connected to different gate transmission lines GL1 and different gates. GL2...and different gate transmission lines GLy.

The scan lines SL1 ˜SLy are located in the display area AA and extend along the second direction D2 staggered with the first direction D1. The gate transmission lines GL1 ˜GLy extend from the peripheral area BA into the display area AA, and are electrically connected to the scan lines SL1 ˜SLy. In this embodiment, the gate transmission line GL1 is electrically connected to the scan line SL1, the gate transmission line GL2 is electrically connected to the scan line SL2, the gate transmission line GLy is electrically connected to the scan line SLy, and other gate transmission lines are electrically connected to the scan line. The way of sexual connection can be deduced by analogy.

In this embodiment, each gate driving element GD is electrically connected to the same scan line through different gate transmission lines. For example, each gate driving element GD is electrically connected to the same scan line SL1 through different gate transmission lines GL1, and each gate driving element GD is electrically connected to the same scan line SL1 through different gate transmission lines GL2. For the scan line SL2, each gate driving element GD is electrically connected to the same scan line SLy through different gate transmission lines GLy. By providing signals to the same scan line through a plurality of gate driving elements GD, the charging speed of the scan lines SL1 to SLy can be shortened.

The plurality of sub-pixels SP are electrically connected to the scan lines SL1 to SLy and the data lines DL1 to DLz. For example, each sub-pixel SP includes a switching element T and a pixel electrode PE electrically connected to the switching element T and electrically connected to the switching element T, wherein the switching element T is electrically connected to a corresponding scan line and corresponding One of the data lines. In this embodiment, the sub-pixels SP include red sub-pixels, green sub-pixels, and blue sub-pixels. For example, the sub-pixel SP that overlaps the red filter element (not shown) is a red sub-pixel, and the sub-pixel SP that overlaps the green filter element (not shown) is a green sub-pixel, which overlaps The sub-pixel SP of the blue filter element (not shown) is a blue sub-pixel. The sub-pixel SP array is formed into a plurality of pixels PX. For example, each pixel PX includes a red sub-pixel, a green sub-pixel, and a blue sub-pixel. In some embodiments, each pixel PX may also include sub-pixels of other colors. In this embodiment, each pixel PX includes three sub-pixels SP, and each pixel PX is electrically connected to one scan line and three data lines.

The pixels PX are arranged in N rows along the first direction D1, and are arranged in M rows along the second direction D2. For example, the display device 10 includes 4320 scan lines and 23040 data lines. Therefore, the pixels PX are arranged in 4320 rows along the first direction D1 and 7680 rows along the second direction D2 (that is, 23040 divided by 3).

In some embodiments, X gate driving elements GD divide the display area AA into X pixel areas PXR, and the pixels PX in each pixel area PXR are arranged in M/X rows along the second direction D2, and They are arranged in N rows along the first direction D1. Therefore, the length L1 of each pixel area PXR in the first direction D1 is approximately the length L2 of N pixels PX, and the width W1 of each pixel area PXR in the second direction D2 is approximately M/X The width W2 of the pixel PX. Although in FIG. 1, the length L2 of the pixel PX is not equal to the width W2 of the pixel PX, the present invention is not limited thereto. In other embodiments, the length L2 of the pixel PX is approximately equal to the width W2 of the pixel PX.

In this embodiment, each pixel area PXR overlaps N gate transmission lines. In some embodiments, M/X is less than N. In other words, in each pixel area PXR, the number of pixels PX in the second direction D2 is less than the number of gate transmission lines. In other embodiments, the display device has a 2DhG structure, and each scan line SL1 to SLy is electrically connected to two rows of pixels PX. Therefore, each pixel area PXR overlaps with N/2 gate transmission lines, and M/X is less than N/2.

FIG. 2A is a schematic top view of a display device according to an embodiment of the invention. Fig. 2B is a schematic cross-sectional view taken along the line a-a' in Fig. 2A. It must be noted here that the embodiment of FIG. 2A and FIG. 2B follow the element numbers and part of the content of the embodiment of FIG. 1, wherein the same or similar reference numbers are used to represent the same or similar elements, and the same technical content is omitted. Description. For the description of the omitted parts, reference may be made to the foregoing embodiment, which will not be repeated here. For the convenience of description, FIG. 2 omits some components (such as switching elements, pixel electrodes, and data lines).

2A and 2B, in this embodiment, the display device 20 includes a substrate SB2 and a red filter element R, a green filter element G, and a blue filter element B disposed on the substrate SB2. Each pixel PX includes a red sub-pixel SP1 overlapping the red filter element R, a green sub-pixel SP2 overlapping the green filter element G, and a blue sub-pixel SP3 overlapping the blue filter element B. In this embodiment, the display device 20 includes a first metal layer M1 disposed on the substrate SB1, a first insulating layer I1 disposed on the first metal layer M1, and a second metal layer disposed on the first insulating layer I1. M2 is disposed on the second insulating layer I2 on the second metal layer M2 and the display medium layer LC (for example, liquid crystal) between the substrate SB1 and the substrate SB2. Although in this embodiment, the display device 20 is a liquid crystal panel as an example, the invention is not limited to this. In other embodiments, the display device may also be an organic light emitting diode display panel, a micro light emitting diode display panel, or other types of display panels.

In this embodiment, the gate transmission line includes the first stage to the nth stage. In other words, when the screen is displayed, the scanning is performed in a cycle from the first gate transmission line to the nth gate transmission line. In other embodiments, the gate transmission line may be scanned in a cycle with tens, hundreds or other numbers of gate transmission lines, which means that the present invention does not limit n to 9. In other words, the next gate transmission line of the 9th level gate transmission line GL9 (for example, the gate transmission line not shown on the right side of the gate transmission line GL9 in FIG. 2A) may be the 10th level gate transmission line.

The number of pixels PX in the second direction D2 is smaller than the number of gate transmission lines. In this embodiment, eight pixels PX in the second direction D2 correspond to nine gate transmission lines (for example, gate transmission lines GL1 to GL9). The end points of the gate transmission lines GL1 to GL9 at the gate driving element GD are arranged in sequence, for example. For example, the gate transmission lines GL1 to GL9 are arranged in order from left to right at the gate driving element GD, but the invention is not limited to this.

One of the gate transmission lines GL1 to GL9 (for example, the gate transmission line GL2) includes a first wire CL1, a second wire CL2, and a third wire CL3 located in the display area AA. The first conductive line CL1 and the third conductive line CL2 extend along the first direction D1. The second conductive line CL2 extends along the second direction D2. The first wire CL1, the second wire CL2, and the third wire CL3 are electrically connected in sequence. The third wire CL3 is electrically connected to one of the scan lines SL1 to SL9 (for example, the scan line SL2). In this embodiment, the gate transmission line GL2 further includes a fourth wire CL4 located in the peripheral area BA. The fourth conductive line CL4 extends along the second direction D2 and traverses the gate transmission lines GL3-GL7. The fourth wire CL4 is electrically connected to the first wire CL1. With the arrangement of the fourth wire CL4, the area occupied by the gate transmission line GL2 in the display area AA can be reduced. In this embodiment, the second conductive line CL2 and the fourth conductive line CL4 of one of the gate transmission lines GL1 to GL9 (for example, the gate transmission line GL2) and the scan lines SL1 to SL9 belong to the same conductive film layer (for example, the first metal layer) M1), which means that the second conductive lines CL2 and the scan lines SL1 to SL9 are formed by the same patterning process. In this embodiment, one of the gate transmission lines GL1 to GL9 (for example, the gate transmission line GL2) has the first conductive line CL1 and the third conductive line CL3, and the other ones of the gate transmission lines GL1 to GL9 (for example, the gate transmission line GL1) , GL3 ~ GL9) and the data line DL belong to the same conductive film layer (for example, the second metal layer M2), which means that the first conductive line CL1, the third conductive line CL3, and the other gate transmission lines GL1 ~ GL9 are the same as the data line DL It is formed by the same patterning process.

In this embodiment, the scan lines SL1 to SL9, the second conductive line CL2, and the fourth conductive line CL4 belong to the first metal layer M1, and the gate transmission line GL1, the gate transmission line GL3 to GL9, and the data line (please refer to FIG. 1), The first conductive line CL1 and the third conductive line CL3 belong to the second metal layer M2. The gate transmission lines GL1 to GL9 are respectively electrically connected to the scan lines SL1 to SL9 through the openings H1 to H9, wherein the openings H1 to H9 penetrate the first insulating layer I1. The first wire CL1 and the third wire CL3 are electrically connected to the second wire CL2 through the openings O1, O2, respectively, and the fourth wire CL4 is electrically connected to the first wire CL1 through the opening O3, wherein the openings O1, O2, O3 penetrate the first wire. Insulation layer I1.

In this embodiment, the third conductive line CL3 of the gate transmission line GL2 is aligned with the gate transmission line GL7, but the invention is not limited to this. In other embodiments, the third conductive line CL3 of the gate transmission line GL2 is aligned with the gate transmission line GL8 or the gate transmission line GL9. In this embodiment, the first conductive line CL1 of the gate transmission line GL2 is located between the gate transmission line GL7 and the gate transmission line GL8, but the invention is not limited to this. In other embodiments, the first conductive line CL1 of the gate transmission line GL2 is located between the gate transmission line GL6 and the gate transmission line GL7 or between the gate transmission line GL8 and the gate transmission line GL9. In this embodiment, the gate transmission line GL2 includes first to fourth conductive lines CL1 to CL4, but the invention is not limited to this. In other embodiments, one of the gate transmission lines GL3 to GL8 may include the first to fourth wires CL1 to CL4, which enables the display device to have eight pixels PX corresponding to nine gates in the second direction D2. Transmission line GL1～GL9.

In this embodiment, the gate transmission lines GL1, GL3 ~ GL9 overlap the boundary between the red sub-pixel SP1 and the blue sub-pixel SP3, thereby reducing the negative impact of the gate transmission lines GL1, GL3 ~ GL9 on the display quality .

The third conductive line CL3 of the gate transmission line GL2 overlaps the boundary between the red sub-pixel SP1 and the blue sub-pixel SP3, and the first conductive line CL1 of the gate transmission line GL2 overlaps the boundary between the red sub-pixel SP1 and the green sub-pixel SP2 Or the junction of the blue sub-pixel SP3 and the green sub-pixel SP2, thereby reducing the negative impact of the gate transmission line GL2 on the display quality. Extending the length of the third wire CL3 can shorten the first wire CL1, and further reduce the negative impact of the gate transmission line GL2 on the display quality. In this embodiment, the length of the third conductive line CL3 is greater than the length L3 of each sub-pixel (or the length of the pixel PX).

3 is a signal waveform diagram of scan lines and data lines of the display device of FIG. 2A.

In each frame (or in each scan cycle), each scan line SL1 to SL9 has a main charging time Mt and a precharging time Pt. The scanning line is precharged during the precharging time Pt, so that the scanning line can reach the expected voltage during the main charging time Mt. The voltage on the scan line in the precharge time Pt may be greater than, equal to, or less than the voltage on the scan line in the main charge time Mt.

The pre-charging time Pt is t times the main charging time Mt, where t is an integer greater than one. The precharging time Pt of each scan line may overlap the main charging time Mt of the scan lines of the previous stages and the precharging time Pt of the scan lines of the later stages. For example, in this embodiment, the precharge time Pt is 3 times (t=3) the main charging time Mt, and the precharge time Pt of the second level scan line SL2 will overlap with the precharge time Pt of the third level scan line SL3. The charging time Pt, the pre-charging time Pt of the fourth-level scanning line SL4, and the pre-charging time Pt of the fifth-level scanning line SL5. Therefore, the second-level gate transmission line GL2 is more likely to interact with the third-level scan line SL3, the fourth-level scan line SL4, and the fifth-level scan line SL5.

2A, the length of the third conductive line CL3 is greater than the length L3 of t (for example, 3) sub-pixels, and the third conductive line CL3 overlaps the third level scan line SL3, the fourth level scan line SL4, and the fifth level scan Line SL5 and the sixth-level scan line SL6. The third wire CL3 overlaps the boundary between the red sub-pixel SP1 and the blue sub-pixel SP3. Therefore, even if the second-level gate transmission line GL2 is easily connected to the third-level scan line SL3, the fourth-level scan line SL4, and the fifth-level The scan line SL5 has an interactive influence, and the gate transmission line GL2 has less negative influence on the display quality.

Based on the above, the gate transmission line GL2 includes a first wire CL1 extending along the first direction D1, a second wire CL2 extending along the second direction D2, and a third wire CL3 extending along the first direction D1, which can reduce the gate The effect of the polar transmission line GL2 on the display quality of the display device 20.

FIG. 4 is a schematic top view of a display device according to an embodiment of the invention. It must be noted here that the embodiment of FIG. 4 uses the element numbers and part of the content of the embodiment of FIGS. 2A and 2B, wherein the same or similar reference numbers are used to represent the same or similar elements, and the same technical content is omitted. Description. For the description of the omitted parts, reference may be made to the foregoing embodiment, which will not be repeated here.

The main difference between the display device 30 of FIG. 4 and the display device 20 of FIG. 2A is that the first wire CL1 of the gate transmission line GL2 of the display device 30 is located between the gate transmission line GL6 and the gate transmission line GL7.

Based on the above, the gate transmission line GL2 includes a first wire CL1 extending along the first direction D1, a second wire CL2 extending along the second direction D2, and a third wire CL3 extending along the first direction D1, which can reduce the gate The effect of the polar transmission line GL2 on the display quality of the display device 30.

FIG. 5 is a schematic top view of a display device according to an embodiment of the invention. It must be noted here that the embodiment of FIG. 5 uses the element numbers and part of the content of the embodiment of FIGS. 2A and 2B, wherein the same or similar reference numbers are used to represent the same or similar elements, and the same technical content is omitted. Description. For the description of the omitted parts, reference may be made to the foregoing embodiment, which will not be repeated here.

The main difference between the display device 40 of FIG. 5 and the display device 20 of FIG. 2A is that the first wire CL1 of the gate transmission line GL2 of the display device 40 is located between the gate transmission line GL1 and the gate transmission line GL3.

In this embodiment, the gate transmission line GL2 does not need to be provided with a fourth wire that crosses other gate transmission lines in the peripheral area. In this embodiment, the second conductive line CL2 of the gate transmission line GL2 crosses the gate transmission lines GL3 to GL6, and the second conductive line CL2 overlaps the gate transmission lines GL3 to GL5.

Based on the above, the gate transmission line GL2 includes a first wire CL1 extending along the first direction D1, a second wire CL2 extending along the second direction D2, and a third wire CL3 extending along the first direction D1, which can reduce the gate The effect of the polar transmission line GL2 on the display quality of the display device 40.

FIG. 6 is a schematic top view of a display device according to an embodiment of the invention. It must be noted here that the embodiment of FIG. 6 uses the element numbers and part of the content of the embodiment of FIGS. 2A and 2B, wherein the same or similar reference numbers are used to represent the same or similar elements, and the same technical content is omitted. Description. For the description of the omitted parts, reference may be made to the foregoing embodiment, which will not be repeated here.

Please refer to FIG. 6, the number of pixels PX in the second direction D2 of the display device 50 is less than the number of gate transmission lines. In this embodiment, in the second direction D2, multiple rows of pixels PX (such as eight rows of pixels PX) are used as a set of pixel groups, and each pixel group corresponds to multiple gate transmission lines (such as gate transmission lines). GL1～GL9). In this embodiment, one of the gate transmission lines (for example, the gate transmission line GL2) is arranged in different pixel groups. For example, the first pixel group PXG1 includes the first row of pixels PX to the eighth row of pixels PX, and the second pixel group PXG2 adjacent to the first group of pixels PXG1 includes the ninth row of pixels PX to the sixteenth row of pixels PX. Part of the gate transmission line GL2 overlaps the second pixel group PXG2, and part of the gate transmission line GL2 overlaps the first pixel group PXG1. In this embodiment, the first conductive line CL1 of the gate transmission line GL2 overlaps the sixteenth row of pixels PX, and the second conductive line CL2 of the gate transmission line GL2 extends from the second pixel group PXG2 into the first pixel group PXG1, and the third wire CL3 of the gate transmission line GL2 overlaps the boundary between the blue sub-pixel SP3 of the sixth row of pixels and the red sub-pixel SP1 of the seventh row of pixels PX.

Based on the above, the gate transmission line GL2 includes a first wire CL1 extending along the first direction D1, a second wire CL2 extending along the second direction D2, and a third wire CL3 extending along the first direction D1, which can reduce the gate The effect of the polar transmission line GL2 on the display quality of the display device 50.

FIG. 7A is a schematic top view of a display device according to an embodiment of the invention. Fig. 7B is a schematic cross-sectional view taken along the line b-b' in Fig. 7A. It must be noted here that the embodiment of FIG. 7A and FIG. 7B follow the element numbers and part of the content of the embodiment of FIG. 4, wherein the same or similar reference numbers are used to represent the same or similar elements, and the same technical content is omitted. Description. For the description of the omitted parts, reference may be made to the foregoing embodiment, which will not be repeated here.

The main difference between the display device 60 of FIG. 7A and the display device 30 of FIG. 4 is that the gate transmission line GL2 of the display device 60 further includes a shielding electrode SE.

Referring to FIGS. 7A and 7B, the gate transmission lines GL1 to GL9 each include a first line segment 100 and a second line segment 200. The first line segment 100 and the data line DL belong to the same conductive film layer. The second line segment 200 is electrically connected to the first line segment 100, and the second line segment 200 and the scan lines SL1 to SL9 belong to the same conductive film layer. In this embodiment, the first line segments 100 of the gate transmission lines GL1 to GL9 are respectively electrically connected to the second line segments 200 of the gate transmission lines GL1 to GL9 through the openings H1 to H9, wherein the openings H1 to H9, for example, penetrate the first Insulation layer I1.

The respective second line segments 200 of the gate transmission lines GL1 to GL9 are directly connected to the corresponding scan lines SL1 to SL9, and the respective second line segments 200 of the gate transmission lines GL1 to GL9 and the corresponding scan lines SL1 to SL9 form a T-shaped structure. For example, the second line segment 200 of the gate transmission line GL1 is directly connected to the scan line SL1; the second line segment 200 of the gate transmission line GL2 is directly connected to the scan line SL2; the second line segment 200 of the gate transmission line GL3 is directly connected to the scan line SL3; The second line 200 of the gate transmission line GL4 is directly connected to the scan line SL4; the second line 200 of the gate transmission line GL5 is directly connected to the scan line SL5; the second line 200 of the gate transmission line GL6 is directly connected to the scan line SL6; the second line of the gate transmission line GL7 The second line segment 200 is directly connected to the scan line SL7; the second line segment 200 of the gate transmission line GL8 is directly connected to the scan line SL8; the second line segment 200 of the gate transmission line GL9 is directly connected to the scan line SL9.

In this embodiment, the gate transmission line GL2 includes a first conductive line CL1 extending along the first direction D1, a second conductive line CL2 extending along the second direction D2, and a third conductive line CL3 extending along the first direction D1. The third wire CL3 of the gate transmission line GL2 includes a first line segment 100 and a second line segment 200.

In this embodiment, the gate transmission line GL2 further includes a shielding electrode SE, and the shielding electrode SE extends along the first direction D1 and overlaps the other one of the gate transmission lines GL1 to GL9. For example, the shielding electrode SE of the gate transmission line GL2 overlaps the second line segment 200 of the gate transmission line GL7. In some embodiments, the width X1 of the shielding electrode SE of the gate transmission line GL2 is greater than the width X2 of the gate transmission line GL7 covered by the shielding electrode SE.

In this embodiment, the shielding electrode SE, for example, belongs to the same conductive film layer (for example, the second metal layer) as the first line segment 100 of the third wire CL3 and the data line (please refer to FIG. 1), and the shielding electrode SE is directly connected to the first line segment 100 and the data line (see FIG. 1). The first line segment 100 of the three-wire CL3.

In some embodiments, the gate transmission line includes the first stage to the nth stage, where n is an integer greater than 5, and the gate transmission line including the shielding electrode is different from another gate transmission line overlapping the shielding electrode by more than 5 levels. For example, in this embodiment, the difference between the second-level gate transmission line GL2 and the seventh-level gate transmission line GL7 is 5 levels. When the seventh-level gate transmission line GL7 is charged, a holding voltage is applied to the gate transmission line GL2. Therefore, when the gate transmission line GL7 is charged, the shielding electrode SE of the gate transmission line GL2 can reduce the gate electrode. Transmission line GL7 has a negative impact on display quality.

FIG. 8 is a schematic top view of a display device according to an embodiment of the invention. It must be noted here that the embodiment of FIG. 8 uses the element numbers and part of the content of the embodiment of FIGS. 7A and 7B, wherein the same or similar reference numbers are used to denote the same or similar elements, and the description of the same technical content is omitted. . For the description of the omitted parts, reference may be made to the foregoing embodiment, which will not be repeated here.

Please refer to FIG. 8, each scan line of the display device 70 (only scan lines SL1, SL2, SL9 are drawn in the figure) include first gate lines SL1a, SL2a, SL9a and second gate lines SL1b, SL2b that are parallel to each other , SL9b. For example, the scan line SL1 includes a first gate line SL1a and a second gate line SL1b; the scan line SL2 includes a first gate line SL2a and a second gate line SL2b; and the scan line SL9 includes a first gate line SL9a And the second gate line SL9b.

The second line segment of each gate transmission line is electrically connected to the corresponding first gate line and the second gate line. For example, the second line segment 200 of the third wire CL3 of the gate transmission line GL1 is connected to the first gate line SL1a and the second gate line SL1b; the second line segment 200 of the gate transmission line GL9 is connected to the first gate line SL9a and the second gate line SL9b.

In this embodiment, the gate transmission line GL1 includes a first wire CL1, a second wire CL2, a third wire CL3, and a shielding electrode SE. The shielding electrode SE crosses the first gate line SL9a and the second gate line SL9b, and the shielding electrode SE overlaps the second line segment 200 of the gate transmission line GL9.

Based on the above, when the gate transmission line GL9 is being charged, the shielding electrode SE of the gate transmission line GL1 can reduce the negative impact of the gate transmission line GL9 on the display quality.

FIG. 9 is a schematic top view of a display device according to an embodiment of the invention. It must be noted here that the embodiment of FIG. 9 adopts the element numbers and part of the content of the embodiment of FIG. 8, wherein the same or similar reference numbers are used to represent the same or similar elements, and the description of the same technical content is omitted. For the description of the omitted parts, reference may be made to the foregoing embodiment, which will not be repeated here.

Please refer to FIG. 9, each scan line of the display device 80 (only scan lines SL6, SL7, SL8 are drawn in the figure) include first gate lines SL6a, SL7a, SL8a and second gate lines SL6b, SL7b that are parallel to each other , SL8b.

In this embodiment, part of the second gate lines SL6b, SL7b, and SL8b are disconnected at the first line segment 100 to avoid short-circuiting of different scan lines. For example, the first line segment 100 of the gate transmission line GL6 connects the first gate line SL6a and the second gate line SL6b, and the first line segment 100 of the gate transmission line GL6 passes through the second gate of the gate transmission line GL7 The gap of the polar line SL7b. In some embodiments, the first gate lines SL6a, SL7a, SL8a and the second gate lines SL6b, SL7b, SL8b may be connected through other bridge elements 300 in addition to being connected through the corresponding first line segment 100. For example, the first gate line SL7a and the second gate line SL7b of the gate transmission line GL7 are electrically connected through the bridge element 300. Therefore, even if the second gate line SL7b of the gate transmission line GL7 is connected to the gate transmission line GL6 The first line segment 100 is disconnected, and the second gate line SL7b will still not be disconnected. In this embodiment, the bridge element 300 and the scan line belong to the same conductive film layer, but the invention is not limited to this. In some embodiments, the bridge element 300 may belong to the same conductive film layer as the data line, or may belong to a different conductive film layer from the scan line and the data line.

In this embodiment, the gate transmission line GL1 includes a plurality of shielding electrodes SE. The plurality of shielding electrodes SE are electrically connected to the second wire CL2 and extend along the first direction D1. A plurality of shielding electrodes SE are respectively overlapped with other ones of the gate transmission lines (for example, the gate transmission lines GL6 to GL8). In this embodiment, the plurality of shielding electrodes SE are electrically connected to the second wire CL2 through the plurality of openings O2, for example.

Based on the foregoing, when the gate transmission lines GL6 to GL8 are being charged, the shielding electrode SE of the gate transmission line GL1 can reduce the negative impact of the gate transmission lines GL9 to GL8 on the display quality.

In this embodiment, the shielding electrode SE overlapping the gate transmission line GL6 crosses the second gate line SL7b in the first direction D1, and the shielding electrode SE overlapping the gate transmission line GL7 crosses the second gate in the first direction D1 Polar line SL8b, thereby alleviating the problem of mutual interference between different scan lines.

In this embodiment, the second wire CL2 is aligned with the common electrode CE in the second direction D2. The common electrode CE, for example, belongs to the same conductive film layer as the second wire CL2, and the second wire CL2 can be formed by disconnecting the common electrode CE.

FIG. 10 is a schematic top view of a display device according to an embodiment of the invention. It must be noted here that the embodiment of FIG. 10 uses the element numbers and part of the content of the embodiment of FIG. 9, wherein the same or similar reference numbers are used to represent the same or similar elements, and the description of the same technical content is omitted. For the description of the omitted parts, reference may be made to the foregoing embodiment, which will not be repeated here.

Please refer to FIG. 10, the scan lines of the display device 90 (only scan lines SL8, SL10, SL13 are drawn in the figure) include first gate lines SL8a, SL10a, SL13a and second gate lines SL8b, SL10b that are parallel to each other , SL13b.

In this embodiment, the gate transmission line GL1 includes a plurality of shielding electrodes SE. The plurality of shielding electrodes SE are electrically connected to the second wire CL2 and extend along the first direction D1. A plurality of shielding electrodes SE are respectively overlapped with other ones of the gate transmission lines (for example, the gate transmission lines GL8, GL10, GL13).

In some embodiments, part of the scan line is divided into multiple parts separated from each other by the gate transmission line. However, the same scan line can be made into the same scan line by the bridge element 300 similar to the previous embodiment or the wires in other display panels. The multiple separated parts are electrically connected to each other. In some embodiments, by providing multiple signal sources (drive chips) for the same scan line, multiple separated parts of the same scan line have the same drive signal, thereby achieving the effect of multiple driving.

Based on the above, the shielding electrode SE of the gate transmission line GL1 can shield the gate transmission lines GL8, GL10, GL13 when the gate transmission lines GL8, GL10, GL13 are charged, and reduce the negative impact of the gate transmission lines GL8, GL10, GL13 on the display quality. .

11A and 11B are schematic top views of a display device according to an embodiment of the present invention, wherein FIG. 11B is continued from the upper side of FIG. 11A. It must be noted here that the embodiment of FIGS. 11A and 11B uses the element numbers and part of the content of the embodiment of FIG. 10, wherein the same or similar numbers are used to represent the same or similar elements, and the description of the same technical content is omitted. . For the description of the omitted parts, reference may be made to the foregoing embodiment, which will not be repeated here.

Please refer to FIGS. 11A and 11B. The display device 90a has a display area and a peripheral area (please refer to FIG. 1), and includes a plurality of data lines (please refer to FIG. 1), first level scan lines to nth level scan lines SL1~ SLn, the first gate transmission line to the nth gate transmission line GL1-GLn, and a plurality of sub-pixels, where n is an integer greater than 1. In this embodiment, n is 9. The sub-pixels (for example, the red sub-pixel SP1, the green sub-pixel SP2, and the blue sub-pixel SP3) are electrically connected to the first to nth level scan lines SL1 to SLn and the data lines.

The data line extends from the peripheral area into the display area, and the data line located in the display area extends along the first direction D1.

The scan lines SL1 to SLn of level 1 to level n are located in the display area and extend along a second direction D2 staggered with the first direction D1. The first level scan lines to the nth level scan lines SL1˜SLn are sequentially arranged along the first direction D1. In this embodiment, the scan lines SL1 to SL9 of the first level to the ninth level each include first gate lines SL1a to SL9a and second gate lines SL1b to SL9b that are parallel to each other. For example, the scan line SL1 includes a first gate line SL1a and a second gate line SL1b; the scan line SL9 includes a first gate line SL9a and a second gate line SL9b.

The first level gate transmission lines to the nth level gate transmission lines GL1˜GLn extend from the peripheral area into the display area, and are electrically connected to the first level scan lines to the nth level scan lines SL1˜SLn, respectively. In this embodiment, each of the first gate transmission line to the nth gate transmission line GL1˜GLn includes more than one first line segment 100 and more than one second line segment 200. The first line segment 100 and the data line belong to the same conductive film layer. The second line segment 200 belongs to the same conductive film layer as the scan lines from the first level to the scan lines SL1 to SLn at the nth level. In this embodiment, the first line segment 100 from the first gate transmission line to the ninth gate transmission line GL1 to GL9 is electrically connected to the first gate transmission line to the ninth gate transmission line through the first openings H1 to H9, respectively. The second line segment 200 of the ninth-level gate transmission line GL1 to GL9 (FIG. 11B omits the drawing of the first line segment 100 of the ninth-level gate transmission line GL9 and the first opening H9), wherein the first openings H1 to H9, for example, penetrate the first insulation Layer (please refer to Figure 2B). The first level scan lines to the ninth level scan lines SL1 to SL9 are respectively directly connected to the second line segment 200 of the first level gate transmission line to the ninth level gate transmission line GL1 to GL9.

In some embodiments, the first level gate transmission line to the ninth level gate transmission line GL1˜GL9 cross the first level scan line to the nth level scan line SL1˜SLn by a part of the first line segment 100. For example, the first gate transmission line GL1 crosses the first gate line SL2a of the second level scan line SL2, the first gate line SL3a of the third level scan line SL3, and the fourth level via the first line segment 100. Level scan lines to the 9th level scan lines SL4~SL4. In addition, the second gate line SL2b of the second-level scan line SL2 and the second gate line SL3b of the third-level scan line SL3 are disconnected at the second line segment 200 of the first-level gate transmission line GL1. Based on the foregoing, it is possible to prevent the first-level gate transmission line GL1 from being short-circuited with the second-level scan line SL2 to the ninth-level scan line SL9. Other gate transmission lines have similar configurations to avoid short-circuiting of scan lines at different levels.

In this embodiment, the display device 90a further includes a plurality of first common electrodes CE1 and a plurality of second common electrodes CE2. The first common electrode CE1 and the data line belong to the same conductive film layer. The second common electrode CE2 and the scan line belong to the same conductive film layer.

The first common electrode CE1 extends along the first direction D1, and at least a part of the first common electrode CE1 overlaps the second line segment 200 from the first gate transmission line to the ninth gate transmission line GL1 to GL9, thereby reducing the number of different lines. Interference between gate transmission lines. In this embodiment, part of the first common electrode CE1 is located between two first line segments 100 in the same gate transmission line. In this embodiment, the first common electrode CE1 overlaps the boundary between the green sub-pixel SP2 and the blue sub-pixel SP3 and the boundary between the red sub-pixel SP1 and the blue sub-pixel SP3.

In some embodiments, the display device 90a further includes a third common electrode (not shown) and/or a fourth common electrode (not shown). The third common electrode overlaps the boundary between the green sub-pixel SP2 and the red sub-pixel SP1, and is parallel to the data line. The fourth common electrode is parallel to the scan line. The voltage applied to the first common electrode CE1 and the second common electrode CE2 is different from the voltage applied to the third common electrode and the fourth common electrode. For example, a voltage of 9 volts is applied to the first common electrode CE1 and the second common electrode CE2, and a voltage of 6 volts is applied to the third common electrode and the fourth common electrode.

The second common electrode CE2 extends along the second direction D2. At least part of the first common electrode CE1 is electrically connected to at least part of the second common electrode CE2 through the second opening TH, where the second opening TH penetrates the first insulating layer, for example (please refer to FIG. 2B). The number of second openings TH can be adjusted according to requirements, and is not limited to the number shown in FIG. 11.

In the display area, the first gate transmission line to the nth gate transmission line GL1～GLn are arranged in a staggered arrangement. Therefore, the first openings H1～H9 and the second opening TH can be more evenly dispersed in the display area, thereby avoiding The display device 90a generates bright lines. In addition, the problem that the first openings H1 to H9 and the second opening TH compress each other's installation space can also be improved.

In the display area of the display device 90a, the first-level gate transmission line GL1, the sixth-level gate transmission line GL6, the third-level gate transmission line GL3, the eighth-level gate transmission line GL8, the fifth-level gate transmission line GL5, and the second Level 2 gate transmission line GL2 (or level 9 gate transmission line GL9), level 7 gate transmission line GL7, and level 4 gate transmission line GL4 are arranged in order (for example, arranged in order from left to right), and adjacent stages The distance between the gate transmission lines is greater than or equal to 6 times the width of the sub-pixel. For example, in the display area, the distance between the first-level gate transmission line GL1 and the second-level gate transmission line GL2 is greater than or equal to 6 times the width of the sub-pixel, so that the first openings H1~ H9 and the second opening TH are evenly dispersed.

In some embodiments, the signal sources corresponding to the first-level gate transmission lines to the ninth-level gate transmission lines GL1 to GL9 in the driver chip are arranged in sequence, and other circuits are used in the peripheral area to adjust the first-level gate in the display area The arrangement sequence of the transmission line to the ninth-level gate transmission line GL1～GL9. For example, a transfer area is provided at a position about 200 microns away from the display area, thereby adjusting the arrangement sequence of the first gate transmission line to the ninth gate transmission line GL1 to GL9 in the display area. In other embodiments, the order of the signal sources corresponding to the first gate transmission line to the ninth gate transmission line GL1 to GL9 in the driver chip is equal to the first gate transmission line to the ninth gate transmission line GL1 in the display area ~ The order of GL9.

12A and 12B are schematic top views of a display device according to an embodiment of the present invention, in which FIG. 12B is continued from the upper side of FIG. 12A. It must be noted here that the embodiment of FIGS. 12A and 12B uses the element numbers and part of the content of the embodiment of FIGS. 11A and 11B, wherein the same or similar numbers are used to denote the same or similar elements, and the same technology is omitted. Description of the content. For the description of the omitted parts, reference may be made to the foregoing embodiment, which will not be repeated here.

12A and 12B, in the display area of the display device 90b, the first-level gate transmission line GL1, the fifth-level gate transmission line GL5, the second-level gate transmission line GL2 (or the ninth-level gate transmission line GL9) , The sixth-level gate transmission line GL6, the third-level gate transmission line GL3, the seventh-level gate transmission line GL7, the fourth-level gate transmission line GL4, and the eighth-level gate transmission line GL8 are arranged in order, and the gates of adjacent levels The distance between the polar transmission lines is greater than or equal to 6 times the width of the sub-pixel. For example, in the display area, the distance between the first-level gate transmission line GL1 and the second-level gate transmission line GL2 is greater than or equal to 6 times the width of the sub-pixel, so that the first openings H1~ H9 and the second opening TH are evenly dispersed.

Based on the above, the first openings H1 to H9 and the second opening TH can be more evenly dispersed in the display area, thereby avoiding bright lines on the display device 90b. In addition, the problem that the first openings H1 to H9 and the second opening TH compress each other's installation space can also be improved.

10, 20, 30, 40, 50, 60, 70, 80, 90, 90a, 90b: display device 100: the first line segment 200: second line segment 300: bridging element AA: Display area B: Blue filter element BA: Surrounding area CE: Common electrode CE1: The first common electrode CE2: second common electrode CL1: First wire CL2: second wire CL3: Third wire CL4: Fourth wire D1: First direction D2: second direction DL1～DLz: data line DR: drive circuit G: Green filter element GD: gate drive element GL1～GLy: Gate transmission line H1～H9, O1, O2, O3, TH: opening I1: first insulating layer I2: second insulating layer LC: display medium layer L1, L2, L3: length M1: The first metal layer M2: second metal layer Mt: main charging time Pt: precharge time PX: pixel PXG1: The first pixel group PXG2: The second pixel group PXR: pixel area R: Red filter element SB1, SB2: substrate SE: shielded electrode SL1～SLy: scan line SP: Sub-pixel SP1: Red sub-pixel SP2: Green sub-pixel SP3: Blue sub-pixel SL1a～SL9a, SL10a, SL13a: the first gate line SL1b～SL9b, SL10b, SL13b: the second gate line W1, W2, X1, X2: width

FIG. 1 is a schematic top view of a display device according to an embodiment of the invention. FIG. 2A is a schematic top view of a display device according to an embodiment of the invention. Fig. 2B is a schematic cross-sectional view taken along the line a-a' in Fig. 2A. 3 is a signal waveform diagram of scan lines and data lines of the display device of FIG. 2A. FIG. 4 is a schematic top view of a display device according to an embodiment of the invention. FIG. 5 is a schematic top view of a display device according to an embodiment of the invention. FIG. 6 is a schematic top view of a display device according to an embodiment of the invention. FIG. 7A is a schematic top view of a display device according to an embodiment of the invention. Fig. 7B is a schematic cross-sectional view taken along the line b-b' in Fig. 7A. FIG. 8 is a schematic top view of a display device according to an embodiment of the invention. FIG. 9 is a schematic top view of a display device according to an embodiment of the invention. FIG. 10 is a schematic top view of a display device according to an embodiment of the invention. 11A and 11B are schematic top views of a display device according to an embodiment of the invention. 12A and 12B are schematic top views of a display device according to an embodiment of the invention.

20: display device

AA: Display area

BA: Surrounding area

CL1: First wire

CL2: second wire

CL3: Third wire

CL4: Fourth wire

D1: First direction

D2: second direction

GL1~GL9: Gate transmission line

H1~H9, O1, O2, O3: opening

L3: length

PX: pixel

SL1~SL9: scan line

SP1: Red sub-pixel

SP2: Green sub-pixel

SP3: Blue sub-pixel

Claims (21)

A display device has a display area and a peripheral area, and includes: a plurality of data lines extending from the peripheral area into the display area, wherein the data lines located in the display area extend along a first direction; and a plurality of data lines Scan lines are located in the display area and extend along a second direction staggered in the first direction; a plurality of gate transmission lines extend into the display area from the peripheral area and are electrically connected to the scan lines, One of the gate transmission lines includes: a first wire located in the display area and extending along the first direction; a second wire located in the display area and along the second direction Extension; and a third wire located in the display area and extending along the first direction, wherein the first wire, the second wire, and the third wire are electrically connected in sequence, and the third wire is electrically connected Are electrically connected to one of the scan lines; and a plurality of sub-pixels are electrically connected to the scan lines and the data lines. As for the display device described in claim 1, wherein the one of the gate transmission lines further includes: a fourth wire located in the peripheral area and extending along the second direction, wherein the The fourth wire is electrically connected to the first wire. The display device according to claim 1, wherein the sub-pixels include a plurality of red sub-pixels, a plurality of green sub-pixels, and a plurality of blue sub-pixels, and the third wire overlaps the The boundary between the red sub-pixels and the blue sub-pixels. The display device according to claim 1, wherein the sub-pixels include a plurality of red sub-pixels, a plurality of green sub-pixels, and a plurality of blue sub-pixels, and the first wire overlaps the The boundary between the red sub-pixels and the green sub-pixels or the boundary between the blue sub-pixels and the green sub-pixels. According to the display device described in claim 1, wherein the length of the third wire is greater than the length of each of the sub-pixels. As for the display device described in item 5 of the scope of patent application, in each frame, each scan line has a main charging time and a precharging time, the precharging time is t times the main charging time, and the The length of the third wire is greater than the length of t these sub-pixels, where t is an integer greater than one. In the display device described in item 1 of the scope of patent application, the second conductive line and the scanning lines belong to the same conductive film layer. In the display device described in item 1 of the scope of patent application, the first wire, the third wire and the data wires belong to the same conductive film layer. The display device described in claim 1 further includes a driving circuit located on the peripheral area and on one side of the display area, wherein the gate transmission lines are electrically connected to the driving circuit. For example, the display device described in item 1 of the scope of patent application further includes: X gate driving elements, wherein each gate driving element passes through a different The gate transmission lines are electrically connected to the same scan line, where X is an integer greater than one. The display device according to claim 10, wherein the sub-pixels are arrayed into a plurality of pixels, and the pixels are arranged in N rows along the first direction, and are arranged in N rows along the second direction M row, where M/X is less than N. As for the display device described in claim 1, wherein the one of the gate transmission lines further includes: a shielding electrode electrically connected to the second wire and extending along the first direction, wherein the The shielding electrode overlaps the other one of the gate transmission lines. The display device according to claim 12, wherein the width of the shielding electrode is greater than the width of the other one of the gate transmission lines covered by the shielding electrode. As for the display device described in claim 13, wherein the other one of the gate transmission lines includes: a first line segment belonging to the same conductive film layer as the data lines; and a second line segment connected The first line segment belongs to the same conductive film layer as the scan lines, and the second line segment is directly connected to another one of the scan lines. As for the display device described in claim 12, the gate transmission lines include the first to the nth stages, where n is an integer greater than 5, and the one of the gate transmission lines and the The other one in the gate transmission line is more than 5 levels different. As for the display device described in claim 1, wherein the one of the gate transmission lines further includes: a plurality of shielding electrodes electrically connected to the second wire and extending along the first direction, wherein The shielding electrodes overlap with the other ones of the gate transmission lines respectively. According to the display device described in claim 1, wherein each of the scan lines includes a first gate line and a second gate line that are parallel to each other. As for the display device described in claim 1, wherein the gate transmission lines include the first gate transmission line to the nth gate transmission line, and the first gate transmission line to the first gate transmission line in the display area The n-level gate transmission lines are arranged in a staggered arrangement, where n is an integer greater than one. A display device has a display area and a peripheral area, and includes: a plurality of data lines extending from the peripheral area into the display area, wherein the data lines located in the display area extend along a first direction; first Level scan lines to nth level scan lines are located in the display area and extend along a second direction staggered in the first direction, where n is an integer greater than 1, and the first level scan lines to the nth level The level scan lines are arranged in sequence along the first direction; the first level gate transmission line to the nth level gate transmission line extend from the peripheral area into the display area, and are electrically connected to the first level scan line to In the nth level scan line, the first level gate transmission line to the nth level gate transmission line are arranged in a staggered arrangement in the display area; and A plurality of sub-pixels are electrically connected to the first level scan line to the nth level scan line and the data lines; wherein the gate transmission line of the first level includes: a first line segment and the data lines Belong to the same conductive film layer; and a second line segment, which belongs to the same conductive film layer as the first level scan line to the nth level scan line, wherein the first line segment is electrically connected to the second line segment through the first opening . The display device according to item 19 of the scope of patent application, wherein in the display area, the distance between the first-level gate transmission line and the second-level gate transmission line is greater than or equal to 6 times the distance of each sub-pixel width. The display device as described in item 19 of the scope of patent application further includes: a first common electrode extending along the first direction and overlapping the second line segment; and a second common electrode along the second line segment; Extending in the direction, and the first common electrode is electrically connected to the second common electrode through the second opening.

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