TWI714574B - Pecvd載具 - Google Patents

Pecvd載具 Download PDF

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TWI714574B
TWI714574B TW105111560A TW105111560A TWI714574B TW I714574 B TWI714574 B TW I714574B TW 105111560 A TW105111560 A TW 105111560A TW 105111560 A TW105111560 A TW 105111560A TW I714574 B TWI714574 B TW I714574B
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carrier
wafer
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pecvd
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托斯坦 柯恩梅爾
漢斯-彼得 沃克
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德商柯恩梅爾碳集團有限公司
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    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
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    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/458Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for supporting substrates in the reaction chamber
    • C23C16/4582Rigid and flat substrates, e.g. plates or discs
    • C23C16/4587Rigid and flat substrates, e.g. plates or discs the substrate being supported substantially vertically
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    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
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    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/458Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for supporting substrates in the reaction chamber
    • C23C16/4581Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for supporting substrates in the reaction chamber characterised by material of construction or surface finish of the means for supporting the substrate
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
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    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/50Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32431Constructional details of the reactor
    • H01J37/32715Workpiece holder
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/673Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere using specially adapted carriers or holders; Fixing the workpieces on such carriers or holders
    • H01L21/67313Horizontal boat type carrier whereby the substrates are vertically supported, e.g. comprising rod-shaped elements

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Abstract

本發明涉及一種電漿輔助化學氣相沉積載具(PECVD載具),其具有至 少一個容置晶圓用的承載板,以便將晶圓送入及送出真空鍍膜室。本發明的目的是提出一種低質量並能夠承載晶圓及將晶圓送入及送出真空室PECVD載具,以透過承載大量的晶圓數量、縮短過程週期、以及降低加熱及均勻化階段的能源消耗,達到提高真空鍍膜室產量的目的。為達到上述目的,承載板(21)係垂直樹立,並具有多個在承載板(21)之縱向上向上打開的容納晶圓(22)用的U形容置凹槽(23),並使插入容置凹槽(23)的晶圓(22)與承載板(21)的板線對齊。

Description

PECVD載具
本發明涉及一種電漿輔助化學氣相沉積載具(PECVD載具),其具有至少一個容置晶圓用的承載板,以便將晶圓送入及送出真空鍍膜室。
PECVD載具的一個應用例是應用於漿輔助化學氣相沉積載具(PECVD)。PECVD是一種從氣相中離析出一層附著在基板(例如晶圓)上的固態薄膜的方法。PECVD是在一個抽真空的真空室內進行,在執行PECVD的過程中,需將同時將盡可能最大數量的晶圓置於所謂的電漿載具或PECVD載具(由承載板構成)上,並送入真空室內,且在整個PECVD過程中,所有的晶圓均停留在該等電漿載具上。 為了能夠執行PECVD,一個必要條件是將置於一或多個PECVD載具上的晶圓及PECVD載具加熱到一規定的過程溫度。 目前一般使用的PECVD載具或承載板是以導電材料製成,例如石墨或鈦。第1圖(先前技術)的俯視圖顯示PECVD載具的一個承載板10,其作用是按照先前技術承載多個處於平放狀態的矩形或正方形晶圓11。為了將晶圓11確實固定在開槽12內,在承載板10環繞開槽12的邊框13上有3根固定銷釘14,以確保置於承載板10上的晶圓11在運送過程中不會滑動。 為了盡可能運送大量的晶圓,通常會利用適當的間隔件將多個承載板10上下疊在一起,以形成一能夠承載大量晶圓的PECVD載具。 PECVD載具一方面要能夠在晶圓運送及沉積過程中將晶圓11確實固定住,另一方面又必須經由PECVD載具或承載板將沉積過程所需的電位通到晶圓。 晶圓11是放置或掛在承載板10上,同時經由承載板10(例如以石墨製成的承載板)上的固定銷釘14形成必要的電接點。 為了降低熱質量,承載板10帶有面積小於晶圓11的開槽12或裂口,因此每一個晶圓都能夠被到一個將一框形區環繞住的承載板上。因此晶圓邊緣與承載板10的外框之間始終有一環繞的熱接點及電接點。 加熱所需的時間主要是由需加熱的晶圓數量、PECVD載具的質量、達到均勻的溫度分佈所需的均勻化時間、以及加熱的方式等因素決定。當然,為了達到高效率且快速的沉積過程,加熱時間及接下來的均勻化時間應盡可能的短。 晶圓溫度主要是受石墨板的溫度的影響或決定,其中所使用之載具的質量相當於晶圓質量的4至5倍。 在某些過程步驟中,只能以對流及/或熱輻射的方式加熱PECVD載具,而無法使用電漿輔助加熱。這會使得加熱階段變長,以及降低機器生產效率及產量。此外,由於PECVD載具通常具有許多承載板,由於其質量相當大,所有熱慣性也相當大。 上述因素導致將晶圓加熱至所需之過程溫度的加熱時間,或是在PECVD過程結束後所需的冷卻時間,以及穩定化時間(均勻化時間)變得過長。
本發明的目的是提出一種低質量並能夠承載晶圓及將晶圓送入及送出真空室PECVD載具,以透過承載大量的晶圓數量、縮短過程週期、以及降低加熱及均勻化階段的能源消耗,達到提高機器產量的目的。 採用具有主申請專利範圍之特徵的承載板即可達到上述目的,其中承載板係垂直樹立,並具有多個在承載板之縱向上向上打開的容納晶圓用的U形容置凹槽,並使插入容置凹槽的晶圓與承載板的板線對齊。 附屬申請範圍之內容為本發明之各種有利的實施方式。 每一個容置凹槽的範圍都被限制在承載板的側向固定臂及下框架元件之間,因此插入容置凹槽的晶圓被側向固定臂部分環繞住。 為了盡可能縮短導熱,每一個容置凹槽都設有3個容置元件,其中側向固定臂及下框架元件分別具有一個容置元件,該等容置元件向內指向容置凹槽,並以叉狀、U形或V形將插入之晶圓的外緣環繞住,當晶圓被插入這3個容置元件後,晶圓自身之重量會將晶圓固定住。 為了提高承載晶圓之數量,以及避免在晶圓背面產生沉積,可以分別將兩個晶圓以背對背裝載的方式插入每一個容置凹槽的容置元件。 另一種有利的方式是,將多個承載板以彼此間隔一段距離的方式平行排列,且彼此連接成一個PECVD載具,其中在承載板之間設有間隔件及連接件。 間隔件及連接件是由不導電材料製成,例如Al2 O3 、石英玻璃、或陶瓷。 一種有利的方式是利用成型加工方法以石墨、CFC、或鈦製作承載板。 本發明的承載板或PECVD載具的特殊優點是熱質量較小,因此能夠更快速的加熱/冷卻及均勻化裝載晶圓的PECVD載具。 其他的優點包括可以裝載更多的晶圓,因此能夠提高產能,而且因為晶圓與承載板的板線對齊,因此能夠充分利用承載板的厚度,不會有未被使用的空間。 由於加熱過程變快,因此能夠透過裝置更多的晶圓及縮短過程週期,達到提高機器的產量的目的,同時由於載具質量降低,因此能夠降低加熱/均勻化階段的能源消耗,也就是可以降熱能的消耗。 同樣的,由於載具質量降低,冷卻階段消耗的消耗 量也跟著減少,因此能夠降低冷卻及引出階段的能量消耗。
第2圖顯示本發明的一個晶圓固定架20,其是由一能夠容置多個晶圓22的垂直樹立的承載板21構成。第2圖的承載板最多可以容置3個晶圓22。為了穩固的容置晶圓22,承載板21內設有3個在承載板21向上前後排列的容置凹槽23,其範圍被限制在承載板21的側向固定臂24及下框架元件25之間。固定臂24的長度大約僅延伸到插入之晶圓的一半高度。 為了穩固的容置晶圓22,故設有3個從固定臂24及下框架元件25向內凸出指向容置凹槽23的容置元件26。在容置元件26向容置凹槽23凸出的端面內各有刻入一個供晶圓的外緣崁入的凹槽。容置元件26以略呈叉狀、U形、或V形的方式將晶圓22的外緣環繞住,因而在晶圓22插入容置元件26後能夠以形狀配合的方式將晶圓固定住,使晶圓22在插入容置元件26後能夠穩穩的被固定(第4圖)。一種可能的方式是每一個容置凹槽23同時容置兩個晶圓22,這樣就可以避免在晶圓背面產生沉積。 承載板21是以成型加工方法(例如銑銷)從一個工件製成。很顯然的,承載板的厚度必須大於兩個背對背插入容置元件26的晶圓的厚度。 在每一個容置凹槽23上設置3個容置元件26即足以將晶圓22穩妥的固定住,根據第2圖,這3個容置元件26的位置分別出現在左邊固定臂的頂端、右邊固定臂24的中間、以及下框架元件25右邊三分之一的位置。這些容置的精確位置並不重要,重要的是,為了將晶圓22穩妥的固定在容置凹槽26內,需設置3個這樣的容置元件26。 透過這種方式,垂直樹立的晶圓22以三維方式插入3個點,並透過自身的重量以與承載板21對齊的方式穩固的被固定住,因此當承載板21移動時,晶圓22不會從使用位置基本上是垂直的承載板21掉落出來。 第3圖顯示一晶圓載具及/或PECVD載具27,其是由多個垂直樹立且彼此間隔一段距離依續排列及彼此機械連接的承載板21構成。為了承載板21的機械連接,設有容納間隔件及連接件(未繪出)用的鑽孔28,其中間隔件及連接件是以不導電材料製成,例如Al2 O3 、石英玻璃、或陶瓷製成,以防止發生短路。 承載板21是以石墨、CFC、或鈦製成,而且能夠利用已知的成型加工方法很簡單的被製成。 本發明的PECVD載具27也可以透過晶圓22的背對背裝載方式實現背面鍍膜,其作法是將兩個一組的晶圓22以背靠背的方式垂直置入及/或插入承載板21的一個容置凹槽23。 由於晶圓22僅在3個位置被固定在承載板21上,因此晶圓22與容置凹槽23的距離有很大的自由度。這樣做的優點是可以使晶圓22在熱學上與承載板21或PECVD載具27處於最大程度的分離狀態。加熱功率可以更有效的傳導到晶圓22上,而不必先用於加熱承載板21的質量。因此可以明顯的縮短加熱及冷卻過程及均勻化時間。 本發明的承載板21使質量/面積比例朝有利於晶圓22的方向大幅改變。相對於其質量,晶圓22的表面積遠大於承載板21。 本發明的承載板21及/或由其構成的PECVD載具27可以應用於許多PECVD過程,以及在太陽能光電領域非常適於應用在TMA-、SiNox-、及SiN鍍膜的沉積。 利用成型加工方法很容易就可以用石墨、CFC(碳纖維強化碳)、或鈦製造出本發明的具有容置元件26的單件式承載板21。承載板21的厚度必須大於要插入容置元件26之晶圓22的厚度。
10、21‧‧‧承載板 11、22‧‧‧晶圓 12‧‧‧開槽 13‧‧‧邊緣 14‧‧‧固定銷釘 20‧‧‧晶圓固定架 23‧‧‧容置凹槽 24‧‧‧固定臂 25‧‧‧下框架元件 26‧‧‧容置元件 27‧‧‧PECVD載具 28‧‧‧鑽孔 PECVD‧‧‧電漿輔助化學氣相沉積
以下配合圖式及實施例對本發明的內容做進一步的說明。各圖式之內容為: 第1圖:按照先前技術製造之以平放方式承載晶圓用的承載板; 第2圖:本發明的以直立方式承載晶圓的承載板; 第3圖:一個PECVD載具,由多個以彼此間隔一段距離的方式平行排列且彼此連接的承載板構成;及 第4圖:容置晶圓之容置元件的放大圖。
20:晶圓固定架
21:承載板
22:晶圓
23:容置凹槽
24:固定臂
25:下框架元件
26:容置元件

Claims (6)

  1. 一種PECVD載具,用以容置晶圓,以便將晶圓送入及送出真空室,且在處理過程中,PECVD載具由多個垂直樹立之承載板構成,這些承載板彼此間隔一段距離依續排列,並經由間隔件及連接件而彼此機械連接,間隔件及連接件係以不導電材料製成,其中每一個承載板設置有多個在承載板之縱向上向上打開的容納晶圓用的U形容置凹槽,從而使插入容置凹槽的晶圓與承載板的板線對齊,其中每一個容置凹槽的範圍都被限制在承載板的側向固定臂及下框架元件之間,從而使插入容置凹槽的晶圓被側向固定臂部分環繞住,以及其中晶圓被各自固定在側向固定臂中的三個位置,且下框架元件各自設置有一供晶圓的外緣崁入的凹槽,因此大部分與承載板熱分離。
  2. 如申請專利範圍第1項的PECVD載具,其特徵為:設有3個容置元件,其中側向固定臂及下框架元件分別具有一個容置元件,該等容置元件向內指向容置凹槽,並以叉狀或U形將插入之晶圓的外緣環繞住,並經由晶圓自身之重量將晶圓固定住。
  3. 如申請專利範圍第1項至第2項中任一項的PECVD載具,其特徵為:分別將兩個晶圓以背對背裝載的方式插入每一個容置凹槽的容置元件。
  4. 如申請專利範圍第1項的PECVD載具,其特徵為:在承載板之間設有以不導電材料製成的間隔件及連接件。
  5. 如申請專利範圍第4項的PECVD載具,其特徵為:間隔件或連接件是以Al2O3、石英玻璃、或陶瓷製成。
  6. 如申請專利範圍第1項的PECVD載具,其特徵為:利用成型加工方法以石墨、CFC、或鈦製作承載板。
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Families Citing this family (51)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10163479B2 (en) 2015-08-14 2018-12-25 Spin Transfer Technologies, Inc. Method and apparatus for bipolar memory write-verify
US10546625B2 (en) 2016-09-27 2020-01-28 Spin Memory, Inc. Method of optimizing write voltage based on error buffer occupancy
US10818331B2 (en) 2016-09-27 2020-10-27 Spin Memory, Inc. Multi-chip module for MRAM devices with levels of dynamic redundancy registers
US10460781B2 (en) 2016-09-27 2019-10-29 Spin Memory, Inc. Memory device with a dual Y-multiplexer structure for performing two simultaneous operations on the same row of a memory bank
US10437491B2 (en) 2016-09-27 2019-10-08 Spin Memory, Inc. Method of processing incomplete memory operations in a memory device during a power up sequence and a power down sequence using a dynamic redundancy register
US10360964B2 (en) 2016-09-27 2019-07-23 Spin Memory, Inc. Method of writing contents in memory during a power up sequence using a dynamic redundancy register in a memory device
US10366774B2 (en) 2016-09-27 2019-07-30 Spin Memory, Inc. Device with dynamic redundancy registers
US10437723B2 (en) 2016-09-27 2019-10-08 Spin Memory, Inc. Method of flushing the contents of a dynamic redundancy register to a secure storage area during a power down in a memory device
US10446210B2 (en) 2016-09-27 2019-10-15 Spin Memory, Inc. Memory instruction pipeline with a pre-read stage for a write operation for reducing power consumption in a memory device that uses dynamic redundancy registers
FR3058163A1 (fr) * 2016-10-31 2018-05-04 Commissariat A L'energie Atomique Et Aux Energies Alternatives Porte echantillon
US10947640B1 (en) * 2016-12-02 2021-03-16 Svagos Technik, Inc. CVD reactor chamber with resistive heating for silicon carbide deposition
US10489245B2 (en) 2017-10-24 2019-11-26 Spin Memory, Inc. Forcing stuck bits, waterfall bits, shunt bits and low TMR bits to short during testing and using on-the-fly bit failure detection and bit redundancy remapping techniques to correct them
US10481976B2 (en) 2017-10-24 2019-11-19 Spin Memory, Inc. Forcing bits as bad to widen the window between the distributions of acceptable high and low resistive bits thereby lowering the margin and increasing the speed of the sense amplifiers
US10529439B2 (en) 2017-10-24 2020-01-07 Spin Memory, Inc. On-the-fly bit failure detection and bit redundancy remapping techniques to correct for fixed bit defects
US10656994B2 (en) 2017-10-24 2020-05-19 Spin Memory, Inc. Over-voltage write operation of tunnel magnet-resistance (“TMR”) memory device and correcting failure bits therefrom by using on-the-fly bit failure detection and bit redundancy remapping techniques
US10395712B2 (en) 2017-12-28 2019-08-27 Spin Memory, Inc. Memory array with horizontal source line and sacrificial bitline per virtual source
US10360962B1 (en) 2017-12-28 2019-07-23 Spin Memory, Inc. Memory array with individually trimmable sense amplifiers
US10891997B2 (en) 2017-12-28 2021-01-12 Spin Memory, Inc. Memory array with horizontal source line and a virtual source line
US10811594B2 (en) 2017-12-28 2020-10-20 Spin Memory, Inc. Process for hard mask development for MRAM pillar formation using photolithography
US10424726B2 (en) 2017-12-28 2019-09-24 Spin Memory, Inc. Process for improving photoresist pillar adhesion during MRAM fabrication
US10395711B2 (en) 2017-12-28 2019-08-27 Spin Memory, Inc. Perpendicular source and bit lines for an MRAM array
US10840439B2 (en) 2017-12-29 2020-11-17 Spin Memory, Inc. Magnetic tunnel junction (MTJ) fabrication methods and systems
US10367139B2 (en) 2017-12-29 2019-07-30 Spin Memory, Inc. Methods of manufacturing magnetic tunnel junction devices
US10546624B2 (en) 2017-12-29 2020-01-28 Spin Memory, Inc. Multi-port random access memory
US10840436B2 (en) 2017-12-29 2020-11-17 Spin Memory, Inc. Perpendicular magnetic anisotropy interface tunnel junction devices and methods of manufacture
US10784439B2 (en) 2017-12-29 2020-09-22 Spin Memory, Inc. Precessional spin current magnetic tunnel junction devices and methods of manufacture
US10424723B2 (en) 2017-12-29 2019-09-24 Spin Memory, Inc. Magnetic tunnel junction devices including an optimization layer
US10886330B2 (en) 2017-12-29 2021-01-05 Spin Memory, Inc. Memory device having overlapping magnetic tunnel junctions in compliance with a reference pitch
US10438995B2 (en) 2018-01-08 2019-10-08 Spin Memory, Inc. Devices including magnetic tunnel junctions integrated with selectors
US10438996B2 (en) 2018-01-08 2019-10-08 Spin Memory, Inc. Methods of fabricating magnetic tunnel junctions integrated with selectors
CN108103481B (zh) * 2018-01-25 2023-07-18 无锡盈芯半导体科技有限公司 衬底自动挟式石英舟
US10446744B2 (en) 2018-03-08 2019-10-15 Spin Memory, Inc. Magnetic tunnel junction wafer adaptor used in magnetic annealing furnace and method of using the same
US10388861B1 (en) * 2018-03-08 2019-08-20 Spin Memory, Inc. Magnetic tunnel junction wafer adaptor used in magnetic annealing furnace and method of using the same
US11107978B2 (en) 2018-03-23 2021-08-31 Spin Memory, Inc. Methods of manufacturing three-dimensional arrays with MTJ devices including a free magnetic trench layer and a planar reference magnetic layer
US10784437B2 (en) 2018-03-23 2020-09-22 Spin Memory, Inc. Three-dimensional arrays with MTJ devices including a free magnetic trench layer and a planar reference magnetic layer
US10529915B2 (en) 2018-03-23 2020-01-07 Spin Memory, Inc. Bit line structures for three-dimensional arrays with magnetic tunnel junction devices including an annular free magnetic layer and a planar reference magnetic layer
US11107974B2 (en) 2018-03-23 2021-08-31 Spin Memory, Inc. Magnetic tunnel junction devices including a free magnetic trench layer and a planar reference magnetic layer
US10411185B1 (en) 2018-05-30 2019-09-10 Spin Memory, Inc. Process for creating a high density magnetic tunnel junction array test platform
DE102018114159A1 (de) * 2018-06-13 2019-12-19 Nippon Kornmeyer Carbon Group Gmbh Plasmaboot zur Aufnahme von Wafern mit regulierter Plasmaabscheidung
US10600478B2 (en) 2018-07-06 2020-03-24 Spin Memory, Inc. Multi-bit cell read-out techniques for MRAM cells with mixed pinned magnetization orientations
US10559338B2 (en) 2018-07-06 2020-02-11 Spin Memory, Inc. Multi-bit cell read-out techniques
US10692569B2 (en) 2018-07-06 2020-06-23 Spin Memory, Inc. Read-out techniques for multi-bit cells
US10593396B2 (en) 2018-07-06 2020-03-17 Spin Memory, Inc. Multi-bit cell read-out techniques for MRAM cells with mixed pinned magnetization orientations
US10650875B2 (en) 2018-08-21 2020-05-12 Spin Memory, Inc. System for a wide temperature range nonvolatile memory
US10699761B2 (en) 2018-09-18 2020-06-30 Spin Memory, Inc. Word line decoder memory architecture
CN109440084A (zh) * 2018-09-29 2019-03-08 东方日升新能源股份有限公司 一种用于太阳能电池双面镀膜的石墨舟
US10971680B2 (en) 2018-10-01 2021-04-06 Spin Memory, Inc. Multi terminal device stack formation methods
US11621293B2 (en) 2018-10-01 2023-04-04 Integrated Silicon Solution, (Cayman) Inc. Multi terminal device stack systems and methods
US11107979B2 (en) 2018-12-28 2021-08-31 Spin Memory, Inc. Patterned silicide structures and methods of manufacture
CN110646430A (zh) * 2019-10-29 2020-01-03 太极半导体(苏州)有限公司 一种晶圆检验治具
CN111118478A (zh) * 2019-12-31 2020-05-08 湖南红太阳光电科技有限公司 一种制备异质结电池薄膜的pecvd设备

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3826377A (en) * 1971-07-07 1974-07-30 Siemens Ag Fixture for holding semiconductor discs during diffusion of doping material
US4661033A (en) * 1984-08-22 1987-04-28 Pacific Western Systems, Inc. Apparatus for unloading wafers from a hot boat
US5356475A (en) * 1993-02-22 1994-10-18 Lsi Logic Corporation Ceramic spacer assembly for ASM PECVD boat

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4461386A (en) * 1981-05-13 1984-07-24 Rca Corporation Rack for transporting recorded discs
US7055702B1 (en) * 2000-06-06 2006-06-06 Saint-Gobain Ceramics & Plastics, Inc. Slip resistant horizontal semiconductor wafer boat
US20040188319A1 (en) * 2003-03-28 2004-09-30 Saint-Gobain Ceramics & Plastics, Inc. Wafer carrier having improved processing characteristics
CN2713631Y (zh) * 2004-07-12 2005-07-27 西安希朗材料科技有限公司 传输承载晶片的高纯碳化硅卡座式部件
US20080050522A1 (en) * 2006-08-23 2008-02-28 Atomic Energy Council-Institute Of Nuclear Energy Research Preparative method for protective layer of susceptor
US8535445B2 (en) * 2010-08-13 2013-09-17 Veeco Instruments Inc. Enhanced wafer carrier
CN202839564U (zh) * 2012-08-06 2013-03-27 京隆科技(苏州)有限公司 晶舟的抽片移转治具
SG11201509964UA (en) * 2013-06-06 2016-01-28 Centrotherm Photovoltaics Ag Retainer, method for producing same and use thereof
KR102143884B1 (ko) * 2013-09-11 2020-08-12 삼성전자주식회사 버퍼 영역을 갖는 웨이퍼 로더
DE102015004419A1 (de) * 2015-04-02 2016-10-06 Centrotherm Photovoltaics Ag Waferboot und Plasma-Behandlungsvorrichtung für Wafer

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3826377A (en) * 1971-07-07 1974-07-30 Siemens Ag Fixture for holding semiconductor discs during diffusion of doping material
US4661033A (en) * 1984-08-22 1987-04-28 Pacific Western Systems, Inc. Apparatus for unloading wafers from a hot boat
US5356475A (en) * 1993-02-22 1994-10-18 Lsi Logic Corporation Ceramic spacer assembly for ASM PECVD boat

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