TWI709247B - 具有三維鰭狀場效電晶體(finfet)結構之分離閘非揮發性記憶體單元及其製造方法 - Google Patents
具有三維鰭狀場效電晶體(finfet)結構之分離閘非揮發性記憶體單元及其製造方法 Download PDFInfo
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Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US16/028,244 | 2018-07-05 | ||
| US16/028,244 US10727240B2 (en) | 2018-07-05 | 2018-07-05 | Split gate non-volatile memory cells with three-dimensional FinFET structure |
| PCT/US2019/035459 WO2020009772A1 (en) | 2018-07-05 | 2019-06-04 | Split gate non-volatile memory cells with three dimensional finfet structure, and method of making same |
| WOPCT/US19/35459 | 2019-06-04 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TW202018957A TW202018957A (zh) | 2020-05-16 |
| TWI709247B true TWI709247B (zh) | 2020-11-01 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW108121999A TWI709247B (zh) | 2018-07-05 | 2019-06-24 | 具有三維鰭狀場效電晶體(finfet)結構之分離閘非揮發性記憶體單元及其製造方法 |
Country Status (7)
| Country | Link |
|---|---|
| US (2) | US10727240B2 (https=) |
| EP (1) | EP3818564A1 (https=) |
| JP (1) | JP7502258B2 (https=) |
| KR (1) | KR102369492B1 (https=) |
| CN (1) | CN112400230B (https=) |
| TW (1) | TWI709247B (https=) |
| WO (1) | WO2020009772A1 (https=) |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US11114451B1 (en) * | 2020-02-27 | 2021-09-07 | Silicon Storage Technology, Inc. | Method of forming a device with FinFET split gate non-volatile memory cells and FinFET logic devices |
| US11362100B2 (en) * | 2020-03-24 | 2022-06-14 | Silicon Storage Technology, Inc. | FinFET split gate non-volatile memory cells with enhanced floating gate to floating gate capacitive coupling |
| CN114256251B (zh) * | 2020-09-21 | 2025-05-13 | 硅存储技术股份有限公司 | 形成具有存储器单元、高压器件和逻辑器件的设备的方法 |
| JP7425929B2 (ja) * | 2020-09-21 | 2024-01-31 | シリコン ストーリッジ テクノロージー インコーポレイテッド | 平面状のスプリットゲート不揮発性メモリセル、高電圧デバイス、及びfinfet論理デバイスを有するデバイスを形成する方法 |
| US12453136B2 (en) | 2022-03-08 | 2025-10-21 | Silicon Storage Technology, Inc. | Method of forming a device with planar split gate non-volatile memory cells, planar HV devices, and FinFET logic devices on a substrate |
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- 2019-06-04 WO PCT/US2019/035459 patent/WO2020009772A1/en not_active Ceased
- 2019-06-04 JP JP2021500084A patent/JP7502258B2/ja active Active
- 2019-06-04 CN CN201980041671.3A patent/CN112400230B/zh active Active
- 2019-06-04 EP EP19732824.8A patent/EP3818564A1/en not_active Withdrawn
- 2019-06-04 KR KR1020207037367A patent/KR102369492B1/ko active Active
- 2019-06-24 TW TW108121999A patent/TWI709247B/zh active
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| Publication number | Publication date |
|---|---|
| US20200013788A1 (en) | 2020-01-09 |
| US10727240B2 (en) | 2020-07-28 |
| JP7502258B2 (ja) | 2024-06-18 |
| KR102369492B1 (ko) | 2022-03-02 |
| CN112400230B (zh) | 2024-12-10 |
| EP3818564A1 (en) | 2021-05-12 |
| US10644012B2 (en) | 2020-05-05 |
| TW202018957A (zh) | 2020-05-16 |
| WO2020009772A1 (en) | 2020-01-09 |
| KR20210016409A (ko) | 2021-02-15 |
| JP2021529439A (ja) | 2021-10-28 |
| US20200013786A1 (en) | 2020-01-09 |
| CN112400230A (zh) | 2021-02-23 |
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