CN112400230B - 具有三维鳍式场效应晶体管结构的分裂栅非易失性存储器单元及其制造方法 - Google Patents

具有三维鳍式场效应晶体管结构的分裂栅非易失性存储器单元及其制造方法 Download PDF

Info

Publication number
CN112400230B
CN112400230B CN201980041671.3A CN201980041671A CN112400230B CN 112400230 B CN112400230 B CN 112400230B CN 201980041671 A CN201980041671 A CN 201980041671A CN 112400230 B CN112400230 B CN 112400230B
Authority
CN
China
Prior art keywords
fin
fins
logic
region
insulated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201980041671.3A
Other languages
English (en)
Chinese (zh)
Other versions
CN112400230A (zh
Inventor
S·乔尔巴
C·德科贝尔特
周锋
金珍浩
X·刘
N·多
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Silicon Storage Technology Inc
Original Assignee
Silicon Storage Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Silicon Storage Technology Inc filed Critical Silicon Storage Technology Inc
Publication of CN112400230A publication Critical patent/CN112400230A/zh
Application granted granted Critical
Publication of CN112400230B publication Critical patent/CN112400230B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B41/00Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • H10B41/35Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region with a cell select transistor, e.g. NAND
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00Resistors, capacitors or inductors
    • H10D1/01Manufacture or treatment
    • H10D1/041Manufacture or treatment of capacitors having no potential barriers
    • H10D1/042Manufacture or treatment of capacitors having no potential barriers using deposition processes to form electrode extensions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00Resistors, capacitors or inductors
    • H10D1/60Capacitors
    • H10D1/68Capacitors having no potential barriers
    • H10D1/692Electrodes
    • H10D1/711Electrodes having non-planar surfaces, e.g. formed by texturisation
    • H10D1/716Electrodes having non-planar surfaces, e.g. formed by texturisation having vertical extensions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/024Manufacture or treatment of FETs having insulated gates [IGFET] of fin field-effect transistors [FinFET]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/024Manufacture or treatment of FETs having insulated gates [IGFET] of fin field-effect transistors [FinFET]
    • H10D30/0243Manufacture or treatment of FETs having insulated gates [IGFET] of fin field-effect transistors [FinFET] using dummy structures having essentially the same shapes as the semiconductor bodies, e.g. to provide stability
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0411Manufacture or treatment of FETs having insulated gates [IGFET] of FETs having floating gates
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/62Fin field-effect transistors [FinFET]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/68Floating-gate IGFETs
    • H10D30/681Floating-gate IGFETs having only two programming levels
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/68Floating-gate IGFETs
    • H10D30/681Floating-gate IGFETs having only two programming levels
    • H10D30/684Floating-gate IGFETs having only two programming levels programmed by hot carrier injection
    • H10D30/685Floating-gate IGFETs having only two programming levels programmed by hot carrier injection from the channel
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/68Floating-gate IGFETs
    • H10D30/6891Floating-gate IGFETs characterised by the shapes, relative sizes or dispositions of the floating gate electrode
    • H10D30/6892Floating-gate IGFETs characterised by the shapes, relative sizes or dispositions of the floating gate electrode having at least one additional gate other than the floating gate and the control gate, e.g. program gate, erase gate or select gate
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/01Manufacture or treatment
    • H10D64/017Manufacture or treatment using dummy gates in processes wherein at least parts of the final gates are self-aligned to the dummy gates, i.e. replacement gate processes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0135Manufacturing their gate conductors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0158Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including FinFETs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0172Manufacturing their gate conductors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0193Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices the components including FinFETs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/02Manufacture or treatment characterised by using material-based technologies
    • H10D84/03Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/834Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET] comprising FinFETs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00Ion implantation into wafers, substrates or parts of devices
    • H10P30/20Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/22Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping using masks
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/031Manufacture or treatment of conductive parts of the interconnections
    • H10W20/056Manufacture or treatment of conductive parts of the interconnections by filling conductive material into holes, grooves or trenches
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/031Manufacture or treatment of conductive parts of the interconnections
    • H10W20/062Manufacture or treatment of conductive parts of the interconnections by smoothing of conductive parts, e.g. by planarisation

Landscapes

  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
CN201980041671.3A 2018-07-05 2019-06-04 具有三维鳍式场效应晶体管结构的分裂栅非易失性存储器单元及其制造方法 Active CN112400230B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US16/028,244 2018-07-05
US16/028,244 US10727240B2 (en) 2018-07-05 2018-07-05 Split gate non-volatile memory cells with three-dimensional FinFET structure
PCT/US2019/035459 WO2020009772A1 (en) 2018-07-05 2019-06-04 Split gate non-volatile memory cells with three dimensional finfet structure, and method of making same

Publications (2)

Publication Number Publication Date
CN112400230A CN112400230A (zh) 2021-02-23
CN112400230B true CN112400230B (zh) 2024-12-10

Family

ID=67002404

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201980041671.3A Active CN112400230B (zh) 2018-07-05 2019-06-04 具有三维鳍式场效应晶体管结构的分裂栅非易失性存储器单元及其制造方法

Country Status (7)

Country Link
US (2) US10727240B2 (https=)
EP (1) EP3818564A1 (https=)
JP (1) JP7502258B2 (https=)
KR (1) KR102369492B1 (https=)
CN (1) CN112400230B (https=)
TW (1) TWI709247B (https=)
WO (1) WO2020009772A1 (https=)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11114451B1 (en) * 2020-02-27 2021-09-07 Silicon Storage Technology, Inc. Method of forming a device with FinFET split gate non-volatile memory cells and FinFET logic devices
US11362100B2 (en) * 2020-03-24 2022-06-14 Silicon Storage Technology, Inc. FinFET split gate non-volatile memory cells with enhanced floating gate to floating gate capacitive coupling
CN114256251B (zh) * 2020-09-21 2025-05-13 硅存储技术股份有限公司 形成具有存储器单元、高压器件和逻辑器件的设备的方法
JP7425929B2 (ja) * 2020-09-21 2024-01-31 シリコン ストーリッジ テクノロージー インコーポレイテッド 平面状のスプリットゲート不揮発性メモリセル、高電圧デバイス、及びfinfet論理デバイスを有するデバイスを形成する方法
US12453136B2 (en) 2022-03-08 2025-10-21 Silicon Storage Technology, Inc. Method of forming a device with planar split gate non-volatile memory cells, planar HV devices, and FinFET logic devices on a substrate

Family Cites Families (53)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5029130A (en) 1990-01-22 1991-07-02 Silicon Storage Technology, Inc. Single transistor non-valatile electrically alterable semiconductor memory device
US6281545B1 (en) * 1997-11-20 2001-08-28 Taiwan Semiconductor Manufacturing Company Multi-level, split-gate, flash memory cell
US6420232B1 (en) * 2000-11-14 2002-07-16 Silicon-Based Technology Corp. Methods of fabricating a scalable split-gate flash memory device having embedded triple-sides erase cathodes
US6747310B2 (en) 2002-10-07 2004-06-08 Actrans System Inc. Flash memory cells with separated self-aligned select and erase gates, and process of fabrication
US20050012137A1 (en) 2003-07-18 2005-01-20 Amitay Levi Nonvolatile memory cell having floating gate, control gate and separate erase gate, an array of such memory cells, and method of manufacturing
US6992929B2 (en) * 2004-03-17 2006-01-31 Actrans System Incorporation, Usa Self-aligned split-gate NAND flash memory and fabrication process
KR100528486B1 (ko) 2004-04-12 2005-11-15 삼성전자주식회사 불휘발성 메모리 소자 및 그 형성 방법
US7315056B2 (en) 2004-06-07 2008-01-01 Silicon Storage Technology, Inc. Semiconductor memory array of floating gate memory cells with program/erase and select gates
JP4927321B2 (ja) 2004-06-22 2012-05-09 ルネサスエレクトロニクス株式会社 半導体記憶装置
US7423310B2 (en) 2004-09-29 2008-09-09 Infineon Technologies Ag Charge-trapping memory cell and charge-trapping memory device
KR100652384B1 (ko) 2004-11-08 2006-12-06 삼성전자주식회사 2비트 형태의 불휘발성 메모리소자 및 그 제조방법
TWI259585B (en) * 2005-03-21 2006-08-01 Powerchip Semiconductor Corp Split gate flash memory and manufacturing method thereof
KR100630746B1 (ko) 2005-05-06 2006-10-02 삼성전자주식회사 멀티-비트 및 멀티-레벨 비휘발성 메모리 소자 및 그 동작및 제조 방법
US7205601B2 (en) * 2005-06-09 2007-04-17 Taiwan Semiconductor Manufacturing Company, Ltd. FinFET split gate EEPROM structure and method of its fabrication
KR101100428B1 (ko) 2005-09-23 2011-12-30 삼성전자주식회사 SRO(Silicon Rich Oxide) 및 이를적용한 반도체 소자의 제조방법
KR100663366B1 (ko) 2005-10-26 2007-01-02 삼성전자주식회사 자기 정렬된 부유게이트를 갖는 플래시메모리소자의제조방법 및 관련된 소자
US7754560B2 (en) 2006-01-10 2010-07-13 Freescale Semiconductor, Inc. Integrated circuit using FinFETs and having a static random access memory (SRAM)
KR101225641B1 (ko) 2006-12-27 2013-01-24 삼성전자주식회사 반도체 소자 및 그 제조 방법
US7838922B2 (en) 2007-01-24 2010-11-23 Freescale Semiconductor, Inc. Electronic device including trenches and discontinuous storage elements
US20090039410A1 (en) 2007-08-06 2009-02-12 Xian Liu Split Gate Non-Volatile Flash Memory Cell Having A Floating Gate, Control Gate, Select Gate And An Erase Gate With An Overhang Over The Floating Gate, Array And Method Of Manufacturing
TW200917425A (en) 2007-10-03 2009-04-16 Nanya Technology Corp FinFET-like elevated channel flash and manufacturing method thereof
US8068370B2 (en) 2008-04-18 2011-11-29 Macronix International Co., Ltd. Floating gate memory device with interpoly charge trapping structure
US8148768B2 (en) 2008-11-26 2012-04-03 Silicon Storage Technology, Inc. Non-volatile memory cell with self aligned floating and erase gates, and method of making same
JP2011003742A (ja) 2009-06-18 2011-01-06 Toshiba Corp 不揮発性半導体記憶装置および不揮発性半導体記憶装置の製造方法
US8461640B2 (en) 2009-09-08 2013-06-11 Silicon Storage Technology, Inc. FIN-FET non-volatile memory cell, and an array and method of manufacturing
US8941153B2 (en) 2009-11-20 2015-01-27 Taiwan Semiconductor Manufacturing Company, Ltd. FinFETs with different fin heights
US8420476B2 (en) 2010-05-27 2013-04-16 International Business Machines Corporation Integrated circuit with finFETs and MIM fin capacitor
JP2012234885A (ja) 2011-04-28 2012-11-29 Toshiba Corp 半導体装置及びその製造方法
US8785273B2 (en) 2012-04-11 2014-07-22 International Business Machines Corporation FinFET non-volatile memory and method of fabrication
US8981481B2 (en) * 2012-06-28 2015-03-17 Intel Corporation High voltage three-dimensional devices having dielectric liners
US8766363B2 (en) * 2012-11-07 2014-07-01 International Business Machines Corporation Method and structure for forming a localized SOI finFET
US9406689B2 (en) 2013-07-31 2016-08-02 Qualcomm Incorporated Logic finFET high-K/conductive gate embedded multiple time programmable flash memory
US9368605B2 (en) * 2013-08-28 2016-06-14 Globalfoundries Inc. Semiconductor structure including a split gate nonvolatile memory cell and a high voltage transistor, and method for the formation thereof
US9614048B2 (en) 2014-06-17 2017-04-04 Taiwan Semiconductor Manufacturing Co., Ltd. Split gate flash memory structure and method of making the split gate flash memory structure
US9543153B2 (en) * 2014-07-16 2017-01-10 Taiwan Semiconductor Manufacturing Co., Ltd. Recess technique to embed flash memory in SOI technology
US9312268B2 (en) 2014-09-02 2016-04-12 Globalfoundries Singapore Pte. Ltd. Integrated circuits with FinFET nonvolatile memory
KR102240022B1 (ko) * 2014-11-26 2021-04-15 삼성전자주식회사 반도체 장치 및 반도체 장치의 제조 방법
US9276005B1 (en) 2014-12-04 2016-03-01 Silicon Storage Technology, Inc. Non-volatile memory array with concurrently formed low and high voltage logic devices
US9276006B1 (en) 2015-01-05 2016-03-01 Silicon Storage Technology, Inc. Split gate non-volatile flash memory cell having metal-enhanced gates and method of making same
WO2016118785A1 (en) 2015-01-23 2016-07-28 Silicon Storage Technology, Inc. Method of forming self-aligned split-gate memory cell array with metal gates and logic devices
US9793280B2 (en) * 2015-03-04 2017-10-17 Silicon Storage Technology, Inc. Integration of split gate flash memory array and logic devices
US9634018B2 (en) * 2015-03-17 2017-04-25 Silicon Storage Technology, Inc. Split gate non-volatile memory cell with 3D finFET structure, and method of making same
US9570454B2 (en) * 2015-06-25 2017-02-14 Taiwan Semiconductor Manufacturing Co., Ltd. Structure with emedded EFS3 and FinFET device
JP2017045755A (ja) * 2015-08-24 2017-03-02 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
US10141321B2 (en) 2015-10-21 2018-11-27 Silicon Storage Technology, Inc. Method of forming flash memory with separate wordline and erase gates
US9761680B2 (en) * 2015-10-26 2017-09-12 United Microelectronics Corp. Semiconductor device with embedded non-volatile memory and method of fabricating semiconductor device
KR102056995B1 (ko) 2015-11-03 2019-12-17 실리콘 스토리지 테크놀로지 인크 금속 게이트들을 갖는 분리형 게이트 비휘발성 플래시 메모리 셀 및 이를 제조하는 방법
JP6620034B2 (ja) 2016-02-24 2019-12-11 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
US9666589B1 (en) 2016-03-21 2017-05-30 Globalfoundries Inc. FinFET based flash memory cell
US9837425B2 (en) 2016-04-19 2017-12-05 United Microelectronics Corp. Semiconductor device with split gate flash memory cell structure and method of manufacturing the same
US9985042B2 (en) 2016-05-24 2018-05-29 Silicon Storage Technology, Inc. Method of integrating FinFET CMOS devices with embedded nonvolatile memory cells
US10879251B2 (en) * 2017-04-27 2020-12-29 Taiwan Semiconductor Manufacturing Co., Ltd. Integrated circuit and manufacturing method thereof
US10937879B2 (en) * 2017-11-30 2021-03-02 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device and manufacturing method thereof

Also Published As

Publication number Publication date
US20200013788A1 (en) 2020-01-09
US10727240B2 (en) 2020-07-28
JP7502258B2 (ja) 2024-06-18
KR102369492B1 (ko) 2022-03-02
EP3818564A1 (en) 2021-05-12
US10644012B2 (en) 2020-05-05
TWI709247B (zh) 2020-11-01
TW202018957A (zh) 2020-05-16
WO2020009772A1 (en) 2020-01-09
KR20210016409A (ko) 2021-02-15
JP2021529439A (ja) 2021-10-28
US20200013786A1 (en) 2020-01-09
CN112400230A (zh) 2021-02-23

Similar Documents

Publication Publication Date Title
KR102582829B1 (ko) Finfet 구조를 갖는 분리형 게이트 비휘발성 메모리 셀들 및 hkmg 메모리 및 로직 게이트들, 및 이를 제조하는 방법
US10818680B2 (en) Split gate non-volatile memory cells and logic devices with FINFET structure, and method of making same
CN112400230B (zh) 具有三维鳍式场效应晶体管结构的分裂栅非易失性存储器单元及其制造方法
TWI752727B (zh) 形成具有分離閘極非揮發性記憶體單元、具有平面通道區域之高電壓(hv)元件及鰭式場效電晶體(finfet)邏輯元件之裝置的方法
JP7364801B2 (ja) FinFETスプリットゲート不揮発性メモリセル及びFinFET論理デバイスを備えるデバイスを形成する方法
CN114446972B (zh) 具有鳍式场效应晶体管结构的分裂栅非易失性存储器单元、hv和逻辑器件及其制造方法
KR102929988B1 (ko) 기판 상에 평면 분리형 게이트 비휘발성 메모리 셀, 평면 HV 소자 및 FinFET 논리 소자를 갖는 소자를 형성하는 방법

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant