TWI704607B - 形成鈷接觸模組之方法及藉此形成之鈷接觸模組 - Google Patents

形成鈷接觸模組之方法及藉此形成之鈷接觸模組 Download PDF

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TWI704607B
TWI704607B TW107105278A TW107105278A TWI704607B TW I704607 B TWI704607 B TW I704607B TW 107105278 A TW107105278 A TW 107105278A TW 107105278 A TW107105278 A TW 107105278A TW I704607 B TWI704607 B TW I704607B
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layer
trench
top surface
metal
metal layer
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方強
海苟 黃
薩法特 阿梅德
伍昌鴻
狄尼絲 Ｒ 柯林
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美商格芯（美國）集成電路科技有限公司
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Abstract

本揭露係關於一種形成Co(鈷)接觸模組之方法，該方法包括在溝槽塊體上沉積襯墊層，以Co作為第一金屬將已內襯的溝槽部分地鍍覆而使得所產生的Co層在最淺溝槽之開放頂端表面下面具有頂端表面，在該Co層、及該襯墊層之曝露表面上沉積第二金屬，將該第二金屬層平坦化，以及蝕刻該第二金屬層、及該襯墊層之部分。本揭露亦關於藉由所提方法所形成之Co接觸模組。

Description

形成鈷接觸模組之方法及藉此形成之鈷接觸模組
本文中揭示之專利標的係關於半導體之鈷接觸模組。更具體來說，本文中所述之各項態樣係關於形成鈷接觸模組之方法、以及藉此形成之鈷接觸模組。
半導體產業已經歷快速成長。半導體材料及設計在技術方面的進步已產生數代半導體，其中各世代比上個世代具有更小且更複雜的電路。在半導體演進的過程中，功能性密度(即每個晶片面積的互連裝置數目)大體上已有所提升，而幾何尺寸(即可使用製作程序來建立之最小組件或線路)則已減小。此比例縮小程序大體上產生較高的功率損耗率，故隨著特徵尺寸持續縮減，已希望使用高介電常數(高k)閘極介電質及金屬閘極電極來改善裝置效能。在一些金屬整合配置中，蝕刻到介電質內之圖案係藉由在晶圓表面上進行毯覆式沉積，例如藉由化學氣相沉積(chemical vapor deposition；CVD)，用金屬層來填充。
化學機械研磨(chemical mechanical polishing；CMP)已變為次微米先進半導體達成局部(local)或全域(global)晶圓平坦化的關鍵技術驅動力。CMP程序係用於將介電質上方例如鈷(Co)之過量金屬平坦化及移除，並且用於產生平面型半導體結構，其中金屬線或插塞、阻障金屬、及受曝露之介電質表面為共面。然而，在半導體結構於溝槽矽化物(trench silicide；TS)區與非TS區之間包括階梯(step)高度、以及將Co作為金屬層予以沉積的實例中，傳統CMP導致Co殘餘物留在更低高度之非TS區上，其進而在該非TS區中造成零良率。
所揭示的是形成Co接觸模組之方法、以及藉此形成之鈷接觸模組。在本揭露之第一態樣中，一種形成Co接觸模組之方法包括：在溝槽塊體(trench block)上沉積襯墊層(liner layer)，使得該溝槽塊體之頂端表面上方、及該溝槽塊體之溝槽之側壁與底端部分上沉積該襯墊層；以Co作為第一金屬將該等溝槽部分地鍍覆(plating)，使得該等溝槽內形成Co層，並且該Co層之頂端表面位於最淺溝槽之開放頂端表面下面；沉積第二金屬，使得該Co層、及該襯墊層之曝露表面上方形成第二金屬層，並且該第二金屬層之頂端表面高於最深溝槽之開放頂端表面；將該第二金屬層平坦化，使得該第二金屬層之該頂端表面變為與該最深溝槽之該開放頂端表面近似共面；以及蝕刻該第二金屬層、及該襯墊層之部分，使得該受蝕刻之第二金屬層之頂端表面與該最淺溝槽之該開放頂端表面近似共面。
本揭露之第二態樣包括一種Co接觸模組，其包括：具有溝槽之溝槽塊體；位在該等溝槽之側壁與底端部分上之襯墊層，該襯墊層係存在於該等側壁上不比最淺溝槽之開放頂端表面更高處；位在已內襯的溝槽(lined trench)內之Co層，該Co層在該最淺溝槽之該開放頂端表面下面具有頂端表面；以及位在該Co層上之第二金屬層，該第二金屬層具有與該最淺溝槽之該開放頂端表面近似共面之頂端表面。
100‧‧‧Co接觸模組
110‧‧‧溝槽塊體
120‧‧‧階梯高度
130‧‧‧閘極
140‧‧‧閘極或下閘極
150‧‧‧Co鍍覆
160‧‧‧Co殘餘物
200‧‧‧Co接觸模組
201‧‧‧基材
202‧‧‧溝槽
202A‧‧‧最淺溝槽
202B‧‧‧最深溝槽
210‧‧‧溝槽塊體
220‧‧‧階梯高度
230‧‧‧閘極或上閘極
240‧‧‧閘極或下閘極
245‧‧‧襯墊層
246‧‧‧頂端表面
247‧‧‧側壁
248‧‧‧底端部分
250‧‧‧Co層
251‧‧‧頂端表面或高度
252‧‧‧開放頂端表面或高度
255‧‧‧第二金屬層
256‧‧‧頂端表面
257‧‧‧開放頂端表面
260‧‧‧第二金屬層
261‧‧‧頂端表面
270‧‧‧第二金屬層
271‧‧‧頂端表面或高度
410‧‧‧鈦或氮化鈦
420‧‧‧動態表面退火
510‧‧‧背面暨斜面清潔
610‧‧‧覆蓋層
本發明之這些及其它特徵經由以下本發明各項態樣之詳細說明，搭配繪示本發明各項具體實施例之附圖，將得以更加輕易了解。
第1A圖(先前技術)繪示在諸閘極之間具有大約35nm階梯高度之溝槽塊體。
第1B圖(先前技術)繪示第1A圖之溝槽塊體之習知Co鍍覆。
第1C圖(先前技術)繪示第1B圖之Co鍍覆溝槽塊體之習知平坦化，其中所具厚度大約等於35nm階梯高度之下閘極之頂部留有Co殘餘物。
第2A圖繪示在諸閘極之間具有大約35nm階梯高度之溝槽塊體。
第2B圖繪示第2A圖之溝槽塊體上之襯墊沉積。
第2C圖繪示第2B圖之溝槽塊體之部分Co 鍍覆。
第2D圖繪示第2C圖之溝槽塊體上之第二金屬之沉積。
第2E圖繪示第2D圖之溝槽塊體之平坦化。
第2F圖繪示第2E圖之溝槽塊體之蝕刻，其中下閘極之頂部未留有Co殘餘物，也未留有襯墊層。
第3圖為如與從第2A圖至第2B圖之組態到第2C圖的漸進過程有關之漸進式傳輸電子顯微鏡(TEM)影像(由左至右)之重現。
第4圖繪示後面跟著動態表面退火(DSA)之鈦或氮化鈦之可選沉積，這是在第2B圖之沉積之前進行的。
第5圖繪示可選的背面暨斜面清潔，這是在第2D圖之沉積之後及第2E圖之平坦化之前進行的。
第6圖繪示覆蓋層之可選形成，這是在第2F圖之蝕刻之後進行的。
注意到的是，本發明之圖式不必然按照比例。該等圖式用意僅在於繪示本發明之典型態樣，因而不應該視為限制本發明之範疇。在圖式中，相似的數符代表該等圖式之間相似的元件。
本文中揭示之專利標的係關於半導體之鈷接觸模組。更具體來說，本文中所述之各項態樣係關於形成鈷接觸模組之方法、以及藉此形成之鈷接觸模組。
如上所述，習知CMP技術用於從例如在溝槽矽化物(TS)區與非TS區之間包括階梯高度之半導體結構將例如鈷(Co)之過量金屬平坦化及移除，通常會導致Co殘餘物留在更低高度之非TS區上，進而在該非TS區中造成不利的零良率。
第1A至1C圖(先前技術)繪示使半導體之Co接觸模組100(第1C圖)形成之習知方法。第1A圖展示在諸閘極130/140之間具有大約35nm階梯高度120之溝槽塊體110。第1B圖展示溝槽塊體110之習知Co鍍覆150。第1C圖繪示Co鍍覆溝槽塊體之習知平坦化，其中所具厚度大約等於35nm階梯高度120之下閘極140之頂部留有Co殘餘物160。
與習知方法相比之下，本揭露之各項態樣包括一種形成Co接觸模組之方法，該方法包括在溝槽塊體上沉積襯墊層，以Co作為第一金屬將該溝槽塊體之已內襯的溝槽部分地鍍覆而使得該Co層在最淺溝槽之開放頂端表面下面具有頂端表面，在該Co層、及該襯墊層之曝露表面上沉積第二金屬，將該第二金屬層平坦化，以及蝕刻該第二金屬層、及該襯墊層之部分。
本揭露之部分Co鍍覆與習知的完全Co鍍覆截然不同，並未在下閘極之頂部產生Co殘餘物。當Co殘餘物存在於下閘極之頂部時，Co不能夠適當地受蝕刻，並且在下閘極處導致零良率。
本揭露之第二金屬層，例如鎢(W)或銅(Cu)， 係沉積於Co層上，並且在平坦化前先存在於下閘極之頂部。當第二金屬(例如：W或Cu)存在於下閘極之頂部時，第二金屬、及襯墊層之部分係輕易地受蝕刻，使得受蝕刻之第二金屬層之頂端表面與最淺溝槽之開放頂端表面近似共面。
本揭露之部分Co鍍覆與第二金屬沉積係排除先前技術之所述問題，亦即下閘極處零良率的問題。再者，由於Co、W及Cu具有類似的導電率與電阻率，根據本揭露所產生之Co接觸模組不僅穩定，還維持令人滿意的導電率與電阻率等級。
第2A至2F圖繪示根據本揭露之具體實施例形成鈷接觸模組時程序之步驟。第2A圖展示在溝槽矽化物(TS)區中之上閘極230與非TS區中之下閘極240之間具有階梯高度220之溝槽塊體210，閘極230/240係形成於在兩者之間具有溝槽202之基材201上。據了解，基材201可包括任何習知的基材材料，例如：矽、鍺、矽鍺、碳化矽等。上閘極230及下閘極240可以是任何閘極電極，包括高k金屬閘極。階梯高度220可以是30奈米(nm)或更大，或在30nm至40nm之範圍內，或大約為35nm。
第2B圖展示溝槽塊體210上之襯墊層245之沉積。沉積襯墊層245而使得襯墊層245在頂端表面246上方、及溝槽塊體210之溝槽202之側壁247與底端部分248上形成。襯墊層245可包含Co、Ta、TaN、Ti、TiN、Ru或以上之組合。襯墊層245可經由適用於如下文所提待 沉積材料之任何目前已知或以後才開發的技術來沉積。襯墊層245較佳為經由化學氣相沉積(CVD)來沉積。
「沉積」於本文中使用時，可包括適用於待沉積材料之任何目前已知或以後才開發的技術，包括但不侷限於例如：化學氣相沉積(CVD)、低壓CVD(LPCVD)、電漿增強型CVD(PECVD)、半大氣壓CVD(SACVD)與高密度電漿CVD(HDPCVD)、快速熱CVD(RTCVD)、超高真空CVD(UHVCVD)、有限反應處理CVD(LRPCVD)、有機金屬CVD(MOCVD)、濺鍍沉積、離子束沉積、電子束沉積、雷射輔助沉積、熱氧化作用、熱氮化作用、旋塗方法、物理氣相沉積(physical vapor deposition；PVD)、原子層沉積(atomic layer deposition；ALD)、化學氧化作用、分子束磊晶(molecular beam epitaxy；MBE)、鍍覆及/或蒸鍍。
第2C圖展示用以使Co層250形成之溝槽塊體210之部分Co鍍覆。Co層250係形成於溝槽202內，並且在最淺溝槽202A之開放頂端表面252下面具有頂端表面251。由於Co層250之頂端表面251係位於開放頂端表面252下面，下閘極240之頂部實質未產生Co殘餘物。第3圖展示從第2A圖(左)到第2C圖(右)之Co部分鍍覆漸進過程之傳輸電子顯微鏡(transmission electron microscope；TEM)影像。
如能從第3圖看出的是，部分Co鍍覆自底端起向上填充溝槽。此類由下而上生長為溝槽上之底端處之鍍覆率比溝槽之開放頂端表面、溝槽之倒角區(chamfer area)、及倒角區附近溝槽側壁區上面之鍍覆率更高的結果。這樣的鍍覆率之差異係導因於使用還含有一或多種抑制劑之鈷鍍覆浴(cobalt plating bath)。該等抑制劑為適用於抑制目的之任何長分子。例示性抑制劑為具有3400或更大分子量之聚乙二醇。可存在於鍍覆浴中的其它組分包括CoSO4、硼酸及/或H2SO4。
該等抑制劑在溝槽塊體之頂端表面上、以及溝槽之倒角區、及倒角區附近之溝槽側壁區上進行吸收。因此，相較於溝槽之底端處之更低鍍覆過電位，這些區域(頂端表面、倒角、倒角附近之側壁)中的鍍覆過電位提升並且接收最小鍍覆。最小鍍覆係指大約2%至6%之鍍覆。此類最小鍍覆未干擾上述下閘極之良率。
第2D圖展示溝槽塊體210上之第二金屬之沉積。部分鍍覆Co層250、及襯墊層245之受曝露部分上方形成第二金屬層255。第二金屬層255在最深溝槽202B之開放頂端表面257上面具有頂端表面256。第二金屬為鎢或銅。第二金屬層255可經由適用於如上所述待沉積材料之任何目前已知或以後才開發的技術來沉積。第二金屬層255較佳為經由物理氣相沉積(PVD)來沉積。
第2E圖展示溝槽塊體210上第二金屬層之平坦化。形成平坦化之第二金屬層260，並且其具有與最深溝槽202B之開放頂端表面257近似共面之頂端表面261。平坦化之第二金屬層260可經由適用於如下文所提待平坦化材料之任何目前已知或以後才開發的技術來平坦化。平 坦化之第二金屬層260較佳為經由化學機械平坦化(chemical mechanical planarizing；CMP)來平坦化。
平坦化係指使表面更平坦(亦即，更扁平及/或更平滑)之各種程序。化學機械研磨(CMP)是利用化學反應與機械力之組合使表面平坦化之一種目前習知的平坦化程序。CMP使用包括磨擦性及侵蝕性化學成份之漿料，連同研磨墊及擋圈一起使用，直徑方面一般比晶圓更大。接墊與晶圓係藉由動態研磨頭按壓在一起，並且藉由塑膠擋圈持固在適當位置。動態研磨頭係以不同轉動軸轉動(亦即，非同心)。這將材料移除，並且傾向於使任何「形貌」均平，造成晶圓扁平且平坦。其它目前習知的平坦化技術可包括：(i)氧化作用；(ii)化學蝕刻；(iii)藉由離子佈植破壞進行斜削控制；(iv)沉積低熔點玻璃膜；(v)再濺鍍沉積膜使其平滑；(vi)光敏聚亞醯胺(photosensitive polyimide；PSPI)膜；(vii)新樹脂；(viii)低黏度液體環氧樹脂；(ix)旋塗玻璃(spin-on glass；SOG)材料；及/或(x)犧牲回蝕。
第2F圖展示已平坦化之第二金屬層、及襯墊層之受曝露部分之蝕刻。形成受蝕刻之第二金屬層270，並且其具有與最淺溝槽202A之開放頂端表面252近似共面之頂端表面271。受蝕刻之第二金屬層270可經由適用於待蝕刻材料之任何目前已知或以後才開發的技術來蝕刻。受蝕刻之第二金屬層270較佳為經由非選擇性反應離子蝕刻(RIE)來蝕刻。進行該第二金屬層、及該襯墊層之受曝露部分之該蝕刻，使得襯墊層245經由該蝕刻遭受移除之該 等部分為位於溝槽塊體210之該等頂端表面上、及位處受蝕刻之第二金屬層270之頂端表面271上面溝槽部分之側壁上的部分。由於該等閘極之掩蔽，該蝕刻未將閘極230/240蝕刻。
所提蝕刻一經完成，下閘極240之頂部便不留有Co殘餘物、第二金屬殘餘物及襯墊層。因此，如上所述，根據本揭露產生之Co接觸模組排除先前技術之所述問題，亦即下閘極處零良率的問題，而且仍然維持Co/第二金屬組成之穩定性、及令人滿意的導電率及電阻率等級。
除了上述方法步驟以外，本揭露之方法還可包括：在沉積襯墊層245之前，先沉積鈦或氮化鈦410,後面跟著動態表面退火(dynamic surface anneal；DSA)420(請參閱第4圖)。鈦及氮化鈦可經由適用於如上所述待沉積材料之任何目前已知或以後才開發的技術來沉積。鈦較佳為經由射頻物理氣相沉積(radio frequency physical vapor deposition；RFPVD)來沉積。氮化鈦較佳為經由原子層沉積(ALD)來沉積。
此外，本揭露之方法更包括：在沉積第二金屬與將第二金屬層255平坦化之間進行背面暨斜面清潔510(請參閱第5圖)。
另外，本揭露之方法可更包括：在蝕刻第二金屬層、及襯墊層之部分之後，使第二金屬層270上方之覆蓋層610、及閘極230/240之曝露表面形成(請參閱第6 圖)。該覆蓋層可含有SiN、SiC、SiCN或以上之組合。
上述本揭露之態樣係關於一種形成鈷接觸模組之方法，下文所述態樣則係關於一種藉此形成之鈷接觸模組。
第2F圖繪示Co接觸模組200，其包括含有溝槽202之溝槽塊體210；位在溝槽202之側壁247與底端部分248上之襯墊層245，襯墊層245係存在於側壁247上不比最淺溝槽202A之高度252更高處；位在該等已內襯的溝槽內之Co層250，Co層250具有比最淺溝槽202A之高度252更小之高度251；以及位在Co層250上之平坦化與受蝕刻之第二金屬層270，第二金屬層270具有與最淺溝槽202A之高度252近似相等之高度271。
本揭露之Co接觸模組之第二金屬可為鎢或銅。本揭露之Co接觸模組之襯墊層可含有Co、Ta、TaN、Ti、TiN、Ru或以上之組合。
本揭露之Co接觸模組之溝槽塊體在溝槽矽化物(TS)區中之上閘極230與非TS區中之下閘極240之間具有階梯高度220。階梯高度220可以是大約30nm或更大，或在30nm至40nm之範圍內，或大約為35nm。
本揭露之Co接觸模組200可更包括：第二金屬層270上之覆蓋層610、及閘極230/240之曝露表面(請參閱第6圖)。該覆蓋層可含有SiN、SiC、SiCN或以上之組合。
如上所述，本揭露之Co接觸模組在下閘極 之頂部不包括Co殘餘物、第二金屬殘餘物及襯墊層，從而排除先前技術之所述問題，亦即下閘極處零良率的問題。另外，本揭露之Co接觸模組排除先前技術之所述問題，而且仍然維持Co/第二金屬組成之穩定性、及令人滿意的導電率及電阻率等級。
本文所用術語的目的僅在於說明特殊具體實施例並且意圖不在於限制本揭露。單數形之「一」、「一個」及「該」於本文中使用時，用意在於同樣包括複數形，除非內容另有清楚指示。將進一步了解的是，「包含」及/或「包括」等詞於本說明書中使用時，指明所述特徵、整體、步驟、操作、元件及/或組件之存在，但並未排除一或多個其它特徵、整體、步驟、操作、元件、組件及/或其群組之存在或新增。
本說明書及申請專利範圍各處近似文句於本文中使用時，可套用來修飾任何定量表徵，其許可改變此定量表徵，但不會改變與其有關的基本功能。因此，一或多個諸如「約」、「大約/近似」及「實質」的用語所修飾的值並不受限於指定的精確值。在至少一些實例中，該近似語言可對應於儀器測量該值時的精確度。本說明書及申請專利範圍這裡及各處可組合及/或互換範圍限制，此類範圍乃經識別並且包括其中所含有的子範圍，除非內容或文句另有指示。「大約/近似」如應用到範圍之特定值時，適用於兩值，而且除非另外取決於測量該值之儀器的精確度，否則可表示所述值的+/-10%。
隨附的申請專利範圍中所有手段或步驟加上功能元件之對應結構、材料、動作及均等者用意在於包括結合如具體主張之其它主張專利權之元件進行任何結構、材料或動作。本揭露之說明已基於說明和描述目的而介紹，但用意不在於以所揭示之形式窮舉或限制本揭露。許多修改及變化對於所屬技術領域中具有通常知識者將會顯而易知而不脫離本揭露的範疇及精神。選擇並說明具體實施例是為了更佳闡釋本揭露之原理及實際應用，並且如適用於經思考之特定用途，讓所屬技術領域中具有通常知識者能夠理解本揭露經各種修改之各項具體實施例。
200‧‧‧Co接觸模組
230‧‧‧閘極或上閘極
240‧‧‧閘極或下閘極
250‧‧‧Co層
270‧‧‧第二金屬層
610‧‧‧覆蓋層

Claims (20)

  1. 一種形成鈷(Co)接觸模組之方法，該方法包含：在溝槽塊體上沉積襯墊層，使得該溝槽塊體之頂端表面上方、及該溝槽塊體之溝槽之側壁與底端部分上沉積該襯墊層；以Co作為第一金屬將該溝槽部分地鍍覆，使得該溝槽內形成Co層，並且該Co層之頂端表面位於最淺溝槽之開放頂端表面下面；沉積第二金屬，使得該Co層、及該襯墊層之曝露表面上方形成第二金屬層，並且該第二金屬層之頂端表面位於最深溝槽之開放頂端表面上面；將該第二金屬層平坦化，使得該第二金屬層之該頂端表面變為與該最深溝槽之該開放頂端表面近似共面；以及蝕刻該第二金屬層、及該襯墊層之部分，使得該第二金屬層之一受蝕刻的頂端表面與該最淺溝槽之該開放頂端表面近似共面。
  2. 如申請專利範圍第1項所述之方法，其中，該第二金屬為鎢。
  3. 如申請專利範圍第1項所述之方法，其中，該第二金屬為銅。
  4. 如申請專利範圍第1項所述之方法，其中，該襯墊層包含Co、Ta、TaN、Ti、TiN、Ru或以上之組合。
  5. 如申請專利範圍第1項所述之方法，其中，進行該第二 金屬層、及該襯墊層之部分之該蝕刻，使得該襯墊層遭受移除之該部分為位於該溝槽塊體之該頂端表面上、及位於該第二金屬層之受蝕刻的該頂端表面上面的溝槽部分之側壁上的部分。
  6. 如申請專利範圍第1項所述之方法，其中，該溝槽塊體包含介於溝槽矽化物(TS)區與非溝槽矽化物區之間的階梯高度。
  7. 如申請專利範圍第6項所述之方法，其中，該階梯高度大約為30奈米或更大。
  8. 如申請專利範圍第1項所述之方法，其中，該襯墊層之該沉積係藉由化學氣相沉積(CVD)來進行。
  9. 如申請專利範圍第1項所述之方法，其中，該第二金屬之該沉積係藉由物理氣相沉積(PVD)來進行。
  10. 如申請專利範圍第1項所述之方法，其中，該第二金屬層、及該襯墊層之部分之該蝕刻係藉由非選擇性反應性離子蝕刻(RIE)來進行。
  11. 如申請專利範圍第1項所述之方法，在該襯墊層之該沉積之前，更包含：射頻物理氣相沉積(RFPVD)鈦或原子層沉積(ALD)氮化鈦，後面跟著：動態表面退火(DSA)。
  12. 如申請專利範圍第1項所述之方法，在該第二金屬之該沉積與該第二金屬層之該平坦化之間，更包含：背面暨斜面清潔。
  13. 如申請專利範圍第1項所述之方法，在該第二金屬層、及該襯墊層之部分之該蝕刻之後，更包含：在該第二金屬層上方形成覆蓋層，其中，該覆蓋層包含SiN、SiC、SiCN或以上之組合。
  14. 一種鈷(Co)接觸模組，包含：包含溝槽之溝槽塊體；位在該溝槽之側壁與底端部分上之襯墊層，該襯墊層係存在於該側壁上不比最淺溝槽之開放頂端表面更高處；位在已內襯的該溝槽內之Co層，該Co層在該最淺溝槽之該開放頂端表面下面具有頂端表面；以及位在該Co層上之平坦化及受蝕刻之第二金屬層，該第二金屬層具有與該最淺溝槽之該開放頂端表面近似共面之頂端表面。
  15. 如申請專利範圍第14項所述之模組，其中，該第二金屬層包含鎢。
  16. 如申請專利範圍第14項所述之模組，其中，該第二金屬層包含銅。
  17. 如申請專利範圍第14項所述之模組，其中，該襯墊層包含Co、Ta、TaN、Ti、TiN、Ru或以上之組合。
  18. 如申請專利範圍第14項所述之模組，其中，該溝槽塊體具有介於溝槽矽化物(TS)區與非溝槽矽化物區之間的階梯高度。
  19. 如申請專利範圍第18項所述之模組，其中，該階梯高 度大約為30奈米或更大。
  20. 如申請專利範圍第14項所述之模組，其中，該模組更包含位在該第二金屬層上之覆蓋層，該覆蓋層包含SiN、SiC、SiCN或以上之組合。
TW107105278A 2017-07-27 2018-02-13 形成鈷接觸模組之方法及藉此形成之鈷接觸模組 TWI704607B (zh)

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