TWI700790B - 電子模組 - Google Patents

電子模組 Download PDF

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Publication number
TWI700790B
TWI700790B TW108101344A TW108101344A TWI700790B TW I700790 B TWI700790 B TW I700790B TW 108101344 A TW108101344 A TW 108101344A TW 108101344 A TW108101344 A TW 108101344A TW I700790 B TWI700790 B TW I700790B
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Taiwan
Prior art keywords
substrate
electronic component
electronic
module
connecting body
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TW108101344A
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English (en)
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TW201933559A (zh
Inventor
池田康亮
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日商新電元工業股份有限公司
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Abstract

本發明的電子模組，包括：第一基板；第二基板，設置在所述第一基板的一側；以及晶片模組，設置在所述第一基板與所述第二基板之間；其中，所述晶片模組具有：電子元件、以及與所述電子元件電性連接的連接體，所述電子元件沿所述電子模組的厚度方向延伸。

Description

電子模組
本發明涉及一種具有基板以及電子元件的電子模組。
以往，在封裝樹脂內配置有複數個電子元件的電子模組已被普遍認知。這種電子模組被要求實現小型化。
作為實現小型化的手段之一，可以考慮採用將電子元件進行疊層的結構。在國際公開公報WO2016/067383中就公開了這樣的結構。然而，在該國際公開公報WO2016/067383中，僅僅只提出了將電子元件中包含的半導體元件設置在相向的兩塊基板上的方案，即：僅公開了在厚度方向上將半導體元件進行疊層的堆疊（Stack）構造。
另外，在國際公開公報WO2016/067383中，還公開另一種半導體模組，其包括：第一構件，具有：第一絕緣基板、設置在第一絕緣基板的配置面上的第一導體層、設置在第一導體層上的第一功率元器件、以及與第一功率元器件相連接的第一連接部；第二構件，具有：第二絕緣基板、設置在第二絕緣基板的配置面上的第二導體層、設置在第二導體層上的第二功率元器件、以及與第二功率元器件相連接的第二連接部；以及導體柱，在第一構件與第二構件之間按上下方向延伸。在該形態中，第一功率元器件與第二功率元器件不僅相向配置，同時還通過導體柱來連接。也就是說，上述這種結構同樣也僅僅只公開了在半導體模組的厚度方向上將功率元器件進行疊層的堆疊構造。
本發明提供了一種將電子元件以不同於以往的方式進行安裝，以提升設計自由度的電子模組。
概念1：本發明涉及的電子模組，包括：第一基板；第二基板，設置在所述第一基板的一側；以及晶片模組，設置在所述第一基板與所述第二基板之間，其中，所述晶片模組具有：電子元件、以及與所述電子元件電性連接的連接體，所述電子元件沿作為所述電子模組的厚度方向的第一方向延伸。
概念2：在上述概念1所述的電子模組中，所述晶片模組具有：第一電子元件、以及通過所述連接體與所述第一電子元件相連接的第二電子元件。
概念3：在上述概念1或概念2所述的電子模組中，所述連接體具有第一連接體以及第二連接體，所述晶片模組具有：第一電子元件、第二電子元件、設置在所述第一電子元件與所述第二電子元件之間的第一連接體、以及設置在所述第二電子元件的與所述第一連接體相反一側的第二連接體。
概念4：在上述概念1至概念3中任意一項所述的電子模組中，所述連接體具有：頭部、以及從所述頭部沿頭部的厚度方向延伸的柱部，所述頭部在所述電子模組的厚度方向上延伸。
概念5：在上述概念1至概念4中任意一項所述的電子模組中，所述晶片模組被設置有複數個，在所述晶片模組之間，設置有與所述晶片模組電性連接的晶片連接體。
概念6：在上述概念5中所述的電子模組中，所述晶片模組具有與所述晶片連接體相嵌合的嵌合部。
概念7：在上述概念1至概念6中任意一項所述的電子模組中，進一步包括：第一導體層，設置在所述第一基板的一側；以及第二導體層，設置在所述第二基板的另一側，其中，所述連接體具有各自連接所述電子元件與所述第一導體層以及所述第二導體層的連接端子，與所述連接端子相連接的第一導體層以及第二導體層中的任意一方不與外部裝置電性連接。
概念8：在上述概念1至概念7中任意一項所述的電子模組中，進一步包括：第一導體層，設置在所述第一基板的一側；以及第二導體層，設置在所述第二基板的另一側，其中，所述連接體具有：頭部、從所述頭部的端部沿所述第一基板的面內方向延伸，並且與所述第一導體層相連接的第一基端部、以及從所述頭部的端部沿所述第二基板的面內方向延伸，並且與所述第二導體層相連接的第二基端部，所述第一基端部從所述頭部的端部延伸的方向與所述第二基端部從所述頭部的端部延伸的方向在包含第二方向以及第三方向的電子模組的面內方向上不重合。
概念9：在上述概念8所述的電子模組中，所述第一基端部從所述頭部的端部延伸的方向與所述第二基端部從所述頭部的端部延伸的方向相差180度。
發明效果：在本發明中，當採用設置在連接體上的電子元件沿從第一基板向第二基板的方向延伸的形態的情況下，就能夠在與往不同的方向上來配置電子元件，這相對於以往已提出的配置方案來說，能夠提升設計自由度。
第一實施方式
構成：在本實施方式中，“一側”指的是圖1中的上方側，“另一側”指的是圖1中的下方側。另外，將圖1中的上下方向稱為“第一方向”、左右方向稱為“第二方向”、圖1的表裡方向稱為“第三方向”。將包含第二方向以及第三方向的面內方向稱為“面內方向”，將從圖1的上方進行觀看稱為“從平面看”。
如圖1所示，電子模組具有：第一基板11、配置在第一基板11的一側的第二基板21、以及配置在第一基板11與第二基板21之間的晶片模組100。晶片模組100具有：電子元件13、23、以及與電子元件13、23電性連接的連接體60、70、80。電子元件13、23可以在電子模組的厚度方向即第一方向上延伸。在電子模組的“厚度方向”（也就是“第一方向”）上延伸不僅是指沿第一基板11的法線方向（第一方向）延伸，還包含相對於第一基板11的法線方向傾斜著延伸的形態。電子元件13、23例如大致呈厚度較薄的直方體形。電子元件13、23延伸的方向與厚度方向（從電子元件13、23的正面向背面的方向以及從電子元件13、23的背面向正面的方向）相垂直。
晶片模組100可以具有：第一電子元件13、以及通過連接體60、70、80與第一電子元件13相連接的第二電子元件23。本實施方式中的晶片模組100可以在製造電子模組之前預先進行組裝。當採用此形態的情況下，在組裝時，由於可以適宜地來載置晶片模組100，因此能夠提高製造效率。
連接體60、70、80可以具有第一連接體60以及第二連接體70。此情況下，晶片模組100可以具有：第一電子元件13、第二電子元件23、設置在第一電子元件13與第二電子元件23之間的第一連接體60、以及設置在第二電子元件23的與第一連接體60相反一側的第二連接體70。
連接體60、70、80還可以具有：頭部61、71、以及從頭部61、71向頭部61、71的厚度方向延伸的柱部62、72。頭部61、71也可以在電子模組的厚度方向上延伸。在圖1所示的形態中，頭部61、71的厚度方向為第二方向。在連接體60、70、80具有第一連接體60以及第二連接體70的形態中，第一連接體60可以具有：第一頭部61、以及從第一頭部61向第一頭部61的厚度方向延伸的第一柱部62。另外，第二連接體70也可以具有：第二頭部71、以及從第二頭部71向第二頭部71的厚度方向延伸的第二柱部72。
第一基板11的一側可以設置有複數個第一導體層12。第二基板21的另一側也可以設置有複數個第二導體層22。第一電子元件13以及第二電子元件23可以皆為或僅其中一方為開關元件或控制元件。作為開關元件可以使用MOSFET或IGBT等。第一電子元件13以及第二電子元件23可以各自由半導體元件構成，作為半導體元件的材料可以是矽、碳化矽、或是氮化鎵等。
第一電子元件13與第一連接體60之間配置有導電性接合劑95，並且第一電子元件13與第一連接體60可以通過導電性接合劑95來連接。同樣的，第一連接體60與第二電子元件23之間配置有導電性接合劑95，並且第一連接體60與第二電子元件23可以通過導電性接合劑95來連接。同樣的，第二電子元件23與第二連接體70之間配置有導電性接合劑95，並且第二電子元件23與第二連接體70可以通過導電性接合劑95來連接。
第一基板11的另一側設置有由銅等金屬構成的第一散熱層19。同樣的，第二基板21的一側設置有由銅等金屬構成的第二散熱層29。
作為第一基板11以及第二基板21，可以採用陶瓷基板或絕緣樹脂層等。作為導電性接合劑95，除了焊錫以外，還可以採用以Ag和Cu為主成分的材料。作為第一連接體60以及第二連接體70的材料，可以採用Cu等金屬材料。作為第一基板11、第二基板21例如可以採用進行了電路圖形化後的金屬基板，此情況下，第一基板11、第二基板21可以兼為導體層12、22。
電子模組如前述般，可以具有由用於將第一電子元件13、第二電子元件23、第一連接體60、第二連接體70、以及第一導體層12等進行封裝的封裝樹脂等構成的封裝部90。
當第一電子元件13為MOSFET等開關元件的情況下，可以在第一連接體60一側的面（圖1中右側的面）配置第一柵電極13g以及第一源電極13s。同樣的，當第二電子元件23為MOSFET等開關元件的情況下，可以在第二連接體70一側的面（圖1中右側的面）配置第二柵電極23g以及第二源電極23s。此情況下，第二連接體70可以通過導電性接合劑95與第二電子元件23的第二源電極23s相連接。第一連接體60則可以通過導電性接合劑95將第一電子元件13的第一源電極13s與設置在第二電子元件23的與第二連接體70相反一側的面（圖1中左側的面）上的第二漏電極23d連接。第一電子元件13的與第一連接體60相反一側的面（圖1中左側的面）上可以設置有第一漏電極13d。第一柵電極13g可以通過導電性接合劑95與第一連接件30相連接，該第一連接件30通過導電性接合劑95可以與導體層12、22相連接（在圖1中與第二導體層22相連接）。第二柵電極23g可以通過導電性接合劑95與第二連接件40相連接，該第二連接件40通過導電性接合劑95可以與導體層12、22相連接（在圖1中與第一導體層12相連接）。
端子110、120（如圖4所示）與導體層12、22之間的接合不僅可以通過利用焊錫等導電性接合95的實現，還可以通過利用鐳射焊接或超聲波焊接來實現。
連接體60、70、80可以具有將電子元件13、23與第一導體層12以及第二導體層22各自連接的連接端子80。與連接端子80相連接的第一導體層12以及第二導體層22中的任意一方可以不與外部裝置電性連接。
當設置有本實施方式中的連接端子80的情況下，可以通過該連接端子80來進行散熱。在圖1所示的形態中，在第一電子元件13的與設置有第一連接體60的面相反一側的面（左側的面）上設置有連接端子80。因此，在該形態中，來自第一電子元件13的熱量能夠通過連接端子80來進行散熱。
連接端子80可以具有：在電子模組的厚度方向（圖1中的第一方向）上延伸的端子頭部81、從端子頭部81的端部沿第一基板11的面內方向（圖1中的第二方向）延伸，並且與第一導體層12相連接的第一基端部82、以及從端子頭部81的端部沿第二基板21的面內方向延伸，並且與第二導體層22相連接的第二基端部83。通過設置這樣的第一基端部82以及第二基端部83，就能夠更加確實地與第一導體層12以及第二導體層22相連接，並且提升散熱效果。
第一連接體60可以具有設置在第一頭部61上，並且與第一導體層12或第二導體層22相連接的第一連接體基端部63。第一連接體基端部63可以具有：從第一頭部61的端部沿第一基板11的面內方向（圖1中的第二方向）延伸，並且與第一導體層12相連接的第一基端部63a、以及從第二頭部71的端部沿第二基板21的面內方向延伸，並且與第二導體層22相連接的第二基端部63b。
第二連接體70可以具有設置在第二頭部71上，並且與第一導體層12或第二導體層22相連接的第二連接體基端部73。第二連接體基端部73可以具有：從第二頭部71的端部沿第一基板11的面內方向（圖1中的第二方向）延伸，並且與第一導體層12相連接的第一基端部73a、以及從第二頭部71的端部沿第二基板21的面內方向延伸，並且與第二導體層22相連接的第二基端部73b。
在圖1所示的形態中，第一基端部82從端子頭部81的端部延伸的面內上的方向與第二基端部83從端子頭部81的端部延伸的面內上的方向為相同方向（圖1的左方向）。不過，又不僅限於此形態，也可以是：第一基端部82從端子頭部81的端部延伸的面內方向與第二基端部83從端子頭部81的端部延伸的面內上的方向為不同方向（例如相差180度）。
作用、效果：
接下來，將對由上述結構構成的本實施方式的作用以及效果進行說明。另外，可以將在“作用、效果”中說明的任何形態適用於上述結構。
在本實施方式中，當採用設置在連接體60、70、80上的電子元件13、23沿從第一基板11向第二基板21的方向延伸的形態的情況下，就能夠在與往不同的方向上來配置電子元件13、23，這相對於以往已提出的配置方案來說，能夠提升設計自由度。
在本實施方式中，當採用晶片模組100具有：第一電子元件13、以及通過第一連接體60與第一電子元件13相連接的第二電子元件23的形態的情況下，就能夠使用通過第一連接體60將第一電子元件13與第二電子元件23連接的晶片模組100。這樣一來，就能夠例如通過第一連接體60將第一電子元件13的第一源電極13s與第二電子元件23的第二漏電極23d電性連接、或是通過第一連接體60將第一電子元件13的第一漏電極13d與第二電子元件23的第二源電極23s電性連接，從而將它們作為單個晶片模組100來利用。
當採用晶片模組100具有：第一電子元件13、第二電子元件23、設置在第一電子元件13與第二電子元件23之間的第一連接體60、以及設置在第二電子元件23的與第一連接體60相反一側的第二連接體70的形態的情況下，就能夠通過第一連接體60將第一電子元件13與第二電子元件23連接，並且還能夠使用具有與第二電子元件23相連接的第二連接體70的晶片模組100。這樣一來，就能夠採用例如：通過第一連接體60將第一電子元件13的第一源電極13s與第二電子元件23的第二漏電極23d電性連接，並且通過第二連接體70來連接第二電子元件23的第二源電極23s連接的形態、或是通過第一連接體60將第一電子元件13的第一漏電極13d與第二電子元件23的第二源電極23s電性連接，並且通過第二連接體70來連接第二電子元件23的第二漏電極23d連接的形態，從而將它們作為單個晶片模組100來利用。
當採用連接體60、70、80具有：頭部61、71、以及從頭部61、71沿頭部61、71的厚度方向延伸的柱部62、72的形態的情況下，就能夠防止來自電子元件13、23的熱量發生聚集。當採用第一連接體60具有第一柱部62的形態的情況下，就能夠在第一電子元件13與第二電子元件23之間設置規定以上的距離，從而防止來自電子元件13以及第二電子元件23的熱量發生聚集。另外，當採用第二連接體70具有第二柱部72的形態的情況下，由於來自第二電子元件23的熱量會經過一段距離後再傳遞至第一導體層12或第二導體層22，因此就能夠防止來自第二電子元件23的熱量發生聚集。特別是當採用如本實施方式般第一電子元件13、23從第一基板11向沿第二基板21的方向延伸的形態的情況下，能夠在第一電子元件13與第二電子元件23之間設置規定以上的距離，從散熱的觀點來說是非常有益的。
當第一基端部63a、73a、82延伸的面內上的方向與第二基端部63b、73b、83延伸的面內上的方向不同時，就能夠在晶片模組的面內方向上使熱量的流動方向有所不同，從而提升散熱效果。從此觀點來看，採用第一基端部63a、73a、82延伸的面內上的方向與第二基端部63b、73b、83延伸的面內上的方向相差180度的形態時十分有益的。特別是，當採用如本實施方式般電子元件13、23沿從第一基板向第二基板21的方向延伸的形態的情況下，由於熱量容易聚集，因此能夠像這樣來提升散熱效果是非常有益的。
如圖2所示，從側面觀看連接體60、70時（圖2中展示的是從圖1中的箭頭A方向觀看時的樣子），其可以呈細長的矩形。但又不僅限於此形態，也可以如圖3所示，從側面觀看連接體60、70時，其可以設置有突出面71a。在圖2以及圖3中，雖然展示有第二連接體70的結構，但第一連接體60也可以與圖2以及圖3中所展示的第二連接體70為相同的結構。
第二實施方式
接下來，對本發明的第二實施方式進行說明。
在實施方式中，如圖4至圖6所示，設置有複數個晶片模組100。另外本實施方式能夠採用上述第一實施方式中已進行說明的任何一種形態。與第一實施方式相同的構件在本實施方式中使用同一符號來進行說明。
當如本實施方式般設置有複數個晶片模組100時，在各個晶片模組100中，第一電子元件13以及第二電子元件23可以在電子模組的厚度方向（第一方向）上延伸。
另外，能夠對晶片模組100的配置方向進行適宜地調整。如果將從第一電子元件13向第二電子元件23的方向（圖4的左右方向）設為晶片模組100的厚度方向的話，某一個晶片模組100的厚度方向就可以與其他的晶片模組100的厚度方向互有不同。例如圖5所示般，某個晶片模組100a（例如後述的第一晶片模組100a）的厚度方向也可以與其他的晶片模組100b（例如後述的第二晶片模組100b）的厚度方向在電子模組的面內方向上（包含第二方向以及第三方向的面內方向）相互垂直。還可以如圖6所示般，某個晶片模組100a中從第一電子元件13向第二電子元件23的方向（參照圖6中的箭頭A1）也可以與其他晶片模組100b中從第一電子元件13向第二電子元件23的方向（參照圖6中的箭頭A2）相差180度。
例如圖5所示，當採用設置有第一晶片模組100a、第二晶片模組100b、第三晶片模組100c、以及第四晶片模組100d的形態的情況下，第一晶片模組100a的厚度方向、第二晶片模組100b的厚度方向、第三晶片模組100c的厚度方向、以及第四晶片模組100d的厚度方向中的兩個或以上的方向可以互為不同方向。作為一例，可以如圖5所示般，第一晶片模組100a的厚度方向與第三晶片模組100c的厚度方向相一致，並且第二晶片模組11b的厚度方向與第四晶片模組100d的厚度方向相一致。另外，也可以如圖5所示般，第一晶片模組100a以及第三晶片模組100c的厚度方向與第二晶片模組100b的厚度方向以及第四晶片模組100d的厚度方向在電子模組的面內方向上相互垂直。第一晶片模組100a中從第一電子元件13向第二電子元件23的方向（參照圖5中的箭頭a1）也可以與第三晶片模組100c中從第一電子元件13向第二電子元件23的方向（參照圖5中的箭頭a3）相差180度。同樣的，第二晶片模組100b中從第一電子元件13向第二電子元件23的方向（參照圖5中的箭頭a2）也可以與第四晶片模組100d中從第一電子元件13向第二電子元件23的方向（參照圖5中的箭頭a4）相差180度。
第三實施方式
接下來，對本發明的第三實施方式進行說明。
本實施方式與第二實施方式一樣設置有複數個晶片模組100。並且如圖7所示，在電子模組的面內方向上（包含第二方向以及第三方向的面內方向）的晶片模組100之間，還設置有作為與晶片模組100電性連接的第三連接體的晶片連接體150。另外，本實施方式能夠採用上述各實施方式中已進行說明的任何一種形態。與上述各實施方式相同的構件在本實施方式中使用同一符號來進行說明。
根據本實施方式，由於在電子模組的面內方向上（的晶片模組100之間，設置有與晶片模組100電性連接的晶片連接體150，因此就能夠將兩個或以上的晶片模組100通過晶片連接體150電性連接。這樣一來，就能夠將複數個晶片模組100作為單塊（模組）來利用。
在電子模組的面內方向上，在晶片連接體150的周圍可以設置有三個或以上的晶片模組100，這些晶片模組100可以通過晶片連接體150來相互實現電性連接。此形態下，就能夠將這些晶片模組100作為單塊（模組）來利用。
晶片連接體150可以具有：在電子模組的面內方向上延伸的第三頭部151、以及從第三頭部151向另一側延伸的第三柱部152。
第四實施方式
接下來，對本發明的第四實施方式進行說明。
如圖8所示，本實施方式與第三實施方式一樣設置有晶片連接體150。本實施方式中的晶片模組100還具有與晶片連接體150相嵌合的嵌合部79。另外，本實施方式能夠採用上述各實施方式中已進行說明的任何一種形態。與上述各實施方式相同的構件在本實施方式中使用同一符號來進行說明。
當設置有如本實施方式般的嵌合部79的情況下，不但能夠在晶片模組100與晶片連接體150之間切實地進行定位，還能夠在複數個晶片模組100之間切實地進行定位。
另外，在本實施方式中，晶片模組100還可以具有凹部79a來作為嵌合部79。當設置有凹部79a的情況下，晶片連接體150的邊緣部就能夠嵌入該凹部79a內。在圖8所示的示例中，作為一例，第二連接體70的第二頭部71具有凹部79a。
另外，也不僅限於此形態，也可以如圖9所示般，晶片模組100還可以具有凸部101來作為嵌合部。當設置有凸部101的情況下，可以設置用於將該凸部101嵌入晶片連接體150的凹部158。
第五實施方式
接下來，對本發明的第五實施方式進行說明。
如圖10所示，在本實施方式中，設置有晶片連接體150a。本實施方式中的晶片連接體150a上還設置有第一電子部件160。該第一電子部件160可以通過導電性接合劑95載置在晶片連接體150a的載置面上。另外，本實施方式能夠採用上述各實施方式中已進行說明的任何一種形態。與上述各實施方式相同的構件在本實施方式中使用同一符號來進行說明。
根據本實施方式，能夠將晶片模組100中包含的第一電子元件13以及第二電子元件23與設置在晶片連接體150a上的第一電子部件160電性連接。作為第一電子部件160，可以使用繼電器電路等部件，但又不僅限於此，也可以使用半導體元件等電子元件。
如圖10所示，在第一電子部件160的一側可以設置有用於將第一電子部件160與第二導體層22相連接的第四連接體260。第四連接體260與第一電子部件160之間設置有導電性接合劑95，第四連接體260與第二導體層22之間也設置有導電性接合劑95。
當採用圖10所示的形態時，能夠將具有晶片模組100與第一電子部件160的副電子模組作為單塊模組的利用。
如圖10所示，雖然在本實施方式中使用了板形的晶片連接體150a，但又不僅限於此，也可以使用如圖7至圖9所示具有第三柱部152的晶片連接體150。
另外，如圖11所示，除了第一電子部件160以外還可以設置有第二電子部件170。作為該第二電子部件170，可以使用繼電器電路等部件，但又不僅限於此，也可以使用半導體元件等電子元件。
第二電子部件170可以位於晶片連接體150的第三柱部152的另一側，並且第二電子部件170也可以位於第三頭部151的一側。在圖11所示的形態中，晶片連接體150與第二電子部件170之間設置有導電性接合劑95，第二電子部件170與第二導體層22之間也設置有導電性接合劑95。
當採用如圖11所示的形態時，能夠將具有晶片模組100與第一電子部件160以及第二電子部件170的副電子模組作為單塊模組的利用。
另外，如圖12所示，可以設置有兩個及以上的晶片連接體150、150a。並且，可以在晶片連接體150、150a中的一個上設置第一電子部件160，而另一個與第二電子部件170電性連接。在圖12所示的形態中，晶片連接體150a上設置有第一電子部件160，並且晶片連接體150與第二電子部件170電性連接。
另外，雖然在圖10至圖12的形態中展示有嵌合部79，但是也可以不設置這樣的嵌合部79。在本實施方式中，除了第一電子元件13以及第二電子元件23之外，同樣可以考慮事先準備包含第一電子部件160、第二電子部件170或同時包含第一電子部件160以及第二電子部件170的模組來作為副電子模組。
第六實施方式
接下來，對本發明的第六實施方式進行說明。
在上述各實施方式中，雖然對使用第二連接體70的形態進行了說明，但並不僅限於此。如圖13所示，也可以不設置第二連接體70。在本實施方式中，設置有連接件45來取代第二連接體70。本實施方式同樣能夠採用上述各實施方式中已做說明的任何一種形態。與上述各實施方式相同的構件在本實施方式中使用同一符號來進行說明。本實施方式在不設置第二連接體70以外的部分上，具有上述各實施方式所具有的效果。
上述各實施方式、變形例中的記載以及附圖中公開的圖示僅為用於說明申請專利範圍中記載的發明的一例，因此申請專利範圍中記載的發明不受上述實施方式或附圖中公開的內容所限定。本申請最初的申請專利範圍中的記載僅僅是一個示例，可以根據說明書、附圖等的記載對申請專利範圍中的記載進行適宜的變更。
11‧‧‧第一基板 12‧‧‧第一導體層 13‧‧‧第一電子元件（電子元件） 13d‧‧‧第一漏電極 13g‧‧‧第一柵電極 13s‧‧‧第一源電極 19‧‧‧第一散熱層 21‧‧‧第二基板 22‧‧‧第二導體層 23‧‧‧第二電子元件（電子元件） 23d‧‧‧第二漏電極 23g‧‧‧第二柵電極 23s‧‧‧第二源電極 29‧‧‧第二散熱層 30‧‧‧第一連接件 40‧‧‧第二連接件 45‧‧‧連接件 60‧‧‧第一連接體（連接體） 61‧‧‧第一頭部（頭部） 62‧‧‧第一柱部（柱部） 63‧‧‧第一連接體基端部 63a‧‧‧第一連接體的第一基端部 63b‧‧‧第一連接體的第二基端部 70‧‧‧第二連接體（連接體） 71‧‧‧第二頭部（頭部） 71a‧‧‧第二連接體的突出面 72‧‧‧第二柱部（柱部） 73‧‧‧第二連接體基端部 73a‧‧‧第二連接體的第一基端部 73b‧‧‧第二連接體的第二基端部 79‧‧‧嵌合部 79a‧‧‧凹部 80‧‧‧連接端子 81‧‧‧端子頭部 82‧‧‧連接端子的第一基端部 83‧‧‧連接端子的第二基端部 90‧‧‧封裝部 95‧‧‧導電性接合劑 100‧‧‧晶片模組 100a‧‧‧第一晶片模組 100b‧‧‧第二晶片模組 100c‧‧‧第三晶片模組 100d‧‧‧第四晶片模組 101‧‧‧晶片模組的凸部 110、120‧‧‧端子 150、150a‧‧‧晶片連接體 151‧‧‧晶片連接體的第三頭部 152‧‧‧晶片連接體的第三柱部 158‧‧‧晶片連接體的凹部 160‧‧‧第一電子部件 170‧‧‧第二電子部件 260‧‧‧第四連接體
圖1是可在本發明第一實施方式中使用的電子模組的側截面圖。
圖2是從圖1中的箭頭A進行觀看時的第二連接體的側面圖。
圖3是由不同於圖2所示的形態構成的第二連接體的側面圖。
圖4是可在本發明第二實施方式中使用的電子模組的側截面圖。
圖5是可在本發明第二實施方式中使用的電子模組的平面圖。
圖6是由不同於圖4所示的形態構成的，可在本發明第二實施方式中使用的電子模組的側截面圖。
圖7是可在本發明第三實施方式中使用的電子模組的側截面圖，圖中未對封裝部等一部分構件進行表示。
圖8是可在本發明第四實施方式中使用的電子模組的側截面圖，圖中未對封裝部等一部分構件進行表示。
圖9是由不同於圖8所示的形態構成的，可在本發明第四實施方式中使用的電子模組的側截面圖，圖中未對封裝部等一部分構件進行表示。
圖10是可在本發明第五實施方式中使用的電子模組的側截面圖，圖中未對封裝部等一部分構件進行表示。
圖11是由不同於圖10所示的形態構成的，可在本發明第五實施方式中使用的電子模組的側截面圖，圖中未對封裝部等一部分構件進行表示。
圖12是由不同於圖10以及圖11所示的形態構成的，可在本發明第五實施方式中使用的電子模組的側截面圖，圖中未對封裝部等一部分構件進行表示。
圖13是可在本發明第六實施方式中使用的電子模組的側截面圖。
11‧‧‧第一基板
12‧‧‧第一導體層
13‧‧‧第一電子元件(電子元件)
13d‧‧‧第一漏電極
13g‧‧‧第一柵電極
13s‧‧‧第一源電極
19‧‧‧第一散熱層
21‧‧‧第二基板
22‧‧‧第二導體層
23‧‧‧第二電子元件(電子元件)
23d‧‧‧第二漏電極
23g‧‧‧第二柵電極
23s‧‧‧第二源電極
29‧‧‧第二散熱層
30‧‧‧第一連接件
40‧‧‧第二連接件
60‧‧‧第一連接體(連接體)
61‧‧‧第一頭部(頭部)
62‧‧‧第一柱部(柱部)
63‧‧‧第一連接體基端部
63a‧‧‧第一連接體的第一基端部
63b‧‧‧第一連接體的第二基端部
70‧‧‧第二連接體(連接體)
71‧‧‧第二頭部(頭部)
72‧‧‧第二柱部(柱部)
73‧‧‧第二連接體基端部
73a‧‧‧第二連接體的第一基端部
73b‧‧‧第二連接體的第二基端部
80‧‧‧連接端子
81‧‧‧端子頭部
82‧‧‧連接端子的第一基端部
83‧‧‧連接端子的第二基端部
90‧‧‧封裝部
95‧‧‧導電性接合劑
100‧‧‧晶片模組

Claims (9)

  1. 一種電子模組，其中，包括： 一第一基板； 一第二基板，設置在該第一基板的一側； 一晶片模組，設置在該第一基板與該第二基板之間；以及 一封裝部，至少將該晶片模組、該第一基板的一側的面以及該第二基板的另一側的面進行封裝； 其中，該晶片模組具有：一電子元件以及與該電子元件電性連接的一連接體； 該電子元件沿作為該電子模組的厚度方向的一第一方向延伸。
  2. 根據申請專利範圍第1項所述的電子模組，其中： 該連接體具有：一頭部、從該頭部的端部沿該第一基板的面內方向延伸，並且與一第一導體層相連接的一第一基端部、以及從第一導體層頭部的端部沿該第二基板的面內方向延伸，並且與一第二導體層相連接的一第二基端部。
  3. 根據申請專利範圍第1項所述的電子模組，其中： 該連接體具有一第一連接體以及一第二連接體； 該晶片模組具有：一第一電子元件、一第二電子元件、設置在該第一電子元件與該第二電子元件之間的該第一連接體、以及設置在該第二電子元件的與該第一連接體相反一側的該第二連接體。
  4. 根據申請專利範圍第1項所述的電子模組，其中： 該連接體具有：一頭部、以及從該頭部沿該頭部的厚度方向延伸的一柱部； 該頭部在該電子模組的厚度方向上延伸。
  5. 根據申請專利範圍第1項所述的電子模組，其中： 所述晶片模組被設置有複數個； 在該複數個晶片模組之間，設置有與該複數個晶片模組電性連接的一晶片連接體。
  6. 一種電子模組，其中，包括： 一第一基板； 一第二基板，設置在該第一基板的一側；以及 一晶片模組，設置在該第一基板與該第二基板之間； 其中，該晶片模組具有：一電子元件以及與該電子元件電性連接的一連接體， 該電子元件沿作為該電子模組的厚度方向的一第一方向延伸； 該晶片模組被設置有複數個， 在該複數個晶片模組之間，設置有與該複數個晶片模組電性連接的一晶片連接體， 該複數個晶片模組具有與該晶片連接體相嵌合的一嵌合部。
  7. 根據申請專利範圍第1項所述的電子模組，其更包括： 一第一導體層，設置在該第一基板的一側；以及 一第二導體層，設置在該第二基板的另一側； 其中，該連接體具有各自連接該電子元件與該第一導體層以及該第二導體層的一連接端子， 與該連接端子相連接的該第一導體層以及該第二導體層中的任意一方不與外部裝置電性連接。
  8. 一種電子模組，其中，包括： 一第一基板； 一第二基板，設置在該第一基板的一側； 一晶片模組，設置在該第一基板與該第二基板之間； 一第一導體層，設置在該第一基板的一側；以及 一第二導體層，設置在該第二基板的另一側； 其中，該晶片模組具有：一電子元件以及與該電子元件電性連接的一連接體， 該電子元件沿作為該電子模組的厚度方向的一第一方向延伸， 其中，該連接體具有：一頭部、從該頭部的端部沿該第一基板的面內方向延伸，並且與該第一導體層相連接的一第一基端部以及從該頭部的端部沿該第二基板的面內方向延伸，並且與該第二導體層相連接的一第二基端部， 該第一基端部從該頭部的端部延伸的方向與該第二基端部從該頭部的端部延伸的方向在包含一第二方向以及一第三方向的該電子模組的面內方向上不重合。
  9. 根據申請專利範圍第8項所述的電子模組，其中： 該第一基端部從該頭部的端部延伸的方向與該第二基端部從該頭部的端部延伸的方向相差180度。
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