TWI671825B - 半導體晶片、半導體晶片之構裝方法及構裝有半導體晶片之模組 - Google Patents

半導體晶片、半導體晶片之構裝方法及構裝有半導體晶片之模組 Download PDF

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TWI671825B
TWI671825B TW107103496A TW107103496A TWI671825B TW I671825 B TWI671825 B TW I671825B TW 107103496 A TW107103496 A TW 107103496A TW 107103496 A TW107103496 A TW 107103496A TW I671825 B TWI671825 B TW I671825B
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metal
semiconductor wafer
substrate
electrode
region
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TW107103496A
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TW201842595A (zh
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大部功
梅本康成
柴田雅博
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日商村田製作所股份有限公司
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Abstract

本發明提供一種即使對於嚴酷的環境下的處理也能夠確保充分的強度的黏接力的半導體晶片。半導體晶片具有單晶的基板和形成在基板的底面的金屬電極。金屬電極包含：露出第一金屬的區域；以及露出具有與第一金屬的標準電極電位不同的標準電極電位的第二金屬的區域。

Description

半導體晶片、半導體晶片之構裝方法及構裝有半導體晶片之模組
本發明係關於半導體晶片、半導體晶片之構裝方法及構裝有半導體晶片之模組。
作為用於行動電話終端的主要零組件之一，有功率放大器模組。在功率放大器模組中，一般使用化合物半導體器件。此外，對於行動電話終端的零組件，市場對可靠性的要求日益嚴格。例如，要求即使在更嚴酷的高溫、高濕環境下的吸濕後進行高溫回流處理也不會有特性變動。若在這樣的條件下進行高溫回流處理，則存在化合物半導體晶片從模組基板剝離的情況。為了防止化合物半導體晶片的剝離，強烈要求進一步提高化合物半導體晶片對模組基板的黏接強度。
在下述的專利文獻1公開了一種能夠在將半導體元件(半導體晶片)黏接固定在晶片焊盤上的半導體裝置中謀求黏接力的強化的半導體裝置。在該半導體裝置中，通過在半導體元件的黏接面形成半球狀的凹部，從而謀求黏接力的強化。
[先技術文獻]
[專利文獻]
專利文獻1：日本特開平4-312933號公報
在專利文獻1公開的半導體裝置中，通過增大黏接劑與半導體元件的黏接面積，從而謀求黏接力的強化。僅基於黏接面積的增大的黏接力的強化，並不一定能夠對高溫、高濕等嚴酷的環境下的各種處理確保充分的可靠性。
本發明的目的在於，提供一種即使對於嚴酷的環境下的處理也能夠確保充分的強度的黏接力的半導體晶片。本發明的另一個目的在於，提供一種即使對於嚴酷的環境下的處理也能夠確保充分的強度的黏接力的半導體晶片的構裝方法。本發明的又一個目的在於，提供一種構裝有上述的半導體晶片的模組。
根據本發明的第一觀點的半導體晶片具有：單晶的基板；以及金屬電極，形成在所述基板的底面，並包含露出第一金屬的區域和露出具有與所述第一金屬的標準電極電位不同的標準電極電位的第二金屬的區域。
在第一金屬以及第二金屬中的標準電極電位小的一方的金屬的表面容易形成氧化物層。該氧化物層作用為增強與黏接劑的黏接力。此外，標準電極電位大的一方的金屬難以被氧化，因此能夠確保良好的電特性。其結果是，能夠在抑制電特性的下降的同時強化半導體晶片與黏接劑的黏接力。
根據本發明的第二觀點的半導體晶片除了根據第一觀點的半導體晶片的結構以外，還具有如下特徵，即， 露出所述第一金屬的面和露出所述第二金屬的面以所述基板的底面為基準而位於不同的高度。
在露出第一金屬的區域與露出第二金屬的區域的邊界產生臺階。因此，與金屬電極的表面平坦的情況相比，表面積變大。表面積的增大作用為增強金屬電極與黏接劑的黏接力。
根據本發明的第三觀點的半導體晶片除了根據第一或第二觀點的半導體晶片的結構以外，還具有：元件構造部，形成在所述基板的上表面，並包含至少一個半導體元件；以及通孔，將所述基板從所述底面貫通至所述上表面，所述金屬電極在所述通孔內通過並與所述元件構造部電性連接。
通過使用導電性的構件使底面的金屬電極黏固於模組基板的晶片焊盤等，從而能夠得到模組基板與元件構造部的電性連接。
根據本發明的第四觀點的半導體晶片除了根據第三觀點的半導體晶片的結構以外，還具有如下特徵，即，所述通孔配置在不和所述金屬電極的露出所述第一金屬的區域與露出所述第二金屬的區域的邊界線重疊的位置。
在劃定露出所述第一金屬的區域與露出所述第二金屬的區域的邊界線的製程中，能夠抑制製程不良的產生。
根據本發明的第五觀點的半導體晶片除了根據第一至第四觀點的半導體晶片的結構以外，還具有如下特徵，即，所述第一金屬以及所述第二金屬中的一方為銅，另一方為金。
金的標準電極電位大於銅的標準電極電位。此外，在金屬之中，金具有特別難以被氧化的性質，因此通過對第一金屬以及第二金屬中的一 方使用金，從而能夠進一步提高維持電特性的效果。此外，銅是用於一般的電極的金屬，通過對第一金屬以及第二金屬中的一方使用銅，從而能夠謀求成本削減。
根據本發明的第六觀點的模組具有：模組基板，在表面形成了晶片焊盤；半導體晶片，在底面形成有金屬電極，所述金屬電極包含露出第一金屬的區域、以及露出具有與所述第一金屬的標準電極電位不同的標準電極電位的第二金屬的區域；以及導電性的黏接劑層，將所述半導體晶片的所述金屬電極黏接到所述模組基板的所述晶片焊盤。
在第一金屬以及第二金屬中的標準電極電位小的一方的金屬的表面容易形成氧化物層。該氧化物層作用為增強與黏接劑的黏接力。此外，標準電極電位大的一方的金屬難以被氧化，因此能夠確保良好的電特性。其結果是，能夠在抑制晶片焊盤與金屬電極之間的電阻的增加的同時，強化半導體晶片與黏接劑的黏接力。
根據本發明的第七觀點的模組除了根據第六觀點的模組的結構以外，還具有如下特徵，即，所述黏接劑層包含樹脂，所述樹脂具有對與所述金屬電極鍵結的氧原子進行氫鍵鍵結的官能基。
通過形成在金屬電極的表面的氧化物層的氧原子與黏接劑層的官能基進行氫鍵鍵結，從而能夠強化金屬電極與黏接劑層的黏接力。
根據本發明的第八觀點的半導體晶片構裝方法具有：準備模組基板和半導體晶片的步驟，所述模組基板在表面形成了晶片焊盤，所述半導體晶片在底面形成有金屬電極，所述金屬電極包含第一金屬膜和 第二金屬膜，所述第一金屬膜由第一金屬構成，所述第二金屬膜由具有與所述第一金屬的標準電極電位不同的標準電極電位的第二金屬構成，並形成在所述第一金屬膜的表面的一部分的區域；以及使所述半導體晶片的所述底面與所述晶片焊盤對向配置，並使用焊料將所述半導體晶片構裝到所述模組基板的步驟，在將所述半導體晶片構裝到所述模組基板的步驟中，使所述半導體晶片的所述第二金屬膜溶解在所述焊料內。
該半導體晶片也能夠像根據第六觀點的模組那樣使用導電性的黏接劑構裝到模組基板。此外，還能夠通過焊料使該半導體晶片牢固地黏固於模組基板。像這樣，該半導體晶片能夠應用於使用了黏接劑的構裝、以及使用了焊料的構裝中的任一種構裝方法。
根據本發明的第九觀點的模組具有：模組基板，在表面形成了晶片焊盤；半導體晶片，包含形成在底面的由第一金屬構成的第一金屬膜；以及焊料層，以使所述半導體晶片的所述第一金屬膜與所述模組基板的所述晶片焊盤對向配置的狀態配置在所述第一金屬膜與所述晶片焊盤之間，將所述第一金屬膜固定在所述晶片焊盤，所述焊料層除了含有構成焊料的元素以外還含有金，並且金的含量為1重量%以上且35重量%以下。
該模組可通過使用根據第八觀點的構裝方法將半導體晶片構裝到模組基板而得到。
在第一金屬以及第二金屬中的標準電極電位小的一方的金屬的表面容易形成氧化物層。該氧化物層作用為增強與黏接劑的黏接力。此外，標 準電極電位大的一方的金屬難以被氧化，因此能夠確保良好的電特性。其結果是，能夠在抑制電特性的下降的同時，強化半導體晶片與黏接劑的黏接力。
20‧‧‧半導體晶片
21‧‧‧基板
22‧‧‧元件構造部
23‧‧‧通孔
25‧‧‧金屬電極
26‧‧‧基底膜
27‧‧‧第一金屬膜
28‧‧‧第二金屬膜
30‧‧‧通孔用連接焊盤
40‧‧‧模組
41‧‧‧模組基板
42、43、44‧‧‧晶片焊盤
45‧‧‧接合焊盤
46‧‧‧電極
50‧‧‧半導體晶片
51‧‧‧矽基板
52‧‧‧元件構造部
60‧‧‧半導體晶片
61‧‧‧半絕緣性GaAs基板
62‧‧‧元件構造部
72‧‧‧導電性黏接劑層
73、74‧‧‧黏接劑層
75‧‧‧接合線
77‧‧‧焊料層
78、79‧‧‧黏接劑層
80‧‧‧密封用固化樹脂
81‧‧‧緩衝層
82‧‧‧子集電極層
83‧‧‧絕緣注入區域
84‧‧‧異質結雙極電晶體(HBT)
85‧‧‧集電極層
86‧‧‧基極層
87‧‧‧發射極層
88、89‧‧‧接觸層
91‧‧‧集電極電極
92‧‧‧基極電極
93‧‧‧發射極電極
95‧‧‧集電極佈線
96‧‧‧基極佈線
100‧‧‧層間絕緣膜
102‧‧‧發射極佈線
104‧‧‧接合焊盤
105‧‧‧鈍化膜
110‧‧‧蠟
111‧‧‧藍寶石基板
115‧‧‧光致抗蝕劑膜
116‧‧‧開口部
117‧‧‧光致抗蝕劑膜
圖1A是根據第一實施例的半導體晶片的俯視圖，圖1B是圖1A的一點鏈線1B-1B處的剖視圖，圖1C是根據第一實施例的半導體晶片的仰視圖。
圖2是構裝有根據第一實施例的半導體晶片的模組的剖視圖。
圖3是半導體晶片的金屬電極與導電性黏接劑層的介面附近的示意圖。
圖4A至圖4F的圖式是根據第一實施例的變形例的半導體晶片的金屬電極的仰視圖。
圖5A是根據第二實施例的半導體晶片的俯視圖，圖5B是圖5A的一點鏈線6B-6B處的剖視圖，圖5C是根據第二實施例的半導體晶片的仰視圖。
圖6是根據第三實施例的半導體晶片的剖視圖。
圖7是根據第三實施例的半導體晶片的製造中途階段的剖視圖。
圖8是根據第三實施例的半導體晶片的製造中途階段的剖視圖。
圖9是根據第三實施例的半導體晶片的製造中途階段的剖視圖。
圖10是根據第三實施例的半導體晶片的製造中途階段的剖視圖。
圖11是根據第三實施例的半導體晶片的製造中途階段的剖視圖。
圖12是根據第三實施例的半導體晶片的製造中途階段的剖視圖。
圖13是根據第三實施例的半導體晶片的製造中途階段的剖視圖。
圖14是根據第三實施例的半導體晶片的製造中途階段的剖視圖。
圖15是根據第三實施例的半導體晶片的製造中途階段的剖視圖。
圖16是根據第三實施例的半導體晶片的製造中途階段的剖視圖。
圖17是根據第三實施例的半導體晶片的製造中途階段的剖視圖。
圖18是根據參考例的半導體晶片的製造中途階段的剖視圖。
圖19是根據第三實施例的變形例的半導體晶片的剖視圖。
圖20是根據第四實施例的模組的剖視圖。
[第一實施例]
參照圖1A至圖3的圖式，對根據第一實施例的半導體晶片以及模組進行說明。
圖1A是根據第一實施例的半導體晶片20的俯視圖，圖1B是圖1A的一點鏈線1B-1B處的剖視圖，圖1C是根據第一實施例的半導體晶片20的仰視圖。根據第一實施例的半導體晶片包含：由單晶的化合物半導體，例如，單晶GaAs構成的基板21；以及形成在基板21的上表面的元件構造部22。元件構造部22例如包含：多個異質結構雙極電晶體(HBT)、場效電晶體(FET)、高電子遷移率電晶體(HEMT)、雷射二極體(LD)、光電二極體(PD)等有源元件、電阻元件、電容元件、電感元件等無源元件、連接這些元件的佈線、層間絕緣膜、鈍化膜等。由有源元件、無源元件以及佈線構成電子電路。此外，還存在如下情況，即，由基板21和元件構造部22構成有源元件，元件構造部22成為有源元件的一部分。
在基板21的與上表面相反側的底面，形成有金屬電極25。形成有從基板21底面貫通基板21而達到元件構造部22的至少一個通孔23。通孔23的與基板21的上表面平行的剖面(平剖面)的形狀為大致圓形。在通孔23的元件構造部22側的端部，配置有通孔用連接焊盤30。
金屬電極25包含：基底膜26；形成在基底膜26上的由第一金屬 構成的第一金屬膜27；以及形成在第一金屬膜27上的由第二金屬構成的第二金屬膜28。基底膜26以及第一金屬膜27配置在基板21的底面的整個區域、通孔23的側面以及底面上。第二金屬膜28配置在形成於基板21的底面的第一金屬膜27的表面中的一部分的區域。例如，第二金屬膜28如圖1C所示地構成方格條紋。金屬電極25包含露出第一金屬的區域和露出第二金屬的區域。通孔23配置在不和露出第一金屬的區域與露出第二金屬的區域的邊界重疊的位置。例如，通孔23配置在露出第一金屬的區域的內側。
第一金屬的標準電極電位與第二金屬的標準電極電位不同。形成在基板21的底面的金屬電極25經由配置在通孔23內的基底膜26和第一金屬膜27、以及通孔用連接焊盤30與元件構造部22的導體部分電性連接。
通孔23的直徑例如為50μm以上且70μm以下。基底膜26例如具有鈦(Ti)膜和銅(Cu)膜的兩層構造，且Ti膜與基板21相接。Ti膜的厚度以及Cu膜的厚度例如均為0.1μm。關於第一金屬膜27，例如使用Cu，其厚度為4μm。關於第二金屬膜28，例如使用金(Au)，其厚度為4μm。
圖2是根據第一實施例的模組40的剖視圖。模組40例如為功率放大器模組。在模組基板41構裝有半導體晶片20、50、60。作為模組基板41，例如能夠使用多層印刷佈線基板。半導體晶片20與從圖1A至圖1C的圖式所示的半導體晶片相同。半導體晶片50例如為控制用的矽半導體晶片，包含矽基板51、以及形成在矽基板51上的由CMOS等構成的元件構造部52。半導體晶片60例如為開關用化合物半導體晶片，包含半絕緣性GaAs基板61、以及形成在半絕緣性GaAs基板61上的由HEMT等構成的元件構造部62。
在模組基板41的構裝面設置有晶片焊盤42、43、44以及多個接合焊盤45。半導體晶片20使設置了金屬電極25的面與模組基板41對向配置並經由導電性黏接劑層72固定於晶片焊盤42。金屬電極25經由導電性黏接劑層72與 晶片焊盤42電性連接。半導體晶片50的矽基板51經由黏接劑層73黏固於晶片焊盤43。半導體晶片60的半絕緣性GaAs基板61經由黏接劑層74黏固於晶片焊盤44。
半導體晶片20的元件構造部22經由多個接合線75分別與多個接合焊盤45連接。半導體晶片50的元件構造部52經由多個接合線75(在圖2中僅表示了一根。)分別與多個接合焊盤45連接。半導體晶片60的元件構造部62經由多個接合線75分別與多個接合焊盤45連接。關於接合線75，例如使用金導線。半導體晶片20、50、60以及多個接合線75用密封用固化樹脂80進行密封。晶片焊盤42以及多個接合焊盤45經由模組基板41內的多層佈線與模組基板41的底面的電極46電性連接。
關於導電性黏接劑層72，使用將分散了導電性微粒，例如，銀(Ag)微粒的環氧樹脂作為主成分的導電性黏接劑。導電性黏接劑層72具有使半導體晶片20機械性地黏固於晶片焊盤42的功能、以及將金屬電極25和晶片焊盤42電性連接的功能。
黏接劑層73、74分別具有使半導體晶片50、60機械性地黏固於晶片焊盤43、44的功能。關於黏接劑層73、74，為了簡化製造步驟，使用與導電性黏接劑層72相同的黏接劑。另外，由於黏接劑層73、74不需要導電性，所以黏接劑層73、74也可以使用絕緣性的黏接劑。
[第一實施例的效果]
接下來，參照圖3對根據第一實施例的半導體晶片以及模組的優異的效果進行說明。
圖3是半導體晶片20的金屬電極25(圖1B)與導電性黏接劑層72(圖2)的介面附近的示意圖。在導電性黏接劑層72記憶體在多個導電性微粒以及多個化學物種，但是在圖3中僅表示出了環氧樹脂。在金屬電極25的表 面，例如形成有金屬氧化物層，因此存在氧原子。金屬電極25與導電性黏接劑層72的黏接力通過在存在於金屬電極25的表面的氧原子與環氧樹脂包含的羥基之間作用的氫鍵來體現。即，越是容易被氧化的金屬，可得到越強的黏接力。
作為導電性黏接劑層72的主成分，除了環氧樹脂以外，還可以使用包含與氧進行氫鍵鍵結的官能基的樹脂。例如，也可以使用丙烯酸樹脂、雙馬來醯亞胺樹脂、丁二烯樹脂、矽酮樹脂、或者將它們進行了混合的樹脂。
在第一實施例中，在金屬電極25的表面，露出由第一金屬構成的第一金屬膜27和由第二金屬構成的第二金屬膜28這兩者。第一金屬和第二金屬具有相互不同的標準電極電位。在標準電極電位小的一方的金屬膜的表面，比標準電極電位大的一方的金屬膜的表面容易形成氧化物層。因此，標準電極電位小的一方的金屬膜作用為提高與導電性黏接劑層72的黏接力。另一方面，在標準電極電位大的一方的金屬膜的表面難以形成氧化物。因此，標準電極電位大的一方的金屬膜作用為抑制寄生電阻的增大。通過抑制寄生電阻的增大，從而能夠抑制模組40(圖2)的電特性的劣化。像這樣，在第一實施例中，通過使金屬電極25的表面露出標準電極電位不同的兩種金屬膜，從而能夠在維持良好的電特性的同時，謀求半導體晶片20與導電性黏接劑層72的黏接力的強化。
在第一實施例中，對第一金屬膜27使用Cu，對第二金屬膜28使用Au。Au的標準電極電位大於Cu的標準電極電位。因此，由Cu構成的第一金屬膜27作用為強化黏接力，由Au構成的第二金屬膜28作用為抑制寄生電阻的增大。此外，在金屬之中，金具有特別難以被氧化這樣的性質，因此通過對第二金屬膜28使用金，從而能夠進一步提高維持電特性的效果。此外，銅是使用於一般的電極的金屬，通過對第一金屬膜27使用銅，從而能夠謀求成本削減。
在第一實施例中，通過謀求半導體晶片20與導電性黏接劑層72 的介面的黏接力的強化，從而可得到半導體晶片20的耐剝離性提高這樣的效果。由此，例如在將半導體晶片20構裝到模組基板41之後，能夠抑制在高溫、高濕環境下的回流處理等中的半導體晶片20的剝離。
在第一實施例中，因為在第一金屬膜27(圖1B)上形成有第二金屬膜28(圖1B)，所以在露出第一金屬膜27的區域與露出第二金屬膜28的區域的邊界，會產生與第二金屬膜28的厚度相當的臺階。通過產生臺階，從而金屬電極25的表面積變大，因此可得到進一步提高金屬電極25(圖1B)與導電性黏接劑層72(圖2)的黏接強度的效果。
作為比較例，對構裝有對金屬電極25使用電阻小且耐環境性優異的Au的半導體晶片的模組進行考察。在金屬之中，Au具有特別難以被氧化這樣的性質，因此根據該比較例的半導體晶片具有優異的電特性。但是，因為在由Au構成的金屬電極25的表面難以形成氧化物層，所以與導電性黏接劑的黏接力弱。其結果是，在高溫、高濕的環境下的處理時容易產生半導體晶片從模組基板剝離的不良情況。相對於此，與在金屬電極25的表面僅露出Au的比較例相比，根據第一實施例的模組能夠在維持充分的電特性的同時，確保更高的可靠性。
[第一實施例的變形例]
作為第一金屬膜27和第二金屬膜28的材料，也可以採用其它金屬的組合。
表1是示出各種金屬元素的還原反應化學式和標準電極電位的圖表。越是標準電極電位示出大的值的金屬，具有越容易被還原且越難以被氧化的性質。相反，越是標準電極電位示出小的值的金屬，具有越難以被還原且越容易被氧化的性質。作為一個例子，對Au和Cu進行比較的情況下，Au的標準電極電位為1.50V，相對於此，Cu的標準電極電位為0.34V。由於Cu的標準電極電位小於Au的標準電極電位，所以Cu比Au容易被氧化。
例如，也可以對第一金屬膜27(圖1B)使用鎳，對第二金屬膜28(圖1B)使用具有比鎳的標準電極電位大的標準電極電位的金屬，例如銀。除此以外，能夠從表1所示的各種金屬元素之中將標準電極電位相對小的金屬用於第一金屬膜27，並將標準電極電位相對大的金屬用於第二金屬膜28。
此外，在第一實施例中，第二金屬膜28的標準電極電位大於第一金屬膜27的標準電極電位。也可以與此相反，使第一金屬膜27的標準電極電位大於第二金屬膜28的標準電極電位。例如，也可以對第一金屬膜27使用Au，並對第二金屬膜28使用Cu。在該情況下，第二金屬膜28作用為強化黏接力，第一金屬膜27作用為抑制寄生電阻的增大。
接下來，參照圖4A至圖4F的圖式，對金屬電極25(圖1B)以及通孔23(圖1C)的結構不同的多個變形例進行說明。
圖4A至圖4F的各圖是根據第一實施例的變形例的半導體晶片20的金屬電極25的仰視圖。在圖4A所示的變形例中，露出第一金屬膜27的區域和露出第二金屬膜28的區域的配置與圖1C所示的第一實施例的情況相同。在本變形例中，通孔23設置有多個，例如，設置有兩個。任一通孔23均配置在露出第一金屬膜27的區域的內側。通過配置多個通孔23，從而能夠降低元件構造部22(圖1B)與金屬電極25(圖1B)之間的電阻。
在圖4B所示的變形例中，設置有平面形狀不同的多個通孔23。例如，至少一個通孔23具有圓形的平面形狀，其它至少一個通孔23具有在一個方向上長的平面形狀，例如，具有在長方形的短邊的外側附加半圓的形狀。露出第一金屬膜27的區域具有與通孔23的平面形狀相應的平面形狀，使得將通孔23包含在內側。像這樣，在設置有平面形狀不同的多個通孔23的情況下，使露出第一金屬膜27的區域的平面形狀根據通孔23的平面形狀進行變化為佳。
像圖4A以及圖4B所示的變形例那樣，也可以使露出第一金屬膜27的區域和露出第二金屬膜28的區域在二維方向上混合存在。
在圖4C所示的變形例中，露出第一金屬膜27的區域各自的平面形狀為圓形。露出第一金屬膜27的區域離散地分佈在露出第二金屬膜28的區域內。在該情況下，通孔23仍配置在露出第一金屬膜27的圓形的區域的內側。
在圖4D所示的變形例中，露出第一金屬膜27的區域各自的平面形狀為矩形。露出第一金屬膜27的區域離散地分佈在露出第二金屬膜28的區域內。在圖4D中，表示出露出第一金屬膜27的區域在行方向以及列方向上規則地分佈的例子，但是也可以設為其它分佈。
像圖4C以及圖4D所示的變形例那樣，也可以使露出第一金屬膜27的多個區域離散地分佈在露出第二金屬膜28的連續的區域內。也可以與此相反，使露出第二金屬膜28的多個區域離散地分佈在露出第一金屬膜27的連續的區域內。
在圖4E所示的變形例中，露出第一金屬膜27的多個區域和露出第二金屬膜28的多個區域形成條紋花紋(條紋圖案)。通孔23配置在露出第一金屬膜27的帶狀的區域內。在圖4E中，半導體晶片20的底面的外形為長方形，由露出第一金屬膜27的區域以及露出第二金屬膜28的區域構成的條紋在與底面的長邊平行的方向上延伸。除此以外，也可以設為條紋在與底面的短邊平行的方向上延伸的結構。
像圖4E所示的變形例那樣，也可以使露出第一金屬膜27的區域和露出第二金屬膜28的區域在一維方向上混合存在。
在圖4F所示的變形例中，金屬電極25的表面被劃分為兩個區域，在一個區域露出第一金屬膜27，在另一個區域露出第二金屬膜28。通孔23配置在露出第一金屬膜27的區域的內側。像這樣，也可以將金屬電極25的表面劃分為分別露出標準電極電位不同的兩種金屬的至少兩個區域。
像圖4A至圖4F的圖式所示的變形例那樣，作為由露出第一金屬膜27的區域和露出第二金屬膜28的區域構成的圖案，能夠採用各種圖案。
在第一實施例中，使標準電極電位不同的兩種金屬露出在半導體晶片20的金屬電極25的表面。同樣地，在模組基板41的晶片焊盤42的表面， 也使標準電極電位不同的兩種金屬露出為佳。由此，能夠在維持晶片焊盤42與導電性黏接劑層72(圖2)的介面的電特性的同時，強化兩者之間的黏接力。
在圖1C所示的第一實施例以及圖4A至圖4F所示的變形例中，將通孔23配置在露出第一金屬膜27的區域內。作為其它結構，也可以將通孔23配置在露出第二金屬膜28的區域內。但是，如後所述，通孔23較佳配置為不橫跨露出第一金屬膜27的區域與露出第二金屬膜28的區域的邊界線。
[第二實施例]
接下來，參照圖5A至圖5C的圖式，對根據第二實施例的半導體晶片進行說明。以下，對於與根據第一實施例的半導體晶片20(圖1A、圖1B、圖1C)共同的結構，將省略說明。在根據第二實施例的半導體晶片的各個構成要素中，標註與根據第一實施例的半導體晶片20的對應的構成要素所標註的圖式符號相同的圖式符號。
圖5A是根據第二實施例的半導體晶片20的俯視圖，圖5B是圖5A的一點鏈線6B-6B處的剖視圖，圖5C是根據第二實施例的半導體晶片20的仰視圖。在第二實施例中，在基板21未形成通孔23(圖1B)。
與第一實施例(圖1B)的情況同樣地，金屬電極25由基底膜26、第一金屬膜27以及第二金屬膜28構成。如圖5C所示，露出第一金屬膜27的區域和露出第二金屬膜28的區域構成與第一實施例(圖1C)的情況同樣的方格條紋。
在第二實施例中，作為基板21而使用被賦予n型或p型導電性的化合物半導體。金屬電極25經由具有導電性的基板21與元件構造部22電性連接。
與第一實施例的情況同樣地，在第二實施例中，也可得到半導體晶片20與導電性黏接劑層72(圖2)的黏接力增強這樣的效果。
[第三實施例]
接下來，參照圖6對根據第三實施例的半導體晶片20進行說明。以下，對於與根據第一實施例的半導體晶片20共同的結構，將省略說明。在根據第三實施例的半導體晶片的各個構成要素中，標註與根據第一實施例的半導體晶片20的對應的構成要素所標註的圖式符號相同的圖式符號。
圖6是根據第三實施例的半導體晶片20的剖視圖。配置在基板21的上表面的元件構造部22包含異質結雙極電晶體(HBT)84。以下，對元件構造部22的構造進行說明。基板21、通孔23以及金屬電極25的構造與根據第一實施例的半導體晶片20(圖1B)的構造相同。
在由半絕緣性的GaAs構成的基板21上，層疊有由未摻雜的GaAs構成的緩衝層81以及由n型GaAs構成的子集電極層82。緩衝層81以及子集電極層82中的、形成HBT的區域以外的區域設為注入氫(H)或氦(He)的絕緣注入區域83。
在子集電極層82上形成有HBT84。HBT84包含：由n型GaAs構成的集電極層85；由p型GaAs構成的基極層86；以及由n型InGaP構成的發射極層87。在發射極層87的一部分的區域上，層疊有由n型GaAs構成的接觸層88以及由n型InGaAs構成的接觸層89。雖然在圖6所示的剖面中僅表示出一個HBT84，但是在基板21的其它區域也形成有HBT，一個半導體晶片20包含多個HBT。元件構造部22除了HBT以外，還包含連接多個HBT的佈線等。
集電極電極91與子集電極層82的上表面進行歐姆接觸。在發射極層87的一部分形成有開口，在該開口內形成有基極電極92。基極電極92與基極層86進行歐姆接觸。在接觸層89的上表面形成有發射極電極93。發射極電極93經由接觸層89、88與發射極層87進行歐姆連接。
在集電極電極91上形成有集電極佈線95，在基極電極92上形成 有基極佈線96。在絕緣注入區域83上形成有通孔用連接焊盤30。
由SiN構成的層間絕緣膜100覆蓋絕緣注入區域83、HBT84、通孔用連接焊盤30、集電極佈線95以及基極佈線96。在層間絕緣膜100形成有使通孔用連接焊盤30露出的開口以及使發射極電極93露出的開口。形成在層間絕緣膜100上的發射極佈線102將發射極電極93與通孔用連接焊盤30連接。在層間絕緣膜100上形成有多個接合焊盤104。接合焊盤104各自例如與集電極電極91、基極電極92等連接。由SiN構成的鈍化膜105覆蓋層間絕緣膜100、發射極佈線102以及接合焊盤104。在鈍化膜105形成有使接合焊盤104露出的開口。
接下來，參照圖7至圖17的圖式對根據第三實施例的半導體晶片20的製造方法進行說明。圖7至圖17的圖式是半導體晶片20的製造中途階段的剖視圖。
如圖7所示，在基板21上，通過金屬有機氣相磊晶(MOVPE)法依次層疊從緩衝層81到接觸層89的各層。基板21由半絕緣性的GaAs構成，厚度為大約650μm。基板21的上表面的面方位為(001)，偏角為±4°以下。緩衝層81由未摻雜的GaAs構成，厚度為0.1μm。子集電極層82由n型GaAs構成，矽(Si)摻雜濃度為5×1018cm-3，厚度為0.6μm。集電極層85由n型GaAs構成，Si摻雜濃度為1×1016cm-3，厚度為1.0μm。基極層86由p型GaAs構成，碳(C)摻雜濃度為5×1019cm-3，厚度為96nm。發射極層87由n型InGaP構成，InP莫耳比為0.48，Si摻雜濃度為4×1017cm-3，厚度為35nm。接觸層88由n型GaAs構成，Si摻雜濃度為5×1018cm-3，厚度為50nm。接觸層89由n型InGaAs構成，InAs莫耳比為0.5，Si摻雜濃度為1×1019cm-3，厚度為50nm。
如圖8所示，通過在緩衝層81以及子集電極層82的一部分的區域進行利用H或He等的絕緣注入，從而形成絕緣注入區域83。然後，使用一般的半導體製程形成HBT84以及通孔用連接焊盤30。集電極電極91以及通孔用連接 焊盤30具有從基板21側起依次層疊厚度為60nm的AuGe膜、厚度為10nm的Ni膜、以及厚度為200nm的Au膜的層疊構造。基極電極92具有從基板21側起依次層疊厚度為50nm的Ti膜、厚度為50nm的Pt膜、以及厚度為200nm的Au膜的層疊構造。發射極電極93具有從基板21側起依次層疊厚度為10nm的Mo膜、厚度為5nm的Ti膜、厚度為30nm的Pt膜、以及厚度為200nm的Au膜的層疊構造。集電極佈線95以及基極佈線96由厚度為1μm的Au膜構成。
在形成集電極佈線95以及基極佈線%之後，形成由SiN構成的層間絕緣膜100、發射極佈線102、接合焊盤104、以及由SiN構成的鈍化膜105。發射極佈線102以及接合焊盤104由厚度為4μm的Au膜構成。
如圖9所示，使基板21的正反面翻轉，通過蠟110將鈍化膜105側的面黏附於藍寶石基板111。
如圖10所示，通過對基板21進行磨削，從而將基板21的厚度薄層化至75μm。
如圖11所示，在基板21的底面(圖11中朝向上方的面)形成光致抗蝕劑膜115之後，在光致抗蝕劑膜115形成開口部116。開口部116形成在與通孔用連接焊盤30對應的位置。在開口部116的底面露出基板21。
如圖12所示，通過將光致抗蝕劑膜115用作蝕刻掩模並對基板21以及絕緣注入區域83進行蝕刻，從而形成通孔23。在基板21以及絕緣注入區域83的蝕刻中，例如能夠應用各向異方性乾式蝕刻。通孔23達到通孔用連接焊盤30，通孔用連接焊盤30在通孔23內露出。
如圖13所示，除去光致抗蝕劑膜115(圖12)。然後，在基板21的底面(圖13中朝向上方的面)以及通孔23的內壁形成鍍覆用的基底膜26。基底膜26具有依次層疊厚度為0.1μm的Ti膜以及厚度為0.1μm的Cu膜的兩層構造。在Ti膜以及Cu膜的形成中，例如能夠應用濺射法。
如圖14所示，通過使用電解鍍覆法使Cu沉積在基底膜26上，從而形成第一金屬膜27。第一金屬膜27的厚度為4μm。
如圖15所示，在第一金屬膜27上形成光致抗蝕劑膜117之後，對該光致抗蝕劑膜117進行圖案化。圖案化後的光致抗蝕劑膜117覆蓋應使第一金屬膜27露出的區域(圖1C)，並使應使第二金屬膜28露出的區域(圖1C)的第一金屬膜27的表面露出。因此，通孔23被光致抗蝕劑膜117所覆蓋。
如圖16所示，通過使用電解鍍覆法使Au沉積在未被光致抗蝕劑膜117覆蓋的區域的第一金屬膜27上，從而形成第二金屬膜28。第二金屬膜28的厚度為4μm。
如圖17所示，除去光致抗蝕劑膜117(圖16)。由此，在未形成第二金屬膜28的區域露出第一金屬膜27。然後，從半導體晶片20取下蠟110以及藍寶石基板111。使形成HBT84等的基板21的正反面翻轉，並通過劃片等進行晶片分離。通過晶片分離，從而完成圖6所示的半導體晶片20。
[第三實施例的效果]
接下來，對第三實施例的優異的效果進行說明。
在第三實施例中，將形成在元件構造部22(圖6)的HBT84的發射極電極93經由發射極佈線102、通孔用連接焊盤30以及通孔23內的金屬電極25，與底面上的金屬電極25電性連接。金屬電極25經由導電性黏接劑層72(圖2)與模組基板41的晶片焊盤42(圖2)連接。因此，與使用接合線連接到模組基板41的結構相比，能夠減小發射極電極93與模組基板41之間的寄生電阻以及寄生電感。
在第三實施例中，形成在基板21的底面的金屬電極25的表面也包含露出第一金屬膜27的區域和露出第二金屬膜28的區域。因此，與第一實施例的情況同樣地，在將半導體晶片20構裝到模組基板41(圖2)時，能夠強化 金屬電極25與導電性黏接劑層72(圖2)的黏接力。由此，半導體晶片20變得難以從模組基板41剝離，能夠提高高溫、高濕環境下的可靠性。
接下來，與根據圖18所示的參考例的半導體晶片相比較，對第三實施例的優異的效果進行說明。
圖18是根據參考例的半導體晶片的製造中途階段的剖視圖，對應於第三實施例的圖15所示的製造中途階段的剖視圖。在第三實施例中，光致抗蝕劑膜117完全覆蓋通孔23。相對於此，在圖18所示的參考例中，光致抗蝕劑膜117的邊緣與通孔23重疊。
如圖18所示，若設為光致抗蝕劑膜117的邊緣與通孔23重疊那樣的配置，則在光致抗蝕劑膜117的光刻步驟中容易變得曝光不良。若變得曝光不良，則在光致抗蝕劑膜117的顯影後，在通孔23內會產生抗蝕劑殘留。因此，容易產生製程不良。
在第三實施例中，如圖15所示，在通過顯影處理除去光致抗蝕劑膜117的區域不配置通孔23。因此，不會產生在通孔23內殘存不需要的光致抗蝕劑膜117的不良。
[第三實施例的變形例]
接下來，參照圖19對第三實施例的變形例進行說明。光致抗蝕劑膜117(圖15、圖18)的曝光不良在留下光致抗蝕劑膜117的區域和將其除去的區域的邊界與通孔23重疊的情況下容易產生。在第三實施例的變形例中，相對於第三實施例將應留下光致抗蝕劑膜117的區域和將其除去的區域調換。在該情況下，因為留下光致抗蝕劑膜117的區域和將其除去的區域的邊界也不與通孔23重疊，所以難以產生曝光不良。
圖19是根據第三實施例的變形例的半導體晶片20的剖視圖。在本變形例中，通孔23被配置在露出第二金屬膜28的區域。通孔23內被基底膜 26、第一金屬膜27以及第二金屬膜28填滿。因此，從基板21的上表面到達底面的電流路徑的截面積變大。其結果是，能夠進一步降低發射極電阻。進而，填滿通孔23內的金屬還作為傳熱路徑而發揮作用，因此能夠提高從元件構造部22向模組基板41(圖2)的散熱特性。
雖然在第三實施例中作為基板21而使用半絕緣性GaAs基板，但是除此以外，還可以使用能夠使構成HBT84(圖6)的各半導體層進行外延生長的GaAs以外的單晶的基板。例如，還能夠使用單晶InP基板、單晶Si基板、單晶藍寶石基板等。
[第四實施例]
接下來，參照圖20對根據第四實施例的模組進行說明。以下，對於與圖1A至圖2的圖式所示的第一實施例共同的結構，將省略說明。
圖20是根據第四實施例的模組的剖視圖。半導體晶片20以及模組基板41的結構與根據第一實施例的模組的半導體晶片20(圖1A、圖1B、圖1C)以及模組基板41(圖2)的結構相同。
在第一實施例中，如圖2所示，使用導電性黏接劑將半導體晶片20構裝到了模組基板41，但是在第四實施例中，代替導電性黏接劑而使用焊料。因此，焊料層77介於半導體晶片20與晶片焊盤42之間。焊料層77使半導體晶片20機械性地黏固於晶片焊盤42，並且將半導體晶片20的金屬電極25和晶片焊盤42電性連接。關於焊料層77，例如能夠使用銀(Ag)與錫(Sn)的重量比為1：9的AgSn焊料。
在第一實施例中，在將半導體晶片20構裝到模組基板41之後，仍殘存有由Au構成的第二金屬膜28。相對於此，在第四實施例中，在利用焊料進行構裝時，第二金屬膜28溶解到焊料中。因此，在將半導體晶片20構裝到模組基板41之後的模組中，第二金屬膜28消失。焊料層77變得除了作為焊料成分 的Ag以及Sn以外，還含有Au。若考慮形成在構裝到模組基板41之前的半導體晶片20的第二金屬膜28的重量、以及所使用的焊料的重量，則一般Au的含量成為1重量%以上且35重量%以下。
在半導體晶片50、60的底面，是如下的狀態，即，未形成金屬電極，並露出矽基板51、半絕緣性GaAs基板61。因此，半導體晶片50、60並不適合於使用焊料的構裝。半導體晶片50、60分別通過黏接劑層78、79而構裝到模組基板41。黏接劑層78、79不必具有導電性。對於黏接劑層78、79，例如能夠使用將環氧樹脂作為主成分的絕緣性黏接劑。
也能夠像第四實施例那樣使用焊料將在第一實施例中使用的在底面形成包含露出第一金屬膜27的區域和露出第二金屬膜28的區域的金屬電極25的半導體晶片20(圖1B)構裝到模組基板41(圖20)。該半導體晶片20能夠應對使用導電性黏接劑的構裝、以及使用焊料的構裝中的任一者。
上述的各實施例僅為例示，其能夠進行在不同的實施例中所示的結構的部分置換或組合是不言而喻的。對於多個實施例的基於同樣的結構的同樣的作用效果，將不在每個實施例中逐一提及。進而，本發明並不限制於上述的實施例。對本發明所屬技術領域中具有通常知識者而言，能夠進行例如各種變更、改良、組合等是顯而易見的。

Claims (7)

  1. 一種半導體晶片，具有：單晶的基板；金屬電極，形成在所述基板的底面，並包含露出第一金屬的區域和露出具有與所述第一金屬的標準電極電位不同的標準電極電位的第二金屬的區域；元件構造部，形成在所述基板的上表面，並包含至少一個半導體元件；以及通孔，將所述基板從所述底面貫通至所述上表面，所述通孔配置在不和所述金屬電極的露出所述第一金屬的區域與露出所述第二金屬的區域的邊界線重疊的位置。
  2. 如請求項1所述的半導體晶片，其中，露出所述第一金屬的面和露出所述第二金屬的面以所述基板的底面為基準而位於不同的高度。
  3. 如請求項1所述的半導體晶片，其中，所述金屬電極在所述通孔內通過並與所述元件構造部電性連接。
  4. 如請求項1至3中的任一項所述的半導體晶片，其中，所述第一金屬以及所述第二金屬中的一方為銅，另一方為金。
  5. 一種構裝有半導體晶片之模組，具有：模組基板，在表面形成晶片焊盤；半導體晶片，在底面形成有金屬電極，所述金屬電極包含露出第一金屬的區域、以及露出具有與所述第一金屬的標準電極電位不同的標準電極電位的第二金屬的區域；以及導電性的黏接劑層，將所述半導體晶片的所述金屬電極黏接到所述模組基板的所述晶片焊盤；其中半導體晶片更具有：元件構造部，形成在所述基板的上表面，並包含至少一個半導體元件；以及通孔，將所述基板從所述底面貫通至所述上表面，所述通孔配置在不和所述金屬電極的露出所述第一金屬的區域與露出所述第二金屬的區域的邊界線重疊的位置。
  6. 如請求項5所述的模組，其中，所述黏接劑層包含樹脂，所述樹脂具有對與所述金屬電極鍵結的氧原子進行氫鍵鍵結的官能基。
  7. 一種半導體晶片構裝方法，具有：準備模組基板和半導體晶片的步驟，所述模組基板在表面形成晶片焊盤，所述半導體晶片在底面形成有金屬電極，所述金屬電極包含第一金屬膜和第二金屬膜，所述第一金屬膜由第一金屬構成，所述第二金屬膜由具有與所述第一金屬的標準電極電位不同的標準電極電位的第二金屬構成，並形成在所述第一金屬膜的表面的一部分的區域；以及使所述半導體晶片的所述底面與所述晶片焊盤對向配置，並使用焊料將所述半導體晶片構裝到所述模組基板的步驟，在將所述半導體晶片構裝到所述模組基板的步驟中，使所述半導體晶片的所述第二金屬膜溶解在所述焊料內。
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