TWI664783B - 異向性導電膜、其製造方法、連接構造體、及連接構造體之製造方法 - Google Patents

異向性導電膜、其製造方法、連接構造體、及連接構造體之製造方法 Download PDF

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TWI664783B
TWI664783B TW104109121A TW104109121A TWI664783B TW I664783 B TWI664783 B TW I664783B TW 104109121 A TW104109121 A TW 104109121A TW 104109121 A TW104109121 A TW 104109121A TW I664783 B TWI664783 B TW I664783B
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conductive
conductive particles
resin layer
layer
insulating resin
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TW104109121A
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TW201611446A (zh
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阿久津恭志
荒木雄太
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日商迪睿合股份有限公司
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    • H01B5/00—Non-insulated conductors or conductive bodies characterised by their form
    • H01B5/14—Non-insulated conductors or conductive bodies characterised by their form comprising conductive layers or films on insulating-supports
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    • H01B1/00—Conductors or conductive bodies characterised by the conductive materials; Selection of materials as conductors
    • H01B1/20—Conductive material dispersed in non-conductive organic material
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    • H01B3/18—Insulators or insulating bodies characterised by the insulating materials; Selection of materials for their insulating or dielectric properties mainly consisting of organic substances
    • H01B3/30—Insulators or insulating bodies characterised by the insulating materials; Selection of materials for their insulating or dielectric properties mainly consisting of organic substances plastics; resins; waxes
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Abstract

本發明之異向性導電膜1A可生產性較高地進行製造，且可抑制短路發生率，其具有：第1導電粒子層3a，其於該膜厚方向z之特定之深度分散有導電粒子2a；及第2導電粒子層3b，其於與第1導電粒子層3a不同之深度分散有導電粒子2b。於各導電粒子層3a、3b中，相鄰之導電粒子2a、2b之最接近距離La、Lb為導電粒子2a、2b之平均粒徑之2倍以上。

Description

異向性導電膜、其製造方法、連接構造體、及連接構造體之製造方法
本發明係關於一種異向性導電膜及其製造方法。
於IC晶片等電子零件之構裝中，廣泛使用異向性導電膜，近年來，就對高構裝密度之適用之觀點而言，為了提高導電粒子捕捉效率或連接可靠性，降低短路發生率，提出有使用轉印模使導電粒子單層地排列之方法(專利文獻1)。
於該異向性導電膜之製造方法中，首先，使具有大量孔部之轉印模之該孔部保持導電粒子，自其上抵壓形成有轉印用之黏著層之黏著膜，使導電粒子一次轉印於黏著層。繼而，對於附著於黏著層之導電粒子抵壓成為異向性導電膜之構成要素之高分子膜，進行加熱加壓而使導電粒子二次轉印於高分子膜表面。繼而，於二次轉印有導電粒子之高分子膜之導電粒子側表面，以覆蓋導電粒子之方式形成接著層。以此方式，製造導電粒子之配置間距為9μm左右之異向性導電膜。
先前技術文獻
專利文獻
專利文獻1：日本特開2010-33793號公報
然而，即便藉由專利文獻1之異向性導電膜之製造方法，若使導電粒子之配置間距進一步變窄，則難以如轉印模般保持導電粒子，或難以使所保持之導電粒子確實地轉印，而異向性導電膜之生產性降低。又，於異向性導電膜之製造步驟或將異向性導電膜用於電子零件之構裝之情形時，亦會產生如下問題：有3個以上之導電粒子連結之情況，容易因此而產生短路。
本發明之課題在於：即便為了因應高密度構裝而使異向性導電膜中之導電粒子之配置間距變窄，亦可生產性較高地製造異向性導電膜，並抑制將異向性導電膜用於電子零件之構裝之情形時之短路發生率。
本發明人發現：於使用轉印模製造導電粒子分散於絕緣性樹脂層中之異向性導電膜時，若使利用轉印模而分散有導電粒子之第1及第2絕緣性樹脂層相互貼合，則能夠以較高之生產性製造導電粒子之配置間距較窄的異向性導電膜，又，可控制導電粒子之非預期之連結，從而完成本發明。
即，本發明提供一種異向性導電膜，其係於絕緣性樹脂層中分散有導電粒子者，具有：第1導電粒子層，其於異向性導電膜之膜厚之特定之深度分散有導電粒子；及第2導電粒子層，其於與第1導電粒子層不同之深度分散有導電粒子，於各導電粒子層中，相鄰之導電粒子之最接 近距離為導電粒子之平均粒徑之2倍以上。
又，本發明提供一種製造方法，其係可製造上述異向性導電膜之方法，且具有如下步驟：步驟A，其係於形成有多個凹部之第1轉印模之凹部中放入導電粒子；步驟B，其係將第1轉印模內之導電粒子轉接著於絕緣性樹脂層而形成第1絕緣性樹脂層；步驟C，其係於形成有多個凹部之第2轉印模之凹部中放入導電粒子；步驟D，其係將第2轉印模內之導電粒子轉接著於絕緣性樹脂層而形成第2絕緣性樹脂層；及步驟E，其係使第1絕緣性樹脂層之導電粒子的轉接著面與第2絕緣性樹脂層之導電粒子的轉接著面對向並使其等積層一體化；於各轉印模中，相鄰之凹部之最接近距離為放入該轉印模之導電粒子之平均粒徑之2倍以上。
本發明之異向性導電膜可藉由將利用轉印模而分散有導電粒子之第1及第2絕緣性樹脂層貼合而製造。因此，可使貼合前之視轉印模而定之導電粒子之間距大於異向性導電膜中之導電粒子之間距，可提高異向性導電膜之生產性。
又，於製造異向性導電膜時或將異向性導電膜用於電子零件之構裝時，即便第1導電粒子層中所含之第1導電粒子與第2導電粒子層中所含之第2導電粒子沿膜面之方向連結，也會由於在各別的第1導電粒子層及第2導電粒子層中，相鄰之導電粒子之最接近距離為導電粒子之平 均粒徑之2倍以上，而基本上不會出現除了連結之第1導電粒子與第2導電粒子以外，進而有第3導電粒子連結之情況。因此，可降低短路之發生率。
1A、1B、1C、1D、1X‧‧‧異向性導電膜
2a、2b‧‧‧導電粒子
3a‧‧‧第1導電粒子層
3b‧‧‧第2導電粒子層
4‧‧‧絕緣性樹脂層
4a‧‧‧第1絕緣性樹脂層
4b‧‧‧第2絕緣性樹脂層
5a、5b‧‧‧剝離膜
6‧‧‧絕緣性接著劑層
7‧‧‧應力緩和層
8‧‧‧中間樹脂層
10a‧‧‧轉印模
11‧‧‧凹部
20‧‧‧電子零件
21‧‧‧端子
22‧‧‧電子零件
23‧‧‧端子
Da‧‧‧第1導電粒子層中之導電粒子之平均粒徑
Db‧‧‧第2導電粒子層中之導電粒子之平均粒徑
La‧‧‧第1導電粒子層中之導電粒子之最接近距離
Lb‧‧‧第2導電粒子層中之導電粒子之最接近距離
Lc‧‧‧異向性導電膜之俯視下之導電粒子之最接近距離
Pa‧‧‧第1導電粒子層中之導電粒子之中心線
Pb‧‧‧第2導電粒子層中之導電粒子之中心線
S‧‧‧第1導電粒子層之導電粒子之中心線與第2導電粒子層之導電粒子之中心線之距離
z‧‧‧膜厚方向
圖1A係實施例之異向性導電膜1A之剖面圖。
圖1B係表示實施例之異向性導電膜1A之導電粒子之配置之平面圖。
圖2A係實施例之異向性導電膜1B，且為第1導電粒子層之導電粒子與第2導電粒子層之導電粒子連結之態樣之剖面圖。
圖2B係實施例之異向性導電膜之第1導電粒子層之導電粒子與第2導電粒子層之導電粒子連結之態樣之平面圖。
圖3A係異向性導電連接時之實施例之異向性導電膜1B之導電粒子捕捉性之說明圖。
圖3B係異向性導電連接時之實施例之異向性導電膜1B之導電粒子捕捉性之說明圖。
圖4係表示實施例之異向性導電膜1C之導電粒子之配置之平面圖。
圖5係表示實施例之異向性導電膜1D之導電粒子之配置之平面圖。
圖6係導電粒子之配置間距較小之異向性導電膜1X之剖面圖。
圖7A係異向性導電膜之製造方法之步驟說明圖。
圖7B係異向性導電膜之製造方法之步驟說明圖。
圖7C係異向性導電膜之製造方法之步驟說明圖。
圖7D係異向性導電膜之製造方法之步驟說明圖。
圖7E係異向性導電膜之製造方法之步驟說明圖。
圖7F係異向性導電膜之製造方法之步驟說明圖。
圖7G係異向性導電膜之製造方法之步驟說明圖。
圖8係異向性導電膜之製造方法之步驟說明圖。
圖9A係異向性導電膜之製造方法之步驟說明圖。
圖9B係異向性導電膜之製造方法之步驟說明圖。
圖10A係異向性導電膜之製造方法之步驟說明圖。
圖10B係異向性導電膜之製造方法之步驟說明圖。
圖11係異向性導電膜之剖面圖。
圖12係異向性導電膜之剖面圖。
以下，一面參照圖式一面詳細地說明本發明之異向性導電膜之一例。再者，各圖中，相同之符號表示相同或同等之構成要素。
《異向性導電膜之整體構成》
圖1A係本發明之一實施例之異向性導電膜1A之剖面圖，圖1B係表示該異向性導電膜1A之導電粒子之配置之平面圖。該異向性導電膜1A係於絕緣性樹脂層4分散有導電粒子2a、2b者，具有於異向性導電膜1A之膜厚方向z之特定之深度分散有導電粒子2a(圖中以深色表示)之第1導電粒子層3a、及於與第1導電粒子層3a不同之深度分散有導電粒子2b(圖中以淺色表示)之第2導電粒子層3b。
如圖1B所示，於各導電粒子層3a、3b中，導電粒子2a、2b 分別方格排列，第2導電粒子層3b之導電粒子2b之排列成為下述配置：相對於第1導電粒子層3a之導電粒子2a之排列，沿著第1導電粒子層3a之排列方向x偏移排列格子之一半間距量。
此處，所謂第1導電粒子層3a之導電粒子2a分散之膜厚方向z之深度與第2導電粒子層3b之導電粒子2b分散之膜厚方向z之深度不同，係指平行於膜面之導電粒子2a之中心線Pa與平行於膜面之導電粒子2b之中心線Pb之距離S為導電粒子2a、2b之平均粒徑之1/5以上。該距離S較佳為導電粒子2a、2b之平均粒徑之1/2以上，更佳為1/2~5倍。此處，導電粒子2a、2b之平均粒徑係導電粒子2a、2b整體之平均粒徑。
於該異向性導電膜1A中，第1導電粒子層3a內相鄰之導電粒子之最接近距離La為第1導電粒子層3a中之導電粒子2a之平均粒徑Da之2倍以上，較佳為2倍以上且50倍以下。第2導電粒子層3b內相鄰之導電粒子之最接近距離Lb亦為第2導電粒子3b中之導電粒子2b之平均粒徑Db之2倍以上，較佳為2倍以上且50倍以下。藉由以此方式將各導電粒子層3a、3b中相鄰之導電粒子之最接近距離La、Lb設為導電粒子2a、2b之平均粒徑Da、Db之2倍以上，而即便於異向性導電膜之製造步驟中，第1導電粒子層3a與第2導電粒子層3b之相互之配置產生偏移，而如圖2A、圖2B所示之異向性導電膜1B般，第1導電粒子層3a之導電粒子2a與第2導電粒子層3b之導電粒子2b之2個連結，異向性導電膜之俯視下之最接近導電粒子間距離Lc為零，亦不會如使用狹窄間距之轉印模之情形般產生3個以上之導電粒子連結之情況。因此，可抑制將異向性導電膜1B用於電子零件之異向性導電連接之情形時之短路之產生。
又，若於異向性導電連接時使用第1導電粒子層3a之導電粒子2a與第2導電粒子層3b之導電粒子2b之2個連結的異向性導電膜1B，則有如圖3A所示般，2個連結之導電粒子2a、2b夾於電子零件20之端子21之邊緣與電子零件22之端子23之邊緣之間之情況，但如圖3B所示，位於端子21、23之邊緣之導電粒子係2個連結之情形，比起1個之情形，更容易於異向性導電連接之加熱加壓後被端子21、23捕捉。因此，根據本發明之異向性導電膜，可提高異向性導電連接時之導電粒子捕捉性。
另一方面，如圖6所示之異向性導電膜1X，即便為具有2層之導電粒子層3a、3b者，若各導電粒子層中之導電粒子2a、2b之配置間距較小，各導電粒子層3a、3b中相鄰之導電粒子2a、2b之最接近距離La、Lb未達導電粒子2a、2b之平均粒徑Da、Db之2倍，則於使用異向性導電膜進行異向性導電連接之情形時，容易產生短路，故而欠佳。
於本發明之異向性導電膜中，只要各導電粒子層3a、3b中之導電粒子之最接近距離為導電粒子之平均粒徑之2倍以上，則導電粒子2a、2b可採取各種配置。例如，可如圖4所示之異向性導電膜1C般設為如下配置：第1導電粒子層3a之導電粒子2a之排列與第2導電粒子層3b之導電粒子2b之排列分別為方格排列，第2導電粒子層3b之導電粒子2b之排列相對於第1導電粒子層3a之導電粒子2a之排列，沿著斜方向偏移排列格子之一半間距量。各導電粒子層中之導電粒子排列不限定於方格排列，亦可為三方排列，亦可為無規。無規者例如亦可以如下方式製作：配置於可延伸之膜，使該膜延伸而使導電粒子間具有特定之距離。
又，於第1導電粒子層3a與第2導電粒子層3b中，排列圖 案與其間距既可相同亦可不同，於排列圖案與其間距相同之情形時，有容易判定貼合後之導電粒子之分散狀態之良否這一製造上之優點。例如，圖5所示之異向性導電膜1D中，第1導電粒子層3a之導電粒子2a為方格排列，第2導電粒子層3b之導電粒子2b為斜方排列，第2導電粒子層3b之導電粒子2b始終與第1導電粒子層3a之導電粒子2a成為並排。於此情形時，若存在第2導電粒子層3b之導電粒子2b與第1導電粒子層3a之導電粒子2a未成為並排之部分，則容易知悉於其部分導電粒子未成為目標之排列。
《導電粒子》
作為導電粒子2a、2b，可自習知公知之用於異向性導電膜之導電粒子中適當地選擇而使用。例如可列舉鎳、鈷、銀、銅、金、鈀等金屬粒子、金屬被覆樹脂粒子等。亦可併用2種以上。
作為導電粒子之平均粒徑，為了容易吸收配線之高度之不均而不使電阻變高，且為了不引起短路，較佳為1~10μm，更佳為2~6μm。第1導電粒子層3a之導電粒子2a之平均粒徑與第2導電粒子層3b之導電粒子2b之平均粒徑既可相同亦可不同。
於導電粒子為金屬被覆樹脂粒子之情形時，為了獲得良好之連接可靠性，樹脂芯粒子之粒子硬度(20%K值；壓縮彈性變形特性K20)較佳為100~1000kgf/mm2，更佳為200~500kgf/mm2。又，第1導電粒子層3a之導電粒子2a之粒子硬度與第2導電粒子層3b之導電粒子2b之粒子硬度既可相同亦可不同。
作為此種樹脂芯，較佳為使用由壓縮變形優異之塑膠材料所構成之粒子，例如可由(甲基)丙烯酸酯系樹脂、聚苯乙烯系樹脂、苯乙 烯-(甲基)丙烯酸共聚合樹脂、胺酯(urethane)系樹脂、環氧系樹脂、酚樹脂、丙烯腈-苯乙烯(AS)樹脂、苯胍樹脂、二乙烯苯系樹脂、聚酯樹脂等形成。此處，「(甲基)丙烯酸酯」包含丙烯酸酯及甲基丙烯酸酯。
樹脂芯既可由上述(甲基)丙烯酸酯系樹脂或聚苯乙烯系樹脂中之任一種樹脂單獨形成，亦可由該等樹脂之混合組成物形成。又，亦可由下述之(甲基)丙烯酸酯系單體與苯乙烯系單體之共聚物形成。
(甲基)丙烯酸酯系樹脂較佳為(甲基)丙烯酸酯系單體、進而視需要具有可與該(甲基)丙烯酸酯系單體進行共聚合之反應性雙鍵之化合物(例如乙烯系單體、不飽和羧酸單體等)、及二官能或多官能性單體之共聚物。此處，單體中，若為藉由加熱或紫外線照射等而聚合者，則亦包括作為2個以上單體之聚合物之低聚物。
作為(甲基)丙烯酸酯系單體，可列舉：(甲基)丙烯酸甲酯、(甲基)丙烯酸乙酯、(甲基)丙烯酸丙酯、(甲基)丙烯酸丁酯、(甲基)丙烯酸2-乙基己酯、(甲基)丙烯酸月桂酯、(甲基)丙烯酸硬脂酯、(甲基)丙烯酸環己酯、(甲基)丙烯酸2-羥基乙酯、(甲基)丙烯酸2-丙酯、(甲基)丙烯酸氯-2-羥基乙酯、二乙二醇單(甲基)丙烯酸酯、(甲基)丙烯酸甲氧基乙酯、(甲基)丙烯酸環氧丙酯、(甲基)丙烯酸雙環戊酯、(甲基)丙烯酸二環戊烯酯及(甲基)丙烯酸異莰酯等。
另一方面，聚苯乙烯系樹脂較佳為苯乙烯系單體、進而視需要具有可與該苯乙烯系單體進行共聚合之反應性雙鍵之化合物(例如乙烯系單體、不飽和羧酸單體等)、及二官能或多官能性單體之共聚物。此處，單體中，若為藉由加熱或紫外線照射等而聚合者，則亦包括作為2個以上 單體之聚合物之低聚物。
作為苯乙烯系單體，可列舉：苯乙烯、甲基苯乙烯、二甲基苯乙烯、三甲基苯乙烯、乙基苯乙烯、二乙基苯乙烯、三乙基苯乙烯、丙基苯乙烯、丁基苯乙烯、己基苯乙烯、庚基苯乙烯及辛基苯乙烯等烷基苯乙烯；氟苯乙烯、氯苯乙烯、溴苯乙烯、二溴苯乙烯、碘苯乙烯及氯甲基苯乙烯等鹵化苯乙烯；以及硝基苯乙烯、乙醯基苯乙烯及甲氧基苯乙烯。
作為構成樹脂芯之較佳之(甲基)丙烯酸酯系樹脂之一例，可列舉由胺酯化合物與(甲基)丙烯酸酯系單體之聚合物構成之情形。作為胺酯化合物，可使用多官能丙烯酸胺酯，例如可使用2官能丙烯酸胺酯等。此處，上述胺酯化合物較佳為相對於單體100重量份含有5重量份以上，更佳為含有25重量份以上。
再者，於應進行異向性導電連接之2個電子零件之對向電極間距離大致固定之情形時(例如，IC晶片之凸塊高度均勻之情形)，就實際使用而言，導電粒子2a及導電粒子2b較佳為於尺寸、硬度或材質等方面相同。藉此，由於在異向性導電連接時可使應連接之對向電極間存在之導電粒子均勻地破碎，因此可降低初始導通電阻值，改善導通可靠性，降低短路之發生率。
另一方面，於應進行異向性導電連接之2個電子零件之對向電極間距離存在不均之情形時(例如，存在IC晶片之凸塊之高度之不均之情形)，若使用尺寸、硬度或材質等方面相同者作為導電粒子2a及導電粒子2b，則存在產生不良情況之情形。例如，若僅使用尺寸相對較小者作為導電粒子，則會出現如下情況：於相對較寬之電極間距離之對向電極間，導 電粒子未充分地破碎，因此，於異向性導電連接時壓痕變得不均勻，從而於產品檢查時被判定為不良，或初始導通電阻上升，或導通可靠性降低。又，若僅使用粒子硬度相對較高者作為導電粒子，則會出現如下情況：於相對較窄之電極間距離之對向電極間，一方面出現較強之壓痕，另一方面，粒子本身未充分地破碎，因此，初始導通電阻值上升，導通可靠性降低。因此，於應進行異向性導電連接之2個電子零件之對向電極間距離存在不均之情形時，較佳為使用尺寸或粒子硬度等方面互不相同者作為導電粒子2a及導電粒子2b，以消除其不均。於此情形時，導電粒子之排列圖案較佳為設為可消除應進行異向性導電連接之2個電子零件之對向電極間距離之不均般之圖案。
若絕緣性樹脂層4中之第1導電粒子層3a之導電粒子2a與第2導電粒子層3b之導電粒子2b之合計之粒子量過少，則導電粒子捕捉數降低而異向性導電連接變得困難，若過多，則有發生短路之擔憂，因此，每平方毫米較佳為50~50000個，更佳為200~50000個。
《絕緣性樹脂層》
作為絕緣性樹脂層4，可適當地採用公知之異向性導電性膜中所使用之絕緣性樹脂層。例如可使用由含有(甲基)丙烯酸酯化合物及光自由基聚合起始劑的光聚合性樹脂形成之樹脂層、由含有(甲基)丙烯酸酯化合物及熱自由基聚合起始劑的熱聚合性樹脂形成之樹脂層、由含有環氧化合物及熱陽離子聚合起始劑的熱聚合性樹脂形成之樹脂層、由含有環氧化合物與熱陰離子聚合起始劑之熱聚合性樹脂形成之樹脂層等。於使用光自由基聚合起始劑之情形時，亦可除光自由基聚合起始劑以外，一併使用熱自由 基聚合起始劑。又，亦可由多層樹脂層形成絕緣性樹脂層4。
此處，作為(甲基)丙烯酸酯化合物，可使用習知公知之光聚合型(甲基)丙烯酸酯單體。例如，可使用單官能(甲基)丙烯酸酯系單體、二官能以上之多官能(甲基)丙烯酸酯系單體。於本發明中，為了可於異向性導電連接時使絕緣性樹脂層熱硬化，較佳為對(甲基)丙烯酸酯系單體之至少一部分使用多官能(甲基)丙烯酸酯系單體。
作為光自由基聚合起始劑，例如可列舉苯乙酮系光聚合起始劑、苯偶醯縮酮系光聚合起始劑、磷系光聚合起始劑等公知之聚合起始劑。
關於光自由基聚合起始劑之使用量，若相對於丙烯酸酯化合物100質量份過少，則聚合無法充分地進行，若過多，則會引起剛性降低，因此，較佳為0.1~25質量份，更佳為0.5~15質量份。
作為熱自由基聚合起始劑，例如可列舉有機過氧化物、偶氮系化合物等。尤其，可較佳地使用不會產生導致氣泡之氮之有機過氧化物。
關於熱自由基聚合起始劑之使用量，若較少，則會硬化不良，若過多，則產品壽命會縮短，因此，相對於丙烯酸酯化合物100質量份，較佳為2~60質量份，更佳為5~40質量份。
作為熱陽離子聚合起始劑，可採用作為環氧化合物之熱陽離子聚合起始劑而公知者，例如，可使用藉由熱而產生酸之錪鹽、鋶鹽、鏻鹽、二茂鐵類等，尤其，可較佳地使用對於溫度表現出良好之潛伏性之芳香族鋶塩。
關於熱陽離子聚合起始劑之調配量，若過少，則有硬化不良之傾向，若過多，則有產品壽命縮短之傾向，因此，相對於環氧化合物100 質量份，較佳為2~60質量份，更佳為5~40質量份。
作為熱陰離子聚合起始劑，可採用作為環氧化合物之熱陰離子聚合起始劑而公知者，例如可使用藉由熱而產生鹼之脂肪族胺系化合物、芳香族胺系化合物、二級或三級胺系化合物、咪唑系化合物、聚硫醇系化合物、三氟化硼-胺錯合物、二氰二胺、有機酸醯肼等，尤其，可較佳地使用對於溫度表現出良好之潛伏性之膠囊化咪唑系化合物。
關於熱陰離子聚合起始劑之調配量，若過少，則有硬化不良之傾向，若過多，則有產品壽命縮短之傾向，因此，相對於環氧化合物100質量份，較佳為2~60質量份，更佳為5~40質量份。
作為由多層樹脂層形成絕緣性樹脂層4之態樣，可由不同之樹脂層形成保持有第1導電粒子層3a之絕緣性樹脂層及保持有第2導電粒子層3b之絕緣性樹脂層。又，亦可於保持有第1導電粒子層3a之絕緣性樹脂層與保持有第2導電粒子層3b之絕緣性樹脂層之間設置中間樹脂層，以將該等接著，又，亦可使該中間樹脂層具有於異向性導電膜之捲取時、捲出時、搬送時、異向性導電連接步驟之膜之抽出時等緩和施加於導電粒子之應力之功能。又，亦可於該絕緣性樹脂層4之單面設置不含導電粒子之相對較厚之絕緣性黏合劑層(未圖示)。
於使中間樹脂層具有應力緩和功能之情形時，中間樹脂層可由不含聚合起始劑之樹脂形成。作為此情形時之中間樹脂層之形成樹脂，例如可列舉苯氧基樹脂、環氧樹脂、聚烯烴樹脂、聚胺酯樹脂、丙烯酸樹脂等。
《異向性導電膜之製造方法》
(ii)概要
圖1A、圖1B所示之異向性導電膜1A可大致以如下方式製造。
首先，如圖7A所示般，於平面上打開有多個凹部11之第1轉印模10a之該凹部11中放入導電粒子2a(步驟A)。繼而，形成使第1轉印模10a內之導電粒子2a轉接著於絕緣性樹脂層而成之第1絕緣性樹脂層4a(步驟B)(圖7B~圖7E)。
以同樣之方式，於形成有多個凹部之第2轉印模之凹部中放入導電粒子(步驟C)，並形成使該第2轉印模內之導電粒子轉接著於絕緣性樹脂層而成之第2絕緣性樹脂層(步驟D)。
於此情形時，將第1轉印模、第2轉印模中相鄰之凹部之最接近距離設為放入該轉印模之導電粒子之平均粒徑之2倍以上。
繼而，使第1絕緣性樹脂層4a之導電粒子2a的轉接著面與第2絕緣性樹脂層4b之導電粒子2b的轉接著面對向而積層該等從而一體化(步驟E)(圖7F~圖7G)。
以此方式，藉由轉接著有導電粒子之絕緣性樹脂層彼此之貼合而製造異向性導電膜，藉此可提高異向性導電膜之生產效率。即，由於可於貼合之各絕緣性樹脂層中降低導電粒子之分散之密度，因此可減少轉印模中之導電粒子之填充量，可提高填充步驟中之良率。又，於不進行轉接著有導電粒子之絕緣性樹脂層彼此之貼合之習知之異向性導電膜之製造方法中，即便於由於填充於轉印模之導電粒子之數量較少而無法將藉由該方法獲得之異向性導電膜用於微間距之配線之情形時，根據本發明之製造方法，亦可使用該轉印模製造導電粒子高密度地分散而可用於微間距之端 子之異向性導電膜。
(ii)轉印模
作為第1轉印模及第2轉印模，例如可使用利用光微影法等公知之開口形成方法對矽、各種陶瓷、玻璃、不鏽鋼等金屬等無機材料、或各種樹脂等有機材料等形成開口而成者。又，轉印模可採用板狀、輥狀等形狀。
作為第1轉印模、第2轉印模之凹部之形狀，可例示圓柱狀、四角稜柱等柱狀、圓錐台、角錐台、圓錐形、四角錐形等錐體形狀等。
作為凹部之排列，可根據導電粒子所採取之排列而設為格子狀、錯位狀等。
就轉印性提高與導電粒子保持性之平衡而言，導電粒子之平均粒徑相對於凹部之深度之比(=導電粒子之平均粒徑/開口之深度)較佳為0.4~3.0，更佳為0.5~1.5。再者，轉印模之凹部之直徑與深度可利用雷射顯微鏡進行測定。
就收納導電粒子之容易度、絕緣性樹脂之壓入容易度等之平衡而言，凹部之開口徑相對於導電粒子之平均粒徑之比(=凹部之開口徑/導電粒子之平均粒徑)較佳為1.1~2.0，更佳為1.3~1.8。
再者，於凹部之底徑小於其開口徑之情形時，較佳為將底徑設為導電粒徑之1.1倍以上且未達2倍，將開口徑設為導電粒徑之1.3倍以上且未達3倍。
(iii)步驟A、步驟C
作為將導電粒子2a、2b收納於第1轉印模、第2轉印模之凹部內之方法，並無特別限定，可採用公知之方法。例如，只要將乾燥之導電粒子或 使其分散於溶劑中而成之分散液散佈或塗佈於轉印模之凹部之形成面上，並使用刷子或刮刀等刮擦凹部11之形成面即可。
(iv)步驟B、步驟D
形成轉接著有導電粒子2a之第1絕緣性樹脂層4a之步驟B、形成轉接著有導電粒子2b之第2絕緣性樹脂層4b之步驟D、使其等積層一體化之步驟E，可根據構成第1絕緣性樹脂層4a或第2絕緣性樹脂層4b之絕緣性樹脂之種類而採用各種態樣。
(iv-1)由黏著性樹脂形成絕緣性樹脂之情形
例如，於在步驟B、步驟D中分別由對於導電粒子具有黏著性之黏著性樹脂形成第1絕緣性樹脂層4a及第2絕緣性樹脂層4b之情形時，可僅藉由對收納於轉印模之導電粒子2a、2b按壓黏著性樹脂層，並將該黏著性樹脂層自轉印模剝離，而獲得轉接著有導電粒子2a、2b之第1、第2絕緣性樹脂層4a、4b。
(iv-2)由熱聚合性樹脂形成絕緣性樹脂層之情形
於在步驟B、步驟D中分別使用熱聚合性樹脂形成第1絕緣性樹脂層4a及第2絕緣性樹脂層4b之情形時，作為步驟B中之第1方法，藉由對收納於第1轉印模10a之導電粒子2a按壓熱聚合性樹脂層，而使導電粒子2a附著於熱聚合性樹脂層，將附著有導電粒子2a之熱聚合性樹脂層自轉印模剝離，繼而，對熱聚合性樹脂層進行加熱聚合而製成熱聚合樹脂層，將導電粒子2a固定於熱聚合樹脂層。或者，作為第2方法，對收納於第1轉印模10a之導電粒子2a按壓熱聚合性樹脂層，以於第1轉印模10a收納有導電粒子2a之狀態對熱聚合性樹脂進行加熱聚合，並自第1轉印模10a剝離， 藉此獲得轉接著有導電粒子2a之第1絕緣性樹脂層4a。
以同樣之方式，於步驟D中使用熱聚合性樹脂，藉由第1方法或第2方法獲得轉接著有導電粒子2b之第2絕緣性樹脂層4b。
如下所述，於在步驟E中藉由將半硬化狀態之第1絕緣性樹脂層與第2絕緣性樹脂層積層並加熱硬化而使其等一體化之情形時，步驟B及步驟D中之加熱聚合只要以熱聚合性樹脂層成為半硬化狀態之方式進行即可。另一方面，於在步驟E中另外經由中間樹脂層使第1絕緣性樹脂層與第2絕緣性樹脂層積層一體化之情形時，亦可於步驟B及步驟D中之加熱聚合中使熱聚合性樹脂層完全硬化。
(iv-3)由光聚合性樹脂形成絕緣性樹脂層之情形
於使用光聚合性樹脂形成第1絕緣性樹脂層4a之情形時，由於可容易地製造轉接著有收納於轉印模之導電粒子之第1絕緣性樹脂層，故而較佳。作為使用光聚合性樹脂形成第1絕緣性樹脂層4a之方法，例如，作為第1方法，亦可列舉藉由如下方式進行之方法：(a1)藉由對第1轉印模10a內之導電粒子2a按壓光聚合性樹脂層而使導電粒子附著於光聚合性樹脂層，(a2)藉由將該光聚合性樹脂層自轉印模剝離，而獲得轉接著有導電粒子之光聚合性樹脂層，(a3)對轉接著有導電粒子之光聚合性樹脂層照射紫外線而使光聚合性樹脂成為光聚合樹脂。
更具體而言，如圖7B所示，使形成於剝離膜5a上之由光聚合性樹脂所構成的第1絕緣性樹脂層4a與收納於第1轉印模10a之導電粒子2a對向，如圖7C所示，對第1絕緣性樹脂層4a施加壓力，向凹部11內壓入絕緣性樹脂而將導電粒子2a埋入第1絕緣性樹脂層4a，如圖7D所 示，將轉接著有導電粒子2a之第1絕緣性樹脂層4a自第1轉印模10a剝離，對第1絕緣性樹脂層4a進行UV照射。於此情形時，較佳為如圖7E所示般自導電粒子2a側照射紫外線UV。藉此，可將導電粒子2a固定於第1絕緣性樹脂層4a。並且，可使導電粒子2a之下方之藉由UV照射而成為陰影之區域X之硬化率與其周圍之區域Y相比變低，因此，異向性導電連接時之導電粒子2a之壓入變得容易。
作為使用光聚合性樹脂形成第1絕緣性樹脂層4a之情形時之第2方法，亦可為：(b1)如圖7C所示，對第1轉印模10a內之導電粒子按壓第1光聚合性樹脂層4a，其後，(b2)如圖8所示，自第1轉印模10a側對第1轉印模10a上之第1光聚合性樹脂層4a照射紫外線，藉此使第1光聚合性樹脂層4a聚合而形成保持有導電粒子之光聚合樹脂層，(b3)藉由將保持有導電粒子之光聚合性樹脂層自轉印模剝離，形成轉接著有導電粒子之光聚合樹脂層。於此情形時，使用紫外線透過性者作為第1轉印模10a。
以同樣之方式，於步驟D中使用光聚合性樹脂，藉由第1方法或第2方法獲得轉接著有導電粒子2b之第2絕緣性樹脂層4b。
無論於第1方法抑或第2方法中，於在步驟E中分別以半硬化狀態將第1絕緣性樹脂層4a與第2絕緣性樹脂層4b積層並進行光聚合而使其等一體化之情形時，步驟B及步驟D中之藉由紫外線照射而進行之光聚合只要以光聚合性樹脂層成為半硬化狀態之方式進行即可。另一方面，於在步驟E中另外經由中間樹脂層使第1絕緣性樹脂層與第2絕緣性樹脂層積層一體化之情形時，亦可於步驟B及步驟D中之光聚合中使光聚合性樹脂層完全硬化。
(iv-4)由具有熱聚合性及光聚合性之樹脂形成絕緣性樹脂層之情形
於使用無論藉由熱抑或藉由光均進行聚合之熱聚合性及光聚合性之樹脂形成第1絕緣性樹脂層4a及第2絕緣性樹脂層4b之情形時，亦可依照上述使用熱聚合性樹脂或光聚合性樹脂之情形，而獲得轉接著有導電粒子之絕緣性樹脂層。
(v)步驟E
(v-1)半硬化狀態之絕緣性樹脂層之積層一體化
於在步驟B或步驟D中使用具有光聚合性之樹脂以半硬化狀態形成第1絕緣性樹脂層4a及第2絕緣性樹脂層4b之情形時，於步驟E中，藉由使第1絕緣性樹脂層4a之導電粒子2a之轉接著面與第2絕緣性樹脂層4b之導電粒子2b之轉接著面對向(圖7F)，將該等積層，並進行紫外線照射而使其等積層一體化(圖7G)。藉由自以此方式而獲得之積層體將剝離膜5a、5b剝離，可獲得圖1A所示之異向性導電膜1A。
於在步驟B或步驟D中使用具有熱聚合性之樹脂以半硬化狀態形成第1絕緣性樹脂層4a及第2絕緣性樹脂層4b之情形時，亦同樣地藉由將該等積層並進行加熱聚合而使其等一體化。
(v-2)完全硬化狀態之絕緣性樹脂層之積層一體化
於在步驟B或步驟D中使用具有光聚合性之樹脂以完全硬化狀態形成第1絕緣性樹脂層4a及第2絕緣性樹脂層4b之情形時，於步驟E中，亦可如圖9A所示，藉由於第1絕緣性樹脂層4a與第2絕緣性樹脂層4b之間插入絕緣性接著劑層6作為中間樹脂層而使該等一體化，而獲得異向性導電 膜。於此情形時，絕緣性接著劑層6可藉由液狀接著性樹脂之塗佈、膜狀接著性樹脂之貼合等而設置。
又，絕緣性接著劑層6亦可由與第1絕緣性樹脂層4a或第2絕緣性樹脂層4b同種之樹脂形成。藉此，可如圖9B所示，於單層之絕緣性樹脂層中設置第1導電粒子層4a與第2導電粒子層4b，可使該第1導電粒子層4a之膜面方向之導電粒子2a之中心線Pa與第2導電粒子層4b之膜面方向之導電粒子2b之中心線Pb之距離S變寬。再者，若過度地使距離S變寬，則導電粒子會因異向性導電連接時之絕緣性樹脂之流動而變得容易流動，因此，距離S較佳為導電粒子2a、2b之平均粒徑之5倍以內，更佳為3倍以內。
又，於步驟E中，亦可如圖10A所示，作為中間樹脂層，設置由不含聚合起始劑之樹脂所構成之應力緩和層7，並如圖10B所示般積層一體化。
再者，於將絕緣性樹脂層4設為保持第1導電粒子層3a之第1絕緣性樹脂層4a、保持第2導電粒子層3b之第2絕緣性樹脂層4b、及夾於該等之中間樹脂層8(絕緣性接著劑層、應力緩和層等)之多層構成之情形時，亦可藉由適當調整轉印模之凹陷之深度、第1絕緣性樹脂層4a之層厚、第2絕緣性樹脂層4b之層厚等，而如圖11所示，使形成第1導電粒子層4a之導電粒子2a自第1絕緣性樹脂層4a突出，同樣地，亦可使形成第2導電粒子層3b之導電粒子2b自第2絕緣性樹脂層4b突出。進而，亦可藉由適當調整自第1絕緣性樹脂層4a突出之第1導電粒子層3a之突出量或自第2絕緣性樹脂層4b突出之第2導電粒子層3b之突出量，而如圖12 所示般形成第1導電粒子層4a之導電粒子2a與第2導電粒子層4b之導電粒子2b大致為同一平面之異向性導電膜。
《連接構造體》
本發明之異向性導電膜可較佳地於將IC晶片、IC模組、FPC等第1電子零件與FPC、玻璃基板、剛性基板、陶瓷基板等第2電子零件進行異向性導電連接時使用。以此方式所獲得之連接構造體亦為本發明之一部分。
作為使用異向性導電膜之電子零件之連接方法，例如，就提高連接可靠性之方面而言，較佳為，對各種基板等第2電子零件暫貼異向性導電膜(於形成有絕緣性黏合劑層之情形時，自絕緣性黏合劑層側暫貼)，對暫貼之異向性導電膜搭載IC晶片等第1電子零件，自第1電子零件側進行熱壓接。又，亦可利用光硬化進行連接。
實施例
以下，藉由實施例更具體地說明本發明。
實施例1~7、比較例1~4
製備含有苯氧基樹脂(新日鐵住金化學(股)、YP-50)60質量份、環氧樹脂(三菱化學(股)、jER828)40質量份、熱陽離子聚合起始劑(潛伏性硬化劑)(三新化學工業(股)、SI-60L)2質量份之熱聚合性之絕緣性樹脂，將其塗佈於膜厚50μm之PET膜上，藉由80℃之烘箱使其乾燥5分鐘，於PET膜上形成厚度20μm之黏著性之絕緣性樹脂層。
另一方面，製作具有與表1所示之排列圖案對應之凸部之排列圖案之模具，向該模具流入使公知之透明性樹脂之顆粒熔融而成者，並使其冷卻而凝固，藉此製作凹部為表1所示之排列圖案之樹脂製之轉印模。 於該轉印模之凹部填充導電粒子(積水化學工業(股)、AUL704、粒徑4μm)，於其上被覆上述絕緣性樹脂層，並使其熱硬化。繼而，自轉印模將絕緣性樹脂層剝離，製作轉接著有導電粒子之第1絕緣性樹脂層。又，以同樣之方式製作轉接著有導電粒子之第2絕緣性樹脂層。
藉由使第1絕緣性樹脂層之導電粒子之轉接著面與第2絕緣性樹脂層之導電粒子之轉接著面對向並對該等進行加熱壓接，而製造異向性導電膜。於此情形時，於實施例3中，於第1絕緣性樹脂層與第2絕緣性樹脂層之間，作為具有異向性導電連接時之應力緩和作用之中間樹脂層，介置厚度6μm之絕緣性樹脂膜(苯氧基樹脂60質量%、環氧樹脂40質量%)。又，於實施例4中，使用凹部與實施例1之轉印模相比變淺之轉印模(轉印模之深度為粒徑之0.4倍)，除此以外，以與實施例1同樣之方式製造異向性導電膜。
<評價>
對於實施例1~7及比較例1~4之異向性導電膜，分別以如下方式評價(a)初始導通電阻、(b)導通可靠性、(c)短路發生率。將結果示於表1。
(a)初始導通電阻
將各實施例及比較例之異向性導電膜夾於初始導通及導通可靠性之評價用IC與玻璃基板之間，進行加熱加壓(180℃、80MPa、5秒)而獲得各評價用連接物，測定該評價用連接物之導通電阻。此處，關於評價用IC與玻璃基板，其等之端子圖案對應，尺寸為如下所述。
初始導通及導通可靠性之評價用IC
外徑 0.7×20mm
厚度 0.2mm
凸塊(Bump)規格 鍍金、高度12μm、尺寸15×100μm、凸塊間間隙15μm
玻璃基板
玻璃材質 Corning公司製造
外徑 30×50mm
厚度 0.5mm
電極 ITO配線
(b)導通可靠性
與(a)同樣地測定將(a)之評價用IC與各實施例及比較例之異向性導電膜之評價用連接物於溫度85℃、濕度85%RH之恆溫槽中放置500小時後之導通電阻。再者，若該導通電阻為5Ω以上，則就所連接之電子零件之實用性之導通穩定性之方面而言欠佳。
(c)短路發生率
作為短路發生率之評價用IC，準備如下之IC(7.5μm間隔之梳齒式TEG(test element group))。
外徑 1.5×13mm
厚度 0.5mm
凸塊規格 鍍金、高度15μm、尺寸25×140μm、凸塊間間隙(Gap)7.5μm
將各實施例及比較例之異向性導電膜夾於短路發生率之評價用IC與對應於該評價用IC之圖案之玻璃基板之間，以與(a)同樣之連 接條件進行加熱加壓而獲得連接物，求出其連接物之短路發生率。短路發生率係由「短路之產生數/7.5μm間隔總數」而算出。就實際使用而言，短路發生率較理想為100ppm以下。
自表1可知，實施例1~7之異向性導電膜關於初始導通電阻、導通可靠性、短路發生率之全部評價項目均表現出實用上較佳之結果。尤其，由於實施例3設置有具有異向性導電連接時之應力緩和作用之中間樹脂層，因此，第1導電粒子層之中心線與第2導電粒子層之中心線之厚度方向之距離與其他實施例或比較例相比較遠，但初始導通電阻、導通可靠性、短路發生率均為較佳之結果。又，由實施例4可知，即便第1導電粒子層之中心線與第2導電粒子層之中心線之厚度方向之距離S為導電粒徑之1/5而為該距離S與其他實施例或比較例相比較小者，初始導通電阻、導通可靠性、短路發生率亦均獲得較佳之結果，於實用上無問題。
另一方面，比較例1、2由單層之導電粒子層形成，初始導通電阻、導通可靠性、短路發生率均表現出實用上較佳之結果。然而，於比較例1、2中，於製造時將導電粒子自轉印模轉印於絕緣性樹脂層時，必須使用密集地配置有凹部之轉印模，難以將導電粒子無缺陷地配置為所期待之排列。因此，可確認：根據本發明之實施例，可使用稀疏地配置有凹部之轉印模簡便地製造導電粒子與比較例1、2同樣地配置之異向性導電膜。
又，比較例3、4由於在第1導電粒子層、第2導電粒子層之各者中導電粒子間距離較窄，導電粒子為過密地佈滿之狀態，因此，短路發生率變高。
再者，即便於在實施例1~7中使用含有苯氧基樹脂、丙烯酸酯樹脂及光自由基聚合起始劑之光聚合性之絕緣性樹脂代替熱聚合性之絕緣性樹脂之情形時，亦與使用熱聚合性之絕緣性樹脂之情形同樣地，初始導通電阻、導通可靠性、短路發生率均為實用上較佳之結果。
實施例8~13、比較例5~9
製備含有苯氧基樹脂(新日鐵住金化學(股)、YP-50)60質量份、環氧樹脂(三菱化學(股)、jER828)40質量份、及熱陽離子聚合起始劑(潛伏性硬化劑)(三新化學工業(股)、SI-60L)2質量份之熱聚合性之絕緣性樹脂，將其塗佈於膜厚50μm之PET膜上，藉由80℃之烘箱使其乾燥5分鐘，於PET膜上形成厚度20μm之黏著性之絕緣性樹脂層。
另一方面，製作具有與二維之面心格子排列圖案對應之凸部之排列圖案之模具，向該模具流入使公知之透明性樹脂之顆粒熔融而成者，並使其冷卻而凝固，藉此製作凹部為二維之面心格子排列圖案之樹脂製之轉印模。於該轉印模之凹部填充具有表2所示之平均粒徑及粒子硬度之鍍金導電粒子，於其上被覆上述之絕緣性樹脂層，並使其熱硬化。繼而，自轉印模將絕緣性樹脂層剝離，製作轉接著有導電粒子之第1絕緣性樹脂層。又，以同樣之方式製作轉接著有導電粒子之第2絕緣性樹脂層。
藉由使第1絕緣性樹脂層之導電粒子之轉接著面與第2絕緣性樹脂層之導電粒子之轉接著面對向並對該等進行加熱壓接而製造異向性導電膜。
但是，關於比較例5~8，將第1導電粒子層之導電粒子設為單分散(無規)或面心格子排列，使相當於第2導電粒子層之層不含導電粒子而為絕緣性接著層。關於比較例9，將第1及第2導電粒子層中之導電粒子設為單分散。
再者，表2中由平均粒徑與粒子硬度而特定之鍍金導電粒子係使用以如下方式製作而獲得者。
再者，作為表2之由平均粒徑與粒子硬度而特定之導電粒子，使用利用以下文所示之方式製作之樹脂芯進行製作而得者。
<樹脂芯之製作>
於已調整二乙烯苯、苯乙烯、甲基丙烯酸丁酯之混合比之溶液中投入過氧化苯甲醯作為聚合起始劑，一面以高速均勻地攪拌一面進行加熱，使其等進行聚合反應，藉此獲得微粒子分散液。藉由將上述微粒子分散液進行過濾減壓乾燥而獲得作為微粒子之凝集體之塊體。進而，藉由將上述塊體粉碎、分級，而作為樹脂芯，獲得平均粒徑3、4或5μm之二乙烯苯系樹脂粒子。粒子之硬度係調整二乙烯苯、苯乙烯、甲基丙烯酸丁酯之混合比而進行。
<導電粒子之製作>
繼而，藉由浸漬法使所獲得之二乙烯苯系樹脂粒子(5g)載持鈀觸媒。繼而，使用由硫酸鎳六水合物、次磷酸鈉、檸檬酸鈉、三乙醇胺及硝酸鉈製備之無電解鍍鎳液(pH12、鍍敷液溫度50℃)對該樹脂粒子進行無電解鍍鎳，製作具有鍍鎳層作為表面金屬層之鎳被覆樹脂粒子。
繼而，將該鎳被覆樹脂粒子(12g)混合於使氯金酸鈉1.0g溶解於離子交換水1000mL而成之溶液中而調製水性懸浮液。藉由於所獲得之水性懸浮液中投入硫代硫酸銨15g、亞硫酸銨80g及磷酸氫銨40g而調整鍍金浴。於所獲得之鍍金浴中投入羥胺4g後，使用氨將鍍金浴之pH調整為9，並且持續15~20分鐘左右將浴溫維持為60℃，藉此，製作以如下之方式於鍍鎳層之表面形成有鍍金層之導電粒子。
(1)平均粒徑3μm、粒子硬度200kgf/mm2
(2)平均粒徑3μm、粒子硬度400kgf/mm2
(3)平均粒徑3μm、粒子硬度500kgf/mm2
(4)平均粒徑4μm、粒子硬度200kgf/mm2
(5)平均粒徑5μm、粒子硬度50kgf/mm2
(6)平均粒徑5μm、粒子硬度200kgf/mm2
(7)平均粒徑5μm、粒子硬度300kgf/mm2
<評價>
對於實施例8~13及比較例5~9之異向性導電膜，分別以如下方式評價(a)初始導通電阻、(b)導通可靠性、(c)短路發生率。追加性地觀察並評價(d)凸塊之壓痕狀態。將結果示於表2。
(a)初始導通電阻
將各實施例或比較例之異向性導電膜夾於初始導通及導通可靠性之評價用IC與玻璃基板之間，進行加熱加壓(170℃、60MPa、10秒)而獲得各評價用連接物，測定該評價用連接物之導通電阻。將導通電阻未達5Ω之情形評價為非常良好「A」，將為5Ω以上且未達10Ω之情形評價為良好「B」，將為10Ω以上之情形評價為不良「C」。再者，關於評價用IC與玻璃基板，其等之端子圖案對應，尺寸為如下所述。
初始導通及導通可靠性之評價用IC
外徑：1.8×20mm
厚度：0.5mm
凸塊規格：鍍金、高度14或15μm、尺寸30×85μm
(再者，凸塊高度之「14或15μm」表示一個凸塊中存在1μm之高低 差。將高度14μm之部分設為凸塊凹部，將高度15μm之部分設為凸塊凸部)
玻璃基板
玻璃材質 Corning公司製造
外徑 30×50mm
厚度 0.5mm
電極 ITO配線
(b)導通可靠性
與(a)同樣地測定將(a)之評價用IC與各實施例或比較例之異向性導電膜之評價用連接物於溫度85℃、濕度85%RH之恆溫槽中放置500小時後之導通電阻。於導通電阻未達10Ω之情形時，將導通可靠性評價為非常良好「A」，將為10Ω以上且未達20Ω之情形評價為良好「B」，將為20Ω以上之情形評價為不良「C」。
(c)短路發生率
作為短路發生率之評價用IC，準備下述IC(7.5μm間隔之梳齒式TEG(test element group))。
外徑：1.5×13mm
厚度：0.5mm
凸塊規格：鍍金、高度15μm、尺寸25×140μm、凸塊間隔10μm、凸塊間間隙7.5μm、間隙數16組(每1組10處)
玻璃基板
外徑 30×50mm
厚度 0.5mm
電極 ITO配線
將各實施例及比較例之異向性導電膜夾於短路發生率之評價用IC與對應於該評價用IC之圖案之玻璃基板之間，進行加熱加壓(170℃、60MPa、10秒)而獲得各評價用連接物，求出該評價用連接物之短路發生率。短路發生率係由「短路之產生數/7.5μm間隔總數」而算出。將短路發生率未達50ppm之情形評價為非常良好「A」，將為50ppm以上且未達250ppm之情形評價為良好「B」，將為250ppm以上之情形評價為不良「C」。
(d)凸塊之壓痕狀態
對於初始導通電阻評價中所使用之評價用連接物，利用倍率20倍之光學顯微鏡自玻璃基板側對10個凸塊觀察凸塊之壓痕，將觀察到之壓痕之數量為10處以上之情形評價為非常良好「A」，將觀察到8或9個壓痕之情形評價為良好「B」，將觀察到之壓痕為7個以下之情形評價為不良「C」。若凸塊凸部與凹部均為A或B評價，則可評價為於實用上無問題。
實施例8~13、比較例5~9係對導電粒子之粒徑及粒子硬度與評價結果之關係進行研究者。
由表2可知，實施例8~13之異向性導電膜中，粒子間距離為平均粒徑之2倍以上，並且導電粒子之粒徑與粒子硬度之平衡較佳，因此，關於初始導通電阻、導通可靠性、短路發生率、凸塊之壓痕狀態之全部評價項目，均表現出於實用上良好之結果。再者，實施例11~13中，雖然凸塊凹部之壓痕狀態為C評價，但由於凸塊凸部之壓痕狀態為B評價，因此於實用上無問題。
相對於此，於比較例5~8之異向性導電膜之情形時，與實施例不同，相當於第2導電粒子層之層成為不含導電粒子之絕緣性樹脂層。
又，於比較例5之異向性導電膜之情形時，導電粒子之平均粒徑為5μm而相對較大，粒子個數密度為60000個/mm2而相對較高，並且使其等無規地分散，因此，短路之發生率成為C評價。相反的，於比較例7之異向性導電膜之情形時，粒子個數密度為60000個/mm2而相對較高，並且使其等無規地分散，但由於平均粒徑為3μm而為相對小徑，因此，無法消除凸塊之凹凸，導通可靠性成為C評價。
於比較例6之異向性導電膜之情形時，雖然使導電粒子面心格子排列，但平均粒徑為5μm而相對較大，並且粒子硬度為50kgf/mm2而相對過於柔軟，因此，壓痕狀態係凸塊凸部、凹部均為C評價，無法充分地應對存在凹凸之凸塊。相反，於比較例8之異向性導電膜之情形時，導電粒子之平均粒子粒為3μm而為相對小徑，並且粒子硬度為500kgf/mm2而相對較硬，因此，雖然凸塊凸部中之壓痕狀態為A評價，但導通可 靠性成為C評價。認為其原因在於：由於粒徑過小，因此，尤其是凸塊之凹部中之連接無法保持，電阻值上升。
於比較例9之異向性導電膜之情形時，雖然積層有第1導電粒子層與第2導電粒子層，但兩層均為無規配置，且導電粒子之粒子個數密度分別為30000個/mm2，因此，短路發生率成為C評價。認為其原因在於成為容易發生導電粒子彼此之接觸之情況。
再者，於在實施例8~13中使用含有苯氧基樹脂、丙烯酸酯樹脂及光自由基聚合起始劑之光聚合性之絕緣性樹脂代替熱聚合性之絕緣性樹脂之情形時，亦與使用熱聚合性之絕緣性樹脂之情形同樣地，關於初始導通電阻、導通可靠性、短路發生率、凸塊之壓痕狀態之全部評價項目，均為於實用上無問題之結果。
[產業上之可利用性]
本發明之異向性導電膜對於IC晶片等電子零件向配線基板之異向性導電連接較為有用。電子零件之配線之狹小化不斷進展，本發明於對狹小化之電子零件進行異向性導電連接之情形時尤為有用。

Claims (18)

  1. 一種異向性導電膜，其係於絕緣性樹脂層分散有導電粒子者；具有：第1導電粒子層，其於異向性導電膜之膜厚之特定之深度分散有導電粒子；及第2導電粒子層，其於與第1導電粒子層不同之深度分散有導電粒子；於各導電粒子層中，相鄰之導電粒子之最接近距離為導電粒子之平均粒徑之2倍以上。
  2. 如申請專利範圍第1項之異向性導電膜，其中，於各導電粒子層中，導電粒子之最接近之粒子間距離為導電粒子之平均粒徑之2倍以上且50倍以下。
  3. 如申請專利範圍第1或2項之異向性導電膜，其中，第1導電粒子層之導電粒子與第2導電粒子層之導電粒子互不相同。
  4. 如申請專利範圍第1或2項之異向性導電膜，其中，第1導電粒子層之導電粒子與第2導電粒子層之導電粒子於平均粒徑及/或粒子硬度之方面互不相同。
  5. 如申請專利範圍第1或2項之異向性導電膜，其中，於俯視異向性導電膜之情形時，第1導電粒子層之導電粒子與第2導電粒子層之導電粒子之位置錯開。
  6. 如申請專利範圍第1或2項之異向性導電膜，其中，異向性導電膜之膜厚之方向上之第1導電粒子層的中心與第2導電粒子層的中心之距離，為導電粒子之平均粒徑之1/5以上。
  7. 如申請專利範圍第1或2項之異向性導電膜，其中，於各導電粒子層中，導電粒子進行排列。
  8. 如申請專利範圍第7項之異向性導電膜，其中，排列呈格子狀排列。
  9. 如申請專利範圍第7項之異向性導電膜，其中，第1導電粒子層與第2導電粒子層之導電粒子的排列相同。
  10. 如申請專利範圍第1或2項之異向性導電膜，其中，絕緣性樹脂層係由光聚合樹脂形成。
  11. 如申請專利範圍第1或2項之異向性導電膜，其中，絕緣性樹脂層具有由聚合性樹脂形成之第1絕緣性樹脂層、不含聚合起始劑之中間樹脂層、及由聚合性樹脂形成之第2絕緣性樹脂層之積層構造；第1導電粒子層之各導電粒子之至少一部分埋入第1絕緣性樹脂層；第2導電粒子層之各導電粒子之至少一部分埋入第2絕緣性樹脂層；於第1導電粒子層之導電粒子與第2導電粒子層之導電粒子之間存在中間樹脂層。
  12. 一種異向性導電膜之製造方法，其係具有如下步驟之異向性導電膜之製造方法：步驟A，其係於形成有多個凹部之第1轉印模之凹部中放入導電粒子；步驟B，其係將第1轉印模內之導電粒子轉接著於絕緣性樹脂層而形成第1絕緣性樹脂層；步驟C，其係於形成有多個凹部之第2轉印模之凹部中放入導電粒子；步驟D，其係將第2轉印模內之導電粒子轉接著於絕緣性樹脂層而形成第2絕緣性樹脂層；及步驟E，其係使第1絕緣性樹脂層之導電粒子的轉接著面與第2絕緣性樹脂層之導電粒子的轉接著面對向，並積層該等從而一體化；於各轉印模中，相鄰之凹部之最接近距離為放入該轉印模之導電粒子之平均粒徑之2倍以上。
  13. 如申請專利範圍第12項之異向性導電膜之製造方法，其中，於步驟B及步驟D中分別包括：(a1)藉由對轉印模內之導電粒子按壓光聚合性樹脂層，而使導電粒子附著於光聚合性樹脂層；(a2)藉由將該光聚合性樹脂層自轉印模剝離，而獲得轉接著有導電粒子之光聚合性樹脂層；(a3)藉由使轉接著有導電粒子之光聚合性樹脂層光聚合，而形成轉接著有導電粒子之聚合樹脂層。
  14. 如申請專利範圍第12項之異向性導電膜之製造方法，其中，於步驟B及步驟D中分別包括：(b1)對轉印模內之導電粒子按壓光聚合性樹脂層；(b2)使該光聚合性樹脂層聚合而形成保持有導電粒子之光聚合樹脂層；(b3)藉由將保持有導電粒子之光聚合性樹脂層自轉印模剝離，而形成轉接著有導電粒子之光聚合樹脂層。
  15. 如申請專利範圍第12至14項中任一項之異向性導電膜之製造方法，其中，於步驟B及步驟D中，使絕緣性樹脂層形成為半硬化狀態，於步驟E中，將第1絕緣性樹脂層與第2絕緣性樹脂層積層後，使該等硬化而一體化。
  16. 如申請專利範圍第12至14項中任一項之異向性導電膜之製造方法，其中，於步驟E中，使第1絕緣性樹脂層之導電粒子的轉接著面與第2絕緣性樹脂層之導電粒子的轉接著面經由中間樹脂層積層並一體化。
  17. 一種連接構造體，其係利用申請專利範圍第1至11項中任一項之異向性導電膜將第1電子零件異向性導電連接於第2電子零件而成。
  18. 一種連接構造體之製造方法，其利用申請專利範圍第1至11項中任一項之異向性導電膜將第1電子零件異向性導電連接於第2電子零件。
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Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110265843B (zh) * 2014-10-28 2021-05-11 迪睿合株式会社 各向异性导电膜
JP6476747B2 (ja) * 2014-10-28 2019-03-06 デクセリアルズ株式会社 異方性導電フィルム及び接続構造体
JP6945276B2 (ja) * 2016-03-31 2021-10-06 デクセリアルズ株式会社 異方性導電接続構造体
JP6889020B2 (ja) * 2016-05-02 2021-06-18 デクセリアルズ株式会社 異方性導電フィルムの製造方法、及び異方性導電フィルム
WO2017191781A1 (ja) * 2016-05-05 2017-11-09 デクセリアルズ株式会社 異方性導電フィルム
JP7274811B2 (ja) 2016-05-05 2023-05-17 デクセリアルズ株式会社 異方性導電フィルム
KR102549530B1 (ko) * 2016-06-21 2023-06-30 삼성디스플레이 주식회사 전자 장치의 제조 방법 및 전자 장치
CN113078486B (zh) * 2016-10-24 2023-10-20 迪睿合株式会社 各向异性导电膜的制造方法
JP6935702B2 (ja) 2016-10-24 2021-09-15 デクセリアルズ株式会社 異方性導電フィルム
WO2018079303A1 (ja) * 2016-10-31 2018-05-03 デクセリアルズ株式会社 フィラー含有フィルム
JP7035370B2 (ja) * 2016-10-31 2022-03-15 デクセリアルズ株式会社 フィラー含有フィルム
CN109983628B (zh) * 2016-11-30 2021-12-24 迪睿合株式会社 导电粒子配置膜、其制造方法、检查探头单元、导通检查方法
US10957462B2 (en) 2016-12-01 2021-03-23 Dexerials Corporation Anisotropic conductive film
JP7039883B2 (ja) * 2016-12-01 2022-03-23 デクセリアルズ株式会社 異方性導電フィルム
TWI624918B (zh) * 2017-07-11 2018-05-21 異向性導電薄膜的製作方法
US20190355277A1 (en) * 2018-05-18 2019-11-21 Aidmics Biotechnology (Hk) Co., Limited Hand-made circuit board

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW201129994A (en) * 2009-09-30 2011-09-01 Sony Chem & Inf Device Corp Anisotropic conducting film and method for manufacturing the same
WO2013024873A1 (ja) * 2011-08-18 2013-02-21 日立化成工業株式会社 接着材リール、ブロッキング抑制方法、接着材リールの交換方法、接着材テープの繰出し方法、接着材リールの製造方法、リールキット、及び梱包体

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3622792B2 (ja) * 1994-11-25 2005-02-23 日立化成工業株式会社 接続部材及び該接続部材を用いた電極の接続構造・接続方法
JPH10200243A (ja) * 1997-01-13 1998-07-31 Toshiba Chem Corp 異方性導電ペーストによる電気接続方法
JP2005300279A (ja) * 2004-04-08 2005-10-27 Jsr Corp 異方導電性コネクター装置およびその製造方法並びに回路装置の検査装置
JP2006233203A (ja) 2005-01-31 2006-09-07 Asahi Kasei Electronics Co Ltd 異方導電性接着剤フィルム
JP4832059B2 (ja) 2005-11-21 2011-12-07 旭化成イーマテリアルズ株式会社 粒子連結構造体
JP4684087B2 (ja) 2005-11-21 2011-05-18 旭化成イーマテリアルズ株式会社 連結構造体
JP2007225534A (ja) 2006-02-27 2007-09-06 Jsr Corp 複合導電性シート、異方導電性コネクターおよびアダプター装置並びに回路装置の電気的検査装置
KR101240155B1 (ko) * 2006-04-27 2013-03-11 아사히 가세이 일렉트로닉스 가부시끼가이샤 도전 입자 배치 시트 및 이방성 도전 필름
JP5298605B2 (ja) * 2007-04-03 2013-09-25 デクセリアルズ株式会社 画像表示装置の製造方法
JP2009186957A (ja) * 2007-04-09 2009-08-20 Sony Chemical & Information Device Corp 樹脂組成物及び表示装置
JP5010990B2 (ja) * 2007-06-06 2012-08-29 ソニーケミカル＆インフォメーションデバイス株式会社 接続方法
JP4623224B2 (ja) 2008-06-26 2011-02-02 日立化成工業株式会社 樹脂フィルムシート及び電子部品
CN102047347B (zh) * 2008-07-01 2012-11-28 日立化成工业株式会社 电路连接材料和电路连接结构体
JP5430093B2 (ja) * 2008-07-24 2014-02-26 デクセリアルズ株式会社 導電性粒子、異方性導電フィルム、及び接合体、並びに、接続方法
JP2010033793A (ja) 2008-07-28 2010-02-12 Tokai Rubber Ind Ltd 粒子転写膜の製造方法
JP5685473B2 (ja) * 2011-04-06 2015-03-18 デクセリアルズ株式会社 異方性導電フィルム、接合体の製造方法、及び接合体
JP2014149918A (ja) * 2011-06-06 2014-08-21 Hitachi Chemical Co Ltd フィルム状回路接続材料及び回路接続構造体
JP2013149466A (ja) * 2012-01-19 2013-08-01 Sekisui Chem Co Ltd 異方性導電材料、接続構造体及び接続構造体の製造方法
JP6079425B2 (ja) 2012-05-16 2017-02-15 日立化成株式会社 導電粒子、異方性導電接着剤フィルム及び接続構造体
US10272598B2 (en) 2012-08-24 2019-04-30 Dexerials Corporation Method of producing anisotropic conductive film and anisotropic conductive film

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW201129994A (en) * 2009-09-30 2011-09-01 Sony Chem & Inf Device Corp Anisotropic conducting film and method for manufacturing the same
WO2013024873A1 (ja) * 2011-08-18 2013-02-21 日立化成工業株式会社 接着材リール、ブロッキング抑制方法、接着材リールの交換方法、接着材テープの繰出し方法、接着材リールの製造方法、リールキット、及び梱包体

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