TWI660247B - Substrate holding member - Google Patents

Substrate holding member Download PDF

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TWI660247B
TWI660247B TW105142863A TW105142863A TWI660247B TW I660247 B TWI660247 B TW I660247B TW 105142863 A TW105142863 A TW 105142863A TW 105142863 A TW105142863 A TW 105142863A TW I660247 B TWI660247 B TW I660247B
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protective layer
holding member
substrate holding
end surface
base
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TW105142863A
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TW201734656A (zh
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石野智浩
手島貴志
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日本特殊陶業股份有限公司
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    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70Microphotolithographic exposure; Apparatus therefor
    • G03F7/70691Handling of masks or workpieces
    • G03F7/70716Stages
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6838Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping with gripping and holding devices using a vacuum; Bernoulli devices
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/20Exposure; Apparatus therefor
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70Microphotolithographic exposure; Apparatus therefor
    • G03F7/70691Handling of masks or workpieces
    • G03F7/707Chucks, e.g. chucking or un-chucking operations or structural details
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70Microphotolithographic exposure; Apparatus therefor
    • G03F7/708Construction of apparatus, e.g. environment aspects, hygiene aspects or materials
    • G03F7/70808Construction details, e.g. housing, load-lock, seals or windows for passing light in or out of apparatus
    • G03F7/70825Mounting of individual elements, e.g. mounts, holders or supports
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/687Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
    • H01L21/68714Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
    • H01L21/6875Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by a plurality of individual support members, e.g. support posts or protrusions

Abstract

提供一種基板保持構件,在具備形成於基體的表面之複數個突起的基板保持構件中,可抑制因形成在突起的保護層之剝離或龜裂而引起的微粒。
一種基板保持構件,係具備基體、及形成於基體的表面之複數個突起,且較佳為:突起具有上端面被平坦地形成且由碳化矽燒結體構成的基部、及由碳化矽構成的保護層;保護層,係於自基部的上端面之緣部至下端的至少一部分,具有遍及全周露出之區域。並且,較佳為,保護層係以僅覆蓋包含基部的上端面之上部的至少一部分之方式形成。

Description

基板保持構件
本發明係關於一種為了吸附保持半導體晶圓等的基板而使用之基板保持構件。
於半導體製造裝置、尤其是曝光機中,作為在曝光時用以保持晶圓的構件,例如,使用有在基體的表面形成有複數個突起之基板保持構件。此種基板保持構件,要求有極高的平面度、及為了防止因靜電引起的電路破壞而要求具有導電性。因此,使用有如碳化矽(以下,亦稱為「SiC」)之具有導電性且高剛性的材料。尤其是,作為基板保持構件的突起之材質,使用有碳化矽燒結體(以下,亦稱為「SiC燒結體」)。此外,為了抑制因與晶圓的接觸而引起之磨耗等,在由SiC燒結體構成的突起上塗布SiC膜(保護層),且於塗布後藉由噴砂加工或研磨加工而實施表面加工。如此,此種之SiC塗層形成在基板保持構件整面(例如,參照專利文獻1、2)。
[先前技術文獻] [專利文獻]
專利文獻1:日本專利第4782744號公報
專利文獻2:日本專利第5063797號公報
半導體製程,尤其是製作電路圖案的曝光處理裝置,對抑制微粒(particles)的要求高。因此,也要求不會自基板保持構件產生微粒。
然而,如專利文獻1、2,若於基板保持構件的整面塗布SiC膜,於形成在表面的突起中,因由SiC燒結體構成的基部與SiC膜(保護層)之物性上的些微差異,若長期使用,會於基部與SiC膜之間產生剝離或龜裂。這可認為:即使為相同的材料,但由於製法不同,因而線膨脹係數、彈性模量、密度、硬度、結晶性等物性仍存在有些微差異,且原因就在於因伴隨溫度變化的膨脹率之差異而引起的應力、或進行晶圓的吸附及脫離時產生的應力上。亦即,此應力轉移至基部的SiC膜之下部,進而變成剝離或龜裂的原因。此種之SiC膜的剝離或龜裂,有可能成為產生微粒的原因,因而要求改善。
本發明係鑑於上述習知的問題而完成者,其目的在於提供一種基板保持構件,在具備形成於基體的表面之複數個突起的基板保持構件中,可抑制因形成在突起的保護層之剝離或龜裂而引起的微粒。
本發明的第1態樣之基板保持構件,係具備基體、及形成於上述基體的表面之複數個突起,該基板保持構件的特徵在於:上述突起具有上端面被平坦地形成 且由碳化矽燒結體構成的基部、及由碳化矽構成的保護層,上述保護層,係於自上述基部的上端面之緣部至下端的至少一部分,具有遍及全周露出之區域。
本發明的第2態樣之基板保持構件,係具備基體、及形成於上述基體的表面之複數個突起,該基板保持構件的特徵在於:上述突起具有上端面被平坦地形成且由碳化矽燒結體構成的基部、及由選自碳化矽、類鑽碳、TiN、TiC、TiCN、TiAlN、TiO2、CrN、Y2O3及Al2O3的至少1種構成之保護層,上述保護層,係於自上述基部的上端面之緣部至下端的至少一部分,具有遍及全周露出之區域。
本發明的基板保持構件,係於自基部的上端面之緣部至下端的一部分,具有遍及全周露出保護層之區域,該保護層係在形成於基體的表面之複數個突起上,被形成於由碳化矽燒結體構成的基部之表面。亦即,保護層在自基部的上端面之緣部至下端之間的一部分被分割。藉由依此方式構成,與在基板保持構件整面形成保護層之情況比較,可抑制產生於保護層之應力之傳遞,變得不易產生保護層之剝離或龜裂,從而可抑制起因於此等之微粒。
於本發明的基板保持構件中,較佳為,上述保護層係以僅覆蓋包含上述基部的上端面之上部的至少一部分之方式形成。藉由依此方式構成,可進一步減小基部與保護層之接觸面積,從而可有效地發揮上述功效。此外,可進一步抑制保護層的材料本身至少因為此而 引起的微粒。
該情況下,上述保護層可以僅覆蓋上述基部的上端面之方式形成,也可以覆蓋上述基部的上端面,且將連接上端面的側面之一部分以遍及全周覆蓋的方式形成。
1‧‧‧基板保持構件
10‧‧‧基體
20‧‧‧突起
22‧‧‧基部
24‧‧‧保護層
第1圖為顯示本發明的一實施形態之基板保持構件的立體圖。
第2圖為放大顯示第1圖所示的基板保持構件之突起部分的剖視圖。
第3圖為顯示與第2圖所示的突起不同的形態之剖視圖。
第4圖為顯示與第2圖所示的突起不同的形態之剖視圖。
第5圖為顯示與第2圖所示的突起不同的形態之剖視圖。
第6圖為顯示與第2圖所示的突起不同的形態之剖視圖。
本發明的基板保持構件,係具備基體、及形成於上述基體的表面之複數個突起,該基板保持構件的特徵在於:上述突起具有上端面被平坦地形成且由碳化矽燒結體構成的基部、及保護層,上述保護層,係於自上述基部的上端面之緣部至下端的至少一部分,具有遍 及全周露出之區域。
以下,參照圖式,對本發明的基板保持構件之實施形態進行說明。
第1圖為本發明的基板保持構件之一實施形態的立體圖。第1圖所示的基板保持構件1具備:圓板狀的基體10,其由碳化矽燒結體構成;及複數個突起20,其形成於基體10的表面。
第2圖為僅顯示形成在基體10的表面之複數個突起20中的其中一個之剖視圖。第2圖所示的突起20,係具備由碳化矽燒結體構成的基部22、及保護層24。於第2圖的形態中,基部22係由圓柱狀的下基部22A、及朝下基部22A的上方突出且直徑較下基部22A小的圓柱形狀之上基部22B構成。並且,上基部22B的上端面,係被平坦地形成。再者,於第2圖中,突起20係在不考慮實際的形狀及尺寸比下被誇大繪製而成。因此,與實際的突起之形狀及尺寸比不一定相符。後述的第3圖~第6圖亦同。
於基部22(上基部22B)的上端面整體,以抑制因與晶圓的接觸而引起之磨耗等為目的,形成有保護層24。保護層24,係由選自碳化矽、類鑽碳、TiN、TiC、TiCN、TiAlN、TiO2、CrN、Y2O3及Al2O3的至少1種構成。於第2圖所示的形態中,保護層24僅形成在基部22的上端面整體,未被形成於基部22的側面及基體10之表面(不形成突起20的部分)。由於保護層24僅形成於基部22的上端面,因此如上述,與在基板保持構件的整面形成保 護層之情況比較,變得不易產生保護層的剝離或龜裂,從而可抑制起因於此等的微粒(particles)。
以上的第2圖所示之突起20上的保護層24僅形成於上端面整體,但如第3圖所示,較佳為,保護層24係以覆蓋基部22的上端面,且將連接上端面的側面之一部分以遍及全周覆蓋之方式形成。尤其是,形成在上端面的保護層24,雖因與基板的物理接觸而會受到應力,但如第3圖所示,藉由形成至連接端面的側面之一部分,保護層24與基部22的接觸面積變大,可進一步增大保護層24的剝離之防止功效。
於以上的第2及第3圖中,保護層24係以僅覆蓋包含基部22的上端面之上部的至少一部分之方式形成。在此,該「上部」係指較上端與下端的中間部分位於靠近上方。具體而言,該「上部」係以突起20的頂點作為高度之基準,較佳為1~100μm的高度,更佳為5~30μm的高度。
以上,顯示了形成在基體10的表面之突起20,係由直徑不同的圓柱形狀之上基部及下基部構成之情況,但本發明中不限於此形狀。例如,如第4、第5圖所示,也可將基部設為圓錐台形狀。於第4、第5圖中,對與第2圖之構成要素實質相同之構成要素,賦予相同的符號。此外,雖未圖示,也可設為單純的圓柱形狀或角柱形狀。不論是任何形狀,藉由以僅覆蓋包含基部上端面之上部的一部分之方式形成保護層,皆可發揮上述本發明的功效。
以上的實施形態中,作為較佳的形態,顯示了以僅覆蓋包含基部上端面之上部的一部分之方式形成保護層之形態,但理論上,如第6圖所示,只要保護層在自基部22的上端面之緣部至下端的一部分具有遍及全周露出的區域即可。在第6圖中,對與第2圖之構成要素實質相同之構成要素,賦予相同的符號。於此構成中,如上述,保護層24係在自基部22的上端面之緣部至下端之間的一部分被分割,因此,可抑制產生於保護層24的應力之傳遞,其結果,變得不易產生保護層24的剝離或龜裂,從而可抑制起因於此等之微粒。
以上的本發明之基板保持構件,例如,可依以下方式製造。
首先,製作由碳化矽構成的大致圓板狀之成形體,且於1900~2100[℃]、Ar氣體氛圍中,對此成形體進行燒結,製作大致圓板狀的碳化矽燒結體。接著,對碳化矽燒結體的上側表面實施研削加工、噴砂加工或放電加工等,形成複數個基部22。並且,例如,根據化學氣相沉積法(CVD)、物理氣相沉積法(PVD)、鍍敷、蒸鍍、電漿離子植入法或離子蒸鍍法,以覆蓋基體10的上側表面及基部22之表面的方式形成由碳化矽構成的保護層24。其中,較佳為,保護層24係以製膜處理溫度相對較低,且可抑制因熱造成的基部22之變形的PVD形成。如此形成的保護層24,係覆蓋基體10的上側表面及基部22的表面整面之狀態。於本發明中,保護層24係作為(1)僅形成於基部的上端面整體之狀態、或(2)延伸設置至基 部的上端面整體及連接至該上端面的側面的途中之狀態,因此,可藉由噴砂加工等去除與(1)或(2)對應的區域以外之區域。並且,至少以突起20的頂面變為平坦之方式對保護層24實施研磨加工。
在以上的本發明之基板保持構件中,例如,為半導體晶圓等之平板狀被吸附物的基板,係以抵接於複數個突起20的各個之方式,藉由基板保持構件1所支撐。藉由連接在形成於基體10的真空吸引用路徑的真空泵等的真空吸引裝置,吸引由基板保持構件1與被吸附物所劃定的空間之空氣,以該吸引力將為被吸附物的基板吸附於基板保持構件1。

Claims (6)

  1. 一種基板保持構件,係具備基體、及形成於上述基體的表面之複數個突起,該基板保持構件的特徵在於:上述突起具有上端面被平坦地形成且由碳化矽燒結體構成的基部、及由碳化矽構成的保護層,上述保護層係於自上述基部的上端面之緣部至下端的至少一部分,具有遍及全周露出之區域。
  2. 如請求項1之基板保持構件,其中上述保護層係以僅覆蓋包含上述基部的上端面之上部的至少一部分之方式形成。
  3. 如請求項2之基板保持構件,其中上述保護層係以僅覆蓋上述基部的上端面之方式形成。
  4. 如請求項2之基板保持構件,其中上述保護層係以覆蓋上述基部的上端面,且將連接上端面的側面之一部分以遍及全周覆蓋的方式形成。
  5. 如請求項1至4項中任一項之基板保持構件,其中上述保護層係以覆蓋包含上述基部的上端面之上部與包含上述基部的側面的下端之下部之方式形成,上述保護層之覆蓋上述上部的部分與覆蓋上述下部的部分係被分斷。
  6. 一種基板保持構件,係具備基體、及形成於上述基體的表面之複數個突起,該基板保持構件的特徵在於:上述突起具有上端面被平坦地形成且由碳化矽燒結體構成的基部、及由選自碳化矽、類鑽碳、TiN、TiC、TiCN、TiAlN、TiO2、CrN、Y2O3及Al2O3的至少1種構成之保護層,上述保護層係於自上述基部的上端面之緣部至下端的至少一部分,具有遍及全周露出之區域,上述保護層係以覆蓋包含上述基部的上端面之上部與包含上述基部的側面的下端之下部之方式形成,上述保護層之覆蓋上述上部的部分與覆蓋上述下部的部分係被分斷。
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