TWI604579B - Chip on film package structure - Google Patents
Chip on film package structure Download PDFInfo
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- TWI604579B TWI604579B TW105117419A TW105117419A TWI604579B TW I604579 B TWI604579 B TW I604579B TW 105117419 A TW105117419 A TW 105117419A TW 105117419 A TW105117419 A TW 105117419A TW I604579 B TWI604579 B TW I604579B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/367—Cooling facilitated by shape of device
- H01L23/3675—Cooling facilitated by shape of device characterised by the shape of the housing
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/4985—Flexible insulating substrates
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- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Description
本發明是有關於一種封裝結構，且特別是有關於一種薄膜覆晶封裝結構。The present invention relates to a package structure, and more particularly to a film flip chip package structure.
隨著半導體技術的改良，使得液晶顯示器具有低的消耗電功率、薄型量輕、解析度高、色彩飽和度高、壽命長等優點，因而廣泛地應用在行動電話、筆記型電腦或桌上型電腦的液晶螢幕及液晶電視等與生活息息相關之電子產品。其中，顯示器之驅動晶片（driver IC）更是液晶顯示器不可或缺的重要元件。因應液晶顯示裝置驅動晶片各種應用之需求，一般是採用捲帶自動接合（tape automatic bonding, TAB）封裝技術進行晶片封裝，薄膜覆晶（Chip-On-Film, COF）封裝結構便是其中一種應用捲帶自動接合技術的封裝結構。With the improvement of semiconductor technology, liquid crystal displays have the advantages of low power consumption, light weight, high resolution, high color saturation, long life, etc., and thus are widely used in mobile phones, notebook computers or desktop computers. LCD screens and LCD TVs and other electronic products that are closely related to life. Among them, the driver IC of the display is an indispensable component of the liquid crystal display. In order to meet the needs of various applications of liquid crystal display device driving wafers, tape automatic bonding (TAB) packaging technology is generally used for chip packaging, and chip-on-film (COF) package structure is one of the applications. The package structure of the tape automatic bonding technology.
薄膜覆晶封裝結構是以覆晶接合方式將晶片接合至可撓性線路基板。由於封裝結構在運作時晶片會產生大量的熱量，如何對薄膜覆晶封裝結構中的晶片提供散熱機制便是相當重要的議題。The thin film flip chip package structure bonds the wafer to the flexible wiring substrate by flip chip bonding. Since the wafer generates a large amount of heat during operation of the package structure, how to provide a heat dissipation mechanism for the wafer in the film flip-chip package structure is an important issue.
本發明提供一種薄膜覆晶封裝結構，其具有散熱蓋不僅可提供良好的散熱效果並且不會影響可撓性線路基板彎折，而且相當方便使用者確認散熱蓋與晶片之間的貼合狀況。The invention provides a film flip chip packaging structure, which has a heat dissipating cover not only provides good heat dissipation effect but also does not affect bending of the flexible circuit substrate, and is convenient for the user to confirm the bonding condition between the heat dissipating cover and the wafer.
本發明的一種薄膜覆晶封裝結構，包括一可撓性線路基板、一晶片、一散熱蓋及一黏膠層。晶片配置在可撓性線路基板上，並與可撓性線路基板電性連接。散熱蓋包括一頂部及至少一側牆，其中頂部配置在晶片的一背表面上，此至少一側牆連接頂部，且散熱蓋不接觸可撓性線路基板。黏膠層配置在晶片的背表面與散熱蓋的頂部之間。散熱蓋的至少一側外露出黏膠層。A thin film flip chip package structure of the present invention comprises a flexible circuit substrate, a wafer, a heat dissipation cover and an adhesive layer. The wafer is disposed on the flexible circuit substrate and electrically connected to the flexible circuit substrate. The heat dissipation cover includes a top portion and at least one side wall, wherein the top portion is disposed on a back surface of the wafer, the at least one side wall is connected to the top portion, and the heat dissipation cover does not contact the flexible circuit substrate. The adhesive layer is disposed between the back surface of the wafer and the top of the heat dissipation cover. An adhesive layer is exposed on at least one side of the heat dissipation cover.
在本發明的一實施例中，上述的此至少一側牆不接觸可撓性線路基板，且此至少一側牆與頂部之間的夾角大於等於90度且小於180度。In an embodiment of the invention, the at least one side wall does not contact the flexible circuit substrate, and the angle between the at least one side wall and the top portion is greater than or equal to 90 degrees and less than 180 degrees.
在本發明的一實施例中，上述的此至少一側牆包括一觀測窗，觀測窗外露出黏膠層。In an embodiment of the invention, the at least one side wall comprises an observation window, and the adhesive window is exposed outside the observation window.
在本發明的一實施例中，上述的散熱蓋的頂部的其中一邊緣未連接側牆，以外露出黏膠層。In an embodiment of the invention, one of the edges of the top of the heat dissipation cover is not connected to the side wall, and the adhesive layer is exposed outside.
在本發明的一實施例中，上述的散熱蓋的頂部呈矩形，散熱蓋外露出黏膠層的此至少一側包括頂部的一短邊。In an embodiment of the invention, the top of the heat dissipation cover has a rectangular shape, and the at least one side of the heat dissipation cover exposing the adhesive layer includes a short side of the top.
在本發明的一實施例中，上述的此至少一側牆的數量為多個，其中一個側牆包括一觀測窗，此觀測窗外露出黏膠層。In an embodiment of the invention, the number of the at least one side wall is plural, and one of the side walls includes an observation window, and the observation window exposes an adhesive layer.
在本發明的一實施例中，上述的散熱蓋的頂部呈矩形，具有觀測窗的側牆連接頂部的一短邊。In an embodiment of the invention, the top of the heat dissipation cover has a rectangular shape, and a side wall of the observation window is connected to a short side of the top portion.
在本發明的一實施例中，上述的此至少一側牆的數量為多個，頂部的其中一邊緣未連接側牆，以外露出黏膠層。In an embodiment of the invention, the number of the at least one side wall is plural, and one of the edges of the top is not connected to the side wall, and the adhesive layer is exposed outside.
在本發明的一實施例中，上述的散熱蓋的頂部呈矩形，頂部的一短邊未連接側牆。In an embodiment of the invention, the top of the heat dissipation cover has a rectangular shape, and a short side of the top portion is not connected to the side wall.
在本發明的一實施例中，上述的黏膠層包括導熱膠或矽膠。In an embodiment of the invention, the adhesive layer comprises a thermal conductive adhesive or a silicone rubber.
基於上述，本發明的薄膜覆晶封裝結構透過在晶片上配置散熱蓋以快速地帶離晶片所產生的熱量。散熱蓋不接觸可撓性線路基板，以預留空間供可撓性線路基板彎曲，避免可撓性線路基板彎曲時頂到散熱蓋而使散熱蓋移位，或者避免散熱蓋造成可撓性線路基板無法正常彎曲。散熱蓋的至少一側外露出黏膠層，以方便觀看散熱蓋是否緊貼晶片的背表面上的黏膠層，確保散熱蓋不至於脫落以及晶片所產生的熱量能夠透過黏膠層傳遞至散熱蓋。Based on the above, the thin film flip chip package structure of the present invention transmits heat generated by disposing the heat dissipation cover on the wafer to quickly remove the heat generated by the wafer. The heat dissipation cover does not contact the flexible circuit substrate, and the space is reserved for bending the flexible circuit substrate, avoiding the displacement of the heat dissipation cover when the flexible circuit substrate is bent, or the flexible cover is prevented from being caused by the heat dissipation cover. The substrate cannot be bent normally. The adhesive layer is exposed on at least one side of the heat dissipation cover to facilitate viewing of the heat dissipation cover against the adhesive layer on the back surface of the wafer, ensuring that the heat dissipation cover does not fall off and the heat generated by the wafer can be transmitted to the heat dissipation through the adhesive layer. cover.
為讓本發明的上述特徵和優點能更明顯易懂，下文特舉實施例，並配合所附圖式作詳細說明如下。The above described features and advantages of the invention will be apparent from the following description.
圖1是依照本發明的一實施例的一種薄膜覆晶封裝結構的側視示意圖。圖2是圖1的立體示意圖。請參閱圖1與圖2，本實施例的薄膜覆晶封裝結構100包括一可撓性線路基板110、一晶片120、一散熱蓋130及一黏膠層140。可撓性線路基板110包括一可撓性基材111、一圖案化線路層112及一防銲層114。圖案化線路層112配置在可撓性基材111上，防銲層114配置在可撓性基材111上，以局部覆蓋圖案化線路層112且暴露出部分的圖案化線路層112。1 is a side elevational view of a thin film flip chip package structure in accordance with an embodiment of the present invention. Figure 2 is a perspective view of Figure 1. Referring to FIG. 1 and FIG. 2 , the thin film flip chip package structure 100 of the present embodiment includes a flexible circuit substrate 110 , a wafer 120 , a heat dissipation cover 130 , and an adhesive layer 140 . The flexible circuit substrate 110 includes a flexible substrate 111, a patterned wiring layer 112, and a solder resist layer 114. The patterned wiring layer 112 is disposed on the flexible substrate 111, and the solder resist layer 114 is disposed on the flexible substrate 111 to partially cover the patterned wiring layer 112 and expose a portion of the patterned wiring layer 112.
晶片120配置在可撓性線路基板110上，並透過多個凸塊126連接至圖案化線路層112，以與可撓性線路基板110電性連接。封裝膠體128配置在晶片120與可撓性線路基板110之間，以使晶片120可以穩固地連接於可撓性線路基板110並且保護晶片120與可撓性線路基板110間的電性接點。更具體而言，為能有效防止水氣或異物侵入造成電性接點損壞或電性異常，封裝膠體128亦會包覆晶片120之四周。The wafer 120 is disposed on the flexible circuit substrate 110 and connected to the patterned wiring layer 112 through a plurality of bumps 126 to be electrically connected to the flexible circuit substrate 110. The encapsulant 128 is disposed between the wafer 120 and the flexible circuit substrate 110 such that the wafer 120 can be firmly connected to the flexible circuit substrate 110 and protect the electrical contacts between the wafer 120 and the flexible circuit substrate 110. More specifically, the encapsulant 130 also covers the periphery of the wafer 120 in order to effectively prevent damage or electrical abnormality caused by moisture or foreign matter intrusion.
散熱蓋130包括一頂部132及至少一側牆134。在本實施例中，此至少一側牆134的數量為多個，這些側牆134連接頂部132，且各側牆134與頂部132之間的夾角大於等於90度且小於180度。更明確地說，在本實施例中，散熱蓋130的頂部132呈矩形，散熱蓋130包括了四個側牆134，這四個側牆134分別連接於矩形的頂部132的四個邊，且各側牆134與頂部132之間的夾角大於90度且小於180度(例如是135度)，而使各側牆134的外輪廓呈現出梯形。The heat dissipation cover 130 includes a top portion 132 and at least one side wall 134. In this embodiment, the number of the at least one side wall 134 is plural, and the side walls 134 are connected to the top portion 132, and the angle between each side wall 134 and the top portion 132 is greater than or equal to 90 degrees and less than 180 degrees. More specifically, in the present embodiment, the top portion 132 of the heat dissipation cover 130 has a rectangular shape, and the heat dissipation cover 130 includes four side walls 134 respectively connected to the four sides of the rectangular top portion 132, and The angle between each of the side walls 134 and the top portion 132 is greater than 90 degrees and less than 180 degrees (e.g., 135 degrees), and the outer contour of each of the side walls 134 exhibits a trapezoidal shape.
散熱蓋130的頂部132配置在晶片120的一背表面124上，且散熱蓋130的側牆134不接觸可撓性線路基板110。更詳細地說，側牆134在遠離頂部132的一側與可撓性線路基板110之間還留有間隙G。由於散熱蓋130與可撓性線路基板110之間預留了間隙G，可避免可撓性線路基板110彎曲時(例如可撓性線路基板110的兩側向上彎曲時)頂到散熱蓋130而可能使散熱蓋130發生移位的狀況，也可避免散熱蓋130影響到可撓性線路基板110的彎曲。The top 132 of the heat dissipation cover 130 is disposed on a back surface 124 of the wafer 120, and the sidewall 134 of the heat dissipation cover 130 does not contact the flexible circuit substrate 110. In more detail, the side wall 134 leaves a gap G between the side far from the top portion 132 and the flexible wiring substrate 110. Since the gap G is reserved between the heat dissipation cover 130 and the flexible circuit substrate 110, the flexible circuit substrate 110 can be prevented from being bent to the heat dissipation cover 130 when the flexible circuit substrate 110 is bent (for example, when both sides of the flexible circuit substrate 110 are bent upward). The situation in which the heat dissipation cover 130 may be displaced may also prevent the heat dissipation cover 130 from affecting the bending of the flexible circuit substrate 110.
值得一提的是，在本實施例中，散熱蓋130是一體成型的金屬薄板所構成，其具有一定程度的剛性及厚度，因此不會任意變形或彎折，且其材質例如是銅、鋁或其組合等等，但散熱蓋130的材質並不以上述為限制。It is worth mentioning that, in this embodiment, the heat dissipation cover 130 is formed by an integrally formed metal thin plate, which has a certain degree of rigidity and thickness, and thus is not arbitrarily deformed or bent, and the material thereof is, for example, copper or aluminum. Or a combination thereof or the like, but the material of the heat dissipation cover 130 is not limited to the above.
黏膠層140配置在晶片120的背表面124與散熱蓋130的頂部132之間，而使得散熱蓋130的頂部132透過黏膠層140連接於晶片120的背表面124。黏膠層140例如是導熱膠或矽膠，但黏膠層140的種類並不以此為限制，只要可以將散熱蓋130的頂部132固定於晶片120的背表面124，且能將晶片120所產生的熱量傳遞至散熱蓋130即可。The adhesive layer 140 is disposed between the back surface 124 of the wafer 120 and the top 132 of the heat dissipation cover 130 such that the top 132 of the heat dissipation cover 130 is coupled to the back surface 124 of the wafer 120 through the adhesive layer 140. The adhesive layer 140 is, for example, a thermal conductive adhesive or a silicone rubber, but the type of the adhesive layer 140 is not limited thereto, as long as the top 132 of the heat dissipation cover 130 can be fixed to the back surface 124 of the wafer 120, and the wafer 120 can be produced. The heat is transferred to the heat dissipation cover 130.
在本實施例中，散熱蓋130的至少一側外露出黏膠層140。更明確地說，由於散熱蓋130的頂部132呈矩形，散熱蓋130的頂部132具有相對的兩個長邊135與兩短邊133。在本實施例中，位在散熱蓋130的頂部132的至少一個短邊133上的側牆134包括一觀測窗136，此觀測窗136會外露出黏膠層140。如此一來，使用者或是機器便可透過觀測窗136來觀看或檢測散熱蓋是否緊貼晶片120的背表面124上的黏膠層140，有效地避免散熱蓋130在配置時頂部132未適當地連接於晶片120的背表面124，而產生脫落或影響散熱效果的狀況。In this embodiment, at least one side of the heat dissipation cover 130 exposes the adhesive layer 140. More specifically, since the top 132 of the heat dissipation cover 130 has a rectangular shape, the top portion 132 of the heat dissipation cover 130 has two opposite long sides 135 and two short sides 133. In the present embodiment, the side wall 134 located on at least one short side 133 of the top portion 132 of the heat dissipation cover 130 includes an observation window 136 that exposes the adhesive layer 140. In this way, the user or the machine can view or detect whether the heat dissipation cover is close to the adhesive layer 140 on the back surface 124 of the wafer 120 through the observation window 136, thereby effectively preventing the top cover 132 from being improperly disposed when the heat dissipation cover 130 is disposed. The ground surface is connected to the back surface 124 of the wafer 120 to cause a condition of falling off or affecting the heat dissipation effect.
值得一提的是，在本實施例中，由於散熱蓋130的頂部132是矩形，連接於頂部132的短邊133的側牆134的面積會小於連接於頂部132的長邊135的側牆134的面積，因此，在連接於頂部132的短邊133的側牆134上形成觀測窗136，可使得散熱蓋130能保持完整且面積較大的側牆134(也就是連接於頂部132的長邊135的側牆134)，以提供較佳的散熱效果。It is worth mentioning that in the present embodiment, since the top 132 of the heat dissipation cover 130 is rectangular, the area of the side wall 134 connected to the short side 133 of the top portion 132 may be smaller than the side wall 134 connected to the long side 135 of the top portion 132. The area, therefore, forms an observation window 136 on the side wall 134 that is coupled to the short side 133 of the top portion 132, such that the heat dissipation cover 130 can maintain a complete and large side wall 134 (i.e., connected to the long side of the top portion 132). 135 side wall 134) to provide better heat dissipation.
當然，在一未繪示實施例中，觀測窗136也可以是位在連接於頂部132的長邊135的側牆134上，製造者可以透過調整觀測窗136相對於其所在的側牆134的尺寸關係，在能夠觀測到散熱蓋130的頂部132連接於晶片120的背表面124的情況的前提之下，使散熱蓋130仍具有足夠的實體面積。換句話說，在一未繪示實施例中，當觀測窗136是位在連接於頂部132的長邊135的側牆134上時，觀測窗136相對於其所在的側牆134的尺寸比例可較小。例如，設置在長邊135的側牆134上的觀測窗136的尺寸可相同於設置在短邊133的側牆134上的觀測窗136，則散熱蓋130仍可保持相同的總實體面積。Of course, in an unillustrated embodiment, the viewing window 136 may also be located on the side wall 134 connected to the long side 135 of the top portion 132. The manufacturer may adjust the viewing window 136 relative to the side wall 134 where it is located. The dimensional relationship, under the premise that it can be observed that the top 132 of the heat dissipation cover 130 is attached to the back surface 124 of the wafer 120, the heat dissipation cover 130 still has a sufficient physical area. In other words, in an unillustrated embodiment, when the viewing window 136 is positioned on the side wall 134 attached to the long side 135 of the top portion 132, the size ratio of the viewing window 136 relative to the side wall 134 on which it is located may be Smaller. For example, the viewing window 136 disposed on the side wall 134 of the long side 135 can be the same size as the viewing window 136 disposed on the side wall 134 of the short side 133, so that the heat sink cover 130 can still maintain the same total physical area.
或者，在其他實施例中，散熱蓋130也可以有多個分別設置在不同側牆134上的觀測窗136，以方便從不同方向觀看散熱蓋130的頂部132連接於晶片120的背表面124的狀況。Alternatively, in other embodiments, the heat dissipation cover 130 may have a plurality of observation windows 136 respectively disposed on different side walls 134 to facilitate viewing of the top portion 132 of the heat dissipation cover 130 from the different directions to the back surface 124 of the wafer 120. situation.
當然，散熱蓋130的形式並不以上述為限制。圖3是依照本發明的另一實施例的一種薄膜覆晶封裝結構的側視示意圖。圖4是圖3的立體示意圖。需說明的是，在下面的實施例中，與前述實施例相同或相似的元件以相同或相似的符號表示，不再多加贅述。Of course, the form of the heat dissipation cover 130 is not limited to the above. 3 is a side elevational view of a thin film flip chip package structure in accordance with another embodiment of the present invention. Figure 4 is a perspective view of Figure 3. It is to be noted that, in the following embodiments, the same or similar elements as those of the foregoing embodiments are denoted by the same or similar symbols and will not be described again.
請參閱圖3與圖4，圖3的薄膜覆晶封裝結構100a與圖1的薄膜覆晶封裝結構100的主要差異在於，在圖1的實施例中，薄膜覆晶封裝結構100的散熱蓋130具有四個側牆134，薄膜覆晶封裝結構100透過位在散熱蓋130的頂部132的短邊133上的側牆134的觀測窗136外露出黏膠層140，以方便使用者觀看或是機器檢測散熱蓋130是否緊貼晶片120的背表面124上的黏膠層140。Referring to FIG. 3 and FIG. 4 , the main difference between the thin film flip chip package structure 100 a of FIG. 3 and the thin film flip chip package structure 100 of FIG. 1 is that, in the embodiment of FIG. 1 , the heat dissipation cover 130 of the thin film flip chip package structure 100 . With four side walls 134, the film flip-chip package structure 100 exposes the adhesive layer 140 through the observation window 136 of the side wall 134 located on the short side 133 of the top 132 of the heat dissipation cover 130 for convenient viewing by the user or the machine. It is detected whether the heat dissipation cover 130 is in close contact with the adhesive layer 140 on the back surface 124 of the wafer 120.
在本實施例中，薄膜覆晶封裝結構100a的散熱蓋130a具有兩個相對的側牆134，此兩側牆134分別連接到散熱蓋130a的頂部132的兩長邊135，也就是說，散熱蓋130a的頂部132的短邊133未連接側牆134，而直接外露出黏膠層140。In this embodiment, the heat dissipation cover 130a of the film flip chip package structure 100a has two opposite side walls 134 respectively connected to the two long sides 135 of the top portion 132 of the heat dissipation cover 130a, that is, heat dissipation. The short side 133 of the top portion 132 of the cover 130a is not connected to the side wall 134, and the adhesive layer 140 is directly exposed.
當然，在其他實施例中，薄膜覆晶封裝結構100a也可以具有三個相連的側牆134，其中兩個相對的側牆134連接到散熱蓋130a的頂部132的兩長邊135，剩下的一個側牆134連接到頂部132的其中一個短邊133，而使得散熱蓋130a的頂部132的另一個短邊133未連接側牆134，以外露出黏膠層140。或者，在其他實施例中，薄膜覆晶封裝結構100a也可以是散熱蓋130a的頂部132的至少一個長邊135未連接側牆134，而直接外露出黏膠層140。Of course, in other embodiments, the thin film flip chip package structure 100a may also have three connected side walls 134, wherein two opposite side walls 134 are connected to the two long sides 135 of the top 132 of the heat dissipation cover 130a, and the rest One side wall 134 is connected to one of the short sides 133 of the top portion 132 such that the other short side 133 of the top portion 132 of the heat dissipation cover 130a is not connected to the side wall 134, and the adhesive layer 140 is exposed. Alternatively, in other embodiments, the thin film flip-chip package structure 100a may also be that at least one long side 135 of the top portion 132 of the heat dissipation cover 130a is not connected to the sidewall spacer 134, and the adhesive layer 140 is directly exposed.
圖5是依照本發明的另一實施例的一種薄膜覆晶封裝結構的側視示意圖。請參閱圖5，圖5的薄膜覆晶封裝結構100b與圖3的薄膜覆晶封裝結構100a的主要差異在於，在圖3中，散熱蓋130a的各側牆134與頂部132之間的夾角大於90度且小於180度(例如是135度)。也就是說，在圖3中，各側牆134如同屋簷一樣地與頂部132之間呈傾斜的形式。FIG. 5 is a side elevational view of a thin film flip chip package structure in accordance with another embodiment of the present invention. Referring to FIG. 5, the main difference between the thin film flip chip package structure 100b of FIG. 5 and the thin film flip chip package structure 100a of FIG. 3 is that, in FIG. 3, the angle between each side wall 134 and the top portion 132 of the heat dissipation cover 130a is greater than 90 degrees and less than 180 degrees (for example, 135 degrees). That is, in FIG. 3, each of the side walls 134 is inclined like the eaves and the top 132.
在圖5中，散熱蓋130b的各側牆134與頂部132之間的夾角等於90度。也就是說，各側牆134垂直於頂部132。此設計可使薄膜覆晶封裝結構100b具有更小的尺寸。當然，在其他實施例中，側牆134也可以不是平面，也可以是弧面、規則或是不規則的曲面或是多個平面組成的形式，並不以圖面為限制。In FIG. 5, the angle between each of the side walls 134 and the top portion 132 of the heat dissipation cover 130b is equal to 90 degrees. That is, each side wall 134 is perpendicular to the top 132. This design allows the thin film flip chip package structure 100b to have a smaller size. Of course, in other embodiments, the side wall 134 may not be a plane, or may be a curved surface, a regular or an irregular curved surface or a plurality of planes, and is not limited by the drawing.
綜上所述，本發明的薄膜覆晶封裝結構透過在晶片上配置散熱蓋以快速地帶離晶片所產生的熱量。散熱蓋不接觸可撓性線路基板，以預留空間供可撓性線路基板彎曲，避免可撓性線路基板彎曲時頂到散熱蓋而使散熱蓋移位，或者避免散熱蓋造成可撓性線路基板無法正常彎曲。散熱蓋的至少一側外露出黏膠層，以方便觀看散熱蓋是否緊貼晶片的背表面上的黏膠層，確保散熱蓋不至於脫落以及晶片所產生的熱量能夠透過黏膠層傳遞至散熱蓋。In summary, the thin film flip chip package structure of the present invention transmits heat generated by disposing the heat dissipation cover on the wafer to quickly remove the heat generated by the wafer. The heat dissipation cover does not contact the flexible circuit substrate, and the space is reserved for bending the flexible circuit substrate, avoiding the displacement of the heat dissipation cover when the flexible circuit substrate is bent, or the flexible cover is prevented from being caused by the heat dissipation cover. The substrate cannot be bent normally. The adhesive layer is exposed on at least one side of the heat dissipation cover to facilitate viewing of the heat dissipation cover against the adhesive layer on the back surface of the wafer, ensuring that the heat dissipation cover does not fall off and the heat generated by the wafer can be transmitted to the heat dissipation through the adhesive layer. cover.
雖然本發明已以實施例揭露如上，然其並非用以限定本發明，任何所屬技術領域中具有通常知識者，在不脫離本發明的精神和範圍內，當可作些許的更動與潤飾，故本發明的保護範圍當視後附的申請專利範圍所界定者為準。Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention, and any one of ordinary skill in the art can make some changes and refinements without departing from the spirit and scope of the present invention. The scope of the invention is defined by the scope of the appended claims.
G‧‧‧間隙
100、100a、100b‧‧‧薄膜覆晶封裝結構
110‧‧‧可撓性線路基板
111‧‧‧可撓性基材
112‧‧‧圖案化線路層
114‧‧‧防銲層
120‧‧‧晶片
124‧‧‧背表面
126‧‧‧凸塊
128‧‧‧封裝膠體
130、130a、130b‧‧‧散熱蓋
132‧‧‧頂部
133‧‧‧短邊
134‧‧‧側牆
135‧‧‧長邊
136‧‧‧觀測窗
140‧‧‧黏膠層G‧‧‧ gap
100, 100a, 100b‧‧‧ film flip-chip package structure
110‧‧‧Flexible circuit substrate
111‧‧‧Flexible substrate
112‧‧‧ patterned circuit layer
114‧‧‧ solder mask
120‧‧‧ wafer
124‧‧‧Back surface
126‧‧‧Bumps
128‧‧‧Package colloid
130, 130a, 130b‧‧‧ heat sink cover
132‧‧‧ top
133‧‧‧ Short side
134‧‧‧Side wall
135‧‧‧ long side
136‧‧‧ observation window
140‧‧‧Adhesive layer
圖1是依照本發明的一實施例的一種薄膜覆晶封裝結構的側視示意圖。 圖2是圖1的立體示意圖。 圖3是依照本發明的另一實施例的一種薄膜覆晶封裝結構的側視示意圖。 圖4是圖3的立體示意圖。 圖5是依照本發明的另一實施例的一種薄膜覆晶封裝結構的側視示意圖。1 is a side elevational view of a thin film flip chip package structure in accordance with an embodiment of the present invention. Figure 2 is a perspective view of Figure 1. 3 is a side elevational view of a thin film flip chip package structure in accordance with another embodiment of the present invention. Figure 4 is a perspective view of Figure 3. FIG. 5 is a side elevational view of a thin film flip chip package structure in accordance with another embodiment of the present invention.
G‧‧‧間隙 G‧‧‧ gap
100‧‧‧薄膜覆晶封裝結構 100‧‧‧film flip chip package structure
110‧‧‧可撓性線路基板 110‧‧‧Flexible circuit substrate
111‧‧‧可撓性基材 111‧‧‧Flexible substrate
112‧‧‧圖案化線路層 112‧‧‧ patterned circuit layer
114‧‧‧防銲層 114‧‧‧ solder mask
120‧‧‧晶片 120‧‧‧ wafer
124‧‧‧背表面 124‧‧‧Back surface
126‧‧‧凸塊 126‧‧‧Bumps
128‧‧‧封裝膠體 128‧‧‧Package colloid
130‧‧‧散熱蓋 130‧‧‧heating cover
132‧‧‧頂部 132‧‧‧ top
134‧‧‧側牆 134‧‧‧Side wall
136‧‧‧觀測窗 136‧‧‧ observation window
140‧‧‧黏膠層 140‧‧‧Adhesive layer
Claims (9)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
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| TW105117419A TWI604579B (en) | 2016-06-02 | 2016-06-02 | Chip on film package structure |
| CN201610585324.5A CN107464792B (en) | 2016-06-02 | 2016-07-25 | Thin film flip chip packaging structure |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW105117419A TWI604579B (en) | 2016-06-02 | 2016-06-02 | Chip on film package structure |
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| TWI604579B true TWI604579B (en) | 2017-11-01 |
| TW201810561A TW201810561A (en) | 2018-03-16 |
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| TWI697079B (en) * | 2019-03-06 | 2020-06-21 | 南茂科技股份有限公司 | Chip on film package structure |
| TWI761060B (en) * | 2021-02-03 | 2022-04-11 | 南茂科技股份有限公司 | Chip on film package structure |
| TWI782471B (en) * | 2021-04-01 | 2022-11-01 | 南茂科技股份有限公司 | Chip structure and chip on film package structure |
| TWI833444B (en) * | 2022-11-14 | 2024-02-21 | 南茂科技股份有限公司 | Chip on film package structure |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW469614B (en) * | 1998-01-12 | 2001-12-21 | Seiko Epson Corp | Semiconductor device and the manufacturing method for the same and electronic machine |
| TWI248182B (en) * | 2005-04-27 | 2006-01-21 | Advanced Semiconductor Eng | Packaging structure and process for avoiding contact between heat slug and golden wires |
| TWI267178B (en) * | 2005-05-25 | 2006-11-21 | Chipmos Technologies Inc | Flexible thermally enhanced chip-on-film (COF) package |
| TWI334204B (en) * | 2006-12-07 | 2010-12-01 | Nanya Technology Corp | Package device |
| TWI338939B (en) * | 2007-08-15 | 2011-03-11 | Via Tech Inc | Package module and electronic device |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101110397A (en) * | 2006-07-18 | 2008-01-23 | 日月光半导体制造股份有限公司 | Chip packaging structure |
| US20090127700A1 (en) * | 2007-11-20 | 2009-05-21 | Matthew Romig | Thermal conductor lids for area array packaged multi-chip modules and methods to dissipate heat from multi-chip modules |
| CN201623147U (en) * | 2010-01-29 | 2010-11-03 | 江苏长电科技股份有限公司 | Normal chip packaging structure with exposed substrate and heat sink having locking hole and external heat-dissipating cap connected with heat sink through boss |
-
2016
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Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW469614B (en) * | 1998-01-12 | 2001-12-21 | Seiko Epson Corp | Semiconductor device and the manufacturing method for the same and electronic machine |
| TWI248182B (en) * | 2005-04-27 | 2006-01-21 | Advanced Semiconductor Eng | Packaging structure and process for avoiding contact between heat slug and golden wires |
| TWI267178B (en) * | 2005-05-25 | 2006-11-21 | Chipmos Technologies Inc | Flexible thermally enhanced chip-on-film (COF) package |
| TWI334204B (en) * | 2006-12-07 | 2010-12-01 | Nanya Technology Corp | Package device |
| TWI338939B (en) * | 2007-08-15 | 2011-03-11 | Via Tech Inc | Package module and electronic device |
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| Publication number | Publication date |
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| CN107464792B (en) | 2019-10-11 |
| TW201810561A (en) | 2018-03-16 |
| CN107464792A (en) | 2017-12-12 |
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